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     1 // SPDX-License-Identifier: GPL-2.0+
    2 /*
    3  * dts file for Xilinx ZynqMP ZCU102 RevB
    4  *
    5  * (C) Copyright 2016 - 2021, Xilinx, Inc.
    6  *
    7  * Michal Simek <michal.simek@xilinx.com>
    8  */
    9 
   10 #include "zynqmp-zcu102-revA.dts"
   11 
   12 / {
   13         model = "ZynqMP ZCU102 RevB";
   14         compatible = "xlnx,zynqmp-zcu102-revB", "xlnx,zynqmp-zcu102", "xlnx,zynqmp";
   15 };
   16 
   17 &gem3 {
   18         phy-handle = <&phyc>;
   19         phyc: ethernet-phy@c {
   20                 reg = <0xc>;
   21                 ti,rx-internal-delay = <0x8>;
   22                 ti,tx-internal-delay = <0xa>;
   23                 ti,fifo-depth = <0x1>;
   24                 ti,dp83867-rxctrl-strap-quirk;
   25                 /* reset-gpios = <&tca6416_u97 6 GPIO_ACTIVE_LOW>; */
   26         };
   27         /* Cleanup from RevA */
   28         /delete-node/ ethernet-phy@21;
   29 };
   30 
   31 /* Fix collision with u61 */
   32 &i2c0 {
   33         i2c-mux@75 {
   34                 i2c@2 {
   35                         max15303@1b { /* u8 */
   36                                 compatible = "maxim,max15303";
   37                                 reg = <0x1b>;
   38                         };
   39                         /delete-node/ max15303@20;
   40                 };
   41         };
   42 };
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