jz4740.dtsi

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    1 // SPDX-License-Identifier: GPL-2.0
    2 #include <dt-bindings/clock/ingenic,jz4740-cgu.h>
    3 #include <dt-bindings/clock/ingenic,tcu.h>
    4 
    5 / {
    6         #address-cells = <1>;
    7         #size-cells = <1>;
    8         compatible = "ingenic,jz4740";
    9 
   10         cpus {
   11                 #address-cells = <1>;
   12                 #size-cells = <0>;
   13 
   14                 cpu0: cpu@0 {
   15                         device_type = "cpu";
   16                         compatible = "ingenic,xburst-mxu1.0";
   17                         reg = <0>;
   18 
   19                         clocks = <&cgu JZ4740_CLK_CCLK>;
   20                         clock-names = "cpu";
   21                 };
   22         };
   23 
   24         cpuintc: interrupt-controller {
   25                 #address-cells = <0>;
   26                 #interrupt-cells = <1>;
   27                 interrupt-controller;
   28                 compatible = "mti,cpu-interrupt-controller";
   29         };
   30 
   31         intc: interrupt-controller@10001000 {
   32                 compatible = "ingenic,jz4740-intc";
   33                 reg = <0x10001000 0x14>;
   34 
   35                 interrupt-controller;
   36                 #interrupt-cells = <1>;
   37 
   38                 interrupt-parent = <&cpuintc>;
   39                 interrupts = <2>;
   40         };
   41 
   42         ext: ext {
   43                 compatible = "fixed-clock";
   44                 #clock-cells = <0>;
   45         };
   46 
   47         rtc: rtc {
   48                 compatible = "fixed-clock";
   49                 #clock-cells = <0>;
   50                 clock-frequency = <32768>;
   51         };
   52 
   53         cgu: jz4740-cgu@10000000 {
   54                 compatible = "ingenic,jz4740-cgu";
   55                 reg = <0x10000000 0x100>;
   56 
   57                 clocks = <&ext>, <&rtc>;
   58                 clock-names = "ext", "rtc";
   59 
   60                 #clock-cells = <1>;
   61         };
   62 
   63         tcu: timer@10002000 {
   64                 compatible = "ingenic,jz4740-tcu", "simple-mfd";
   65                 reg = <0x10002000 0x1000>;
   66                 #address-cells = <1>;
   67                 #size-cells = <1>;
   68                 ranges = <0x0 0x10002000 0x1000>;
   69 
   70                 #clock-cells = <1>;
   71 
   72                 clocks = <&cgu JZ4740_CLK_RTC>,
   73                          <&cgu JZ4740_CLK_EXT>,
   74                          <&cgu JZ4740_CLK_PCLK>,
   75                          <&cgu JZ4740_CLK_TCU>;
   76                 clock-names = "rtc", "ext", "pclk", "tcu";
   77 
   78                 interrupt-controller;
   79                 #interrupt-cells = <1>;
   80 
   81                 interrupt-parent = <&intc>;
   82                 interrupts = <23 22 21>;
   83 
   84                 watchdog: watchdog@0 {
   85                         compatible = "ingenic,jz4740-watchdog";
   86                         reg = <0x0 0xc>;
   87 
   88                         clocks = <&tcu TCU_CLK_WDT>;
   89                         clock-names = "wdt";
   90                 };
   91 
   92                 pwm: pwm@40 {
   93                         compatible = "ingenic,jz4740-pwm";
   94                         reg = <0x40 0x80>;
   95 
   96                         #pwm-cells = <3>;
   97 
   98                         clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,
   99                                  <&tcu TCU_CLK_TIMER2>, <&tcu TCU_CLK_TIMER3>,
  100                                  <&tcu TCU_CLK_TIMER4>, <&tcu TCU_CLK_TIMER5>,
  101                                  <&tcu TCU_CLK_TIMER6>, <&tcu TCU_CLK_TIMER7>;
  102                         clock-names = "timer0", "timer1", "timer2", "timer3",
  103                                       "timer4", "timer5", "timer6", "timer7";
  104                 };
  105         };
  106 
  107         rtc_dev: rtc@10003000 {
  108                 compatible = "ingenic,jz4740-rtc";
  109                 reg = <0x10003000 0x40>;
  110 
  111                 interrupt-parent = <&intc>;
  112                 interrupts = <15>;
  113 
  114                 clocks = <&cgu JZ4740_CLK_RTC>;
  115                 clock-names = "rtc";
  116         };
  117 
  118         pinctrl: pin-controller@10010000 {
  119                 compatible = "ingenic,jz4740-pinctrl";
  120                 reg = <0x10010000 0x400>;
  121 
  122                 #address-cells = <1>;
  123                 #size-cells = <0>;
  124 
  125                 gpa: gpio@0 {
  126                         compatible = "ingenic,jz4740-gpio";
  127                         reg = <0>;
  128 
  129                         gpio-controller;
  130                         gpio-ranges = <&pinctrl 0 0 32>;
  131                         #gpio-cells = <2>;
  132 
  133                         interrupt-controller;
  134                         #interrupt-cells = <2>;
  135 
  136                         interrupt-parent = <&intc>;
  137                         interrupts = <28>;
  138                 };
  139 
  140                 gpb: gpio@1 {
  141                         compatible = "ingenic,jz4740-gpio";
  142                         reg = <1>;
  143 
  144                         gpio-controller;
  145                         gpio-ranges = <&pinctrl 0 32 32>;
  146                         #gpio-cells = <2>;
  147 
  148                         interrupt-controller;
  149                         #interrupt-cells = <2>;
  150 
  151                         interrupt-parent = <&intc>;
  152                         interrupts = <27>;
  153                 };
  154 
  155                 gpc: gpio@2 {
  156                         compatible = "ingenic,jz4740-gpio";
  157                         reg = <2>;
  158 
  159                         gpio-controller;
  160                         gpio-ranges = <&pinctrl 0 64 32>;
  161                         #gpio-cells = <2>;
  162 
  163                         interrupt-controller;
  164                         #interrupt-cells = <2>;
  165 
  166                         interrupt-parent = <&intc>;
  167                         interrupts = <26>;
  168                 };
  169 
  170                 gpd: gpio@3 {
  171                         compatible = "ingenic,jz4740-gpio";
  172                         reg = <3>;
  173 
  174                         gpio-controller;
  175                         gpio-ranges = <&pinctrl 0 96 32>;
  176                         #gpio-cells = <2>;
  177 
  178                         interrupt-controller;
  179                         #interrupt-cells = <2>;
  180 
  181                         interrupt-parent = <&intc>;
  182                         interrupts = <25>;
  183                 };
  184         };
  185 
  186         aic: audio-controller@10020000 {
  187                 compatible = "ingenic,jz4740-i2s";
  188                 reg = <0x10020000 0x38>;
  189 
  190                 #sound-dai-cells = <0>;
  191 
  192                 interrupt-parent = <&intc>;
  193                 interrupts = <18>;
  194 
  195                 clocks = <&cgu JZ4740_CLK_AIC>,
  196                          <&cgu JZ4740_CLK_I2S>,
  197                          <&cgu JZ4740_CLK_EXT>,
  198                          <&cgu JZ4740_CLK_PLL_HALF>;
  199                 clock-names = "aic", "i2s", "ext", "pll half";
  200 
  201                 dmas = <&dmac 25 0xffffffff>, <&dmac 24 0xffffffff>;
  202                 dma-names = "rx", "tx";
  203         };
  204 
  205         codec: audio-codec@100200a4 {
  206                 compatible = "ingenic,jz4740-codec";
  207                 reg = <0x10020080 0x8>;
  208 
  209                 #sound-dai-cells = <0>;
  210 
  211                 clocks = <&cgu JZ4740_CLK_AIC>;
  212                 clock-names = "aic";
  213         };
  214 
  215         mmc: mmc@10021000 {
  216                 compatible = "ingenic,jz4740-mmc";
  217                 reg = <0x10021000 0x1000>;
  218 
  219                 clocks = <&cgu JZ4740_CLK_MMC>;
  220                 clock-names = "mmc";
  221 
  222                 interrupt-parent = <&intc>;
  223                 interrupts = <14>;
  224 
  225                 dmas = <&dmac 27 0xffffffff>, <&dmac 26 0xffffffff>;
  226                 dma-names = "rx", "tx";
  227 
  228                 cap-sd-highspeed;
  229                 cap-mmc-highspeed;
  230                 cap-sdio-irq;
  231         };
  232 
  233         uart0: serial@10030000 {
  234                 compatible = "ingenic,jz4740-uart";
  235                 reg = <0x10030000 0x100>;
  236 
  237                 interrupt-parent = <&intc>;
  238                 interrupts = <9>;
  239 
  240                 clocks = <&ext>, <&cgu JZ4740_CLK_UART0>;
  241                 clock-names = "baud", "module";
  242         };
  243 
  244         uart1: serial@10031000 {
  245                 compatible = "ingenic,jz4740-uart";
  246                 reg = <0x10031000 0x100>;
  247 
  248                 interrupt-parent = <&intc>;
  249                 interrupts = <8>;
  250 
  251                 clocks = <&ext>, <&cgu JZ4740_CLK_UART1>;
  252                 clock-names = "baud", "module";
  253         };
  254 
  255         adc: adc@10070000 {
  256                 compatible = "ingenic,jz4740-adc";
  257                 reg = <0x10070000 0x30>;
  258                 #io-channel-cells = <1>;
  259 
  260                 clocks = <&cgu JZ4740_CLK_ADC>;
  261                 clock-names = "adc";
  262 
  263                 interrupt-parent = <&intc>;
  264                 interrupts = <12>;
  265         };
  266 
  267         nemc: memory-controller@13010000 {
  268                 compatible = "ingenic,jz4740-nemc";
  269                 reg = <0x13010000 0x54>;
  270                 #address-cells = <2>;
  271                 #size-cells = <1>;
  272                 ranges = <1 0 0x18000000 0x4000000>,
  273                          <2 0 0x14000000 0x4000000>,
  274                          <3 0 0x0c000000 0x4000000>,
  275                          <4 0 0x08000000 0x4000000>;
  276 
  277                 clocks = <&cgu JZ4740_CLK_MCLK>;
  278         };
  279 
  280         ecc: ecc-controller@13010100 {
  281                 compatible = "ingenic,jz4740-ecc";
  282                 reg = <0x13010100 0x2C>;
  283 
  284                 clocks = <&cgu JZ4740_CLK_MCLK>;
  285         };
  286 
  287         dmac: dma-controller@13020000 {
  288                 compatible = "ingenic,jz4740-dma";
  289                 reg = <0x13020000 0xbc>, <0x13020300 0x14>;
  290                 #dma-cells = <2>;
  291 
  292                 interrupt-parent = <&intc>;
  293                 interrupts = <20>;
  294 
  295                 clocks = <&cgu JZ4740_CLK_DMA>;
  296         };
  297 
  298         uhc: usb@13030000 {
  299                 compatible = "ingenic,jz4740-ohci", "generic-ohci";
  300                 reg = <0x13030000 0x1000>;
  301 
  302                 clocks = <&cgu JZ4740_CLK_UHC>;
  303                 assigned-clocks = <&cgu JZ4740_CLK_UHC>;
  304                 assigned-clock-rates = <48000000>;
  305 
  306                 interrupt-parent = <&intc>;
  307                 interrupts = <3>;
  308 
  309                 status = "disabled";
  310         };
  311 
  312         udc: usb@13040000 {
  313                 compatible = "ingenic,jz4740-musb";
  314                 reg = <0x13040000 0x10000>;
  315 
  316                 interrupt-parent = <&intc>;
  317                 interrupts = <24>;
  318                 interrupt-names = "mc";
  319 
  320                 clocks = <&cgu JZ4740_CLK_UDC>;
  321                 clock-names = "udc";
  322         };
  323 
  324         lcd: lcd-controller@13050000 {
  325                 compatible = "ingenic,jz4740-lcd";
  326                 reg = <0x13050000 0x60>; /* LCDCMD1+4 */
  327 
  328                 interrupt-parent = <&intc>;
  329                 interrupts = <30>;
  330 
  331                 clocks = <&cgu JZ4740_CLK_LCD_PCLK>, <&cgu JZ4740_CLK_LCD>;
  332                 clock-names = "lcd_pclk", "lcd";
  333         };
  334 };
Cache object: 83486711e8d1656f6c2d6ec50a417bde
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sys/contrib/device-tree/src/mips/ingenic/jz4740.dtsi
