mt7628a.dtsi

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    1 // SPDX-License-Identifier: GPL-2.0
    2 
    3 / {
    4         #address-cells = <1>;
    5         #size-cells = <1>;
    6         compatible = "ralink,mt7628a-soc";
    7 
    8         cpus {
    9                 #address-cells = <1>;
   10                 #size-cells = <0>;
   11 
   12                 cpu@0 {
   13                         compatible = "mti,mips24KEc";
   14                         device_type = "cpu";
   15                         reg = <0>;
   16                 };
   17         };
   18 
   19         resetc: reset-controller {
   20                 compatible = "ralink,rt2880-reset";
   21                 #reset-cells = <1>;
   22         };
   23 
   24         cpuintc: interrupt-controller {
   25                 #address-cells = <0>;
   26                 #interrupt-cells = <1>;
   27                 interrupt-controller;
   28                 compatible = "mti,cpu-interrupt-controller";
   29         };
   30 
   31         palmbus@10000000 {
   32                 compatible = "palmbus";
   33                 reg = <0x10000000 0x200000>;
   34                 ranges = <0x0 0x10000000 0x1FFFFF>;
   35 
   36                 #address-cells = <1>;
   37                 #size-cells = <1>;
   38 
   39                 sysc: system-controller@0 {
   40                         compatible = "ralink,mt7620a-sysc", "syscon";
   41                         reg = <0x0 0x60>;
   42                 };
   43 
   44                 pinmux: pinmux@60 {
   45                         compatible = "pinctrl-single";
   46                         reg = <0x60 0x8>;
   47                         #address-cells = <1>;
   48                         #size-cells = <0>;
   49                         #pinctrl-cells = <2>;
   50                         pinctrl-single,bit-per-mux;
   51                         pinctrl-single,register-width = <32>;
   52                         pinctrl-single,function-mask = <0x1>;
   53 
   54                         pinmux_gpio_gpio: pinmux_gpio_gpio {
   55                                 pinctrl-single,bits = <0x0 0x0 0x3>;
   56                         };
   57 
   58                         pinmux_spi_cs1_cs: pinmux_spi_cs1_cs {
   59                                 pinctrl-single,bits = <0x0 0x0 0x30>;
   60                         };
   61 
   62                         pinmux_i2s_gpio: pinmux_i2s_gpio {
   63                                 pinctrl-single,bits = <0x0 0x40 0xc0>;
   64                         };
   65 
   66                         pinmux_uart0_uart: pinmux_uart0_uart0 {
   67                                 pinctrl-single,bits = <0x0 0x0 0x300>;
   68                         };
   69 
   70                         pinmux_sdmode_sdxc: pinmux_sdmode_sdxc {
   71                                 pinctrl-single,bits = <0x0 0x0 0xc00>;
   72                         };
   73 
   74                         pinmux_sdmode_gpio: pinmux_sdmode_gpio {
   75                                 pinctrl-single,bits = <0x0 0x400 0xc00>;
   76                         };
   77 
   78                         pinmux_spi_spi: pinmux_spi_spi {
   79                                 pinctrl-single,bits = <0x0 0x0 0x1000>;
   80                         };
   81 
   82                         pinmux_refclk_gpio: pinmux_refclk_gpio {
   83                                 pinctrl-single,bits = <0x0 0x40000 0x40000>;
   84                         };
   85 
   86                         pinmux_i2c_i2c: pinmux_i2c_i2c {
   87                                 pinctrl-single,bits = <0x0 0x0 0x300000>;
   88                         };
   89 
   90                         pinmux_uart1_uart: pinmux_uart1_uart1 {
   91                                 pinctrl-single,bits = <0x0 0x0 0x3000000>;
   92                         };
   93 
   94                         pinmux_uart2_uart: pinmux_uart2_uart {
   95                                 pinctrl-single,bits = <0x0 0x0 0xc000000>;
   96                         };
   97 
   98                         pinmux_pwm0_pwm: pinmux_pwm0_pwm {
   99                                 pinctrl-single,bits = <0x0 0x0 0x30000000>;
  100                         };
  101 
  102                         pinmux_pwm0_gpio: pinmux_pwm0_gpio {
  103                                 pinctrl-single,bits = <0x0 0x10000000
  104                                                        0x30000000>;
  105                         };
  106 
  107                         pinmux_pwm1_pwm: pinmux_pwm1_pwm {
  108                                 pinctrl-single,bits = <0x0 0x0 0xc0000000>;
  109                         };
  110 
  111                         pinmux_pwm1_gpio: pinmux_pwm1_gpio {
  112                                 pinctrl-single,bits = <0x0 0x40000000
  113                                                        0xc0000000>;
  114                         };
  115 
  116                         pinmux_p0led_an_gpio: pinmux_p0led_an_gpio {
  117                                 pinctrl-single,bits = <0x4 0x4 0xc>;
  118                         };
  119 
  120                         pinmux_p1led_an_gpio: pinmux_p1led_an_gpio {
  121                                 pinctrl-single,bits = <0x4 0x10 0x30>;
  122                         };
  123 
  124                         pinmux_p2led_an_gpio: pinmux_p2led_an_gpio {
  125                                 pinctrl-single,bits = <0x4 0x40 0xc0>;
  126                         };
  127 
  128                         pinmux_p3led_an_gpio: pinmux_p3led_an_gpio {
  129                                 pinctrl-single,bits = <0x4 0x100 0x300>;
  130                         };
  131 
  132                         pinmux_p4led_an_gpio: pinmux_p4led_an_gpio {
  133                                 pinctrl-single,bits = <0x4 0x400 0xc00>;
  134                         };
  135                 };
  136 
  137                 watchdog: watchdog@100 {
  138                         compatible = "mediatek,mt7621-wdt";
  139                         reg = <0x100 0x30>;
  140 
  141                         resets = <&resetc 8>;
  142                         reset-names = "wdt";
  143 
  144                         interrupt-parent = <&intc>;
  145                         interrupts = <24>;
  146 
  147                         status = "disabled";
  148                 };
  149 
  150                 intc: interrupt-controller@200 {
  151                         compatible = "ralink,rt2880-intc";
  152                         reg = <0x200 0x100>;
  153 
  154                         interrupt-controller;
  155                         #interrupt-cells = <1>;
  156 
  157                         resets = <&resetc 9>;
  158                         reset-names = "intc";
  159 
  160                         interrupt-parent = <&cpuintc>;
  161                         interrupts = <2>;
  162 
  163                         ralink,intc-registers = <0x9c 0xa0
  164                                                  0x6c 0xa4
  165                                                  0x80 0x78>;
  166                 };
  167 
  168                 memory-controller@300 {
  169                         compatible = "ralink,mt7620a-memc";
  170                         reg = <0x300 0x100>;
  171                 };
  172 
  173                 gpio: gpio@600 {
  174                         compatible = "mediatek,mt7621-gpio";
  175                         reg = <0x600 0x100>;
  176 
  177                         gpio-controller;
  178                         interrupt-controller;
  179                         #gpio-cells = <2>;
  180                         #interrupt-cells = <2>;
  181 
  182                         interrupt-parent = <&intc>;
  183                         interrupts = <6>;
  184                 };
  185 
  186                 spi: spi@b00 {
  187                         compatible = "ralink,mt7621-spi";
  188                         reg = <0xb00 0x100>;
  189 
  190                         pinctrl-names = "default";
  191                         pinctrl-0 = <&pinmux_spi_spi>;
  192 
  193                         resets = <&resetc 18>;
  194                         reset-names = "spi";
  195 
  196                         #address-cells = <1>;
  197                         #size-cells = <0>;
  198 
  199                         status = "disabled";
  200                 };
  201 
  202                 i2c: i2c@900 {
  203                         compatible = "mediatek,mt7621-i2c";
  204                         reg = <0x900 0x100>;
  205 
  206                         pinctrl-names = "default";
  207                         pinctrl-0 = <&pinmux_i2c_i2c>;
  208 
  209                         resets = <&resetc 16>;
  210                         reset-names = "i2c";
  211 
  212                         #address-cells = <1>;
  213                         #size-cells = <0>;
  214 
  215                         status = "disabled";
  216                 };
  217 
  218                 uart0: uartlite@c00 {
  219                         compatible = "ns16550a";
  220                         reg = <0xc00 0x100>;
  221 
  222                         pinctrl-names = "default";
  223                         pinctrl-0 = <&pinmux_uart0_uart>;
  224 
  225                         resets = <&resetc 12>;
  226                         reset-names = "uart0";
  227 
  228                         interrupt-parent = <&intc>;
  229                         interrupts = <20>;
  230 
  231                         reg-shift = <2>;
  232                 };
  233 
  234                 uart1: uart1@d00 {
  235                         compatible = "ns16550a";
  236                         reg = <0xd00 0x100>;
  237 
  238                         pinctrl-names = "default";
  239                         pinctrl-0 = <&pinmux_uart1_uart>;
  240 
  241                         resets = <&resetc 19>;
  242                         reset-names = "uart1";
  243 
  244                         interrupt-parent = <&intc>;
  245                         interrupts = <21>;
  246 
  247                         reg-shift = <2>;
  248                 };
  249 
  250                 uart2: uart2@e00 {
  251                         compatible = "ns16550a";
  252                         reg = <0xe00 0x100>;
  253 
  254                         pinctrl-names = "default";
  255                         pinctrl-0 = <&pinmux_uart2_uart>;
  256 
  257                         resets = <&resetc 20>;
  258                         reset-names = "uart2";
  259 
  260                         interrupt-parent = <&intc>;
  261                         interrupts = <22>;
  262 
  263                         reg-shift = <2>;
  264                 };
  265         };
  266 
  267         usb_phy: usb-phy@10120000 {
  268                 compatible = "mediatek,mt7628-usbphy";
  269                 reg = <0x10120000 0x1000>;
  270 
  271                 #phy-cells = <0>;
  272 
  273                 ralink,sysctl = <&sysc>;
  274                 resets = <&resetc 22 &resetc 25>;
  275                 reset-names = "host", "device";
  276         };
  277 
  278         usb@101c0000 {
  279                 compatible = "generic-ehci";
  280                 reg = <0x101c0000 0x1000>;
  281 
  282                 phys = <&usb_phy>;
  283                 phy-names = "usb";
  284 
  285                 interrupt-parent = <&intc>;
  286                 interrupts = <18>;
  287         };
  288 
  289         wmac: wmac@10300000 {
  290                 compatible = "mediatek,mt7628-wmac";
  291                 reg = <0x10300000 0x100000>;
  292 
  293                 interrupt-parent = <&cpuintc>;
  294                 interrupts = <6>;
  295 
  296                 status = "disabled";
  297         };
  298 };
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FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/src/mips/ralink/mt7628a.dtsi

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/mips/ralink/mt7628a.dtsi
