The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/powerpc/fsl/b4860si-post.dtsi

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    1 /*
    2  * B4860 Silicon/SoC Device Tree Source (post include)
    3  *
    4  * Copyright 2012 - 2015 Freescale Semiconductor Inc.
    5  *
    6  * Redistribution and use in source and binary forms, with or without
    7  * modification, are permitted provided that the following conditions are met:
    8  *     * Redistributions of source code must retain the above copyright
    9  *       notice, this list of conditions and the following disclaimer.
   10  *     * Redistributions in binary form must reproduce the above copyright
   11  *       notice, this list of conditions and the following disclaimer in the
   12  *       documentation and/or other materials provided with the distribution.
   13  *     * Neither the name of Freescale Semiconductor nor the
   14  *       names of its contributors may be used to endorse or promote products
   15  *       derived from this software without specific prior written permission.
   16  *
   17  *
   18  * ALTERNATIVELY, this software may be distributed under the terms of the
   19  * GNU General Public License ("GPL") as published by the Free Software
   20  * Foundation, either version 2 of that License or (at your option) any
   21  * later version.
   22  *
   23  * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
   24  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
   25  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
   26  * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
   27  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
   28  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
   29  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
   30  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
   31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
   32  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   33  */
   34 
   35 /include/ "b4si-post.dtsi"
   36 
   37 /* controller at 0x200000 */
   38 &pci0 {
   39         compatible = "fsl,b4860-pcie", "fsl,qoriq-pcie-v2.4";
   40 };
   41 
   42 &rio {
   43         compatible = "fsl,srio";
   44         interrupts = <16 2 1 20>;
   45         #address-cells = <2>;
   46         #size-cells = <2>;
   47         fsl,iommu-parent = <&pamu0>;
   48         ranges;
   49 
   50         port1 {
   51                 #address-cells = <2>;
   52                 #size-cells = <2>;
   53                 cell-index = <1>;
   54         };
   55 
   56         port2 {
   57                 #address-cells = <2>;
   58                 #size-cells = <2>;
   59                 cell-index = <2>;
   60         };
   61 };
   62 
   63 &dcsr {
   64         dcsr-epu@0 {
   65                 compatible = "fsl,b4860-dcsr-epu", "fsl,dcsr-epu";
   66         };
   67         dcsr-npc {
   68                 compatible = "fsl,b4860-dcsr-cnpc", "fsl,dcsr-cnpc";
   69         };
   70         dcsr-dpaa@9000 {
   71                 compatible = "fsl,b4860-dcsr-dpaa", "fsl,dcsr-dpaa";
   72         };
   73         dcsr-ocn@11000 {
   74                 compatible = "fsl,b4860-dcsr-ocn", "fsl,dcsr-ocn";
   75         };
   76         dcsr-ddr@13000 {
   77                 compatible = "fsl,dcsr-ddr";
   78                 dev-handle = <&ddr2>;
   79                 reg = <0x13000 0x1000>;
   80         };
   81         dcsr-nal@18000 {
   82                 compatible = "fsl,b4860-dcsr-nal", "fsl,dcsr-nal";
   83         };
   84         dcsr-rcpm@22000 {
   85                 compatible = "fsl,b4860-dcsr-rcpm", "fsl,dcsr-rcpm";
   86         };
   87         dcsr-snpc@30000 {
   88                 compatible = "fsl,b4860-dcsr-snpc", "fsl,dcsr-snpc";
   89         };
   90         dcsr-snpc@31000 {
   91                 compatible = "fsl,b4860-dcsr-snpc", "fsl,dcsr-snpc";
   92         };
   93         dcsr-cpu-sb-proxy@108000 {
   94                 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
   95                 cpu-handle = <&cpu1>;
   96                 reg = <0x108000 0x1000 0x109000 0x1000>;
   97         };
   98         dcsr-cpu-sb-proxy@110000 {
   99                 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
  100                 cpu-handle = <&cpu2>;
  101                 reg = <0x110000 0x1000 0x111000 0x1000>;
  102         };
  103         dcsr-cpu-sb-proxy@118000 {
  104                 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
  105                 cpu-handle = <&cpu3>;
  106                 reg = <0x118000 0x1000 0x119000 0x1000>;
  107         };
  108 };
  109 
  110 &bportals {
  111         bman-portal@38000 {
  112                 compatible = "fsl,bman-portal";
  113                 reg = <0x38000 0x4000>, <0x100e000 0x1000>;
  114                 interrupts = <133 2 0 0>;
  115         };
  116         bman-portal@3c000 {
  117                 compatible = "fsl,bman-portal";
  118                 reg = <0x3c000 0x4000>, <0x100f000 0x1000>;
  119                 interrupts = <135 2 0 0>;
  120         };
  121         bman-portal@40000 {
  122                 compatible = "fsl,bman-portal";
  123                 reg = <0x40000 0x4000>, <0x1010000 0x1000>;
  124                 interrupts = <137 2 0 0>;
  125         };
  126         bman-portal@44000 {
  127                 compatible = "fsl,bman-portal";
  128                 reg = <0x44000 0x4000>, <0x1011000 0x1000>;
  129                 interrupts = <139 2 0 0>;
  130         };
  131         bman-portal@48000 {
  132                 compatible = "fsl,bman-portal";
  133                 reg = <0x48000 0x4000>, <0x1012000 0x1000>;
  134                 interrupts = <141 2 0 0>;
  135         };
  136         bman-portal@4c000 {
  137                 compatible = "fsl,bman-portal";
  138                 reg = <0x4c000 0x4000>, <0x1013000 0x1000>;
  139                 interrupts = <143 2 0 0>;
  140         };
  141         bman-portal@50000 {
  142                 compatible = "fsl,bman-portal";
  143                 reg = <0x50000 0x4000>, <0x1014000 0x1000>;
  144                 interrupts = <145 2 0 0>;
  145         };
  146         bman-portal@54000 {
  147                 compatible = "fsl,bman-portal";
  148                 reg = <0x54000 0x4000>, <0x1015000 0x1000>;
  149                 interrupts = <147 2 0 0>;
  150         };
  151         bman-portal@58000 {
  152                 compatible = "fsl,bman-portal";
  153                 reg = <0x58000 0x4000>, <0x1016000 0x1000>;
  154                 interrupts = <149 2 0 0>;
  155         };
  156         bman-portal@5c000 {
  157                 compatible = "fsl,bman-portal";
  158                 reg = <0x5c000 0x4000>, <0x1017000 0x1000>;
  159                 interrupts = <151 2 0 0>;
  160         };
  161         bman-portal@60000 {
  162                 compatible = "fsl,bman-portal";
  163                 reg = <0x60000 0x4000>, <0x1018000 0x1000>;
  164                 interrupts = <153 2 0 0>;
  165         };
  166 };
  167 
  168 &qportals {
  169         qportal14: qman-portal@38000 {
  170                 compatible = "fsl,qman-portal";
  171                 reg = <0x38000 0x4000>, <0x100e000 0x1000>;
  172                 interrupts = <132 0x2 0 0>;
  173                 cell-index = <0xe>;
  174         };
  175         qportal15: qman-portal@3c000 {
  176                 compatible = "fsl,qman-portal";
  177                 reg = <0x3c000 0x4000>, <0x100f000 0x1000>;
  178                 interrupts = <134 0x2 0 0>;
  179                 cell-index = <0xf>;
  180         };
  181         qportal16: qman-portal@40000 {
  182                 compatible = "fsl,qman-portal";
  183                 reg = <0x40000 0x4000>, <0x1010000 0x1000>;
  184                 interrupts = <136 0x2 0 0>;
  185                 cell-index = <0x10>;
  186         };
  187         qportal17: qman-portal@44000 {
  188                 compatible = "fsl,qman-portal";
  189                 reg = <0x44000 0x4000>, <0x1011000 0x1000>;
  190                 interrupts = <138 0x2 0 0>;
  191                 cell-index = <0x11>;
  192         };
  193         qportal18: qman-portal@48000 {
  194                 compatible = "fsl,qman-portal";
  195                 reg = <0x48000 0x4000>, <0x1012000 0x1000>;
  196                 interrupts = <140 0x2 0 0>;
  197                 cell-index = <0x12>;
  198         };
  199         qportal19: qman-portal@4c000 {
  200                 compatible = "fsl,qman-portal";
  201                 reg = <0x4c000 0x4000>, <0x1013000 0x1000>;
  202                 interrupts = <142 0x2 0 0>;
  203                 cell-index = <0x13>;
  204         };
  205         qportal20: qman-portal@50000 {
  206                 compatible = "fsl,qman-portal";
  207                 reg = <0x50000 0x4000>, <0x1014000 0x1000>;
  208                 interrupts = <144 0x2 0 0>;
  209                 cell-index = <0x14>;
  210         };
  211         qportal21: qman-portal@54000 {
  212                 compatible = "fsl,qman-portal";
  213                 reg = <0x54000 0x4000>, <0x1015000 0x1000>;
  214                 interrupts = <146 0x2 0 0>;
  215                 cell-index = <0x15>;
  216         };
  217         qportal22: qman-portal@58000 {
  218                 compatible = "fsl,qman-portal";
  219                 reg = <0x58000 0x4000>, <0x1016000 0x1000>;
  220                 interrupts = <148 0x2 0 0>;
  221                 cell-index = <0x16>;
  222         };
  223         qportal23: qman-portal@5c000 {
  224                 compatible = "fsl,qman-portal";
  225                 reg = <0x5c000 0x4000>, <0x1017000 0x1000>;
  226                 interrupts = <150 0x2 0 0>;
  227                 cell-index = <0x17>;
  228         };
  229         qportal24: qman-portal@60000 {
  230                 compatible = "fsl,qman-portal";
  231                 reg = <0x60000 0x4000>, <0x1018000 0x1000>;
  232                 interrupts = <152 0x2 0 0>;
  233                 cell-index = <0x18>;
  234         };
  235 };
  236 
  237 &soc {
  238         ddr2: memory-controller@9000 {
  239                 compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
  240                 reg = <0x9000 0x1000>;
  241                 interrupts = <16 2 1 9>;
  242         };
  243 
  244         cpc: l3-cache-controller@10000 {
  245                 compatible = "fsl,b4860-l3-cache-controller", "cache";
  246         };
  247 
  248         guts: global-utilities@e0000 {
  249                 compatible = "fsl,b4860-device-config", "fsl,qoriq-device-config-2.0";
  250         };
  251 
  252         global-utilities@e1000 {
  253                 compatible = "fsl,b4860-clockgen", "fsl,b4-clockgen",
  254                               "fsl,qoriq-clockgen-2.0";
  255         };
  256 
  257         rcpm: global-utilities@e2000 {
  258                 compatible = "fsl,b4860-rcpm", "fsl,qoriq-rcpm-2.0";
  259         };
  260 
  261 /include/ "qoriq-fman3-0-1g-4.dtsi"
  262 /include/ "qoriq-fman3-0-1g-5.dtsi"
  263 /include/ "qoriq-fman3-0-10g-0.dtsi"
  264 /include/ "qoriq-fman3-0-10g-1.dtsi"
  265         fman@400000 {
  266                 enet4: ethernet@e8000 {
  267                 };
  268 
  269                 enet5: ethernet@ea000 {
  270                 };
  271 
  272                 enet6: ethernet@f0000 {
  273                 };
  274 
  275                 enet7: ethernet@f2000 {
  276                 };
  277         };
  278 
  279         L2_1: l2-cache-controller@c20000 {
  280                 compatible = "fsl,b4860-l2-cache-controller";
  281                 reg = <0xc20000 0x40000>;
  282                 next-level-cache = <&cpc>;
  283         };
  284 };

Cache object: de449dcbc2398d52ee9ec39f4bfc4150


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