The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/powerpc/fsl/elo3-dma-0.dtsi

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    1 /*
    2  * QorIQ Elo3 DMA device tree stub [ controller @ offset 0x100000 ]
    3  *
    4  * Copyright 2013 Freescale Semiconductor Inc.
    5  *
    6  * Redistribution and use in source and binary forms, with or without
    7  * modification, are permitted provided that the following conditions are met:
    8  *     * Redistributions of source code must retain the above copyright
    9  *       notice, this list of conditions and the following disclaimer.
   10  *     * Redistributions in binary form must reproduce the above copyright
   11  *       notice, this list of conditions and the following disclaimer in the
   12  *       documentation and/or other materials provided with the distribution.
   13  *     * Neither the name of Freescale Semiconductor nor the
   14  *       names of its contributors may be used to endorse or promote products
   15  *       derived from this software without specific prior written permission.
   16  *
   17  *
   18  * ALTERNATIVELY, this software may be distributed under the terms of the
   19  * GNU General Public License ("GPL") as published by the Free Software
   20  * Foundation, either version 2 of that License or (at your option) any
   21  * later version.
   22  *
   23  * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
   24  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
   25  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
   26  * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
   27  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
   28  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
   29  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
   30  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
   31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
   32  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   33  */
   34 
   35 dma0: dma@100300 {
   36         #address-cells = <1>;
   37         #size-cells = <1>;
   38         compatible = "fsl,elo3-dma";
   39         reg = <0x100300 0x4>,
   40               <0x100600 0x4>;
   41         ranges = <0x0 0x100100 0x500>;
   42         dma-channel@0 {
   43                 compatible = "fsl,eloplus-dma-channel";
   44                 reg = <0x0 0x80>;
   45                 interrupts = <28 2 0 0>;
   46         };
   47         dma-channel@80 {
   48                 compatible = "fsl,eloplus-dma-channel";
   49                 reg = <0x80 0x80>;
   50                 interrupts = <29 2 0 0>;
   51         };
   52         dma-channel@100 {
   53                 compatible = "fsl,eloplus-dma-channel";
   54                 reg = <0x100 0x80>;
   55                 interrupts = <30 2 0 0>;
   56         };
   57         dma-channel@180 {
   58                 compatible = "fsl,eloplus-dma-channel";
   59                 reg = <0x180 0x80>;
   60                 interrupts = <31 2 0 0>;
   61         };
   62         dma-channel@300 {
   63                 compatible = "fsl,eloplus-dma-channel";
   64                 reg = <0x300 0x80>;
   65                 interrupts = <76 2 0 0>;
   66         };
   67         dma-channel@380 {
   68                 compatible = "fsl,eloplus-dma-channel";
   69                 reg = <0x380 0x80>;
   70                 interrupts = <77 2 0 0>;
   71         };
   72         dma-channel@400 {
   73                 compatible = "fsl,eloplus-dma-channel";
   74                 reg = <0x400 0x80>;
   75                 interrupts = <78 2 0 0>;
   76         };
   77         dma-channel@480 {
   78                 compatible = "fsl,eloplus-dma-channel";
   79                 reg = <0x480 0x80>;
   80                 interrupts = <79 2 0 0>;
   81         };
   82 };

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