mpc8548cds_32b.dts

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    1 // SPDX-License-Identifier: GPL-2.0-or-later
    2 /*
    3  * MPC8548 CDS Device Tree Source (32-bit address map)
    4  *
    5  * Copyright 2006, 2008, 2011-2012 Freescale Semiconductor Inc.
    6  */
    7 
    8 /include/ "mpc8548si-pre.dtsi"
    9 
   10 / {
   11         model = "MPC8548CDS";
   12         compatible = "MPC8548CDS", "MPC85xxCDS";
   13 
   14         memory {
   15                 device_type = "memory";
   16                 reg = <0 0 0x0 0x8000000>;      // 128M at 0x0
   17         };
   18 
   19         board_lbc: lbc: localbus@e0005000 {
   20                 reg = <0 0xe0005000 0 0x1000>;
   21 
   22                 ranges = <0x0 0x0 0x0 0xff000000 0x01000000
   23                           0x1 0x0 0x0 0xf8004000 0x00001000>;
   24 
   25         };
   26 
   27         board_soc: soc: soc8548@e0000000 {
   28                 ranges = <0 0x0 0xe0000000 0x100000>;
   29         };
   30 
   31         board_pci0: pci0: pci@e0008000 {
   32                 reg = <0 0xe0008000 0 0x1000>;
   33                 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x10000000
   34                           0x1000000 0x0 0x00000000 0 0xe2000000 0x0 0x800000>;
   35                 clock-frequency = <66666666>;
   36         };
   37 
   38         pci1: pci@e0009000 {
   39                 reg = <0 0xe0009000 0 0x1000>;
   40                 ranges = <0x2000000 0x0 0x90000000 0 0x90000000 0x0 0x10000000
   41                           0x1000000 0x0 0x00000000 0 0xe2800000 0x0 0x800000>;
   42                 clock-frequency = <66666666>;
   43                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
   44                 interrupt-map = <
   45 
   46                         /* IDSEL 0x15 */
   47                         0xa800 0x0 0x0 0x1 &mpic 0xb 0x1 0 0
   48                         0xa800 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
   49                         0xa800 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
   50                         0xa800 0x0 0x0 0x4 &mpic 0x3 0x1 0 0>;
   51         };
   52 
   53         pci2: pcie@e000a000 {
   54                 reg = <0 0xe000a000 0 0x1000>;
   55                 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
   56                           0x1000000 0x0 0x00000000 0 0xe3000000 0x0 0x100000>;
   57                 pcie@0 {
   58                         ranges = <0x2000000 0x0 0xa0000000
   59                                   0x2000000 0x0 0xa0000000
   60                                   0x0 0x20000000
   61 
   62                                   0x1000000 0x0 0x0
   63                                   0x1000000 0x0 0x0
   64                                   0x0 0x100000>;
   65                 };
   66         };
   67 
   68         rio: rapidio@e00c0000 {
   69                 reg = <0x0 0xe00c0000 0x0 0x20000>;
   70                 port1 {
   71                         ranges = <0x0 0x0 0x0 0xc0000000 0x0 0x20000000>;
   72                 };
   73         };
   74 };
   75 
   76 /*
   77  * mpc8548cds.dtsi must be last to ensure board_pci0 overrides pci0 settings
   78  * for interrupt-map & interrupt-map-mask.
   79  */
   80 
   81 /include/ "mpc8548si-post.dtsi"
   82 /include/ "mpc8548cds.dtsi"

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FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/src/powerpc/fsl/mpc8548cds_32b.dts

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sys/contrib/device-tree/src/powerpc/fsl/mpc8548cds_32b.dts