p1010si-post.dtsi

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    1 /*
    2  * P1010/P1014 Silicon/SoC Device Tree Source (post include)
    3  *
    4  * Copyright 2011 Freescale Semiconductor Inc.
    5  *
    6  * Redistribution and use in source and binary forms, with or without
    7  * modification, are permitted provided that the following conditions are met:
    8  *     * Redistributions of source code must retain the above copyright
    9  *       notice, this list of conditions and the following disclaimer.
   10  *     * Redistributions in binary form must reproduce the above copyright
   11  *       notice, this list of conditions and the following disclaimer in the
   12  *       documentation and/or other materials provided with the distribution.
   13  *     * Neither the name of Freescale Semiconductor nor the
   14  *       names of its contributors may be used to endorse or promote products
   15  *       derived from this software without specific prior written permission.
   16  *
   17  *
   18  * ALTERNATIVELY, this software may be distributed under the terms of the
   19  * GNU General Public License ("GPL") as published by the Free Software
   20  * Foundation, either version 2 of that License or (at your option) any
   21  * later version.
   22  *
   23  * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
   24  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
   25  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
   26  * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
   27  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
   28  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
   29  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
   30  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
   31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
   32  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   33  */
   34 
   35 &ifc {
   36         #address-cells = <2>;
   37         #size-cells = <1>;
   38         compatible = "fsl,ifc", "simple-bus";
   39         interrupts = <16 2 0 0 19 2 0 0>;
   40 };
   41 
   42 /* controller at 0x9000 */
   43 &pci0 {
   44         compatible = "fsl,p1010-pcie", "fsl,qoriq-pcie-v2.3";
   45         device_type = "pci";
   46         #size-cells = <2>;
   47         #address-cells = <3>;
   48         bus-range = <0 255>;
   49         clock-frequency = <33333333>;
   50         interrupts = <16 2 0 0>;
   51 
   52         pcie@0 {
   53                 reg = <0 0 0 0 0>;
   54                 #interrupt-cells = <1>;
   55                 #size-cells = <2>;
   56                 #address-cells = <3>;
   57                 device_type = "pci";
   58                 interrupts = <16 2 0 0>;
   59                 interrupt-map-mask = <0xf800 0 0 7>;
   60                 interrupt-map = <
   61                         /* IDSEL 0x0 */
   62                         0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
   63                         0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
   64                         0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
   65                         0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
   66                         >;
   67         };
   68 };
   69 
   70 /* controller at 0xa000 */
   71 &pci1 {
   72         compatible = "fsl,p1010-pcie", "fsl,qoriq-pcie-v2.3";
   73         device_type = "pci";
   74         #size-cells = <2>;
   75         #address-cells = <3>;
   76         bus-range = <0 255>;
   77         clock-frequency = <33333333>;
   78         interrupts = <16 2 0 0>;
   79 
   80         pcie@0 {
   81                 reg = <0 0 0 0 0>;
   82                 #interrupt-cells = <1>;
   83                 #size-cells = <2>;
   84                 #address-cells = <3>;
   85                 device_type = "pci";
   86                 interrupts = <16 2 0 0>;
   87                 interrupt-map-mask = <0xf800 0 0 7>;
   88 
   89                 interrupt-map = <
   90                         /* IDSEL 0x0 */
   91                         0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
   92                         0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
   93                         0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
   94                         0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
   95                         >;
   96         };
   97 };
   98 
   99 &soc {
  100         #address-cells = <1>;
  101         #size-cells = <1>;
  102         device_type = "soc";
  103         compatible = "fsl,p1010-immr", "simple-bus";
  104         bus-frequency = <0>;            // Filled out by uboot.
  105 
  106         ecm-law@0 {
  107                 compatible = "fsl,ecm-law";
  108                 reg = <0x0 0x1000>;
  109                 fsl,num-laws = <12>;
  110         };
  111 
  112         ecm@1000 {
  113                 compatible = "fsl,p1010-ecm", "fsl,ecm";
  114                 reg = <0x1000 0x1000>;
  115                 interrupts = <16 2 0 0>;
  116         };
  117 
  118         memory-controller@2000 {
  119                 compatible = "fsl,p1010-memory-controller";
  120                 reg = <0x2000 0x1000>;
  121                 interrupts = <16 2 0 0>;
  122         };
  123 
  124 /include/ "pq3-i2c-0.dtsi"
  125         i2c@3000 {
  126                 fsl,i2c-erratum-a004447;
  127         };
  128 
  129 /include/ "pq3-i2c-1.dtsi"
  130         i2c@3100 {
  131                 fsl,i2c-erratum-a004447;
  132         };
  133 
  134 /include/ "pq3-duart-0.dtsi"
  135 /include/ "pq3-espi-0.dtsi"
  136         spi0: spi@7000 {
  137                 fsl,espi-num-chipselects = <1>;
  138         };
  139 
  140 /include/ "pq3-gpio-0.dtsi"
  141 /include/ "pq3-sata2-0.dtsi"
  142 /include/ "pq3-sata2-1.dtsi"
  143 
  144         can0: can@1c000 {
  145                 compatible = "fsl,p1010-flexcan";
  146                 reg = <0x1c000 0x1000>;
  147                 interrupts = <48 0x2 0 0>;
  148                 big-endian;
  149         };
  150 
  151         can1: can@1d000 {
  152                 compatible = "fsl,p1010-flexcan";
  153                 reg = <0x1d000 0x1000>;
  154                 interrupts = <61 0x2 0 0>;
  155                 big-endian;
  156         };
  157 
  158         L2: l2-cache-controller@20000 {
  159                 compatible = "fsl,p1010-l2-cache-controller",
  160                                 "fsl,p1014-l2-cache-controller";
  161                 reg = <0x20000 0x1000>;
  162                 cache-line-size = <32>; // 32 bytes
  163                 cache-size = <0x40000>; // L2,256K
  164                 interrupts = <16 2 0 0>;
  165         };
  166 
  167 /include/ "pq3-dma-0.dtsi"
  168 /include/ "pq3-usb2-dr-0.dtsi"
  169         usb@22000 {
  170                 compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr";
  171         };
  172 /include/ "pq3-esdhc-0.dtsi"
  173         sdhc@2e000 {
  174                 compatible = "fsl,p1010-esdhc", "fsl,esdhc";
  175                 sdhci,auto-cmd12;
  176         };
  177 
  178 /include/ "pq3-sec4.4-0.dtsi"
  179 /include/ "pq3-mpic.dtsi"
  180 /include/ "pq3-mpic-timer-B.dtsi"
  181 
  182 /include/ "pq3-etsec2-0.dtsi"
  183 /include/ "pq3-etsec2-1.dtsi"
  184 /include/ "pq3-etsec2-2.dtsi"
  185 
  186         global-utilities@e0000 {
  187                 compatible = "fsl,p1010-guts";
  188                 reg = <0xe0000 0x1000>;
  189                 fsl,has-rstcr;
  190         };
  191 };

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FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/src/powerpc/fsl/p1010si-post.dtsi

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sys/contrib/device-tree/src/powerpc/fsl/p1010si-post.dtsi