The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/powerpc/fsl/p1020rdb-pc_32b.dts

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    1 /*
    2  * P1020 RDB-PC Device Tree Source (32-bit address map)
    3  *
    4  * Copyright 2012 Freescale Semiconductor Inc.
    5  *
    6  * Redistribution and use in source and binary forms, with or without
    7  * modification, are permitted provided that the following conditions are met:
    8  *     * Redistributions of source code must retain the above copyright
    9  *       notice, this list of conditions and the following disclaimer.
   10  *     * Redistributions in binary form must reproduce the above copyright
   11  *       notice, this list of conditions and the following disclaimer in the
   12  *       documentation and/or other materials provided with the distribution.
   13  *     * Neither the name of Freescale Semiconductor nor the
   14  *       names of its contributors may be used to endorse or promote products
   15  *       derived from this software without specific prior written permission.
   16  *
   17  *
   18  * ALTERNATIVELY, this software may be distributed under the terms of the
   19  * GNU General Public License ("GPL") as published by the Free Software
   20  * Foundation, either version 2 of that License or (at your option) any
   21  * later version.
   22  *
   23  * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
   24  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
   25  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
   26  * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
   27  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
   28  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
   29  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
   30  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
   31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
   32  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   33  */
   34 
   35 /include/ "p1020si-pre.dtsi"
   36 / {
   37         model = "fsl,P1020RDB-PC";
   38         compatible = "fsl,P1020RDB-PC";
   39 
   40         memory {
   41                 device_type = "memory";
   42         };
   43 
   44         lbc: localbus@ffe05000 {
   45                 reg = <0 0xffe05000 0 0x1000>;
   46 
   47                 /* NOR, NAND Flashes and Vitesse 5 port L2 switch */
   48                 ranges = <0x0 0x0 0x0 0xef000000 0x01000000
   49                           0x1 0x0 0x0 0xff800000 0x00040000
   50                           0x2 0x0 0x0 0xffb00000 0x00020000
   51                           0x3 0x0 0x0 0xffa00000 0x00020000>;
   52         };
   53 
   54         soc: soc@ffe00000 {
   55                 ranges = <0x0 0x0 0xffe00000 0x100000>;
   56         };
   57 
   58         pci0: pcie@ffe09000 {
   59                 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
   60                           0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
   61                 reg = <0 0xffe09000 0 0x1000>;
   62                 pcie@0 {
   63                         ranges = <0x2000000 0x0 0xa0000000
   64                                   0x2000000 0x0 0xa0000000
   65                                   0x0 0x20000000
   66 
   67                                   0x1000000 0x0 0x0
   68                                   0x1000000 0x0 0x0
   69                                   0x0 0x100000>;
   70                 };
   71         };
   72 
   73         pci1: pcie@ffe0a000 {
   74                 reg = <0 0xffe0a000 0 0x1000>;
   75                 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
   76                           0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
   77                 pcie@0 {
   78                         ranges = <0x2000000 0x0 0x80000000
   79                                   0x2000000 0x0 0x80000000
   80                                   0x0 0x20000000
   81 
   82                                   0x1000000 0x0 0x0
   83                                   0x1000000 0x0 0x0
   84                                   0x0 0x100000>;
   85                 };
   86         };
   87 };
   88 
   89 /include/ "p1020rdb-pc.dtsi"
   90 /include/ "p1020si-post.dtsi"

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