p1022si-post.dtsi

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    1 /*
    2  * P1022/P1013 Silicon/SoC Device Tree Source (post include)
    3  *
    4  * Copyright 2011 Freescale Semiconductor Inc.
    5  *
    6  * Redistribution and use in source and binary forms, with or without
    7  * modification, are permitted provided that the following conditions are met:
    8  *     * Redistributions of source code must retain the above copyright
    9  *       notice, this list of conditions and the following disclaimer.
   10  *     * Redistributions in binary form must reproduce the above copyright
   11  *       notice, this list of conditions and the following disclaimer in the
   12  *       documentation and/or other materials provided with the distribution.
   13  *     * Neither the name of Freescale Semiconductor nor the
   14  *       names of its contributors may be used to endorse or promote products
   15  *       derived from this software without specific prior written permission.
   16  *
   17  *
   18  * ALTERNATIVELY, this software may be distributed under the terms of the
   19  * GNU General Public License ("GPL") as published by the Free Software
   20  * Foundation, either version 2 of that License or (at your option) any
   21  * later version.
   22  *
   23  * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
   24  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
   25  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
   26  * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
   27  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
   28  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
   29  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
   30  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
   31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
   32  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   33  */
   34 
   35 &lbc {
   36         #address-cells = <2>;
   37         #size-cells = <1>;
   38         /*
   39          * The localbus on the P1022 is not a simple-bus because of the eLBC
   40          * pin muxing when the DIU is enabled.
   41          */
   42         compatible = "fsl,p1022-elbc", "fsl,elbc";
   43         interrupts = <19 2 0 0>,
   44                      <16 2 0 0>;
   45 };
   46 
   47 /* controller at 0x9000 */
   48 &pci0 {
   49         compatible = "fsl,mpc8548-pcie";
   50         device_type = "pci";
   51         #size-cells = <2>;
   52         #address-cells = <3>;
   53         bus-range = <0 255>;
   54         clock-frequency = <33333333>;
   55         interrupts = <16 2 0 0>;
   56 
   57         pcie@0 {
   58                 reg = <0 0 0 0 0>;
   59                 #interrupt-cells = <1>;
   60                 #size-cells = <2>;
   61                 #address-cells = <3>;
   62                 device_type = "pci";
   63                 interrupts = <16 2 0 0>;
   64                 interrupt-map-mask = <0xf800 0 0 7>;
   65                 interrupt-map = <
   66                         /* IDSEL 0x0 */
   67                         0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
   68                         0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
   69                         0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
   70                         0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
   71                         >;
   72         };
   73 };
   74 
   75 /* controller at 0xa000 */
   76 &pci1 {
   77         compatible = "fsl,mpc8548-pcie";
   78         device_type = "pci";
   79         #size-cells = <2>;
   80         #address-cells = <3>;
   81         bus-range = <0 255>;
   82         clock-frequency = <33333333>;
   83         interrupts = <16 2 0 0>;
   84 
   85         pcie@0 {
   86                 reg = <0 0 0 0 0>;
   87                 #interrupt-cells = <1>;
   88                 #size-cells = <2>;
   89                 #address-cells = <3>;
   90                 device_type = "pci";
   91                 interrupts = <16 2 0 0>;
   92                 interrupt-map-mask = <0xf800 0 0 7>;
   93 
   94                 interrupt-map = <
   95                         /* IDSEL 0x0 */
   96                         0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
   97                         0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
   98                         0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
   99                         0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
  100                         >;
  101         };
  102 };
  103 
  104 /* controller at 0xb000 */
  105 &pci2 {
  106         compatible = "fsl,mpc8548-pcie";
  107         device_type = "pci";
  108         #size-cells = <2>;
  109         #address-cells = <3>;
  110         bus-range = <0 255>;
  111         clock-frequency = <33333333>;
  112         interrupts = <16 2 0 0>;
  113 
  114         pcie@0 {
  115                 reg = <0 0 0 0 0>;
  116                 #interrupt-cells = <1>;
  117                 #size-cells = <2>;
  118                 #address-cells = <3>;
  119                 device_type = "pci";
  120                 interrupts = <16 2 0 0>;
  121                 interrupt-map-mask = <0xf800 0 0 7>;
  122 
  123                 interrupt-map = <
  124                         /* IDSEL 0x0 */
  125                         0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0
  126                         0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0
  127                         0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0
  128                         0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0
  129                         >;
  130         };
  131 };
  132 
  133 &soc {
  134         #address-cells = <1>;
  135         #size-cells = <1>;
  136         device_type = "soc";
  137         compatible = "fsl,p1022-immr", "simple-bus";
  138         bus-frequency = <0>;            // Filled out by uboot.
  139 
  140         ecm-law@0 {
  141                 compatible = "fsl,ecm-law";
  142                 reg = <0x0 0x1000>;
  143                 fsl,num-laws = <12>;
  144         };
  145 
  146         ecm@1000 {
  147                 compatible = "fsl,p1022-ecm", "fsl,ecm";
  148                 reg = <0x1000 0x1000>;
  149                 interrupts = <16 2 0 0>;
  150         };
  151 
  152         memory-controller@2000 {
  153                 compatible = "fsl,p1022-memory-controller";
  154                 reg = <0x2000 0x1000>;
  155                 interrupts = <16 2 0 0>;
  156         };
  157 
  158 /include/ "pq3-i2c-0.dtsi"
  159 /include/ "pq3-i2c-1.dtsi"
  160 /include/ "pq3-duart-0.dtsi"
  161 /include/ "pq3-espi-0.dtsi"
  162         spi@7000 {
  163                 fsl,espi-num-chipselects = <4>;
  164         };
  165 
  166 /include/ "pq3-dma-1.dtsi"
  167         dma@c300 {
  168                 dma00: dma-channel@0 {
  169                         compatible = "fsl,ssi-dma-channel";
  170                 };
  171                 dma01: dma-channel@80 {
  172                         compatible = "fsl,ssi-dma-channel";
  173                 };
  174         };
  175 
  176 /include/ "pq3-gpio-0.dtsi"
  177 
  178         display: display@10000 {
  179                 compatible = "fsl,diu", "fsl,p1022-diu";
  180                 reg = <0x10000 1000>;
  181                 interrupts = <64 2 0 0>;
  182         };
  183 
  184         ssi@15000 {
  185                 compatible = "fsl,mpc8610-ssi";
  186                 cell-index = <0>;
  187                 reg = <0x15000 0x100>;
  188                 interrupts = <75 2 0 0>;
  189                 fsl,playback-dma = <&dma00>;
  190                 fsl,capture-dma = <&dma01>;
  191                 fsl,fifo-depth = <15>;
  192         };
  193 
  194 /include/ "pq3-sata2-0.dtsi"
  195 /include/ "pq3-sata2-1.dtsi"
  196 
  197         L2: l2-cache-controller@20000 {
  198                 compatible = "fsl,p1022-l2-cache-controller";
  199                 reg = <0x20000 0x1000>;
  200                 cache-line-size = <32>; // 32 bytes
  201                 cache-size = <0x40000>; // L2,256K
  202                 interrupts = <16 2 0 0>;
  203         };
  204 
  205 /include/ "pq3-dma-0.dtsi"
  206 /include/ "pq3-usb2-dr-0.dtsi"
  207         usb@22000 {
  208                 compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr";
  209         };
  210 /include/ "pq3-usb2-dr-1.dtsi"
  211         usb@23000 {
  212                 compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr";
  213         };
  214 
  215 /include/ "pq3-esdhc-0.dtsi"
  216         sdhc@2e000 {
  217                 compatible = "fsl,p1022-esdhc", "fsl,esdhc";
  218                 sdhci,auto-cmd12;
  219         };
  220 
  221 /include/ "pq3-sec3.3-0.dtsi"
  222 /include/ "pq3-mpic.dtsi"
  223 /include/ "pq3-mpic-timer-B.dtsi"
  224 
  225 /include/ "pq3-etsec2-0.dtsi"
  226         enet0: enet0_grp2: ethernet@b0000 {
  227                 fsl,wake-on-filer;
  228         };
  229 
  230 /include/ "pq3-etsec2-1.dtsi"
  231         enet1: enet1_grp2: ethernet@b1000 {
  232                 fsl,wake-on-filer;
  233         };
  234 
  235         global-utilities@e0000 {
  236                 compatible = "fsl,p1022-guts";
  237                 reg = <0xe0000 0x1000>;
  238                 fsl,has-rstcr;
  239         };
  240 
  241         power@e0070{
  242                 compatible = "fsl,mpc8536-pmc", "fsl,mpc8548-pmc";
  243                 reg = <0xe0070 0x20>;
  244         };
  245 
  246 };
  247 
  248 /include/ "pq3-etsec2-grp2-0.dtsi"
  249 /include/ "pq3-etsec2-grp2-1.dtsi"

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FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/src/powerpc/fsl/p1022si-post.dtsi

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/powerpc/fsl/p1022si-post.dtsi