FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/powerpc/fsl/p2041si-pre.dtsi

     /*
      * P2041 Silicon/SoC Device Tree Source (pre include)
      *
      * Copyright 2011 - 2015 Freescale Semiconductor Inc.
      *
      * Redistribution and use in source and binary forms, with or without
      * modification, are permitted provided that the following conditions are met:
      *     * Redistributions of source code must retain the above copyright
      *       notice, this list of conditions and the following disclaimer.
     *     * Redistributions in binary form must reproduce the above copyright
     *       notice, this list of conditions and the following disclaimer in the
     *       documentation and/or other materials provided with the distribution.
     *     * Neither the name of Freescale Semiconductor nor the
     *       names of its contributors may be used to endorse or promote products
     *       derived from this software without specific prior written permission.
     *
     *
     * ALTERNATIVELY, this software may be distributed under the terms of the
     * GNU General Public License ("GPL") as published by the Free Software
     * Foundation, either version 2 of that License or (at your option) any
     * later version.
     *
     * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
     * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
     * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
     * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
     * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
     * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
     * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     */
    
    /dts-v1/;
    
    /include/ "e500mc_power_isa.dtsi"
    
    / {
            compatible = "fsl,P2041";
            #address-cells = <2>;
            #size-cells = <2>;
            interrupt-parent = <&mpic>;
    
            aliases {
                    ccsr = &soc;
                    dcsr = &dcsr;
    
                    serial0 = &serial0;
                    serial1 = &serial1;
                    serial2 = &serial2;
                    serial3 = &serial3;
                    pci0 = &pci0;
                    pci1 = &pci1;
                    pci2 = &pci2;
                    usb0 = &usb0;
                    usb1 = &usb1;
                    dma0 = &dma0;
                    dma1 = &dma1;
                    sdhc = &sdhc;
                    msi0 = &msi0;
                    msi1 = &msi1;
                    msi2 = &msi2;
    
                    crypto = &crypto;
                    sec_jr0 = &sec_jr0;
                    sec_jr1 = &sec_jr1;
                    sec_jr2 = &sec_jr2;
                    sec_jr3 = &sec_jr3;
                    rtic_a = &rtic_a;
                    rtic_b = &rtic_b;
                    rtic_c = &rtic_c;
                    rtic_d = &rtic_d;
                    sec_mon = &sec_mon;
    
                    fman0 = &fman0;
                    ethernet0 = &enet0;
                    ethernet1 = &enet1;
                    ethernet2 = &enet2;
                    ethernet3 = &enet3;
                    ethernet4 = &enet4;
                    ethernet5 = &enet5;
            };
    
            cpus {
                    #address-cells = <1>;
                    #size-cells = <0>;
    
                    cpu0: PowerPC,e500mc@0 {
                            device_type = "cpu";
                            reg = <0>;
                            clocks = <&clockgen 1 0>;
                            next-level-cache = <&L2_0>;
                            fsl,portid-mapping = <0x80000000>;
                            L2_0: l2-cache {
                                    next-level-cache = <&cpc>;
                            };
                    };
                    cpu1: PowerPC,e500mc@1 {
                           device_type = "cpu";
                           reg = <1>;
                           clocks = <&clockgen 1 1>;
                           next-level-cache = <&L2_1>;
                           fsl,portid-mapping = <0x40000000>;
                           L2_1: l2-cache {
                                   next-level-cache = <&cpc>;
                           };
                   };
                   cpu2: PowerPC,e500mc@2 {
                           device_type = "cpu";
                           reg = <2>;
                           clocks = <&clockgen 1 2>;
                           next-level-cache = <&L2_2>;
                           fsl,portid-mapping = <0x20000000>;
                           L2_2: l2-cache {
                                   next-level-cache = <&cpc>;
                           };
                   };
                   cpu3: PowerPC,e500mc@3 {
                           device_type = "cpu";
                           reg = <3>;
                           clocks = <&clockgen 1 3>;
                           next-level-cache = <&L2_3>;
                           fsl,portid-mapping = <0x10000000>;
                           L2_3: l2-cache {
                                   next-level-cache = <&cpc>;
                           };
                   };
           };
   };

Cache object: 6b168f12cd7f4c76b1125479567d34a4