The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/powerpc/fsl/sbc8641d.dts

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    1 // SPDX-License-Identifier: GPL-2.0-or-later
    2 /*
    3  * SBC8641D Device Tree Source
    4  *
    5  * Copyright 2008 Wind River Systems Inc.
    6  *
    7  * Paul Gortmaker (see MAINTAINERS for contact information)
    8  *
    9  * Based largely on the mpc8641_hpcn.dts by Freescale Semiconductor Inc.
   10  */
   11 
   12 /include/ "mpc8641si-pre.dtsi"
   13 
   14 / {
   15         model = "SBC8641D";
   16         compatible = "wind,sbc8641";
   17 
   18         memory {
   19                 device_type = "memory";
   20                 reg = <0x00000000 0x20000000>;  // 512M at 0x0
   21         };
   22 
   23         lbc: localbus@f8005000 {
   24                 reg = <0xf8005000 0x1000>;
   25 
   26                 ranges = <0 0 0xff000000 0x01000000     // 16MB Boot flash
   27                           1 0 0xf0000000 0x00010000     // 64KB EEPROM
   28                           2 0 0xf1000000 0x00100000     // EPLD (1MB)
   29                           3 0 0xe0000000 0x04000000     // 64MB LB SDRAM (CS3)
   30                           4 0 0xe4000000 0x04000000     // 64MB LB SDRAM (CS4)
   31                           6 0 0xf4000000 0x00100000     // LCD display (1MB)
   32                           7 0 0xe8000000 0x04000000>;   // 64MB OneNAND
   33 
   34                 flash@0,0 {
   35                         compatible = "cfi-flash";
   36                         reg = <0 0 0x01000000>;
   37                         bank-width = <2>;
   38                         device-width = <2>;
   39                         #address-cells = <1>;
   40                         #size-cells = <1>;
   41                         partition@0 {
   42                                 label = "dtb";
   43                                 reg = <0x00000000 0x00100000>;
   44                                 read-only;
   45                         };
   46                         partition@300000 {
   47                                 label = "kernel";
   48                                 reg = <0x00100000 0x00400000>;
   49                                 read-only;
   50                         };
   51                         partition@400000 {
   52                                 label = "fs";
   53                                 reg = <0x00500000 0x00a00000>;
   54                         };
   55                         partition@700000 {
   56                                 label = "firmware";
   57                                 reg = <0x00f00000 0x00100000>;
   58                                 read-only;
   59                         };
   60                 };
   61 
   62                 epld@2,0 {
   63                         compatible = "wrs,epld-localbus";
   64                         #address-cells = <2>;
   65                         #size-cells = <1>;
   66                         reg = <2 0 0x100000>;
   67                         ranges = <0 0 5 0 1     // User switches
   68                                   1 0 5 1 1     // Board ID/Rev
   69                                   3 0 5 3 1>;   // LEDs
   70                 };
   71         };
   72 
   73         soc: soc@f8000000 {
   74                 ranges = <0x00000000 0xf8000000 0x00100000>;
   75 
   76                 enet0: ethernet@24000 {
   77                         tbi-handle = <&tbi0>;
   78                         phy-handle = <&phy0>;
   79                         phy-connection-type = "rgmii-id";
   80                 };
   81 
   82                 mdio@24520 {
   83                         phy0: ethernet-phy@1f {
   84                                 reg = <0x1f>;
   85                         };
   86                         phy1: ethernet-phy@0 {
   87                                 reg = <0>;
   88                         };
   89                         phy2: ethernet-phy@1 {
   90                                 reg = <1>;
   91                         };
   92                         phy3: ethernet-phy@2 {
   93                                 reg = <2>;
   94                         };
   95                         tbi0: tbi-phy@11 {
   96                                 reg = <0x11>;
   97                                 device_type = "tbi-phy";
   98                         };
   99                 };
  100 
  101                 enet1: ethernet@25000 {
  102                         tbi-handle = <&tbi1>;
  103                         phy-handle = <&phy1>;
  104                         phy-connection-type = "rgmii-id";
  105                 };
  106 
  107                 mdio@25520 {
  108                         tbi1: tbi-phy@11 {
  109                                 reg = <0x11>;
  110                                 device_type = "tbi-phy";
  111                         };
  112                 };
  113 
  114                 enet2: ethernet@26000 {
  115                         tbi-handle = <&tbi2>;
  116                         phy-handle = <&phy2>;
  117                         phy-connection-type = "rgmii-id";
  118                 };
  119 
  120                 mdio@26520 {
  121                         tbi2: tbi-phy@11 {
  122                                 reg = <0x11>;
  123                                 device_type = "tbi-phy";
  124                         };
  125                 };
  126 
  127                 enet3: ethernet@27000 {
  128                         tbi-handle = <&tbi3>;
  129                         phy-handle = <&phy3>;
  130                         phy-connection-type = "rgmii-id";
  131                 };
  132 
  133                 mdio@27520 {
  134                         tbi3: tbi-phy@11 {
  135                                 reg = <0x11>;
  136                                 device_type = "tbi-phy";
  137                         };
  138                 };
  139         };
  140 
  141         pci0: pcie@f8008000 {
  142                 reg = <0xf8008000 0x1000>;
  143                 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000
  144                           0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
  145                 interrupt-map-mask = <0xff00 0 0 7>;
  146 
  147                 pcie@0 {
  148                         ranges = <0x02000000 0x0 0x80000000
  149                                   0x02000000 0x0 0x80000000
  150                                   0x0 0x20000000
  151 
  152                                   0x01000000 0x0 0x00000000
  153                                   0x01000000 0x0 0x00000000
  154                                   0x0 0x00100000>;
  155                 };
  156 
  157         };
  158 
  159         pci1: pcie@f8009000 {
  160                 reg = <0xf8009000 0x1000>;
  161                 ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
  162                           0x01000000 0x0 0x00000000 0xe3000000 0x0 0x00100000>;
  163 
  164                 pcie@0 {
  165                         ranges = <0x02000000 0x0 0xa0000000
  166                                   0x02000000 0x0 0xa0000000
  167                                   0x0 0x20000000
  168 
  169                                   0x01000000 0x0 0x00000000
  170                                   0x01000000 0x0 0x00000000
  171                                   0x0 0x00100000>;
  172                 };
  173         };
  174 };
  175 
  176 /include/ "mpc8641si-post.dtsi"

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