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sys/contrib/device-tree/src/powerpc/fsl/t4240si-post.dtsi
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1 /* 2 * T4240 Silicon/SoC Device Tree Source (post include) 3 * 4 * Copyright 2012 - 2015 Freescale Semiconductor Inc. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are met: 8 * * Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * * Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * * Neither the name of Freescale Semiconductor nor the 14 * names of its contributors may be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * 18 * ALTERNATIVELY, this software may be distributed under the terms of the 19 * GNU General Public License ("GPL") as published by the Free Software 20 * Foundation, either version 2 of that License or (at your option) any 21 * later version. 22 * 23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY 24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 &bman_fbpr { 36 compatible = "fsl,bman-fbpr"; 37 alloc-ranges = <0 0 0x10000 0>; 38 }; 39 40 &qman_fqd { 41 compatible = "fsl,qman-fqd"; 42 alloc-ranges = <0 0 0x10000 0>; 43 }; 44 45 &qman_pfdr { 46 compatible = "fsl,qman-pfdr"; 47 alloc-ranges = <0 0 0x10000 0>; 48 }; 49 50 &ifc { 51 #address-cells = <2>; 52 #size-cells = <1>; 53 compatible = "fsl,ifc", "simple-bus"; 54 interrupts = <25 2 0 0>; 55 }; 56 57 /* controller at 0x240000 */ 58 &pci0 { 59 compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0"; 60 device_type = "pci"; 61 #size-cells = <2>; 62 #address-cells = <3>; 63 bus-range = <0x0 0xff>; 64 interrupts = <20 2 0 0>; 65 pcie@0 { 66 #interrupt-cells = <1>; 67 #size-cells = <2>; 68 #address-cells = <3>; 69 device_type = "pci"; 70 reg = <0 0 0 0 0>; 71 interrupts = <20 2 0 0>; 72 interrupt-map-mask = <0xf800 0 0 7>; 73 interrupt-map = < 74 /* IDSEL 0x0 */ 75 0000 0 0 1 &mpic 40 1 0 0 76 0000 0 0 2 &mpic 1 1 0 0 77 0000 0 0 3 &mpic 2 1 0 0 78 0000 0 0 4 &mpic 3 1 0 0 79 >; 80 }; 81 }; 82 83 /* controller at 0x250000 */ 84 &pci1 { 85 compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0"; 86 device_type = "pci"; 87 #size-cells = <2>; 88 #address-cells = <3>; 89 bus-range = <0 0xff>; 90 interrupts = <21 2 0 0>; 91 pcie@0 { 92 #interrupt-cells = <1>; 93 #size-cells = <2>; 94 #address-cells = <3>; 95 device_type = "pci"; 96 reg = <0 0 0 0 0>; 97 interrupts = <21 2 0 0>; 98 interrupt-map-mask = <0xf800 0 0 7>; 99 interrupt-map = < 100 /* IDSEL 0x0 */ 101 0000 0 0 1 &mpic 41 1 0 0 102 0000 0 0 2 &mpic 5 1 0 0 103 0000 0 0 3 &mpic 6 1 0 0 104 0000 0 0 4 &mpic 7 1 0 0 105 >; 106 }; 107 }; 108 109 /* controller at 0x260000 */ 110 &pci2 { 111 compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0"; 112 device_type = "pci"; 113 #size-cells = <2>; 114 #address-cells = <3>; 115 bus-range = <0x0 0xff>; 116 interrupts = <22 2 0 0>; 117 pcie@0 { 118 #interrupt-cells = <1>; 119 #size-cells = <2>; 120 #address-cells = <3>; 121 device_type = "pci"; 122 reg = <0 0 0 0 0>; 123 interrupts = <22 2 0 0>; 124 interrupt-map-mask = <0xf800 0 0 7>; 125 interrupt-map = < 126 /* IDSEL 0x0 */ 127 0000 0 0 1 &mpic 42 1 0 0 128 0000 0 0 2 &mpic 9 1 0 0 129 0000 0 0 3 &mpic 10 1 0 0 130 0000 0 0 4 &mpic 11 1 0 0 131 >; 132 }; 133 }; 134 135 /* controller at 0x270000 */ 136 &pci3 { 137 compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0"; 138 device_type = "pci"; 139 #size-cells = <2>; 140 #address-cells = <3>; 141 bus-range = <0x0 0xff>; 142 interrupts = <23 2 0 0>; 143 pcie@0 { 144 #interrupt-cells = <1>; 145 #size-cells = <2>; 146 #address-cells = <3>; 147 device_type = "pci"; 148 reg = <0 0 0 0 0>; 149 interrupts = <23 2 0 0>; 150 interrupt-map-mask = <0xf800 0 0 7>; 151 interrupt-map = < 152 /* IDSEL 0x0 */ 153 0000 0 0 1 &mpic 43 1 0 0 154 0000 0 0 2 &mpic 0 1 0 0 155 0000 0 0 3 &mpic 4 1 0 0 156 0000 0 0 4 &mpic 8 1 0 0 157 >; 158 }; 159 }; 160 161 &rio { 162 compatible = "fsl,srio"; 163 interrupts = <16 2 1 11>; 164 #address-cells = <2>; 165 #size-cells = <2>; 166 ranges; 167 168 port1 { 169 #address-cells = <2>; 170 #size-cells = <2>; 171 cell-index = <1>; 172 }; 173 174 port2 { 175 #address-cells = <2>; 176 #size-cells = <2>; 177 cell-index = <2>; 178 }; 179 }; 180 181 &dcsr { 182 #address-cells = <1>; 183 #size-cells = <1>; 184 compatible = "fsl,dcsr", "simple-bus"; 185 186 dcsr-epu@0 { 187 compatible = "fsl,t4240-dcsr-epu", "fsl,dcsr-epu"; 188 interrupts = <52 2 0 0 189 84 2 0 0 190 85 2 0 0 191 94 2 0 0 192 95 2 0 0>; 193 reg = <0x0 0x1000>; 194 }; 195 dcsr-npc { 196 compatible = "fsl,t4240-dcsr-cnpc", "fsl,dcsr-cnpc"; 197 reg = <0x1000 0x1000 0x1002000 0x10000>; 198 }; 199 dcsr-nxc@2000 { 200 compatible = "fsl,dcsr-nxc"; 201 reg = <0x2000 0x1000>; 202 }; 203 dcsr-corenet { 204 compatible = "fsl,dcsr-corenet"; 205 reg = <0x8000 0x1000 0x1A000 0x1000>; 206 }; 207 dcsr-dpaa@9000 { 208 compatible = "fsl,t4240-dcsr-dpaa", "fsl,dcsr-dpaa"; 209 reg = <0x9000 0x1000>; 210 }; 211 dcsr-ocn@11000 { 212 compatible = "fsl,t4240-dcsr-ocn", "fsl,dcsr-ocn"; 213 reg = <0x11000 0x1000>; 214 }; 215 dcsr-ddr@12000 { 216 compatible = "fsl,dcsr-ddr"; 217 dev-handle = <&ddr1>; 218 reg = <0x12000 0x1000>; 219 }; 220 dcsr-ddr@13000 { 221 compatible = "fsl,dcsr-ddr"; 222 dev-handle = <&ddr2>; 223 reg = <0x13000 0x1000>; 224 }; 225 dcsr-ddr@14000 { 226 compatible = "fsl,dcsr-ddr"; 227 dev-handle = <&ddr3>; 228 reg = <0x14000 0x1000>; 229 }; 230 dcsr-nal@18000 { 231 compatible = "fsl,t4240-dcsr-nal", "fsl,dcsr-nal"; 232 reg = <0x18000 0x1000>; 233 }; 234 dcsr-rcpm@22000 { 235 compatible = "fsl,t4240-dcsr-rcpm", "fsl,dcsr-rcpm"; 236 reg = <0x22000 0x1000>; 237 }; 238 dcsr-snpc@30000 { 239 compatible = "fsl,t4240-dcsr-snpc", "fsl,dcsr-snpc"; 240 reg = <0x30000 0x1000 0x1022000 0x10000>; 241 }; 242 dcsr-snpc@31000 { 243 compatible = "fsl,t4240-dcsr-snpc", "fsl,dcsr-snpc"; 244 reg = <0x31000 0x1000 0x1042000 0x10000>; 245 }; 246 dcsr-snpc@32000 { 247 compatible = "fsl,t4240-dcsr-snpc", "fsl,dcsr-snpc"; 248 reg = <0x32000 0x1000 0x1062000 0x10000>; 249 }; 250 dcsr-cpu-sb-proxy@100000 { 251 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 252 cpu-handle = <&cpu0>; 253 reg = <0x100000 0x1000 0x101000 0x1000>; 254 }; 255 dcsr-cpu-sb-proxy@108000 { 256 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 257 cpu-handle = <&cpu1>; 258 reg = <0x108000 0x1000 0x109000 0x1000>; 259 }; 260 dcsr-cpu-sb-proxy@110000 { 261 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 262 cpu-handle = <&cpu2>; 263 reg = <0x110000 0x1000 0x111000 0x1000>; 264 }; 265 dcsr-cpu-sb-proxy@118000 { 266 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 267 cpu-handle = <&cpu3>; 268 reg = <0x118000 0x1000 0x119000 0x1000>; 269 }; 270 dcsr-cpu-sb-proxy@120000 { 271 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 272 cpu-handle = <&cpu4>; 273 reg = <0x120000 0x1000 0x121000 0x1000>; 274 }; 275 dcsr-cpu-sb-proxy@128000 { 276 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 277 cpu-handle = <&cpu5>; 278 reg = <0x128000 0x1000 0x129000 0x1000>; 279 }; 280 dcsr-cpu-sb-proxy@130000 { 281 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 282 cpu-handle = <&cpu6>; 283 reg = <0x130000 0x1000 0x131000 0x1000>; 284 }; 285 dcsr-cpu-sb-proxy@138000 { 286 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 287 cpu-handle = <&cpu7>; 288 reg = <0x138000 0x1000 0x139000 0x1000>; 289 }; 290 dcsr-cpu-sb-proxy@140000 { 291 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 292 cpu-handle = <&cpu8>; 293 reg = <0x140000 0x1000 0x141000 0x1000>; 294 }; 295 dcsr-cpu-sb-proxy@148000 { 296 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 297 cpu-handle = <&cpu9>; 298 reg = <0x148000 0x1000 0x149000 0x1000>; 299 }; 300 dcsr-cpu-sb-proxy@150000 { 301 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 302 cpu-handle = <&cpu10>; 303 reg = <0x150000 0x1000 0x151000 0x1000>; 304 }; 305 dcsr-cpu-sb-proxy@158000 { 306 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 307 cpu-handle = <&cpu11>; 308 reg = <0x158000 0x1000 0x159000 0x1000>; 309 }; 310 }; 311 312 &bportals { 313 #address-cells = <0x1>; 314 #size-cells = <0x1>; 315 compatible = "simple-bus"; 316 317 bman-portal@0 { 318 compatible = "fsl,bman-portal"; 319 reg = <0x0 0x4000>, <0x1000000 0x1000>; 320 interrupts = <105 2 0 0>; 321 }; 322 bman-portal@4000 { 323 compatible = "fsl,bman-portal"; 324 reg = <0x4000 0x4000>, <0x1001000 0x1000>; 325 interrupts = <107 2 0 0>; 326 }; 327 bman-portal@8000 { 328 compatible = "fsl,bman-portal"; 329 reg = <0x8000 0x4000>, <0x1002000 0x1000>; 330 interrupts = <109 2 0 0>; 331 }; 332 bman-portal@c000 { 333 compatible = "fsl,bman-portal"; 334 reg = <0xc000 0x4000>, <0x1003000 0x1000>; 335 interrupts = <111 2 0 0>; 336 }; 337 bman-portal@10000 { 338 compatible = "fsl,bman-portal"; 339 reg = <0x10000 0x4000>, <0x1004000 0x1000>; 340 interrupts = <113 2 0 0>; 341 }; 342 bman-portal@14000 { 343 compatible = "fsl,bman-portal"; 344 reg = <0x14000 0x4000>, <0x1005000 0x1000>; 345 interrupts = <115 2 0 0>; 346 }; 347 bman-portal@18000 { 348 compatible = "fsl,bman-portal"; 349 reg = <0x18000 0x4000>, <0x1006000 0x1000>; 350 interrupts = <117 2 0 0>; 351 }; 352 bman-portal@1c000 { 353 compatible = "fsl,bman-portal"; 354 reg = <0x1c000 0x4000>, <0x1007000 0x1000>; 355 interrupts = <119 2 0 0>; 356 }; 357 bman-portal@20000 { 358 compatible = "fsl,bman-portal"; 359 reg = <0x20000 0x4000>, <0x1008000 0x1000>; 360 interrupts = <121 2 0 0>; 361 }; 362 bman-portal@24000 { 363 compatible = "fsl,bman-portal"; 364 reg = <0x24000 0x4000>, <0x1009000 0x1000>; 365 interrupts = <123 2 0 0>; 366 }; 367 bman-portal@28000 { 368 compatible = "fsl,bman-portal"; 369 reg = <0x28000 0x4000>, <0x100a000 0x1000>; 370 interrupts = <125 2 0 0>; 371 }; 372 bman-portal@2c000 { 373 compatible = "fsl,bman-portal"; 374 reg = <0x2c000 0x4000>, <0x100b000 0x1000>; 375 interrupts = <127 2 0 0>; 376 }; 377 bman-portal@30000 { 378 compatible = "fsl,bman-portal"; 379 reg = <0x30000 0x4000>, <0x100c000 0x1000>; 380 interrupts = <129 2 0 0>; 381 }; 382 bman-portal@34000 { 383 compatible = "fsl,bman-portal"; 384 reg = <0x34000 0x4000>, <0x100d000 0x1000>; 385 interrupts = <131 2 0 0>; 386 }; 387 bman-portal@38000 { 388 compatible = "fsl,bman-portal"; 389 reg = <0x38000 0x4000>, <0x100e000 0x1000>; 390 interrupts = <133 2 0 0>; 391 }; 392 bman-portal@3c000 { 393 compatible = "fsl,bman-portal"; 394 reg = <0x3c000 0x4000>, <0x100f000 0x1000>; 395 interrupts = <135 2 0 0>; 396 }; 397 bman-portal@40000 { 398 compatible = "fsl,bman-portal"; 399 reg = <0x40000 0x4000>, <0x1010000 0x1000>; 400 interrupts = <137 2 0 0>; 401 }; 402 bman-portal@44000 { 403 compatible = "fsl,bman-portal"; 404 reg = <0x44000 0x4000>, <0x1011000 0x1000>; 405 interrupts = <139 2 0 0>; 406 }; 407 bman-portal@48000 { 408 compatible = "fsl,bman-portal"; 409 reg = <0x48000 0x4000>, <0x1012000 0x1000>; 410 interrupts = <141 2 0 0>; 411 }; 412 bman-portal@4c000 { 413 compatible = "fsl,bman-portal"; 414 reg = <0x4c000 0x4000>, <0x1013000 0x1000>; 415 interrupts = <143 2 0 0>; 416 }; 417 bman-portal@50000 { 418 compatible = "fsl,bman-portal"; 419 reg = <0x50000 0x4000>, <0x1014000 0x1000>; 420 interrupts = <145 2 0 0>; 421 }; 422 bman-portal@54000 { 423 compatible = "fsl,bman-portal"; 424 reg = <0x54000 0x4000>, <0x1015000 0x1000>; 425 interrupts = <147 2 0 0>; 426 }; 427 bman-portal@58000 { 428 compatible = "fsl,bman-portal"; 429 reg = <0x58000 0x4000>, <0x1016000 0x1000>; 430 interrupts = <149 2 0 0>; 431 }; 432 bman-portal@5c000 { 433 compatible = "fsl,bman-portal"; 434 reg = <0x5c000 0x4000>, <0x1017000 0x1000>; 435 interrupts = <151 2 0 0>; 436 }; 437 bman-portal@60000 { 438 compatible = "fsl,bman-portal"; 439 reg = <0x60000 0x4000>, <0x1018000 0x1000>; 440 interrupts = <153 2 0 0>; 441 }; 442 bman-portal@64000 { 443 compatible = "fsl,bman-portal"; 444 reg = <0x64000 0x4000>, <0x1019000 0x1000>; 445 interrupts = <155 2 0 0>; 446 }; 447 bman-portal@68000 { 448 compatible = "fsl,bman-portal"; 449 reg = <0x68000 0x4000>, <0x101a000 0x1000>; 450 interrupts = <157 2 0 0>; 451 }; 452 bman-portal@6c000 { 453 compatible = "fsl,bman-portal"; 454 reg = <0x6c000 0x4000>, <0x101b000 0x1000>; 455 interrupts = <159 2 0 0>; 456 }; 457 bman-portal@70000 { 458 compatible = "fsl,bman-portal"; 459 reg = <0x70000 0x4000>, <0x101c000 0x1000>; 460 interrupts = <161 2 0 0>; 461 }; 462 bman-portal@74000 { 463 compatible = "fsl,bman-portal"; 464 reg = <0x74000 0x4000>, <0x101d000 0x1000>; 465 interrupts = <163 2 0 0>; 466 }; 467 bman-portal@78000 { 468 compatible = "fsl,bman-portal"; 469 reg = <0x78000 0x4000>, <0x101e000 0x1000>; 470 interrupts = <165 2 0 0>; 471 }; 472 bman-portal@7c000 { 473 compatible = "fsl,bman-portal"; 474 reg = <0x7c000 0x4000>, <0x101f000 0x1000>; 475 interrupts = <167 2 0 0>; 476 }; 477 bman-portal@80000 { 478 compatible = "fsl,bman-portal"; 479 reg = <0x80000 0x4000>, <0x1020000 0x1000>; 480 interrupts = <169 2 0 0>; 481 }; 482 bman-portal@84000 { 483 compatible = "fsl,bman-portal"; 484 reg = <0x84000 0x4000>, <0x1021000 0x1000>; 485 interrupts = <171 2 0 0>; 486 }; 487 bman-portal@88000 { 488 compatible = "fsl,bman-portal"; 489 reg = <0x88000 0x4000>, <0x1022000 0x1000>; 490 interrupts = <173 2 0 0>; 491 }; 492 bman-portal@8c000 { 493 compatible = "fsl,bman-portal"; 494 reg = <0x8c000 0x4000>, <0x1023000 0x1000>; 495 interrupts = <175 2 0 0>; 496 }; 497 bman-portal@90000 { 498 compatible = "fsl,bman-portal"; 499 reg = <0x90000 0x4000>, <0x1024000 0x1000>; 500 interrupts = <385 2 0 0>; 501 }; 502 bman-portal@94000 { 503 compatible = "fsl,bman-portal"; 504 reg = <0x94000 0x4000>, <0x1025000 0x1000>; 505 interrupts = <387 2 0 0>; 506 }; 507 bman-portal@98000 { 508 compatible = "fsl,bman-portal"; 509 reg = <0x98000 0x4000>, <0x1026000 0x1000>; 510 interrupts = <389 2 0 0>; 511 }; 512 bman-portal@9c000 { 513 compatible = "fsl,bman-portal"; 514 reg = <0x9c000 0x4000>, <0x1027000 0x1000>; 515 interrupts = <391 2 0 0>; 516 }; 517 bman-portal@a0000 { 518 compatible = "fsl,bman-portal"; 519 reg = <0xa0000 0x4000>, <0x1028000 0x1000>; 520 interrupts = <393 2 0 0>; 521 }; 522 bman-portal@a4000 { 523 compatible = "fsl,bman-portal"; 524 reg = <0xa4000 0x4000>, <0x1029000 0x1000>; 525 interrupts = <395 2 0 0>; 526 }; 527 bman-portal@a8000 { 528 compatible = "fsl,bman-portal"; 529 reg = <0xa8000 0x4000>, <0x102a000 0x1000>; 530 interrupts = <397 2 0 0>; 531 }; 532 bman-portal@ac000 { 533 compatible = "fsl,bman-portal"; 534 reg = <0xac000 0x4000>, <0x102b000 0x1000>; 535 interrupts = <399 2 0 0>; 536 }; 537 bman-portal@b0000 { 538 compatible = "fsl,bman-portal"; 539 reg = <0xb0000 0x4000>, <0x102c000 0x1000>; 540 interrupts = <401 2 0 0>; 541 }; 542 bman-portal@b4000 { 543 compatible = "fsl,bman-portal"; 544 reg = <0xb4000 0x4000>, <0x102d000 0x1000>; 545 interrupts = <403 2 0 0>; 546 }; 547 bman-portal@b8000 { 548 compatible = "fsl,bman-portal"; 549 reg = <0xb8000 0x4000>, <0x102e000 0x1000>; 550 interrupts = <405 2 0 0>; 551 }; 552 bman-portal@bc000 { 553 compatible = "fsl,bman-portal"; 554 reg = <0xbc000 0x4000>, <0x102f000 0x1000>; 555 interrupts = <407 2 0 0>; 556 }; 557 bman-portal@c0000 { 558 compatible = "fsl,bman-portal"; 559 reg = <0xc0000 0x4000>, <0x1030000 0x1000>; 560 interrupts = <409 2 0 0>; 561 }; 562 bman-portal@c4000 { 563 compatible = "fsl,bman-portal"; 564 reg = <0xc4000 0x4000>, <0x1031000 0x1000>; 565 interrupts = <411 2 0 0>; 566 }; 567 }; 568 569 &qportals { 570 #address-cells = <0x1>; 571 #size-cells = <0x1>; 572 compatible = "simple-bus"; 573 574 qportal0: qman-portal@0 { 575 compatible = "fsl,qman-portal"; 576 reg = <0x0 0x4000>, <0x1000000 0x1000>; 577 interrupts = <104 0x2 0 0>; 578 cell-index = <0x0>; 579 }; 580 qportal1: qman-portal@4000 { 581 compatible = "fsl,qman-portal"; 582 reg = <0x4000 0x4000>, <0x1001000 0x1000>; 583 interrupts = <106 0x2 0 0>; 584 cell-index = <0x1>; 585 }; 586 qportal2: qman-portal@8000 { 587 compatible = "fsl,qman-portal"; 588 reg = <0x8000 0x4000>, <0x1002000 0x1000>; 589 interrupts = <108 0x2 0 0>; 590 cell-index = <0x2>; 591 }; 592 qportal3: qman-portal@c000 { 593 compatible = "fsl,qman-portal"; 594 reg = <0xc000 0x4000>, <0x1003000 0x1000>; 595 interrupts = <110 0x2 0 0>; 596 cell-index = <0x3>; 597 }; 598 qportal4: qman-portal@10000 { 599 compatible = "fsl,qman-portal"; 600 reg = <0x10000 0x4000>, <0x1004000 0x1000>; 601 interrupts = <112 0x2 0 0>; 602 cell-index = <0x4>; 603 }; 604 qportal5: qman-portal@14000 { 605 compatible = "fsl,qman-portal"; 606 reg = <0x14000 0x4000>, <0x1005000 0x1000>; 607 interrupts = <114 0x2 0 0>; 608 cell-index = <0x5>; 609 }; 610 qportal6: qman-portal@18000 { 611 compatible = "fsl,qman-portal"; 612 reg = <0x18000 0x4000>, <0x1006000 0x1000>; 613 interrupts = <116 0x2 0 0>; 614 cell-index = <0x6>; 615 }; 616 qportal7: qman-portal@1c000 { 617 compatible = "fsl,qman-portal"; 618 reg = <0x1c000 0x4000>, <0x1007000 0x1000>; 619 interrupts = <118 0x2 0 0>; 620 cell-index = <0x7>; 621 }; 622 qportal8: qman-portal@20000 { 623 compatible = "fsl,qman-portal"; 624 reg = <0x20000 0x4000>, <0x1008000 0x1000>; 625 interrupts = <120 0x2 0 0>; 626 cell-index = <0x8>; 627 }; 628 qportal9: qman-portal@24000 { 629 compatible = "fsl,qman-portal"; 630 reg = <0x24000 0x4000>, <0x1009000 0x1000>; 631 interrupts = <122 0x2 0 0>; 632 cell-index = <0x9>; 633 }; 634 qportal10: qman-portal@28000 { 635 compatible = "fsl,qman-portal"; 636 reg = <0x28000 0x4000>, <0x100a000 0x1000>; 637 interrupts = <124 0x2 0 0>; 638 cell-index = <0xa>; 639 }; 640 qportal11: qman-portal@2c000 { 641 compatible = "fsl,qman-portal"; 642 reg = <0x2c000 0x4000>, <0x100b000 0x1000>; 643 interrupts = <126 0x2 0 0>; 644 cell-index = <0xb>; 645 }; 646 qportal12: qman-portal@30000 { 647 compatible = "fsl,qman-portal"; 648 reg = <0x30000 0x4000>, <0x100c000 0x1000>; 649 interrupts = <128 0x2 0 0>; 650 cell-index = <0xc>; 651 }; 652 qportal13: qman-portal@34000 { 653 compatible = "fsl,qman-portal"; 654 reg = <0x34000 0x4000>, <0x100d000 0x1000>; 655 interrupts = <130 0x2 0 0>; 656 cell-index = <0xd>; 657 }; 658 qportal14: qman-portal@38000 { 659 compatible = "fsl,qman-portal"; 660 reg = <0x38000 0x4000>, <0x100e000 0x1000>; 661 interrupts = <132 0x2 0 0>; 662 cell-index = <0xe>; 663 }; 664 qportal15: qman-portal@3c000 { 665 compatible = "fsl,qman-portal"; 666 reg = <0x3c000 0x4000>, <0x100f000 0x1000>; 667 interrupts = <134 0x2 0 0>; 668 cell-index = <0xf>; 669 }; 670 qportal16: qman-portal@40000 { 671 compatible = "fsl,qman-portal"; 672 reg = <0x40000 0x4000>, <0x1010000 0x1000>; 673 interrupts = <136 0x2 0 0>; 674 cell-index = <0x10>; 675 }; 676 qportal17: qman-portal@44000 { 677 compatible = "fsl,qman-portal"; 678 reg = <0x44000 0x4000>, <0x1011000 0x1000>; 679 interrupts = <138 0x2 0 0>; 680 cell-index = <0x11>; 681 }; 682 qportal18: qman-portal@48000 { 683 compatible = "fsl,qman-portal"; 684 reg = <0x48000 0x4000>, <0x1012000 0x1000>; 685 interrupts = <140 0x2 0 0>; 686 cell-index = <0x12>; 687 }; 688 qportal19: qman-portal@4c000 { 689 compatible = "fsl,qman-portal"; 690 reg = <0x4c000 0x4000>, <0x1013000 0x1000>; 691 interrupts = <142 0x2 0 0>; 692 cell-index = <0x13>; 693 }; 694 qportal20: qman-portal@50000 { 695 compatible = "fsl,qman-portal"; 696 reg = <0x50000 0x4000>, <0x1014000 0x1000>; 697 interrupts = <144 0x2 0 0>; 698 cell-index = <0x14>; 699 }; 700 qportal21: qman-portal@54000 { 701 compatible = "fsl,qman-portal"; 702 reg = <0x54000 0x4000>, <0x1015000 0x1000>; 703 interrupts = <146 0x2 0 0>; 704 cell-index = <0x15>; 705 }; 706 qportal22: qman-portal@58000 { 707 compatible = "fsl,qman-portal"; 708 reg = <0x58000 0x4000>, <0x1016000 0x1000>; 709 interrupts = <148 0x2 0 0>; 710 cell-index = <0x16>; 711 }; 712 qportal23: qman-portal@5c000 { 713 compatible = "fsl,qman-portal"; 714 reg = <0x5c000 0x4000>, <0x1017000 0x1000>; 715 interrupts = <150 0x2 0 0>; 716 cell-index = <0x17>; 717 }; 718 qportal24: qman-portal@60000 { 719 compatible = "fsl,qman-portal"; 720 reg = <0x60000 0x4000>, <0x1018000 0x1000>; 721 interrupts = <152 0x2 0 0>; 722 cell-index = <0x18>; 723 }; 724 qportal25: qman-portal@64000 { 725 compatible = "fsl,qman-portal"; 726 reg = <0x64000 0x4000>, <0x1019000 0x1000>; 727 interrupts = <154 0x2 0 0>; 728 cell-index = <0x19>; 729 }; 730 qportal26: qman-portal@68000 { 731 compatible = "fsl,qman-portal"; 732 reg = <0x68000 0x4000>, <0x101a000 0x1000>; 733 interrupts = <156 0x2 0 0>; 734 cell-index = <0x1a>; 735 }; 736 qportal27: qman-portal@6c000 { 737 compatible = "fsl,qman-portal"; 738 reg = <0x6c000 0x4000>, <0x101b000 0x1000>; 739 interrupts = <158 0x2 0 0>; 740 cell-index = <0x1b>; 741 }; 742 qportal28: qman-portal@70000 { 743 compatible = "fsl,qman-portal"; 744 reg = <0x70000 0x4000>, <0x101c000 0x1000>; 745 interrupts = <160 0x2 0 0>; 746 cell-index = <0x1c>; 747 }; 748 qportal29: qman-portal@74000 { 749 compatible = "fsl,qman-portal"; 750 reg = <0x74000 0x4000>, <0x101d000 0x1000>; 751 interrupts = <162 0x2 0 0>; 752 cell-index = <0x1d>; 753 }; 754 qportal30: qman-portal@78000 { 755 compatible = "fsl,qman-portal"; 756 reg = <0x78000 0x4000>, <0x101e000 0x1000>; 757 interrupts = <164 0x2 0 0>; 758 cell-index = <0x1e>; 759 }; 760 qportal31: qman-portal@7c000 { 761 compatible = "fsl,qman-portal"; 762 reg = <0x7c000 0x4000>, <0x101f000 0x1000>; 763 interrupts = <166 0x2 0 0>; 764 cell-index = <0x1f>; 765 }; 766 qportal32: qman-portal@80000 { 767 compatible = "fsl,qman-portal"; 768 reg = <0x80000 0x4000>, <0x1020000 0x1000>; 769 interrupts = <168 0x2 0 0>; 770 cell-index = <0x20>; 771 }; 772 qportal33: qman-portal@84000 { 773 compatible = "fsl,qman-portal"; 774 reg = <0x84000 0x4000>, <0x1021000 0x1000>; 775 interrupts = <170 0x2 0 0>; 776 cell-index = <0x21>; 777 }; 778 qportal34: qman-portal@88000 { 779 compatible = "fsl,qman-portal"; 780 reg = <0x88000 0x4000>, <0x1022000 0x1000>; 781 interrupts = <172 0x2 0 0>; 782 cell-index = <0x22>; 783 }; 784 qportal35: qman-portal@8c000 { 785 compatible = "fsl,qman-portal"; 786 reg = <0x8c000 0x4000>, <0x1023000 0x1000>; 787 interrupts = <174 0x2 0 0>; 788 cell-index = <0x23>; 789 }; 790 qportal36: qman-portal@90000 { 791 compatible = "fsl,qman-portal"; 792 reg = <0x90000 0x4000>, <0x1024000 0x1000>; 793 interrupts = <384 0x2 0 0>; 794 cell-index = <0x24>; 795 }; 796 qportal37: qman-portal@94000 { 797 compatible = "fsl,qman-portal"; 798 reg = <0x94000 0x4000>, <0x1025000 0x1000>; 799 interrupts = <386 0x2 0 0>; 800 cell-index = <0x25>; 801 }; 802 qportal38: qman-portal@98000 { 803 compatible = "fsl,qman-portal"; 804 reg = <0x98000 0x4000>, <0x1026000 0x1000>; 805 interrupts = <388 0x2 0 0>; 806 cell-index = <0x26>; 807 }; 808 qportal39: qman-portal@9c000 { 809 compatible = "fsl,qman-portal"; 810 reg = <0x9c000 0x4000>, <0x1027000 0x1000>; 811 interrupts = <390 0x2 0 0>; 812 cell-index = <0x27>; 813 }; 814 qportal40: qman-portal@a0000 { 815 compatible = "fsl,qman-portal"; 816 reg = <0xa0000 0x4000>, <0x1028000 0x1000>; 817 interrupts = <392 0x2 0 0>; 818 cell-index = <0x28>; 819 }; 820 qportal41: qman-portal@a4000 { 821 compatible = "fsl,qman-portal"; 822 reg = <0xa4000 0x4000>, <0x1029000 0x1000>; 823 interrupts = <394 0x2 0 0>; 824 cell-index = <0x29>; 825 }; 826 qportal42: qman-portal@a8000 { 827 compatible = "fsl,qman-portal"; 828 reg = <0xa8000 0x4000>, <0x102a000 0x1000>; 829 interrupts = <396 0x2 0 0>; 830 cell-index = <0x2a>; 831 }; 832 qportal43: qman-portal@ac000 { 833 compatible = "fsl,qman-portal"; 834 reg = <0xac000 0x4000>, <0x102b000 0x1000>; 835 interrupts = <398 0x2 0 0>; 836 cell-index = <0x2b>; 837 }; 838 qportal44: qman-portal@b0000 { 839 compatible = "fsl,qman-portal"; 840 reg = <0xb0000 0x4000>, <0x102c000 0x1000>; 841 interrupts = <400 0x2 0 0>; 842 cell-index = <0x2c>; 843 }; 844 qportal45: qman-portal@b4000 { 845 compatible = "fsl,qman-portal"; 846 reg = <0xb4000 0x4000>, <0x102d000 0x1000>; 847 interrupts = <402 0x2 0 0>; 848 cell-index = <0x2d>; 849 }; 850 qportal46: qman-portal@b8000 { 851 compatible = "fsl,qman-portal"; 852 reg = <0xb8000 0x4000>, <0x102e000 0x1000>; 853 interrupts = <404 0x2 0 0>; 854 cell-index = <0x2e>; 855 }; 856 qportal47: qman-portal@bc000 { 857 compatible = "fsl,qman-portal"; 858 reg = <0xbc000 0x4000>, <0x102f000 0x1000>; 859 interrupts = <406 0x2 0 0>; 860 cell-index = <0x2f>; 861 }; 862 qportal48: qman-portal@c0000 { 863 compatible = "fsl,qman-portal"; 864 reg = <0xc0000 0x4000>, <0x1030000 0x1000>; 865 interrupts = <408 0x2 0 0>; 866 cell-index = <0x30>; 867 }; 868 qportal49: qman-portal@c4000 { 869 compatible = "fsl,qman-portal"; 870 reg = <0xc4000 0x4000>, <0x1031000 0x1000>; 871 interrupts = <410 0x2 0 0>; 872 cell-index = <0x31>; 873 }; 874 }; 875 876 &soc { 877 #address-cells = <1>; 878 #size-cells = <1>; 879 device_type = "soc"; 880 compatible = "simple-bus"; 881 882 soc-sram-error { 883 compatible = "fsl,soc-sram-error"; 884 interrupts = <16 2 1 29>; 885 }; 886 887 corenet-law@0 { 888 compatible = "fsl,corenet-law"; 889 reg = <0x0 0x1000>; 890 fsl,num-laws = <32>; 891 }; 892 893 ddr1: memory-controller@8000 { 894 compatible = "fsl,qoriq-memory-controller-v4.7", 895 "fsl,qoriq-memory-controller"; 896 reg = <0x8000 0x1000>; 897 interrupts = <16 2 1 23>; 898 }; 899 900 ddr2: memory-controller@9000 { 901 compatible = "fsl,qoriq-memory-controller-v4.7", 902 "fsl,qoriq-memory-controller"; 903 reg = <0x9000 0x1000>; 904 interrupts = <16 2 1 22>; 905 }; 906 907 ddr3: memory-controller@a000 { 908 compatible = "fsl,qoriq-memory-controller-v4.7", 909 "fsl,qoriq-memory-controller"; 910 reg = <0xa000 0x1000>; 911 interrupts = <16 2 1 21>; 912 }; 913 914 cpc: l3-cache-controller@10000 { 915 compatible = "fsl,t4240-l3-cache-controller", "cache"; 916 reg = <0x10000 0x1000 917 0x11000 0x1000 918 0x12000 0x1000>; 919 interrupts = <16 2 1 27 920 16 2 1 26 921 16 2 1 25>; 922 }; 923 924 corenet-cf@18000 { 925 compatible = "fsl,corenet2-cf", "fsl,corenet-cf"; 926 reg = <0x18000 0x1000>; 927 interrupts = <16 2 1 31>; 928 fsl,ccf-num-csdids = <32>; 929 fsl,ccf-num-snoopids = <32>; 930 }; 931 932 iommu@20000 { 933 compatible = "fsl,pamu-v1.0", "fsl,pamu"; 934 reg = <0x20000 0x6000>; 935 fsl,portid-mapping = <0x8000>; 936 interrupts = < 937 24 2 0 0 938 16 2 1 30>; 939 }; 940 941 /include/ "qoriq-mpic4.3.dtsi" 942 943 guts: global-utilities@e0000 { 944 compatible = "fsl,t4240-device-config", "fsl,qoriq-device-config-2.0"; 945 reg = <0xe0000 0xe00>; 946 fsl,has-rstcr; 947 fsl,liodn-bits = <12>; 948 }; 949 950 /include/ "qoriq-clockgen2.dtsi" 951 global-utilities@e1000 { 952 compatible = "fsl,t4240-clockgen", "fsl,qoriq-clockgen-2.0"; 953 }; 954 955 rcpm: global-utilities@e2000 { 956 compatible = "fsl,t4240-rcpm", "fsl,qoriq-rcpm-2.0"; 957 reg = <0xe2000 0x1000>; 958 }; 959 960 sfp: sfp@e8000 { 961 compatible = "fsl,t4240-sfp"; 962 reg = <0xe8000 0x1000>; 963 }; 964 965 serdes: serdes@ea000 { 966 compatible = "fsl,t4240-serdes"; 967 reg = <0xea000 0x4000>; 968 }; 969 970 /include/ "elo3-dma-0.dtsi" 971 /include/ "elo3-dma-1.dtsi" 972 /include/ "elo3-dma-2.dtsi" 973 974 /include/ "qoriq-espi-0.dtsi" 975 spi@110000 { 976 fsl,espi-num-chipselects = <4>; 977 }; 978 979 /include/ "qoriq-esdhc-0.dtsi" 980 sdhc@114000 { 981 compatible = "fsl,t4240-esdhc", "fsl,esdhc"; 982 sdhci,auto-cmd12; 983 }; 984 /include/ "qoriq-i2c-0.dtsi" 985 /include/ "qoriq-i2c-1.dtsi" 986 /include/ "qoriq-duart-0.dtsi" 987 /include/ "qoriq-duart-1.dtsi" 988 /include/ "qoriq-gpio-0.dtsi" 989 /include/ "qoriq-gpio-1.dtsi" 990 /include/ "qoriq-gpio-2.dtsi" 991 /include/ "qoriq-gpio-3.dtsi" 992 /include/ "qoriq-usb2-mph-0.dtsi" 993 usb0: usb@210000 { 994 compatible = "fsl-usb2-mph-v2.5", "fsl-usb2-mph"; 995 phy_type = "utmi"; 996 port0; 997 }; 998 /include/ "qoriq-usb2-dr-0.dtsi" 999 usb1: usb@211000 { 1000 compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr"; 1001 dr_mode = "host"; 1002 phy_type = "utmi"; 1003 }; 1004 /include/ "qoriq-sata2-0.dtsi" 1005 /include/ "qoriq-sata2-1.dtsi" 1006 /include/ "qoriq-sec5.0-0.dtsi" 1007 /include/ "qoriq-qman3.dtsi" 1008 /include/ "qoriq-bman1.dtsi" 1009 1010 /include/ "qoriq-fman3-0.dtsi" 1011 /include/ "qoriq-fman3-0-1g-0.dtsi" 1012 /include/ "qoriq-fman3-0-1g-1.dtsi" 1013 /include/ "qoriq-fman3-0-1g-2.dtsi" 1014 /include/ "qoriq-fman3-0-1g-3.dtsi" 1015 /include/ "qoriq-fman3-0-1g-4.dtsi" 1016 /include/ "qoriq-fman3-0-1g-5.dtsi" 1017 /include/ "qoriq-fman3-0-10g-0.dtsi" 1018 /include/ "qoriq-fman3-0-10g-1.dtsi" 1019 fman@400000 { 1020 enet0: ethernet@e0000 { 1021 }; 1022 1023 enet1: ethernet@e2000 { 1024 }; 1025 1026 enet2: ethernet@e4000 { 1027 }; 1028 1029 enet3: ethernet@e6000 { 1030 }; 1031 1032 enet4: ethernet@e8000 { 1033 }; 1034 1035 enet5: ethernet@ea000 { 1036 }; 1037 1038 enet6: ethernet@f0000 { 1039 }; 1040 1041 enet7: ethernet@f2000 { 1042 }; 1043 1044 mdio@fc000 { 1045 status = "disabled"; 1046 }; 1047 1048 mdio@fd000 { 1049 status = "disabled"; 1050 }; 1051 }; 1052 1053 /include/ "qoriq-fman3-1.dtsi" 1054 /include/ "qoriq-fman3-1-1g-0.dtsi" 1055 /include/ "qoriq-fman3-1-1g-1.dtsi" 1056 /include/ "qoriq-fman3-1-1g-2.dtsi" 1057 /include/ "qoriq-fman3-1-1g-3.dtsi" 1058 /include/ "qoriq-fman3-1-1g-4.dtsi" 1059 /include/ "qoriq-fman3-1-1g-5.dtsi" 1060 /include/ "qoriq-fman3-1-10g-0.dtsi" 1061 /include/ "qoriq-fman3-1-10g-1.dtsi" 1062 fman@500000 { 1063 enet8: ethernet@e0000 { 1064 }; 1065 1066 enet9: ethernet@e2000 { 1067 }; 1068 1069 enet10: ethernet@e4000 { 1070 }; 1071 1072 enet11: ethernet@e6000 { 1073 }; 1074 1075 enet12: ethernet@e8000 { 1076 }; 1077 1078 enet13: ethernet@ea000 { 1079 }; 1080 1081 enet14: ethernet@f0000 { 1082 }; 1083 1084 enet15: ethernet@f2000 { 1085 }; 1086 1087 mdio@fc000 { 1088 interrupts = <100 1 0 0>; 1089 }; 1090 1091 mdio@fd000 { 1092 interrupts = <101 1 0 0>; 1093 }; 1094 }; 1095 1096 L2_1: l2-cache-controller@c20000 { 1097 compatible = "fsl,t4240-l2-cache-controller"; 1098 reg = <0xc20000 0x40000>; 1099 next-level-cache = <&cpc>; 1100 }; 1101 L2_2: l2-cache-controller@c60000 { 1102 compatible = "fsl,t4240-l2-cache-controller"; 1103 reg = <0xc60000 0x40000>; 1104 next-level-cache = <&cpc>; 1105 }; 1106 L2_3: l2-cache-controller@ca0000 { 1107 compatible = "fsl,t4240-l2-cache-controller"; 1108 reg = <0xca0000 0x40000>; 1109 next-level-cache = <&cpc>; 1110 }; 1111 };
Cache object: f9c6cc89f6392fe7ea681f7cdd793386
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