mpc5121ads.dts

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    1 // SPDX-License-Identifier: GPL-2.0-or-later
    2 /*
    3  * MPC5121E ADS Device Tree Source
    4  *
    5  * Copyright 2007-2008 Freescale Semiconductor Inc.
    6  */
    7 
    8 #include "mpc5121.dtsi"
    9 
   10 / {
   11         model = "mpc5121ads";
   12         compatible = "fsl,mpc5121ads", "fsl,mpc5121";
   13 
   14         nfc@40000000 {
   15                 /*
   16                  * ADS has two Hynix 512MB Nand flash chips in a single
   17                  * stacked package.
   18                  */
   19                 chips = <2>;
   20 
   21                 nand@0 {
   22                         label = "nand";
   23                         reg = <0x00000000 0x40000000>;  /* 512MB + 512MB */
   24                 };
   25         };
   26 
   27         localbus@80000020 {
   28                 ranges = <0x0 0x0 0xfc000000 0x04000000
   29                           0x2 0x0 0x82000000 0x00008000>;
   30 
   31                 flash@0,0 {
   32                         compatible = "cfi-flash";
   33                         reg = <0 0x0 0x4000000>;
   34                         #address-cells = <1>;
   35                         #size-cells = <1>;
   36                         bank-width = <4>;
   37                         device-width = <2>;
   38 
   39                         protected@0 {
   40                                 label = "protected";
   41                                 reg = <0x00000000 0x00040000>;  // first sector is protected
   42                                 read-only;
   43                         };
   44                         filesystem@40000 {
   45                                 label = "filesystem";
   46                                 reg = <0x00040000 0x03c00000>;  // 60M for filesystem
   47                         };
   48                         kernel@3c40000 {
   49                                 label = "kernel";
   50                                 reg = <0x03c40000 0x00280000>;  // 2.5M for kernel
   51                         };
   52                         device-tree@3ec0000 {
   53                                 label = "device-tree";
   54                                 reg = <0x03ec0000 0x00040000>;  // one sector for device tree
   55                         };
   56                         u-boot@3f00000 {
   57                                 label = "u-boot";
   58                                 reg = <0x03f00000 0x00100000>;  // 1M for u-boot
   59                                 read-only;
   60                         };
   61                 };
   62 
   63                 board-control@2,0 {
   64                         compatible = "fsl,mpc5121ads-cpld";
   65                         reg = <0x2 0x0 0x8000>;
   66                 };
   67 
   68                 cpld_pic: pic@2,a {
   69                         compatible = "fsl,mpc5121ads-cpld-pic";
   70                         interrupt-controller;
   71                         #interrupt-cells = <2>;
   72                         reg = <0x2 0xa 0x5>;
   73                         /* irq routing:
   74                          * all irqs but touch screen are routed to irq0 (ipic 48)
   75                          * touch screen is statically routed to irq1 (ipic 17)
   76                          * so don't use it here
   77                          */
   78                         interrupts = <48 0x8>;
   79                 };
   80         };
   81 
   82         soc@80000000 {
   83 
   84                 i2c@1700 {
   85                         fsl,preserve-clocking;
   86 
   87                         hwmon@4a {
   88                                 compatible = "adi,ad7414";
   89                                 reg = <0x4a>;
   90                         };
   91 
   92                         eeprom@50 {
   93                                 compatible = "atmel,24c32";
   94                                 reg = <0x50>;
   95                         };
   96 
   97                         rtc@68 {
   98                                 compatible = "st,m41t62";
   99                                 reg = <0x68>;
  100                         };
  101                 };
  102 
  103                 eth0: ethernet@2800 {
  104                         phy-handle = <&phy0>;
  105                 };
  106 
  107                 can@2300 {
  108                         status = "disabled";
  109                 };
  110 
  111                 can@2380 {
  112                         status = "disabled";
  113                 };
  114 
  115                 viu@2400 {
  116                         status = "disabled";
  117                 };
  118 
  119                 mdio@2800 {
  120                         phy0: ethernet-phy@0 {
  121                                 reg = <1>;
  122                         };
  123                 };
  124 
  125                 /* mpc5121ads only uses USB0 */
  126                 usb@3000 {
  127                         status = "disabled";
  128                 };
  129 
  130                 /* USB0 using internal UTMI PHY */
  131                 usb@4000 {
  132                         dr_mode = "host";
  133                         fsl,invert-drvvbus;
  134                         fsl,invert-pwr-fault;
  135                 };
  136 
  137                 /* PSC3 serial port A aka ttyPSC0 */
  138                 psc@11300 {
  139                         compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
  140                 };
  141 
  142                 /* PSC4 serial port B aka ttyPSC1 */
  143                 psc@11400 {
  144                         compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
  145                 };
  146 
  147                 /* PSC5 in ac97 mode */
  148                 ac97: psc@11500 {
  149                         compatible = "fsl,mpc5121-psc-ac97", "fsl,mpc5121-psc";
  150                         fsl,mode = "ac97-slave";
  151                         fsl,rx-fifo-size = <384>;
  152                         fsl,tx-fifo-size = <384>;
  153                 };
  154         };
  155 
  156         pci: pci@80008500 {
  157                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
  158                 interrupt-map = <
  159                                 /* IDSEL 0x15 - Slot 1 PCI */
  160                                  0xa800 0x0 0x0 0x1 &cpld_pic 0x0 0x8
  161                                  0xa800 0x0 0x0 0x2 &cpld_pic 0x1 0x8
  162                                  0xa800 0x0 0x0 0x3 &cpld_pic 0x2 0x8
  163                                  0xa800 0x0 0x0 0x4 &cpld_pic 0x3 0x8
  164 
  165                                 /* IDSEL 0x16 - Slot 2 MiniPCI */
  166                                  0xb000 0x0 0x0 0x1 &cpld_pic 0x4 0x8
  167                                  0xb000 0x0 0x0 0x2 &cpld_pic 0x5 0x8
  168 
  169                                 /* IDSEL 0x17 - Slot 3 MiniPCI */
  170                                  0xb800 0x0 0x0 0x1 &cpld_pic 0x6 0x8
  171                                  0xb800 0x0 0x0 0x2 &cpld_pic 0x7 0x8
  172                                 >;
  173         };
  174 };

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