Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/powerpc/tqm8560.dts
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1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * TQM 8560 Device Tree Source 4 * 5 * Copyright 2008 Freescale Semiconductor Inc. 6 * Copyright 2008 Wolfgang Grandegger <wg@grandegger.com> 7 */ 8 9 /dts-v1/; 10 11 / { 12 model = "tqc,tqm8560"; 13 compatible = "tqc,tqm8560"; 14 #address-cells = <1>; 15 #size-cells = <1>; 16 17 aliases { 18 ethernet0 = &enet0; 19 ethernet1 = &enet1; 20 ethernet2 = &enet2; 21 serial0 = &serial0; 22 serial1 = &serial1; 23 pci0 = &pci0; 24 }; 25 26 cpus { 27 #address-cells = <1>; 28 #size-cells = <0>; 29 30 PowerPC,8560@0 { 31 device_type = "cpu"; 32 reg = <0>; 33 d-cache-line-size = <32>; 34 i-cache-line-size = <32>; 35 d-cache-size = <32768>; 36 i-cache-size = <32768>; 37 timebase-frequency = <0>; 38 bus-frequency = <0>; 39 clock-frequency = <0>; 40 next-level-cache = <&L2>; 41 }; 42 }; 43 44 memory { 45 device_type = "memory"; 46 reg = <0x00000000 0x10000000>; 47 }; 48 49 soc@e0000000 { 50 #address-cells = <1>; 51 #size-cells = <1>; 52 device_type = "soc"; 53 ranges = <0x0 0xe0000000 0x100000>; 54 bus-frequency = <0>; 55 compatible = "fsl,mpc8560-immr", "simple-bus"; 56 57 ecm-law@0 { 58 compatible = "fsl,ecm-law"; 59 reg = <0x0 0x1000>; 60 fsl,num-laws = <8>; 61 }; 62 63 ecm@1000 { 64 compatible = "fsl,mpc8560-ecm", "fsl,ecm"; 65 reg = <0x1000 0x1000>; 66 interrupts = <17 2>; 67 interrupt-parent = <&mpic>; 68 }; 69 70 memory-controller@2000 { 71 compatible = "fsl,mpc8540-memory-controller"; 72 reg = <0x2000 0x1000>; 73 interrupt-parent = <&mpic>; 74 interrupts = <18 2>; 75 }; 76 77 L2: l2-cache-controller@20000 { 78 compatible = "fsl,mpc8540-l2-cache-controller"; 79 reg = <0x20000 0x1000>; 80 cache-line-size = <32>; 81 cache-size = <0x40000>; // L2, 256K 82 interrupt-parent = <&mpic>; 83 interrupts = <16 2>; 84 }; 85 86 i2c@3000 { 87 #address-cells = <1>; 88 #size-cells = <0>; 89 cell-index = <0>; 90 compatible = "fsl-i2c"; 91 reg = <0x3000 0x100>; 92 interrupts = <43 2>; 93 interrupt-parent = <&mpic>; 94 dfsrr; 95 96 dtt@48 { 97 compatible = "national,lm75"; 98 reg = <0x48>; 99 }; 100 101 rtc@68 { 102 compatible = "dallas,ds1337"; 103 reg = <0x68>; 104 }; 105 }; 106 107 dma@21300 { 108 #address-cells = <1>; 109 #size-cells = <1>; 110 compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma"; 111 reg = <0x21300 0x4>; 112 ranges = <0x0 0x21100 0x200>; 113 cell-index = <0>; 114 dma-channel@0 { 115 compatible = "fsl,mpc8560-dma-channel", 116 "fsl,eloplus-dma-channel"; 117 reg = <0x0 0x80>; 118 cell-index = <0>; 119 interrupt-parent = <&mpic>; 120 interrupts = <20 2>; 121 }; 122 dma-channel@80 { 123 compatible = "fsl,mpc8560-dma-channel", 124 "fsl,eloplus-dma-channel"; 125 reg = <0x80 0x80>; 126 cell-index = <1>; 127 interrupt-parent = <&mpic>; 128 interrupts = <21 2>; 129 }; 130 dma-channel@100 { 131 compatible = "fsl,mpc8560-dma-channel", 132 "fsl,eloplus-dma-channel"; 133 reg = <0x100 0x80>; 134 cell-index = <2>; 135 interrupt-parent = <&mpic>; 136 interrupts = <22 2>; 137 }; 138 dma-channel@180 { 139 compatible = "fsl,mpc8560-dma-channel", 140 "fsl,eloplus-dma-channel"; 141 reg = <0x180 0x80>; 142 cell-index = <3>; 143 interrupt-parent = <&mpic>; 144 interrupts = <23 2>; 145 }; 146 }; 147 148 enet0: ethernet@24000 { 149 #address-cells = <1>; 150 #size-cells = <1>; 151 cell-index = <0>; 152 device_type = "network"; 153 model = "TSEC"; 154 compatible = "gianfar"; 155 reg = <0x24000 0x1000>; 156 ranges = <0x0 0x24000 0x1000>; 157 local-mac-address = [ 00 00 00 00 00 00 ]; 158 interrupts = <29 2 30 2 34 2>; 159 interrupt-parent = <&mpic>; 160 tbi-handle = <&tbi0>; 161 phy-handle = <&phy2>; 162 163 mdio@520 { 164 #address-cells = <1>; 165 #size-cells = <0>; 166 compatible = "fsl,gianfar-mdio"; 167 reg = <0x520 0x20>; 168 169 phy1: ethernet-phy@1 { 170 interrupt-parent = <&mpic>; 171 interrupts = <8 1>; 172 reg = <1>; 173 }; 174 phy2: ethernet-phy@2 { 175 interrupt-parent = <&mpic>; 176 interrupts = <8 1>; 177 reg = <2>; 178 }; 179 phy3: ethernet-phy@3 { 180 interrupt-parent = <&mpic>; 181 interrupts = <8 1>; 182 reg = <3>; 183 }; 184 tbi0: tbi-phy@11 { 185 reg = <0x11>; 186 device_type = "tbi-phy"; 187 }; 188 }; 189 }; 190 191 enet1: ethernet@25000 { 192 #address-cells = <1>; 193 #size-cells = <1>; 194 cell-index = <1>; 195 device_type = "network"; 196 model = "TSEC"; 197 compatible = "gianfar"; 198 reg = <0x25000 0x1000>; 199 ranges = <0x0 0x25000 0x1000>; 200 local-mac-address = [ 00 00 00 00 00 00 ]; 201 interrupts = <35 2 36 2 40 2>; 202 interrupt-parent = <&mpic>; 203 tbi-handle = <&tbi1>; 204 phy-handle = <&phy1>; 205 206 mdio@520 { 207 #address-cells = <1>; 208 #size-cells = <0>; 209 compatible = "fsl,gianfar-tbi"; 210 reg = <0x520 0x20>; 211 212 tbi1: tbi-phy@11 { 213 reg = <0x11>; 214 device_type = "tbi-phy"; 215 }; 216 }; 217 }; 218 219 mpic: pic@40000 { 220 interrupt-controller; 221 #address-cells = <0>; 222 #interrupt-cells = <2>; 223 reg = <0x40000 0x40000>; 224 device_type = "open-pic"; 225 compatible = "chrp,open-pic"; 226 }; 227 228 cpm@919c0 { 229 #address-cells = <1>; 230 #size-cells = <1>; 231 compatible = "fsl,mpc8560-cpm", "fsl,cpm2", "simple-bus"; 232 reg = <0x919c0 0x30>; 233 ranges; 234 235 muram@80000 { 236 #address-cells = <1>; 237 #size-cells = <1>; 238 ranges = <0 0x80000 0x10000>; 239 240 data@0 { 241 compatible = "fsl,cpm-muram-data"; 242 reg = <0 0x4000 0x9000 0x2000>; 243 }; 244 }; 245 246 brg@919f0 { 247 compatible = "fsl,mpc8560-brg", 248 "fsl,cpm2-brg", 249 "fsl,cpm-brg"; 250 reg = <0x919f0 0x10 0x915f0 0x10>; 251 clock-frequency = <0>; 252 }; 253 254 cpmpic: pic@90c00 { 255 interrupt-controller; 256 #address-cells = <0>; 257 #interrupt-cells = <2>; 258 interrupts = <46 2>; 259 interrupt-parent = <&mpic>; 260 reg = <0x90c00 0x80>; 261 compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic"; 262 }; 263 264 serial0: serial@91a00 { 265 device_type = "serial"; 266 compatible = "fsl,mpc8560-scc-uart", 267 "fsl,cpm2-scc-uart"; 268 reg = <0x91a00 0x20 0x88000 0x100>; 269 fsl,cpm-brg = <1>; 270 fsl,cpm-command = <0x800000>; 271 current-speed = <115200>; 272 interrupts = <40 8>; 273 interrupt-parent = <&cpmpic>; 274 }; 275 276 serial1: serial@91a20 { 277 device_type = "serial"; 278 compatible = "fsl,mpc8560-scc-uart", 279 "fsl,cpm2-scc-uart"; 280 reg = <0x91a20 0x20 0x88100 0x100>; 281 fsl,cpm-brg = <2>; 282 fsl,cpm-command = <0x4a00000>; 283 current-speed = <115200>; 284 interrupts = <41 8>; 285 interrupt-parent = <&cpmpic>; 286 }; 287 288 enet2: ethernet@91340 { 289 device_type = "network"; 290 compatible = "fsl,mpc8560-fcc-enet", 291 "fsl,cpm2-fcc-enet"; 292 reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>; 293 local-mac-address = [ 00 00 00 00 00 00 ]; 294 fsl,cpm-command = <0x1a400300>; 295 interrupts = <34 8>; 296 interrupt-parent = <&cpmpic>; 297 phy-handle = <&phy3>; 298 }; 299 }; 300 }; 301 302 localbus@e0005000 { 303 compatible = "fsl,mpc8560-localbus", "fsl,pq3-localbus", 304 "simple-bus"; 305 #address-cells = <2>; 306 #size-cells = <1>; 307 reg = <0xe0005000 0x100>; // BRx, ORx, etc. 308 interrupt-parent = <&mpic>; 309 interrupts = <19 2>; 310 311 ranges = < 312 0 0x0 0xfc000000 0x04000000 // NOR FLASH bank 1 313 1 0x0 0xf8000000 0x08000000 // NOR FLASH bank 0 314 2 0x0 0xe3000000 0x00008000 // CAN (2 x i82527) 315 >; 316 317 flash@1,0 { 318 #address-cells = <1>; 319 #size-cells = <1>; 320 compatible = "cfi-flash"; 321 reg = <1 0x0 0x8000000>; 322 bank-width = <4>; 323 device-width = <1>; 324 325 partition@0 { 326 label = "kernel"; 327 reg = <0x00000000 0x00200000>; 328 }; 329 partition@200000 { 330 label = "root"; 331 reg = <0x00200000 0x00300000>; 332 }; 333 partition@500000 { 334 label = "user"; 335 reg = <0x00500000 0x07a00000>; 336 }; 337 partition@7f00000 { 338 label = "env1"; 339 reg = <0x07f00000 0x00040000>; 340 }; 341 partition@7f40000 { 342 label = "env2"; 343 reg = <0x07f40000 0x00040000>; 344 }; 345 partition@7f80000 { 346 label = "u-boot"; 347 reg = <0x07f80000 0x00080000>; 348 read-only; 349 }; 350 }; 351 352 /* Note: CAN support needs be enabled in U-Boot */ 353 can0@2,0 { 354 compatible = "intel,82527"; // Bosch CC770 355 reg = <2 0x0 0x100>; 356 interrupts = <4 1>; 357 interrupt-parent = <&mpic>; 358 }; 359 360 can1@2,100 { 361 compatible = "intel,82527"; // Bosch CC770 362 reg = <2 0x100 0x100>; 363 interrupts = <4 1>; 364 interrupt-parent = <&mpic>; 365 }; 366 }; 367 368 pci0: pci@e0008000 { 369 #interrupt-cells = <1>; 370 #size-cells = <2>; 371 #address-cells = <3>; 372 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; 373 device_type = "pci"; 374 reg = <0xe0008000 0x1000>; 375 clock-frequency = <66666666>; 376 interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 377 interrupt-map = < 378 /* IDSEL 28 */ 379 0xe000 0 0 1 &mpic 2 1 380 0xe000 0 0 2 &mpic 3 1 381 0xe000 0 0 3 &mpic 6 1 382 0xe000 0 0 4 &mpic 5 1 383 384 /* IDSEL 11 */ 385 0x5800 0 0 1 &mpic 6 1 386 0x5800 0 0 2 &mpic 5 1 387 >; 388 389 interrupt-parent = <&mpic>; 390 interrupts = <24 2>; 391 bus-range = <0 0>; 392 ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000 393 0x01000000 0 0x00000000 0xe2000000 0 0x01000000>; 394 }; 395 };
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