The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/riscv/kendryte/k210.dtsi

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    1 // SPDX-License-Identifier: GPL-2.0+
    2 /*
    3  * Copyright (C) 2019 Sean Anderson <seanga2@gmail.com>
    4  * Copyright (C) 2020 Western Digital Corporation or its affiliates.
    5  */
    6 #include <dt-bindings/clock/k210-clk.h>
    7 
    8 / {
    9         /*
   10          * Although the K210 is a 64-bit CPU, the address bus is only 32-bits
   11          * wide, and the upper half of all addresses is ignored.
   12          */
   13         #address-cells = <1>;
   14         #size-cells = <1>;
   15         compatible = "kendryte,k210";
   16 
   17         aliases {
   18                 serial0 = &uarths0;
   19         };
   20 
   21         /*
   22          * The K210 has an sv39 MMU following the priviledge specification v1.9.
   23          * Since this is a non-ratified draft specification, the kernel does not
   24          * support it and the K210 support enabled only for the !MMU case.
   25          * Be consistent with this by setting the CPUs MMU type to "none".
   26          */
   27         cpus {
   28                 #address-cells = <1>;
   29                 #size-cells = <0>;
   30                 timebase-frequency = <7800000>;
   31                 cpu0: cpu@0 {
   32                         device_type = "cpu";
   33                         reg = <0>;
   34                         compatible = "kendryte,k210", "sifive,rocket0", "riscv";
   35                         riscv,isa = "rv64imafdc";
   36                         mmu-type = "none";
   37                         i-cache-size = <0x8000>;
   38                         i-cache-block-size = <64>;
   39                         d-cache-size = <0x8000>;
   40                         d-cache-block-size = <64>;
   41                         clocks = <&sysctl K210_CLK_CPU>;
   42                         clock-frequency = <390000000>;
   43                         cpu0_intc: interrupt-controller {
   44                                 #interrupt-cells = <1>;
   45                                 interrupt-controller;
   46                                 compatible = "riscv,cpu-intc";
   47                         };
   48                 };
   49                 cpu1: cpu@1 {
   50                         device_type = "cpu";
   51                         reg = <1>;
   52                         compatible = "kendryte,k210", "sifive,rocket0", "riscv";
   53                         riscv,isa = "rv64imafdc";
   54                         mmu-type = "none";
   55                         i-cache-size = <0x8000>;
   56                         i-cache-block-size = <64>;
   57                         d-cache-size = <0x8000>;
   58                         d-cache-block-size = <64>;
   59                         clocks = <&sysctl K210_CLK_CPU>;
   60                         clock-frequency = <390000000>;
   61                         cpu1_intc: interrupt-controller {
   62                                 #interrupt-cells = <1>;
   63                                 interrupt-controller;
   64                                 compatible = "riscv,cpu-intc";
   65                         };
   66                 };
   67         };
   68 
   69         sram: memory@80000000 {
   70                 device_type = "memory";
   71                 reg = <0x80000000 0x400000>,
   72                       <0x80400000 0x200000>,
   73                       <0x80600000 0x200000>;
   74                 reg-names = "sram0", "sram1", "aisram";
   75         };
   76 
   77         clocks {
   78                 in0: oscillator {
   79                         compatible = "fixed-clock";
   80                         #clock-cells = <0>;
   81                         clock-frequency = <26000000>;
   82                 };
   83         };
   84 
   85         soc {
   86                 #address-cells = <1>;
   87                 #size-cells = <1>;
   88                 compatible = "kendryte,k210-soc", "simple-bus";
   89                 ranges;
   90                 interrupt-parent = <&plic0>;
   91 
   92                 sysctl: sysctl@50440000 {
   93                         compatible = "kendryte,k210-sysctl", "simple-mfd";
   94                         reg = <0x50440000 0x1000>;
   95                         #clock-cells = <1>;
   96                 };
   97 
   98                 clint0: clint@2000000 {
   99                         #interrupt-cells = <1>;
  100                         compatible = "riscv,clint0";
  101                         reg = <0x2000000 0xC000>;
  102                         interrupts-extended =  <&cpu0_intc 3 &cpu0_intc 7
  103                                                 &cpu1_intc 3 &cpu1_intc 7>;
  104                         clocks = <&sysctl K210_CLK_ACLK>;
  105                 };
  106 
  107                 plic0: interrupt-controller@c000000 {
  108                         #interrupt-cells = <1>;
  109                         interrupt-controller;
  110                         compatible = "kendryte,k210-plic0", "riscv,plic0";
  111                         reg = <0xC000000 0x4000000>;
  112                         interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 0xffffffff>,
  113                                               <&cpu1_intc 11>, <&cpu1_intc 0xffffffff>;
  114                         riscv,ndev = <65>;
  115                         riscv,max-priority = <7>;
  116                 };
  117 
  118                 uarths0: serial@38000000 {
  119                         compatible = "kendryte,k210-uarths", "sifive,uart0";
  120                         reg = <0x38000000 0x1000>;
  121                         interrupts = <33>;
  122                         clocks = <&sysctl K210_CLK_CPU>;
  123                 };
  124         };
  125 };

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