mpfs-polarberry.dts

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    1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
    2 /* Copyright (c) 2020-2022 Microchip Technology Inc */
    3 
    4 /dts-v1/;
    5 
    6 #include "mpfs.dtsi"
    7 #include "mpfs-polarberry-fabric.dtsi"
    8 
    9 /* Clock frequency (in Hz) of the rtcclk */
   10 #define MTIMER_FREQ     1000000
   11 
   12 / {
   13         model = "Sundance PolarBerry";
   14         compatible = "sundance,polarberry", "microchip,mpfs";
   15 
   16         aliases {
   17                 ethernet0 = &mac1;
   18                 serial0 = &mmuart0;
   19         };
   20 
   21         chosen {
   22                 stdout-path = "serial0:115200n8";
   23         };
   24 
   25         cpus {
   26                 timebase-frequency = <MTIMER_FREQ>;
   27         };
   28 
   29         ddrc_cache_lo: memory@80000000 {
   30                 device_type = "memory";
   31                 reg = <0x0 0x80000000 0x0 0x2e000000>;
   32         };
   33 
   34         ddrc_cache_hi: memory@1000000000 {
   35                 device_type = "memory";
   36                 reg = <0x10 0x00000000 0x0 0xC0000000>;
   37         };
   38 };
   39 
   40 /*
   41  * phy0 is connected to mac0, but the port itself is on the (optional) carrier
   42  * board.
   43  */
   44 &mac0 {
   45         phy-mode = "sgmii";
   46         phy-handle = <&phy0>;
   47         status = "disabled";
   48 };
   49 
   50 &mac1 {
   51         phy-mode = "sgmii";
   52         phy-handle = <&phy1>;
   53         status = "okay";
   54 
   55         phy1: ethernet-phy@5 {
   56                 reg = <5>;
   57         };
   58 
   59         phy0: ethernet-phy@4 {
   60                 reg = <4>;
   61         };
   62 };
   63 
   64 &mbox {
   65         status = "okay";
   66 };
   67 
   68 &mmc {
   69         bus-width = <4>;
   70         disable-wp;
   71         cap-sd-highspeed;
   72         cap-mmc-highspeed;
   73         mmc-ddr-1_8v;
   74         mmc-hs200-1_8v;
   75         sd-uhs-sdr12;
   76         sd-uhs-sdr25;
   77         sd-uhs-sdr50;
   78         sd-uhs-sdr104;
   79         status = "okay";
   80 };
   81 
   82 &mmuart0 {
   83         status = "okay";
   84 };
   85 
   86 &refclk {
   87         clock-frequency = <125000000>;
   88 };
   89 
   90 &rtc {
   91         status = "okay";
   92 };
   93 
   94 &syscontroller {
   95         status = "okay";
   96 };

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FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/src/riscv/microchip/mpfs-polarberry.dts

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/riscv/microchip/mpfs-polarberry.dts