hifive-unleashed-a00.dts

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    1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
    2 /* Copyright (c) 2018-2019 SiFive, Inc */
    3 
    4 #include "fu540-c000.dtsi"
    5 #include <dt-bindings/gpio/gpio.h>
    6 
    7 /* Clock frequency (in Hz) of the PCB crystal for rtcclk */
    8 #define RTCCLK_FREQ             1000000
    9 
   10 / {
   11         model = "SiFive HiFive Unleashed A00";
   12         compatible = "sifive,hifive-unleashed-a00", "sifive,fu540-c000",
   13                      "sifive,fu540";
   14 
   15         chosen {
   16                 stdout-path = "serial0";
   17         };
   18 
   19         cpus {
   20                 timebase-frequency = <RTCCLK_FREQ>;
   21         };
   22 
   23         memory@80000000 {
   24                 device_type = "memory";
   25                 reg = <0x0 0x80000000 0x2 0x00000000>;
   26         };
   27 
   28         hfclk: hfclk {
   29                 #clock-cells = <0>;
   30                 compatible = "fixed-clock";
   31                 clock-frequency = <33333333>;
   32                 clock-output-names = "hfclk";
   33         };
   34 
   35         rtcclk: rtcclk {
   36                 #clock-cells = <0>;
   37                 compatible = "fixed-clock";
   38                 clock-frequency = <RTCCLK_FREQ>;
   39                 clock-output-names = "rtcclk";
   40         };
   41         gpio-restart {
   42                 compatible = "gpio-restart";
   43                 gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
   44         };
   45 };
   46 
   47 &uart0 {
   48         status = "okay";
   49 };
   50 
   51 &uart1 {
   52         status = "okay";
   53 };
   54 
   55 &i2c0 {
   56         status = "okay";
   57 };
   58 
   59 &qspi0 {
   60         status = "okay";
   61         flash@0 {
   62                 compatible = "jedec,spi-nor";
   63                 reg = <0>;
   64                 spi-max-frequency = <50000000>;
   65                 m25p,fast-read;
   66                 spi-tx-bus-width = <4>;
   67                 spi-rx-bus-width = <4>;
   68         };
   69 };
   70 
   71 &qspi2 {
   72         status = "okay";
   73         mmc@0 {
   74                 compatible = "mmc-spi-slot";
   75                 reg = <0>;
   76                 spi-max-frequency = <20000000>;
   77                 voltage-ranges = <3300 3300>;
   78                 disable-wp;
   79                 gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
   80         };
   81 };
   82 
   83 &eth0 {
   84         status = "okay";
   85         phy-mode = "gmii";
   86         phy-handle = <&phy0>;
   87         phy0: ethernet-phy@0 {
   88                 compatible = "ethernet-phy-id0007.0771";
   89                 reg = <0>;
   90         };
   91 };
   92 
   93 &pwm0 {
   94         status = "okay";
   95 };
   96 
   97 &pwm1 {
   98         status = "okay";
   99 };
  100 
  101 &gpio {
  102         status = "okay";
  103 };

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FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/src/riscv/sifive/hifive-unleashed-a00.dts

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/riscv/sifive/hifive-unleashed-a00.dts