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     1 // SPDX-License-Identifier: GPL-2.0
    2 /dts-v1/;
    3 
    4 / {
    5         compatible = "cdns,xtensa-xtfpga";
    6         #address-cells = <1>;
    7         #size-cells = <1>;
    8         interrupt-parent = <&pic>;
    9 
   10         chosen {
   11                 bootargs = "earlycon=cdns,0xfd000000,115200 console=tty0 console=ttyPS0,115200 root=/dev/ram0 rw earlyprintk xilinx_uartps.rx_trigger_level=32 loglevel=8 nohz=off ignore_loglevel";
   12         };
   13 
   14         memory@0 {
   15                 device_type = "memory";
   16                 reg = <0x00000000 0x40000000>;
   17         };
   18 
   19         cpus {
   20                 #address-cells = <1>;
   21                 #size-cells = <0>;
   22                 cpu@0 {
   23                         compatible = "cdns,xtensa-cpu";
   24                         reg = <0>;
   25                 };
   26         };
   27 
   28         pic: pic {
   29                 compatible = "cdns,xtensa-pic";
   30                 #interrupt-cells = <2>;
   31                 interrupt-controller;
   32         };
   33 
   34         clocks {
   35                 osc: main-oscillator {
   36                         #clock-cells = <0>;
   37                         compatible = "fixed-clock";
   38                 };
   39         };
   40 
   41         soc {
   42                 #address-cells = <1>;
   43                 #size-cells = <1>;
   44                 compatible = "simple-bus";
   45                 ranges = <0x00000000 0xf0000000 0x10000000>;
   46 
   47                 uart0: serial@0d000000 {
   48                         compatible = "xlnx,xuartps", "cdns,uart-r1p8";
   49                         clocks = <&osc>, <&osc>;
   50                         clock-names = "uart_clk", "pclk";
   51                         reg = <0x0d000000 0x1000>;
   52                         interrupts = <0 1>;
   53                 };
   54         };
   55 };
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