The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/contrib/ncsw/Peripherals/FM/HC/hc.c

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    1 /*
    2  * Copyright 2008-2012 Freescale Semiconductor Inc.
    3  *
    4  * Redistribution and use in source and binary forms, with or without
    5  * modification, are permitted provided that the following conditions are met:
    6  *     * Redistributions of source code must retain the above copyright
    7  *       notice, this list of conditions and the following disclaimer.
    8  *     * Redistributions in binary form must reproduce the above copyright
    9  *       notice, this list of conditions and the following disclaimer in the
   10  *       documentation and/or other materials provided with the distribution.
   11  *     * Neither the name of Freescale Semiconductor nor the
   12  *       names of its contributors may be used to endorse or promote products
   13  *       derived from this software without specific prior written permission.
   14  *
   15  *
   16  * ALTERNATIVELY, this software may be distributed under the terms of the
   17  * GNU General Public License ("GPL") as published by the Free Software
   18  * Foundation, either version 2 of that License or (at your option) any
   19  * later version.
   20  *
   21  * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
   22  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
   23  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
   24  * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
   25  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
   26  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
   27  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
   28  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
   29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
   30  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   31  */
   32 
   33 
   34 #include "std_ext.h"
   35 #include "error_ext.h"
   36 #include "sprint_ext.h"
   37 #include "string_ext.h"
   38 
   39 #include "fm_common.h"
   40 #include "fm_hc.h"
   41 
   42 
   43 /**************************************************************************//**
   44  @Description       defaults
   45 *//***************************************************************************/
   46 #define DEFAULT_dataMemId                                       0
   47 
   48 #define HC_HCOR_OPCODE_PLCR_PRFL                                0x0
   49 #define HC_HCOR_OPCODE_KG_SCM                                   0x1
   50 #define HC_HCOR_OPCODE_SYNC                                     0x2
   51 #define HC_HCOR_OPCODE_CC                                       0x3
   52 #define HC_HCOR_OPCODE_CC_AGE_MASK                              0x4
   53 #define HC_HCOR_OPCODE_CC_CAPWAP_REASSM_TIMEOUT                 0x5
   54 #define HC_HCOR_OPCODE_CC_REASSM_TIMEOUT                        0x10
   55 #define HC_HCOR_OPCODE_CC_IP_FRAG_INITIALIZATION                0x11
   56 #define HC_HCOR_OPCODE_CC_UPDATE_WITH_AGING                     0x13
   57 #define HC_HCOR_ACTION_REG_REASSM_TIMEOUT_ACTIVE_SHIFT          24
   58 #define HC_HCOR_EXTRA_REG_REASSM_TIMEOUT_TSBS_SHIFT             24
   59 #define HC_HCOR_EXTRA_REG_CC_AGING_ADD                          0x80000000
   60 #define HC_HCOR_EXTRA_REG_CC_AGING_REMOVE                       0x40000000
   61 #define HC_HCOR_EXTRA_REG_CC_AGING_CHANGE_MASK                  0xC0000000
   62 #define HC_HCOR_EXTRA_REG_CC_REMOVE_INDX_SHIFT                  24
   63 #define HC_HCOR_EXTRA_REG_CC_REMOVE_INDX_MASK                   0x1F000000
   64 #define HC_HCOR_ACTION_REG_REASSM_TIMEOUT_RES_SHIFT             16
   65 #define HC_HCOR_ACTION_REG_REASSM_TIMEOUT_RES_MASK              0xF
   66 #define HC_HCOR_ACTION_REG_IP_FRAG_SCRATCH_POOL_CMD_SHIFT       24
   67 #define HC_HCOR_ACTION_REG_IP_FRAG_SCRATCH_POOL_BPID            16
   68 
   69 #define HC_HCOR_GBL                         0x20000000
   70 
   71 #define HC_HCOR_KG_SCHEME_COUNTER           0x00000400
   72 
   73 #if (DPAA_VERSION == 10)
   74 #define HC_HCOR_KG_SCHEME_REGS_MASK         0xFFFFF800
   75 #else
   76 #define HC_HCOR_KG_SCHEME_REGS_MASK         0xFFFFFE00
   77 #endif /* (DPAA_VERSION == 10) */
   78 
   79 #define SIZE_OF_HC_FRAME_PORT_REGS          (sizeof(t_HcFrame)-sizeof(struct fman_kg_scheme_regs)+sizeof(t_FmPcdKgPortRegs))
   80 #define SIZE_OF_HC_FRAME_SCHEME_REGS        sizeof(t_HcFrame)
   81 #define SIZE_OF_HC_FRAME_PROFILES_REGS      (sizeof(t_HcFrame)-sizeof(struct fman_kg_scheme_regs)+sizeof(t_FmPcdPlcrProfileRegs))
   82 #define SIZE_OF_HC_FRAME_PROFILE_CNT        (sizeof(t_HcFrame)-sizeof(t_FmPcdPlcrProfileRegs)+sizeof(uint32_t))
   83 #define SIZE_OF_HC_FRAME_READ_OR_CC_DYNAMIC 16
   84 
   85 #define HC_CMD_POOL_SIZE                    (INTG_MAX_NUM_OF_CORES)
   86 
   87 #define BUILD_FD(len)                     \
   88 do {                                      \
   89     memset(&fmFd, 0, sizeof(t_DpaaFD));   \
   90     DPAA_FD_SET_ADDR(&fmFd, p_HcFrame);   \
   91     DPAA_FD_SET_OFFSET(&fmFd, 0);         \
   92     DPAA_FD_SET_LENGTH(&fmFd, len);       \
   93 } while (0)
   94 
   95 
   96 #if defined(__MWERKS__) && !defined(__GNUC__)
   97 #pragma pack(push,1)
   98 #endif /* defined(__MWERKS__) && ... */
   99 
  100 typedef struct t_FmPcdKgPortRegs {
  101     volatile uint32_t                       spReg;
  102     volatile uint32_t                       cppReg;
  103 } t_FmPcdKgPortRegs;
  104 
  105 typedef struct t_HcFrame {
  106     volatile uint32_t                           opcode;
  107     volatile uint32_t                           actionReg;
  108     volatile uint32_t                           extraReg;
  109     volatile uint32_t                           commandSequence;
  110     union {
  111         struct fman_kg_scheme_regs              schemeRegs;
  112         struct fman_kg_scheme_regs              schemeRegsWithoutCounter;
  113         t_FmPcdPlcrProfileRegs                  profileRegs;
  114         volatile uint32_t                       singleRegForWrite;    /* for writing SP, CPP, profile counter */
  115         t_FmPcdKgPortRegs                       portRegsForRead;
  116         volatile uint32_t                       clsPlanEntries[CLS_PLAN_NUM_PER_GRP];
  117         t_FmPcdCcCapwapReassmTimeoutParams      ccCapwapReassmTimeout;
  118         t_FmPcdCcReassmTimeoutParams            ccReassmTimeout;
  119     } hcSpecificData;
  120 } t_HcFrame;
  121 
  122 #if defined(__MWERKS__) && !defined(__GNUC__)
  123 #pragma pack(pop)
  124 #endif /* defined(__MWERKS__) && ... */
  125 
  126 
  127 typedef struct t_FmHc {
  128     t_Handle                    h_FmPcd;
  129     t_Handle                    h_HcPortDev;
  130     t_FmPcdQmEnqueueCallback    *f_QmEnqueue;     /**< A callback for enqueuing frames to the QM */
  131     t_Handle                    h_QmArg;          /**< A handle to the QM module */
  132     uint8_t                     dataMemId;        /**< Memory partition ID for data buffers */
  133 
  134     uint32_t                    seqNum[HC_CMD_POOL_SIZE];   /* FIFO of seqNum to use when
  135                                                                taking buffer */
  136     uint32_t                    nextSeqNumLocation;         /* seqNum location in seqNum[] for next buffer */
  137     volatile bool               enqueued[HC_CMD_POOL_SIZE]; /* HC is active - frame is enqueued
  138                                                                and not confirmed yet */
  139     t_HcFrame                   *p_Frm[HC_CMD_POOL_SIZE];
  140 } t_FmHc;
  141 
  142 
  143 static t_Error FillBufPool(t_FmHc *p_FmHc)
  144 {
  145     uint32_t i;
  146 
  147     ASSERT_COND(p_FmHc);
  148 
  149     for (i = 0; i < HC_CMD_POOL_SIZE; i++)
  150     {
  151 #ifdef FM_LOCKUP_ALIGNMENT_ERRATA_FMAN_SW004
  152         p_FmHc->p_Frm[i] = (t_HcFrame *)XX_MallocSmart((sizeof(t_HcFrame) + (16 - (sizeof(t_FmHc) % 16))),
  153                                                        p_FmHc->dataMemId,
  154                                                        16);
  155 #else
  156         p_FmHc->p_Frm[i] = (t_HcFrame *)XX_MallocSmart(sizeof(t_HcFrame),
  157                                                        p_FmHc->dataMemId,
  158                                                        16);
  159 #endif /* FM_LOCKUP_ALIGNMENT_ERRATA_FMAN_SW004 */
  160         if (!p_FmHc->p_Frm[i])
  161             RETURN_ERROR(MAJOR, E_NO_MEMORY, ("FM HC frames!"));
  162     }
  163 
  164     /* Initialize FIFO of seqNum to use during GetBuf */
  165     for (i = 0; i < HC_CMD_POOL_SIZE; i++)
  166     {
  167         p_FmHc->seqNum[i] = i;
  168     }
  169     p_FmHc->nextSeqNumLocation = 0;
  170 
  171     return E_OK;
  172 }
  173 
  174 static __inline__ t_HcFrame * GetBuf(t_FmHc *p_FmHc, uint32_t *p_SeqNum)
  175 {
  176     uint32_t    intFlags;
  177 
  178     ASSERT_COND(p_FmHc);
  179 
  180     intFlags = FmPcdLock(p_FmHc->h_FmPcd);
  181 
  182     if (p_FmHc->nextSeqNumLocation == HC_CMD_POOL_SIZE)
  183     {
  184         /* No more buffers */
  185         FmPcdUnlock(p_FmHc->h_FmPcd, intFlags);
  186         return NULL;
  187     }
  188 
  189     *p_SeqNum = p_FmHc->seqNum[p_FmHc->nextSeqNumLocation];
  190     p_FmHc->nextSeqNumLocation++;
  191 
  192     FmPcdUnlock(p_FmHc->h_FmPcd, intFlags);
  193     return p_FmHc->p_Frm[*p_SeqNum];
  194 }
  195 
  196 static __inline__ void PutBuf(t_FmHc *p_FmHc, t_HcFrame *p_Buf, uint32_t seqNum)
  197 {
  198     uint32_t    intFlags;
  199 
  200     UNUSED(p_Buf);
  201 
  202     intFlags = FmPcdLock(p_FmHc->h_FmPcd);
  203     ASSERT_COND(p_FmHc->nextSeqNumLocation);
  204     p_FmHc->nextSeqNumLocation--;
  205     p_FmHc->seqNum[p_FmHc->nextSeqNumLocation] = seqNum;
  206     FmPcdUnlock(p_FmHc->h_FmPcd, intFlags);
  207 }
  208 
  209 static __inline__ t_Error EnQFrm(t_FmHc *p_FmHc, t_DpaaFD *p_FmFd, uint32_t seqNum)
  210 {
  211     t_Error     err = E_OK;
  212     uint32_t    intFlags;
  213     uint32_t    timeout=100;
  214 
  215     intFlags = FmPcdLock(p_FmHc->h_FmPcd);
  216     ASSERT_COND(!p_FmHc->enqueued[seqNum]);
  217     p_FmHc->enqueued[seqNum] = TRUE;
  218     FmPcdUnlock(p_FmHc->h_FmPcd, intFlags);
  219     DBG(TRACE, ("Send Hc, SeqNum %d, buff@0x%x, fd offset 0x%x",
  220                 seqNum,
  221                 DPAA_FD_GET_ADDR(p_FmFd),
  222                 DPAA_FD_GET_OFFSET(p_FmFd)));
  223     err = p_FmHc->f_QmEnqueue(p_FmHc->h_QmArg, (void *)p_FmFd);
  224     if (err)
  225         RETURN_ERROR(MINOR, err, ("HC enqueue failed"));
  226 
  227     while (p_FmHc->enqueued[seqNum] && --timeout)
  228         XX_UDelay(100);
  229 
  230     if (!timeout)
  231         RETURN_ERROR(MINOR, E_TIMEOUT, ("HC Callback, timeout exceeded"));
  232 
  233     return err;
  234 }
  235 
  236 
  237 t_Handle FmHcConfigAndInit(t_FmHcParams *p_FmHcParams)
  238 {
  239     t_FmHc          *p_FmHc;
  240     t_FmPortParams  fmPortParam;
  241     t_Error         err;
  242 
  243     p_FmHc = (t_FmHc *)XX_Malloc(sizeof(t_FmHc));
  244     if (!p_FmHc)
  245     {
  246         REPORT_ERROR(MINOR, E_NO_MEMORY, ("HC obj"));
  247         return NULL;
  248     }
  249     memset(p_FmHc,0,sizeof(t_FmHc));
  250 
  251     p_FmHc->h_FmPcd             = p_FmHcParams->h_FmPcd;
  252     p_FmHc->f_QmEnqueue         = p_FmHcParams->params.f_QmEnqueue;
  253     p_FmHc->h_QmArg             = p_FmHcParams->params.h_QmArg;
  254     p_FmHc->dataMemId           = DEFAULT_dataMemId;
  255 
  256     err = FillBufPool(p_FmHc);
  257     if (err != E_OK)
  258     {
  259         REPORT_ERROR(MAJOR, err, NO_MSG);
  260         FmHcFree(p_FmHc);
  261         return NULL;
  262     }
  263 
  264     if (!FmIsMaster(p_FmHcParams->h_Fm))
  265         return (t_Handle)p_FmHc;
  266 
  267     memset(&fmPortParam, 0, sizeof(fmPortParam));
  268     fmPortParam.baseAddr    = p_FmHcParams->params.portBaseAddr;
  269     fmPortParam.portType    = e_FM_PORT_TYPE_OH_HOST_COMMAND;
  270     fmPortParam.portId      = p_FmHcParams->params.portId;
  271     fmPortParam.liodnBase   = p_FmHcParams->params.liodnBase;
  272     fmPortParam.h_Fm        = p_FmHcParams->h_Fm;
  273 
  274     fmPortParam.specificParams.nonRxParams.errFqid      = p_FmHcParams->params.errFqid;
  275     fmPortParam.specificParams.nonRxParams.dfltFqid     = p_FmHcParams->params.confFqid;
  276     fmPortParam.specificParams.nonRxParams.qmChannel    = p_FmHcParams->params.qmChannel;
  277 
  278     p_FmHc->h_HcPortDev = FM_PORT_Config(&fmPortParam);
  279     if (!p_FmHc->h_HcPortDev)
  280     {
  281         REPORT_ERROR(MAJOR, E_INVALID_HANDLE, ("FM HC port!"));
  282         XX_Free(p_FmHc);
  283         return NULL;
  284     }
  285 
  286     err = FM_PORT_ConfigMaxFrameLength(p_FmHc->h_HcPortDev,
  287                                        (uint16_t)sizeof(t_HcFrame));
  288 
  289     if (err != E_OK)
  290     {
  291         REPORT_ERROR(MAJOR, err, ("FM HC port init!"));
  292         FmHcFree(p_FmHc);
  293         return NULL;
  294     }
  295 
  296     /* final init */
  297     err = FM_PORT_Init(p_FmHc->h_HcPortDev);
  298     if (err != E_OK)
  299     {
  300         REPORT_ERROR(MAJOR, err, ("FM HC port init!"));
  301         FmHcFree(p_FmHc);
  302         return NULL;
  303     }
  304 
  305     err = FM_PORT_Enable(p_FmHc->h_HcPortDev);
  306     if (err != E_OK)
  307     {
  308         REPORT_ERROR(MAJOR, err, ("FM HC port enable!"));
  309         FmHcFree(p_FmHc);
  310         return NULL;
  311     }
  312 
  313     return (t_Handle)p_FmHc;
  314 }
  315 
  316 void FmHcFree(t_Handle h_FmHc)
  317 {
  318     t_FmHc  *p_FmHc = (t_FmHc*)h_FmHc;
  319     int     i;
  320 
  321     if (!p_FmHc)
  322         return;
  323 
  324     for (i=0; i<HC_CMD_POOL_SIZE; i++)
  325         if (p_FmHc->p_Frm[i])
  326             XX_FreeSmart(p_FmHc->p_Frm[i]);
  327         else
  328             break;
  329 
  330     if (p_FmHc->h_HcPortDev)
  331         FM_PORT_Free(p_FmHc->h_HcPortDev);
  332 
  333     XX_Free(p_FmHc);
  334 }
  335 
  336 /*****************************************************************************/
  337 t_Error FmHcSetFramesDataMemory(t_Handle h_FmHc,
  338                                 uint8_t  memId)
  339 {
  340     t_FmHc  *p_FmHc = (t_FmHc*)h_FmHc;
  341     int     i;
  342 
  343     SANITY_CHECK_RETURN_ERROR(p_FmHc, E_INVALID_HANDLE);
  344 
  345     p_FmHc->dataMemId            = memId;
  346 
  347     for (i=0; i<HC_CMD_POOL_SIZE; i++)
  348         if (p_FmHc->p_Frm[i])
  349             XX_FreeSmart(p_FmHc->p_Frm[i]);
  350 
  351     return FillBufPool(p_FmHc);
  352 }
  353 
  354 void FmHcTxConf(t_Handle h_FmHc, t_DpaaFD *p_Fd)
  355 {
  356     t_FmHc      *p_FmHc = (t_FmHc*)h_FmHc;
  357     t_HcFrame   *p_HcFrame;
  358     uint32_t    intFlags;
  359 
  360     ASSERT_COND(p_FmHc);
  361 
  362     intFlags = FmPcdLock(p_FmHc->h_FmPcd);
  363     p_HcFrame  = (t_HcFrame *)PTR_MOVE(DPAA_FD_GET_ADDR(p_Fd), DPAA_FD_GET_OFFSET(p_Fd));
  364 
  365     DBG(TRACE, ("Hc Conf, SeqNum %d, FD@0x%x, fd offset 0x%x",
  366                 p_HcFrame->commandSequence, DPAA_FD_GET_ADDR(p_Fd), DPAA_FD_GET_OFFSET(p_Fd)));
  367 
  368     if (!(p_FmHc->enqueued[p_HcFrame->commandSequence]))
  369         REPORT_ERROR(MINOR, E_INVALID_FRAME, ("Not an Host-Command frame received!"));
  370     else
  371         p_FmHc->enqueued[p_HcFrame->commandSequence] = FALSE;
  372     FmPcdUnlock(p_FmHc->h_FmPcd, intFlags);
  373 }
  374 
  375 t_Error FmHcPcdKgSetScheme(t_Handle                    h_FmHc,
  376                            t_Handle                    h_Scheme,
  377                            struct fman_kg_scheme_regs  *p_SchemeRegs,
  378                            bool                        updateCounter)
  379 {
  380     t_FmHc                              *p_FmHc = (t_FmHc*)h_FmHc;
  381     t_Error                             err = E_OK;
  382     t_HcFrame                           *p_HcFrame;
  383     t_DpaaFD                            fmFd;
  384     uint8_t                             physicalSchemeId;
  385     uint32_t                            seqNum;
  386 
  387     p_HcFrame = GetBuf(p_FmHc, &seqNum);
  388     if (!p_HcFrame)
  389         RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
  390 
  391     physicalSchemeId = FmPcdKgGetSchemeId(h_Scheme);
  392 
  393     memset(p_HcFrame, 0, sizeof(t_HcFrame));
  394     p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_KG_SCM);
  395     p_HcFrame->actionReg  = FmPcdKgBuildWriteSchemeActionReg(physicalSchemeId, updateCounter);
  396     p_HcFrame->extraReg = HC_HCOR_KG_SCHEME_REGS_MASK;
  397     memcpy(&p_HcFrame->hcSpecificData.schemeRegs, p_SchemeRegs, sizeof(struct fman_kg_scheme_regs));
  398     if (!updateCounter)
  399     {
  400         p_HcFrame->hcSpecificData.schemeRegs.kgse_dv0   = p_SchemeRegs->kgse_dv0;
  401         p_HcFrame->hcSpecificData.schemeRegs.kgse_dv1   = p_SchemeRegs->kgse_dv1;
  402         p_HcFrame->hcSpecificData.schemeRegs.kgse_ccbs  = p_SchemeRegs->kgse_ccbs;
  403         p_HcFrame->hcSpecificData.schemeRegs.kgse_mv    = p_SchemeRegs->kgse_mv;
  404     }
  405     p_HcFrame->commandSequence = seqNum;
  406 
  407     BUILD_FD(sizeof(t_HcFrame));
  408 
  409     err = EnQFrm(p_FmHc, &fmFd, seqNum);
  410 
  411     PutBuf(p_FmHc, p_HcFrame, seqNum);
  412 
  413     if (err != E_OK)
  414         RETURN_ERROR(MINOR, err, NO_MSG);
  415 
  416     return E_OK;
  417 }
  418 
  419 t_Error FmHcPcdKgDeleteScheme(t_Handle h_FmHc, t_Handle h_Scheme)
  420 {
  421     t_FmHc      *p_FmHc = (t_FmHc*)h_FmHc;
  422     t_Error     err = E_OK;
  423     t_HcFrame   *p_HcFrame;
  424     t_DpaaFD    fmFd;
  425     uint8_t     physicalSchemeId = FmPcdKgGetSchemeId(h_Scheme);
  426     uint32_t    seqNum;
  427 
  428     p_HcFrame = GetBuf(p_FmHc, &seqNum);
  429     if (!p_HcFrame)
  430         RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
  431 
  432     memset(p_HcFrame, 0, sizeof(t_HcFrame));
  433     p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_KG_SCM);
  434     p_HcFrame->actionReg  = FmPcdKgBuildWriteSchemeActionReg(physicalSchemeId, TRUE);
  435     p_HcFrame->extraReg = HC_HCOR_KG_SCHEME_REGS_MASK;
  436     memset(&p_HcFrame->hcSpecificData.schemeRegs, 0, sizeof(struct fman_kg_scheme_regs));
  437     p_HcFrame->commandSequence = seqNum;
  438 
  439     BUILD_FD(sizeof(t_HcFrame));
  440 
  441     err = EnQFrm(p_FmHc, &fmFd, seqNum);
  442 
  443     PutBuf(p_FmHc, p_HcFrame, seqNum);
  444 
  445     if (err != E_OK)
  446         RETURN_ERROR(MINOR, err, NO_MSG);
  447 
  448     return E_OK;
  449 }
  450 
  451 t_Error FmHcPcdKgCcGetSetParams(t_Handle h_FmHc, t_Handle  h_Scheme, uint32_t requiredAction, uint32_t value)
  452 {
  453     t_FmHc      *p_FmHc = (t_FmHc*)h_FmHc;
  454     t_Error     err = E_OK;
  455     t_HcFrame   *p_HcFrame;
  456     t_DpaaFD    fmFd;
  457     uint8_t     relativeSchemeId;
  458     uint8_t     physicalSchemeId = FmPcdKgGetSchemeId(h_Scheme);
  459     uint32_t    tmpReg32 = 0;
  460     uint32_t    seqNum;
  461 
  462     /* Scheme is locked by calling routine */
  463     /* WARNING - this lock will not be efficient if other HC routine will attempt to change
  464      * "kgse_mode" or "kgse_om" without locking scheme !
  465      */
  466 
  467     relativeSchemeId = FmPcdKgGetRelativeSchemeId(p_FmHc->h_FmPcd, physicalSchemeId);
  468     if ( relativeSchemeId == FM_PCD_KG_NUM_OF_SCHEMES)
  469         RETURN_ERROR(MAJOR, E_NOT_IN_RANGE, NO_MSG);
  470 
  471     if (!FmPcdKgGetRequiredActionFlag(p_FmHc->h_FmPcd, relativeSchemeId) ||
  472        !(FmPcdKgGetRequiredAction(p_FmHc->h_FmPcd, relativeSchemeId) & requiredAction))
  473     {
  474         if ((requiredAction & UPDATE_NIA_ENQ_WITHOUT_DMA) &&
  475             (FmPcdKgGetNextEngine(p_FmHc->h_FmPcd, relativeSchemeId) == e_FM_PCD_PLCR))
  476             {
  477                 if ((FmPcdKgIsDirectPlcr(p_FmHc->h_FmPcd, relativeSchemeId) == FALSE) ||
  478                     (FmPcdKgIsDistrOnPlcrProfile(p_FmHc->h_FmPcd, relativeSchemeId) == TRUE))
  479                     RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("In this situation PP can not be with distribution and has to be shared"));
  480                 err = FmPcdPlcrCcGetSetParams(p_FmHc->h_FmPcd, FmPcdKgGetRelativeProfileId(p_FmHc->h_FmPcd, relativeSchemeId), requiredAction);
  481                 if (err)
  482                     RETURN_ERROR(MAJOR, err, NO_MSG);
  483             }
  484         else /* From here we deal with KG-Schemes only */
  485         {
  486             /* Pre change general code */
  487             p_HcFrame = GetBuf(p_FmHc, &seqNum);
  488             if (!p_HcFrame)
  489                 RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
  490             memset(p_HcFrame, 0, sizeof(t_HcFrame));
  491             p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_KG_SCM);
  492             p_HcFrame->actionReg  = FmPcdKgBuildReadSchemeActionReg(physicalSchemeId);
  493             p_HcFrame->extraReg = HC_HCOR_KG_SCHEME_REGS_MASK;
  494             p_HcFrame->commandSequence = seqNum;
  495             BUILD_FD(SIZE_OF_HC_FRAME_READ_OR_CC_DYNAMIC);
  496             if ((err = EnQFrm(p_FmHc, &fmFd, seqNum)) != E_OK)
  497             {
  498                 PutBuf(p_FmHc, p_HcFrame, seqNum);
  499                 RETURN_ERROR(MINOR, err, NO_MSG);
  500             }
  501 
  502             /* specific change */
  503             if ((requiredAction & UPDATE_NIA_ENQ_WITHOUT_DMA) &&
  504                 ((FmPcdKgGetNextEngine(p_FmHc->h_FmPcd, relativeSchemeId) == e_FM_PCD_DONE) &&
  505                  (FmPcdKgGetDoneAction(p_FmHc->h_FmPcd, relativeSchemeId) ==  e_FM_PCD_ENQ_FRAME)))
  506             {
  507                 tmpReg32 = p_HcFrame->hcSpecificData.schemeRegs.kgse_mode;
  508                 ASSERT_COND(tmpReg32 & (NIA_ENG_BMI | NIA_BMI_AC_ENQ_FRAME));
  509                 p_HcFrame->hcSpecificData.schemeRegs.kgse_mode =  tmpReg32 | NIA_BMI_AC_ENQ_FRAME_WITHOUT_DMA;
  510             }
  511 
  512             if ((requiredAction & UPDATE_KG_NIA_CC_WA) &&
  513                 (FmPcdKgGetNextEngine(p_FmHc->h_FmPcd, relativeSchemeId) == e_FM_PCD_CC))
  514             {
  515                 tmpReg32 = p_HcFrame->hcSpecificData.schemeRegs.kgse_mode;
  516                 ASSERT_COND(tmpReg32 & (NIA_ENG_FM_CTL | NIA_FM_CTL_AC_CC));
  517                 tmpReg32 &= ~NIA_FM_CTL_AC_CC;
  518                 p_HcFrame->hcSpecificData.schemeRegs.kgse_mode =  tmpReg32 | NIA_FM_CTL_AC_PRE_CC;
  519             }
  520 
  521             if (requiredAction & UPDATE_KG_OPT_MODE)
  522                 p_HcFrame->hcSpecificData.schemeRegs.kgse_om = value;
  523 
  524             if (requiredAction & UPDATE_KG_NIA)
  525             {
  526                 tmpReg32 = p_HcFrame->hcSpecificData.schemeRegs.kgse_mode;
  527                 tmpReg32 &= ~(NIA_ENG_MASK | NIA_AC_MASK);
  528                 tmpReg32 |= value;
  529                 p_HcFrame->hcSpecificData.schemeRegs.kgse_mode = tmpReg32;
  530             }
  531 
  532             /* Post change general code */
  533             p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_KG_SCM);
  534             p_HcFrame->actionReg  = FmPcdKgBuildWriteSchemeActionReg(physicalSchemeId, FALSE);
  535             p_HcFrame->extraReg = HC_HCOR_KG_SCHEME_REGS_MASK;
  536 
  537             BUILD_FD(sizeof(t_HcFrame));
  538             err = EnQFrm(p_FmHc, &fmFd, seqNum);
  539 
  540             PutBuf(p_FmHc, p_HcFrame, seqNum);
  541 
  542             if (err != E_OK)
  543                 RETURN_ERROR(MINOR, err, NO_MSG);
  544         }
  545     }
  546 
  547     return E_OK;
  548 }
  549 
  550 uint32_t  FmHcPcdKgGetSchemeCounter(t_Handle h_FmHc, t_Handle h_Scheme)
  551 {
  552     t_FmHc      *p_FmHc = (t_FmHc*)h_FmHc;
  553     t_Error     err;
  554     t_HcFrame   *p_HcFrame;
  555     t_DpaaFD    fmFd;
  556     uint32_t    retVal;
  557     uint8_t     relativeSchemeId;
  558     uint8_t     physicalSchemeId = FmPcdKgGetSchemeId(h_Scheme);
  559     uint32_t    seqNum;
  560 
  561     relativeSchemeId = FmPcdKgGetRelativeSchemeId(p_FmHc->h_FmPcd, physicalSchemeId);
  562     if ( relativeSchemeId == FM_PCD_KG_NUM_OF_SCHEMES)
  563     {
  564         REPORT_ERROR(MAJOR, E_NOT_IN_RANGE, NO_MSG);
  565         return 0;
  566     }
  567 
  568     /* first read scheme and check that it is valid */
  569     p_HcFrame = GetBuf(p_FmHc, &seqNum);
  570     if (!p_HcFrame)
  571     {
  572         REPORT_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
  573         return 0;
  574     }
  575     memset(p_HcFrame, 0, sizeof(t_HcFrame));
  576     p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_KG_SCM);
  577     p_HcFrame->actionReg  = FmPcdKgBuildReadSchemeActionReg(physicalSchemeId);
  578     p_HcFrame->extraReg = HC_HCOR_KG_SCHEME_REGS_MASK;
  579     p_HcFrame->commandSequence = seqNum;
  580 
  581     BUILD_FD(SIZE_OF_HC_FRAME_READ_OR_CC_DYNAMIC);
  582 
  583     err = EnQFrm(p_FmHc, &fmFd, seqNum);
  584     if (err != E_OK)
  585     {
  586         PutBuf(p_FmHc, p_HcFrame, seqNum);
  587         REPORT_ERROR(MINOR, err, NO_MSG);
  588         return 0;
  589     }
  590 
  591     if (!FmPcdKgHwSchemeIsValid(p_HcFrame->hcSpecificData.schemeRegs.kgse_mode))
  592     {
  593         PutBuf(p_FmHc, p_HcFrame, seqNum);
  594         REPORT_ERROR(MAJOR, E_ALREADY_EXISTS, ("Scheme is invalid"));
  595         return 0;
  596     }
  597 
  598     retVal = p_HcFrame->hcSpecificData.schemeRegs.kgse_spc;
  599     PutBuf(p_FmHc, p_HcFrame, seqNum);
  600 
  601     return retVal;
  602 }
  603 
  604 t_Error  FmHcPcdKgSetSchemeCounter(t_Handle h_FmHc, t_Handle h_Scheme, uint32_t value)
  605 {
  606     t_FmHc      *p_FmHc = (t_FmHc*)h_FmHc;
  607     t_Error     err = E_OK;
  608     t_HcFrame   *p_HcFrame;
  609     t_DpaaFD    fmFd;
  610     uint8_t     relativeSchemeId, physicalSchemeId;
  611     uint32_t    seqNum;
  612 
  613     physicalSchemeId = FmPcdKgGetSchemeId(h_Scheme);
  614     relativeSchemeId = FmPcdKgGetRelativeSchemeId(p_FmHc->h_FmPcd, physicalSchemeId);
  615     if ( relativeSchemeId == FM_PCD_KG_NUM_OF_SCHEMES)
  616         RETURN_ERROR(MAJOR, E_NOT_IN_RANGE, NO_MSG);
  617 
  618     /* first read scheme and check that it is valid */
  619     p_HcFrame = GetBuf(p_FmHc, &seqNum);
  620     if (!p_HcFrame)
  621         RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
  622     memset(p_HcFrame, 0, sizeof(t_HcFrame));
  623     p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_KG_SCM);
  624     p_HcFrame->actionReg  = FmPcdKgBuildWriteSchemeActionReg(physicalSchemeId, TRUE);
  625     p_HcFrame->extraReg = HC_HCOR_KG_SCHEME_COUNTER;
  626     /* write counter */
  627     p_HcFrame->hcSpecificData.singleRegForWrite = value;
  628     p_HcFrame->commandSequence = seqNum;
  629 
  630     BUILD_FD(sizeof(t_HcFrame));
  631 
  632     err = EnQFrm(p_FmHc, &fmFd, seqNum);
  633 
  634     PutBuf(p_FmHc, p_HcFrame, seqNum);
  635     return err;
  636 }
  637 
  638 t_Error FmHcPcdKgSetClsPlan(t_Handle h_FmHc, t_FmPcdKgInterModuleClsPlanSet *p_Set)
  639 {
  640     t_FmHc                  *p_FmHc = (t_FmHc*)h_FmHc;
  641     t_HcFrame               *p_HcFrame;
  642     t_DpaaFD                fmFd;
  643     uint8_t                 i, idx;
  644     uint32_t                seqNum;
  645     t_Error                 err = E_OK;
  646 
  647     ASSERT_COND(p_FmHc);
  648 
  649     p_HcFrame = GetBuf(p_FmHc, &seqNum);
  650     if (!p_HcFrame)
  651         RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
  652 
  653     for (i = p_Set->baseEntry; i < (p_Set->baseEntry+p_Set->numOfClsPlanEntries); i+=8)
  654     {
  655         memset(p_HcFrame, 0, sizeof(t_HcFrame));
  656         p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_KG_SCM);
  657         p_HcFrame->actionReg  = FmPcdKgBuildWriteClsPlanBlockActionReg((uint8_t)(i / CLS_PLAN_NUM_PER_GRP));
  658         p_HcFrame->extraReg = HC_HCOR_KG_SCHEME_REGS_MASK;
  659 
  660         idx = (uint8_t)(i - p_Set->baseEntry);
  661         memcpy(__DEVOLATILE(uint32_t *, &p_HcFrame->hcSpecificData.clsPlanEntries), &p_Set->vectors[idx], CLS_PLAN_NUM_PER_GRP*sizeof(uint32_t));
  662         p_HcFrame->commandSequence = seqNum;
  663 
  664         BUILD_FD(sizeof(t_HcFrame));
  665 
  666         if ((err = EnQFrm(p_FmHc, &fmFd, seqNum)) != E_OK)
  667         {
  668             PutBuf(p_FmHc, p_HcFrame, seqNum);
  669             RETURN_ERROR(MINOR, err, NO_MSG);
  670         }
  671     }
  672 
  673     PutBuf(p_FmHc, p_HcFrame, seqNum);
  674     return err;
  675 }
  676 
  677 t_Error FmHcPcdKgDeleteClsPlan(t_Handle h_FmHc, uint8_t  grpId)
  678 {
  679     t_FmHc                              *p_FmHc = (t_FmHc*)h_FmHc;
  680     t_FmPcdKgInterModuleClsPlanSet      *p_ClsPlanSet;
  681 
  682     p_ClsPlanSet = (t_FmPcdKgInterModuleClsPlanSet *)XX_Malloc(sizeof(t_FmPcdKgInterModuleClsPlanSet));
  683     if (!p_ClsPlanSet)
  684         RETURN_ERROR(MAJOR, E_NO_MEMORY, ("Classification plan set"));
  685 
  686     memset(p_ClsPlanSet, 0, sizeof(t_FmPcdKgInterModuleClsPlanSet));
  687 
  688     p_ClsPlanSet->baseEntry = FmPcdKgGetClsPlanGrpBase(p_FmHc->h_FmPcd, grpId);
  689     p_ClsPlanSet->numOfClsPlanEntries = FmPcdKgGetClsPlanGrpSize(p_FmHc->h_FmPcd, grpId);
  690     ASSERT_COND(p_ClsPlanSet->numOfClsPlanEntries <= FM_PCD_MAX_NUM_OF_CLS_PLANS);
  691 
  692     if (FmHcPcdKgSetClsPlan(p_FmHc, p_ClsPlanSet) != E_OK)
  693     {
  694         XX_Free(p_ClsPlanSet);
  695         RETURN_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
  696     }
  697 
  698     XX_Free(p_ClsPlanSet);
  699     FmPcdKgDestroyClsPlanGrp(p_FmHc->h_FmPcd, grpId);
  700 
  701     return E_OK;
  702 }
  703 
  704 t_Error FmHcPcdCcCapwapTimeoutReassm(t_Handle h_FmHc, t_FmPcdCcCapwapReassmTimeoutParams *p_CcCapwapReassmTimeoutParams )
  705 {
  706     t_FmHc                              *p_FmHc = (t_FmHc*)h_FmHc;
  707     t_HcFrame                           *p_HcFrame;
  708     t_DpaaFD                            fmFd;
  709     t_Error                             err;
  710     uint32_t                            seqNum;
  711 
  712     SANITY_CHECK_RETURN_VALUE(h_FmHc, E_INVALID_HANDLE,0);
  713 
  714     p_HcFrame = GetBuf(p_FmHc, &seqNum);
  715     if (!p_HcFrame)
  716         RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
  717 
  718     memset(p_HcFrame, 0, sizeof(t_HcFrame));
  719     p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_CC_CAPWAP_REASSM_TIMEOUT);
  720     memcpy(&p_HcFrame->hcSpecificData.ccCapwapReassmTimeout, p_CcCapwapReassmTimeoutParams, sizeof(t_FmPcdCcCapwapReassmTimeoutParams));
  721     p_HcFrame->commandSequence = seqNum;
  722     BUILD_FD(sizeof(t_HcFrame));
  723 
  724     err = EnQFrm(p_FmHc, &fmFd, seqNum);
  725 
  726     PutBuf(p_FmHc, p_HcFrame, seqNum);
  727     return err;
  728 }
  729 
  730 t_Error FmHcPcdCcIpFragScratchPollCmd(t_Handle h_FmHc, bool fill, t_FmPcdCcFragScratchPoolCmdParams *p_FmPcdCcFragScratchPoolCmdParams)
  731 {
  732     t_FmHc                              *p_FmHc = (t_FmHc*)h_FmHc;
  733     t_HcFrame                           *p_HcFrame;
  734     t_DpaaFD                            fmFd;
  735     t_Error                             err;
  736     uint32_t                            seqNum;
  737 
  738     SANITY_CHECK_RETURN_VALUE(h_FmHc, E_INVALID_HANDLE,0);
  739 
  740     p_HcFrame = GetBuf(p_FmHc, &seqNum);
  741     if (!p_HcFrame)
  742         RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
  743 
  744     memset(p_HcFrame, 0, sizeof(t_HcFrame));
  745 
  746     p_HcFrame->opcode     = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_CC_IP_FRAG_INITIALIZATION);
  747     p_HcFrame->actionReg  = (uint32_t)(((fill == TRUE) ? 0 : 1) << HC_HCOR_ACTION_REG_IP_FRAG_SCRATCH_POOL_CMD_SHIFT);
  748     p_HcFrame->actionReg |= p_FmPcdCcFragScratchPoolCmdParams->bufferPoolId << HC_HCOR_ACTION_REG_IP_FRAG_SCRATCH_POOL_BPID;
  749     if (fill == TRUE)
  750     {
  751         p_HcFrame->extraReg   = p_FmPcdCcFragScratchPoolCmdParams->numOfBuffers;
  752     }
  753     p_HcFrame->commandSequence = seqNum;
  754 
  755     BUILD_FD(sizeof(t_HcFrame));
  756     if ((err = EnQFrm(p_FmHc, &fmFd, seqNum)) != E_OK)
  757     {
  758         PutBuf(p_FmHc, p_HcFrame, seqNum);
  759         RETURN_ERROR(MINOR, err, NO_MSG);
  760     }
  761 
  762     p_FmPcdCcFragScratchPoolCmdParams->numOfBuffers = p_HcFrame->extraReg;
  763 
  764     PutBuf(p_FmHc, p_HcFrame, seqNum);
  765     return E_OK;
  766 }
  767 
  768 t_Error FmHcPcdCcTimeoutReassm(t_Handle h_FmHc, t_FmPcdCcReassmTimeoutParams *p_CcReassmTimeoutParams, uint8_t *p_Result)
  769 {
  770     t_FmHc                              *p_FmHc = (t_FmHc*)h_FmHc;
  771     t_HcFrame                           *p_HcFrame;
  772     t_DpaaFD                            fmFd;
  773     t_Error                             err;
  774     uint32_t                            seqNum;
  775 
  776     SANITY_CHECK_RETURN_VALUE(h_FmHc, E_INVALID_HANDLE,0);
  777 
  778     p_HcFrame = GetBuf(p_FmHc, &seqNum);
  779     if (!p_HcFrame)
  780         RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
  781 
  782     memset(p_HcFrame, 0, sizeof(t_HcFrame));
  783     p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_CC_REASSM_TIMEOUT);
  784     p_HcFrame->actionReg = (uint32_t)((p_CcReassmTimeoutParams->activate ? 0 : 1) << HC_HCOR_ACTION_REG_REASSM_TIMEOUT_ACTIVE_SHIFT);
  785     p_HcFrame->extraReg = (p_CcReassmTimeoutParams->tsbs << HC_HCOR_EXTRA_REG_REASSM_TIMEOUT_TSBS_SHIFT) | p_CcReassmTimeoutParams->iprcpt;
  786     p_HcFrame->commandSequence = seqNum;
  787 
  788     BUILD_FD(sizeof(t_HcFrame));
  789     if ((err = EnQFrm(p_FmHc, &fmFd, seqNum)) != E_OK)
  790     {
  791         PutBuf(p_FmHc, p_HcFrame, seqNum);
  792         RETURN_ERROR(MINOR, err, NO_MSG);
  793     }
  794 
  795     *p_Result = (uint8_t)
  796         ((p_HcFrame->actionReg >> HC_HCOR_ACTION_REG_REASSM_TIMEOUT_RES_SHIFT) & HC_HCOR_ACTION_REG_REASSM_TIMEOUT_RES_MASK);
  797 
  798     PutBuf(p_FmHc, p_HcFrame, seqNum);
  799     return E_OK;
  800 }
  801 
  802 t_Error FmHcPcdPlcrCcGetSetParams(t_Handle h_FmHc,uint16_t absoluteProfileId, uint32_t requiredAction)
  803 {
  804     t_FmHc              *p_FmHc = (t_FmHc*)h_FmHc;
  805     t_HcFrame           *p_HcFrame;
  806     t_DpaaFD            fmFd;
  807     t_Error             err;
  808     uint32_t            tmpReg32 = 0;
  809     uint32_t            requiredActionTmp, requiredActionFlag;
  810     uint32_t            seqNum;
  811 
  812     SANITY_CHECK_RETURN_VALUE(h_FmHc, E_INVALID_HANDLE,0);
  813 
  814     /* Profile is locked by calling routine */
  815     /* WARNING - this lock will not be efficient if other HC routine will attempt to change
  816      * "fmpl_pegnia" "fmpl_peynia" or "fmpl_pernia" without locking Profile !
  817      */
  818 
  819     requiredActionTmp = FmPcdPlcrGetRequiredAction(p_FmHc->h_FmPcd, absoluteProfileId);
  820     requiredActionFlag = FmPcdPlcrGetRequiredActionFlag(p_FmHc->h_FmPcd, absoluteProfileId);
  821 
  822     if (!requiredActionFlag || !(requiredActionTmp & requiredAction))
  823     {
  824         if (requiredAction & UPDATE_NIA_ENQ_WITHOUT_DMA)
  825         {
  826             p_HcFrame = GetBuf(p_FmHc, &seqNum);
  827             if (!p_HcFrame)
  828                 RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
  829             /* first read scheme and check that it is valid */
  830             memset(p_HcFrame, 0, sizeof(t_HcFrame));
  831             p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_PLCR_PRFL);
  832             p_HcFrame->actionReg  = FmPcdPlcrBuildReadPlcrActionReg(absoluteProfileId);
  833             p_HcFrame->extraReg = 0x00008000;
  834             p_HcFrame->commandSequence = seqNum;
  835 
  836             BUILD_FD(SIZE_OF_HC_FRAME_READ_OR_CC_DYNAMIC);
  837 
  838             if ((err = EnQFrm(p_FmHc, &fmFd, seqNum)) != E_OK)
  839             {
  840                 PutBuf(p_FmHc, p_HcFrame, seqNum);
  841                 RETURN_ERROR(MINOR, err, NO_MSG);
  842             }
  843 
  844             tmpReg32 = p_HcFrame->hcSpecificData.profileRegs.fmpl_pegnia;
  845             if (!(tmpReg32 & (NIA_ENG_BMI | NIA_BMI_AC_ENQ_FRAME)))
  846             {
  847                 PutBuf(p_FmHc, p_HcFrame, seqNum);
  848                 RETURN_ERROR(MAJOR, E_INVALID_STATE,
  849                              ("Next engine of this policer profile has to be assigned to FM_PCD_DONE"));
  850             }
  851 
  852             tmpReg32 |= NIA_BMI_AC_ENQ_FRAME_WITHOUT_DMA;
  853 
  854             p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_PLCR_PRFL);
  855             p_HcFrame->actionReg  = FmPcdPlcrBuildWritePlcrActionReg(absoluteProfileId);
  856             p_HcFrame->actionReg |= FmPcdPlcrBuildNiaProfileReg(TRUE, FALSE, FALSE);
  857             p_HcFrame->extraReg = 0x00008000;
  858             p_HcFrame->hcSpecificData.singleRegForWrite = tmpReg32;
  859 
  860             BUILD_FD(SIZE_OF_HC_FRAME_PROFILE_CNT);
  861 
  862             if ((err = EnQFrm(p_FmHc, &fmFd, seqNum)) != E_OK)
  863             {
  864                 PutBuf(p_FmHc, p_HcFrame, seqNum);
  865                 RETURN_ERROR(MINOR, err, NO_MSG);
  866             }
  867 
  868             tmpReg32 = p_HcFrame->hcSpecificData.profileRegs.fmpl_peynia;
  869             if (!(tmpReg32 & (NIA_ENG_BMI | NIA_BMI_AC_ENQ_FRAME)))
  870             {
  871                 PutBuf(p_FmHc, p_HcFrame, seqNum);
  872                 RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Next engine of this policer profile has to be assigned to FM_PCD_DONE"));
  873             }
  874 
  875             tmpReg32 |= NIA_BMI_AC_ENQ_FRAME_WITHOUT_DMA;
  876 
  877             p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_PLCR_PRFL);
  878             p_HcFrame->actionReg  = FmPcdPlcrBuildWritePlcrActionReg(absoluteProfileId);
  879             p_HcFrame->actionReg |= FmPcdPlcrBuildNiaProfileReg(FALSE, TRUE, FALSE);
  880             p_HcFrame->extraReg = 0x00008000;
  881             p_HcFrame->hcSpecificData.singleRegForWrite = tmpReg32;
  882 
  883             BUILD_FD(SIZE_OF_HC_FRAME_PROFILE_CNT);
  884 
  885             if ((err = EnQFrm(p_FmHc, &fmFd, seqNum)) != E_OK)
  886             {
  887                 PutBuf(p_FmHc, p_HcFrame, seqNum);
  888                 RETURN_ERROR(MINOR, err, NO_MSG);
  889             }
  890 
  891             tmpReg32 = p_HcFrame->hcSpecificData.profileRegs.fmpl_pernia;
  892             if (!(tmpReg32 & (NIA_ENG_BMI | NIA_BMI_AC_ENQ_FRAME)))
  893             {
  894                 PutBuf(p_FmHc, p_HcFrame, seqNum);
  895                 RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Next engine of this policer profile has to be assigned to FM_PCD_DONE"));
  896             }
  897 
  898             tmpReg32 |= NIA_BMI_AC_ENQ_FRAME_WITHOUT_DMA;
  899 
  900             p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_PLCR_PRFL);
  901             p_HcFrame->actionReg  = FmPcdPlcrBuildWritePlcrActionReg(absoluteProfileId);
  902             p_HcFrame->actionReg |= FmPcdPlcrBuildNiaProfileReg(FALSE, FALSE, TRUE);
  903             p_HcFrame->extraReg = 0x00008000;
  904             p_HcFrame->hcSpecificData.singleRegForWrite = tmpReg32;
  905 
  906             BUILD_FD(SIZE_OF_HC_FRAME_PROFILE_CNT);
  907 
  908             if ((err = EnQFrm(p_FmHc, &fmFd, seqNum)) != E_OK)
  909             {
  910                 PutBuf(p_FmHc, p_HcFrame, seqNum);
  911                 RETURN_ERROR(MINOR, err, NO_MSG);
  912             }
  913 
  914             PutBuf(p_FmHc, p_HcFrame, seqNum);
  915         }
  916     }
  917 
  918     return E_OK;
  919 }
  920 
  921 t_Error FmHcPcdPlcrSetProfile(t_Handle h_FmHc, t_Handle h_Profile, t_FmPcdPlcrProfileRegs *p_PlcrRegs)
  922 {
  923     t_FmHc                              *p_FmHc = (t_FmHc*)h_FmHc;
  924     t_Error                             err = E_OK;
  925     uint16_t                            profileIndx;
  926     t_HcFrame                           *p_HcFrame;
  927     t_DpaaFD                            fmFd;
  928     uint32_t                            seqNum;
  929 
  930     p_HcFrame = GetBuf(p_FmHc, &seqNum);
  931     if (!p_HcFrame)
  932         RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
  933 
  934     profileIndx = FmPcdPlcrProfileGetAbsoluteId(h_Profile);
  935 
  936     memset(p_HcFrame, 0, sizeof(t_HcFrame));
  937     p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_PLCR_PRFL);
  938     p_HcFrame->actionReg  = FmPcdPlcrBuildWritePlcrActionRegs(profileIndx);
  939     p_HcFrame->extraReg = 0x00008000;
  940     memcpy(&p_HcFrame->hcSpecificData.profileRegs, p_PlcrRegs, sizeof(t_FmPcdPlcrProfileRegs));
  941     p_HcFrame->commandSequence = seqNum;
  942 
  943     BUILD_FD(sizeof(t_HcFrame));
  944 
  945     err = EnQFrm(p_FmHc, &fmFd, seqNum);
  946 
  947     PutBuf(p_FmHc, p_HcFrame, seqNum);
  948 
  949     if (err != E_OK)
  950         RETURN_ERROR(MINOR, err, NO_MSG);
  951 
  952     return E_OK;
  953 }
  954 
  955 t_Error FmHcPcdPlcrDeleteProfile(t_Handle h_FmHc, t_Handle h_Profile)
  956 {
  957     t_FmHc      *p_FmHc = (t_FmHc*)h_FmHc;
  958     uint16_t    absoluteProfileId = FmPcdPlcrProfileGetAbsoluteId(h_Profile);
  959     t_Error     err = E_OK;
  960     t_HcFrame   *p_HcFrame;
  961     t_DpaaFD    fmFd;
  962     uint32_t    seqNum;
  963 
  964     p_HcFrame = GetBuf(p_FmHc, &seqNum);
  965     if (!p_HcFrame)
  966         RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
  967     memset(p_HcFrame, 0, sizeof(t_HcFrame));
  968     p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_PLCR_PRFL);
  969     p_HcFrame->actionReg  = FmPcdPlcrBuildWritePlcrActionReg(absoluteProfileId);
  970     p_HcFrame->actionReg  |= 0x00008000;
  971     p_HcFrame->extraReg = 0x00008000;
  972     memset(&p_HcFrame->hcSpecificData.profileRegs, 0, sizeof(t_FmPcdPlcrProfileRegs));
  973     p_HcFrame->commandSequence = seqNum;
  974 
  975     BUILD_FD(sizeof(t_HcFrame));
  976 
  977     err = EnQFrm(p_FmHc, &fmFd, seqNum);
  978 
  979     PutBuf(p_FmHc, p_HcFrame, seqNum);
  980 
  981     if (err != E_OK)
  982         RETURN_ERROR(MINOR, err, NO_MSG);
  983 
  984     return E_OK;
  985 }
  986 
  987 t_Error  FmHcPcdPlcrSetProfileCounter(t_Handle h_FmHc, t_Handle h_Profile, e_FmPcdPlcrProfileCounters counter, uint32_t value)
  988 {
  989 
  990     t_FmHc      *p_FmHc = (t_FmHc*)h_FmHc;
  991     uint16_t    absoluteProfileId = FmPcdPlcrProfileGetAbsoluteId(h_Profile);
  992     t_Error     err = E_OK;
  993     t_HcFrame   *p_HcFrame;
  994     t_DpaaFD    fmFd;
  995     uint32_t    seqNum;
  996 
  997     /* first read scheme and check that it is valid */
  998     p_HcFrame = GetBuf(p_FmHc, &seqNum);
  999     if (!p_HcFrame)
 1000         RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
 1001     memset(p_HcFrame, 0, sizeof(t_HcFrame));
 1002     p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_PLCR_PRFL);
 1003     p_HcFrame->actionReg  = FmPcdPlcrBuildWritePlcrActionReg(absoluteProfileId);
 1004     p_HcFrame->actionReg |= FmPcdPlcrBuildCounterProfileReg(counter);
 1005     p_HcFrame->extraReg = 0x00008000;
 1006     p_HcFrame->hcSpecificData.singleRegForWrite = value;
 1007     p_HcFrame->commandSequence = seqNum;
 1008 
 1009     BUILD_FD(SIZE_OF_HC_FRAME_PROFILE_CNT);
 1010 
 1011     err = EnQFrm(p_FmHc, &fmFd, seqNum);
 1012 
 1013     PutBuf(p_FmHc, p_HcFrame, seqNum);
 1014 
 1015     if (err != E_OK)
 1016         RETURN_ERROR(MINOR, err, NO_MSG);
 1017 
 1018     return E_OK;
 1019 }
 1020 
 1021 uint32_t FmHcPcdPlcrGetProfileCounter(t_Handle h_FmHc, t_Handle h_Profile, e_FmPcdPlcrProfileCounters counter)
 1022 {
 1023     t_FmHc      *p_FmHc = (t_FmHc*)h_FmHc;
 1024     uint16_t    absoluteProfileId = FmPcdPlcrProfileGetAbsoluteId(h_Profile);
 1025     t_Error     err;
 1026     t_HcFrame   *p_HcFrame;
 1027     t_DpaaFD    fmFd;
 1028     uint32_t    retVal = 0;
 1029     uint32_t    seqNum;
 1030 
 1031     SANITY_CHECK_RETURN_VALUE(h_FmHc, E_INVALID_HANDLE,0);
 1032 
 1033     /* first read scheme and check that it is valid */
 1034     p_HcFrame = GetBuf(p_FmHc, &seqNum);
 1035     if (!p_HcFrame)
 1036     {
 1037         REPORT_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
 1038         return 0;
 1039     }
 1040     memset(p_HcFrame, 0, sizeof(t_HcFrame));
 1041     p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_PLCR_PRFL);
 1042     p_HcFrame->actionReg  = FmPcdPlcrBuildReadPlcrActionReg(absoluteProfileId);
 1043     p_HcFrame->extraReg = 0x00008000;
 1044     p_HcFrame->commandSequence = seqNum;
 1045 
 1046     BUILD_FD(SIZE_OF_HC_FRAME_READ_OR_CC_DYNAMIC);
 1047 
 1048     err = EnQFrm(p_FmHc, &fmFd, seqNum);
 1049     if (err != E_OK)
 1050     {
 1051         PutBuf(p_FmHc, p_HcFrame, seqNum);
 1052         REPORT_ERROR(MINOR, err, NO_MSG);
 1053         return 0;
 1054     }
 1055 
 1056     switch (counter)
 1057     {
 1058         case e_FM_PCD_PLCR_PROFILE_GREEN_PACKET_TOTAL_COUNTER:
 1059             retVal = p_HcFrame->hcSpecificData.profileRegs.fmpl_pegpc;
 1060             break;
 1061         case e_FM_PCD_PLCR_PROFILE_YELLOW_PACKET_TOTAL_COUNTER:
 1062             retVal = p_HcFrame->hcSpecificData.profileRegs.fmpl_peypc;
 1063             break;
 1064         case e_FM_PCD_PLCR_PROFILE_RED_PACKET_TOTAL_COUNTER:
 1065             retVal = p_HcFrame->hcSpecificData.profileRegs.fmpl_perpc;
 1066             break;
 1067         case e_FM_PCD_PLCR_PROFILE_RECOLOURED_YELLOW_PACKET_TOTAL_COUNTER:
 1068             retVal = p_HcFrame->hcSpecificData.profileRegs.fmpl_perypc;
 1069             break;
 1070         case e_FM_PCD_PLCR_PROFILE_RECOLOURED_RED_PACKET_TOTAL_COUNTER:
 1071             retVal = p_HcFrame->hcSpecificData.profileRegs.fmpl_perrpc;
 1072             break;
 1073         default:
 1074             REPORT_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
 1075     }
 1076 
 1077     PutBuf(p_FmHc, p_HcFrame, seqNum);
 1078     return retVal;
 1079 }
 1080 
 1081 t_Error FmHcKgWriteSp(t_Handle h_FmHc, uint8_t hardwarePortId, uint32_t spReg, bool add)
 1082 {
 1083     t_FmHc                  *p_FmHc = (t_FmHc*)h_FmHc;
 1084     t_HcFrame               *p_HcFrame;
 1085     t_DpaaFD                fmFd;
 1086     t_Error                 err = E_OK;
 1087     uint32_t                seqNum;
 1088 
 1089     ASSERT_COND(p_FmHc);
 1090 
 1091     p_HcFrame = GetBuf(p_FmHc, &seqNum);
 1092     if (!p_HcFrame)
 1093         RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
 1094     memset(p_HcFrame, 0, sizeof(t_HcFrame));
 1095     /* first read SP register */
 1096     p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_KG_SCM);
 1097     p_HcFrame->actionReg  = FmPcdKgBuildReadPortSchemeBindActionReg(hardwarePortId);
 1098     p_HcFrame->extraReg = HC_HCOR_KG_SCHEME_REGS_MASK;
 1099     p_HcFrame->commandSequence = seqNum;
 1100 
 1101     BUILD_FD(SIZE_OF_HC_FRAME_PORT_REGS);
 1102 
 1103     if ((err = EnQFrm(p_FmHc, &fmFd, seqNum)) != E_OK)
 1104     {
 1105         PutBuf(p_FmHc, p_HcFrame, seqNum);
 1106         RETURN_ERROR(MINOR, err, NO_MSG);
 1107     }
 1108 
 1109     /* spReg is the first reg, so we can use it both for read and for write */
 1110     if (add)
 1111         p_HcFrame->hcSpecificData.portRegsForRead.spReg |= spReg;
 1112     else
 1113         p_HcFrame->hcSpecificData.portRegsForRead.spReg &= ~spReg;
 1114 
 1115     p_HcFrame->actionReg  = FmPcdKgBuildWritePortSchemeBindActionReg(hardwarePortId);
 1116 
 1117     BUILD_FD(sizeof(t_HcFrame));
 1118 
 1119     err = EnQFrm(p_FmHc, &fmFd, seqNum);
 1120 
 1121     PutBuf(p_FmHc, p_HcFrame, seqNum);
 1122 
 1123     if (err != E_OK)
 1124         RETURN_ERROR(MINOR, err, NO_MSG);
 1125 
 1126     return E_OK;
 1127 }
 1128 
 1129 t_Error FmHcKgWriteCpp(t_Handle h_FmHc, uint8_t hardwarePortId, uint32_t cppReg)
 1130 {
 1131     t_FmHc                  *p_FmHc = (t_FmHc*)h_FmHc;
 1132     t_HcFrame               *p_HcFrame;
 1133     t_DpaaFD                fmFd;
 1134     t_Error                 err = E_OK;
 1135     uint32_t                seqNum;
 1136 
 1137     ASSERT_COND(p_FmHc);
 1138 
 1139     p_HcFrame = GetBuf(p_FmHc, &seqNum);
 1140     if (!p_HcFrame)
 1141         RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
 1142     memset(p_HcFrame, 0, sizeof(t_HcFrame));
 1143     /* first read SP register */
 1144     p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_KG_SCM);
 1145     p_HcFrame->actionReg  = FmPcdKgBuildWritePortClsPlanBindActionReg(hardwarePortId);
 1146     p_HcFrame->extraReg = HC_HCOR_KG_SCHEME_REGS_MASK;
 1147     p_HcFrame->hcSpecificData.singleRegForWrite = cppReg;
 1148     p_HcFrame->commandSequence = seqNum;
 1149 
 1150     BUILD_FD(sizeof(t_HcFrame));
 1151 
 1152     err = EnQFrm(p_FmHc, &fmFd, seqNum);
 1153 
 1154     PutBuf(p_FmHc, p_HcFrame, seqNum);
 1155 
 1156     if (err != E_OK)
 1157         RETURN_ERROR(MINOR, err, NO_MSG);
 1158 
 1159     return E_OK;
 1160 }
 1161 
 1162 t_Error FmHcPcdCcDoDynamicChange(t_Handle h_FmHc, uint32_t oldAdAddrOffset, uint32_t newAdAddrOffset)
 1163 {
 1164     t_FmHc                  *p_FmHc = (t_FmHc*)h_FmHc;
 1165     t_HcFrame               *p_HcFrame;
 1166     t_DpaaFD                fmFd;
 1167     t_Error                 err = E_OK;
 1168     uint32_t                seqNum;
 1169 
 1170     SANITY_CHECK_RETURN_ERROR(p_FmHc, E_INVALID_HANDLE);
 1171 
 1172     p_HcFrame = GetBuf(p_FmHc, &seqNum);
 1173     if (!p_HcFrame)
 1174         RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
 1175     memset(p_HcFrame, 0, sizeof(t_HcFrame));
 1176 
 1177     p_HcFrame->opcode     = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_CC);
 1178     p_HcFrame->actionReg  = newAdAddrOffset;
 1179     p_HcFrame->actionReg |= 0xc0000000;
 1180     p_HcFrame->extraReg   = oldAdAddrOffset;
 1181     p_HcFrame->commandSequence = seqNum;
 1182 
 1183     BUILD_FD(SIZE_OF_HC_FRAME_READ_OR_CC_DYNAMIC);
 1184 
 1185     err = EnQFrm(p_FmHc, &fmFd, seqNum);
 1186 
 1187     PutBuf(p_FmHc, p_HcFrame, seqNum);
 1188 
 1189     if (err != E_OK)
 1190         RETURN_ERROR(MAJOR, err, NO_MSG);
 1191 
 1192     return E_OK;
 1193 }
 1194 
 1195 t_Error FmHcPcdSync(t_Handle h_FmHc)
 1196 {
 1197     t_FmHc                  *p_FmHc = (t_FmHc*)h_FmHc;
 1198     t_HcFrame               *p_HcFrame;
 1199     t_DpaaFD                fmFd;
 1200     t_Error                 err = E_OK;
 1201     uint32_t                seqNum;
 1202 
 1203     ASSERT_COND(p_FmHc);
 1204 
 1205     p_HcFrame = GetBuf(p_FmHc, &seqNum);
 1206     if (!p_HcFrame)
 1207         RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
 1208     memset(p_HcFrame, 0, sizeof(t_HcFrame));
 1209     /* first read SP register */
 1210     p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_SYNC);
 1211     p_HcFrame->actionReg = 0;
 1212     p_HcFrame->extraReg = 0;
 1213     p_HcFrame->commandSequence = seqNum;
 1214 
 1215     BUILD_FD(sizeof(t_HcFrame));
 1216 
 1217     err = EnQFrm(p_FmHc, &fmFd, seqNum);
 1218 
 1219     PutBuf(p_FmHc, p_HcFrame, seqNum);
 1220 
 1221     if (err != E_OK)
 1222         RETURN_ERROR(MINOR, err, NO_MSG);
 1223 
 1224     return E_OK;
 1225 }
 1226 
 1227 t_Handle    FmHcGetPort(t_Handle h_FmHc)
 1228 {
 1229     t_FmHc *p_FmHc = (t_FmHc*)h_FmHc;
 1230     return p_FmHc->h_HcPortDev;
 1231 }

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