Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/contrib/ncsw/Peripherals/FM/MAC/dtsec.h
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1 /* 2 * Copyright 2008-2013 Freescale Semiconductor Inc. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * * Redistributions of source code must retain the above copyright 7 * notice, this list of conditions and the following disclaimer. 8 * * Redistributions in binary form must reproduce the above copyright 9 * notice, this list of conditions and the following disclaimer in the 10 * documentation and/or other materials provided with the distribution. 11 * * Neither the name of Freescale Semiconductor nor the 12 * names of its contributors may be used to endorse or promote products 13 * derived from this software without specific prior written permission. 14 * 15 * 16 * ALTERNATIVELY, this software may be distributed under the terms of the 17 * GNU General Public License ("GPL") as published by the Free Software 18 * Foundation, either version 2 of that License or (at your option) any 19 * later version. 20 * 21 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY 22 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 23 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 25 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 30 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /****************************************************************************** 34 @File dtsec.h 35 36 @Description FM dTSEC ... 37 *//***************************************************************************/ 38 #ifndef __DTSEC_H 39 #define __DTSEC_H 40 41 #include "std_ext.h" 42 #include "error_ext.h" 43 #include "list_ext.h" 44 #include "enet_ext.h" 45 46 #include "dtsec_mii_acc.h" 47 #include "fm_mac.h" 48 49 50 #define DEFAULT_exceptions \ 51 ((uint32_t)(DTSEC_IMASK_BREN | \ 52 DTSEC_IMASK_RXCEN | \ 53 DTSEC_IMASK_BTEN | \ 54 DTSEC_IMASK_TXCEN | \ 55 DTSEC_IMASK_TXEEN | \ 56 DTSEC_IMASK_ABRTEN | \ 57 DTSEC_IMASK_LCEN | \ 58 DTSEC_IMASK_CRLEN | \ 59 DTSEC_IMASK_XFUNEN | \ 60 DTSEC_IMASK_IFERREN | \ 61 DTSEC_IMASK_MAGEN | \ 62 DTSEC_IMASK_TDPEEN | \ 63 DTSEC_IMASK_RDPEEN)) 64 65 #define GET_EXCEPTION_FLAG(bitMask, exception) switch (exception){ \ 66 case e_FM_MAC_EX_1G_BAB_RX: \ 67 bitMask = DTSEC_IMASK_BREN; break; \ 68 case e_FM_MAC_EX_1G_RX_CTL: \ 69 bitMask = DTSEC_IMASK_RXCEN; break; \ 70 case e_FM_MAC_EX_1G_GRATEFUL_TX_STP_COMPLET: \ 71 bitMask = DTSEC_IMASK_GTSCEN ; break; \ 72 case e_FM_MAC_EX_1G_BAB_TX: \ 73 bitMask = DTSEC_IMASK_BTEN ; break; \ 74 case e_FM_MAC_EX_1G_TX_CTL: \ 75 bitMask = DTSEC_IMASK_TXCEN ; break; \ 76 case e_FM_MAC_EX_1G_TX_ERR: \ 77 bitMask = DTSEC_IMASK_TXEEN ; break; \ 78 case e_FM_MAC_EX_1G_LATE_COL: \ 79 bitMask = DTSEC_IMASK_LCEN ; break; \ 80 case e_FM_MAC_EX_1G_COL_RET_LMT: \ 81 bitMask = DTSEC_IMASK_CRLEN ; break; \ 82 case e_FM_MAC_EX_1G_TX_FIFO_UNDRN: \ 83 bitMask = DTSEC_IMASK_XFUNEN ; break; \ 84 case e_FM_MAC_EX_1G_MAG_PCKT: \ 85 bitMask = DTSEC_IMASK_MAGEN ; break; \ 86 case e_FM_MAC_EX_1G_MII_MNG_RD_COMPLET: \ 87 bitMask = DTSEC_IMASK_MMRDEN; break; \ 88 case e_FM_MAC_EX_1G_MII_MNG_WR_COMPLET: \ 89 bitMask = DTSEC_IMASK_MMWREN ; break; \ 90 case e_FM_MAC_EX_1G_GRATEFUL_RX_STP_COMPLET: \ 91 bitMask = DTSEC_IMASK_GRSCEN; break; \ 92 case e_FM_MAC_EX_1G_TX_DATA_ERR: \ 93 bitMask = DTSEC_IMASK_TDPEEN; break; \ 94 case e_FM_MAC_EX_1G_RX_MIB_CNT_OVFL: \ 95 bitMask = DTSEC_IMASK_MSROEN ; break; \ 96 default: bitMask = 0;break;} 97 98 99 #define MAX_PACKET_ALIGNMENT 31 100 #define MAX_INTER_PACKET_GAP 0x7f 101 #define MAX_INTER_PALTERNATE_BEB 0x0f 102 #define MAX_RETRANSMISSION 0x0f 103 #define MAX_COLLISION_WINDOW 0x03ff 104 105 106 /********************* From mac ext ******************************************/ 107 typedef uint32_t t_ErrorDisable; 108 109 #define ERROR_DISABLE_TRANSMIT 0x00400000 110 #define ERROR_DISABLE_LATE_COLLISION 0x00040000 111 #define ERROR_DISABLE_COLLISION_RETRY_LIMIT 0x00020000 112 #define ERROR_DISABLE_TxFIFO_UNDERRUN 0x00010000 113 #define ERROR_DISABLE_TxABORT 0x00008000 114 #define ERROR_DISABLE_INTERFACE 0x00004000 115 #define ERROR_DISABLE_TxDATA_PARITY 0x00000002 116 #define ERROR_DISABLE_RxDATA_PARITY 0x00000001 117 118 /*****************************************************************************/ 119 #define DTSEC_NUM_OF_PADDRS 15 /* number of pattern match registers (entries) */ 120 121 #define GROUP_ADDRESS 0x0000010000000000LL /* Group address bit indication */ 122 123 #define HASH_TABLE_SIZE 256 /* Hash table size (= 32 bits * 8 regs) */ 124 125 #define HASH_TABLE_SIZE 256 /* Hash table size (32 bits * 8 regs) */ 126 #define EXTENDED_HASH_TABLE_SIZE 512 /* Extended Hash table size (32 bits * 16 regs) */ 127 128 #define DTSEC_TO_MII_OFFSET 0x1000 /* number of pattern match registers (entries) */ 129 130 #define MAX_PHYS 32 /* maximum number of phys */ 131 132 #define VAL32BIT 0x100000000LL 133 #define VAL22BIT 0x00400000 134 #define VAL16BIT 0x00010000 135 #define VAL12BIT 0x00001000 136 137 /* CAR1/2 bits */ 138 #define CAR1_TR64 0x80000000 139 #define CAR1_TR127 0x40000000 140 #define CAR1_TR255 0x20000000 141 #define CAR1_TR511 0x10000000 142 #define CAR1_TRK1 0x08000000 143 #define CAR1_TRMAX 0x04000000 144 #define CAR1_TRMGV 0x02000000 145 146 #define CAR1_RBYT 0x00010000 147 #define CAR1_RPKT 0x00008000 148 #define CAR1_RMCA 0x00002000 149 #define CAR1_RBCA 0x00001000 150 #define CAR1_RXPF 0x00000400 151 #define CAR1_RALN 0x00000100 152 #define CAR1_RFLR 0x00000080 153 #define CAR1_RCDE 0x00000040 154 #define CAR1_RCSE 0x00000020 155 #define CAR1_RUND 0x00000010 156 #define CAR1_ROVR 0x00000008 157 #define CAR1_RFRG 0x00000004 158 #define CAR1_RJBR 0x00000002 159 #define CAR1_RDRP 0x00000001 160 161 #define CAR2_TFCS 0x00040000 162 #define CAR2_TBYT 0x00002000 163 #define CAR2_TPKT 0x00001000 164 #define CAR2_TMCA 0x00000800 165 #define CAR2_TBCA 0x00000400 166 #define CAR2_TXPF 0x00000200 167 #define CAR2_TDRP 0x00000001 168 169 typedef struct t_InternalStatistics 170 { 171 uint64_t tr64; 172 uint64_t tr127; 173 uint64_t tr255; 174 uint64_t tr511; 175 uint64_t tr1k; 176 uint64_t trmax; 177 uint64_t trmgv; 178 uint64_t rfrg; 179 uint64_t rjbr; 180 uint64_t rdrp; 181 uint64_t raln; 182 uint64_t rund; 183 uint64_t rovr; 184 uint64_t rxpf; 185 uint64_t txpf; 186 uint64_t rbyt; 187 uint64_t rpkt; 188 uint64_t rmca; 189 uint64_t rbca; 190 uint64_t rflr; 191 uint64_t rcde; 192 uint64_t rcse; 193 uint64_t tbyt; 194 uint64_t tpkt; 195 uint64_t tmca; 196 uint64_t tbca; 197 uint64_t tdrp; 198 uint64_t tfcs; 199 } t_InternalStatistics; 200 201 typedef struct { 202 t_FmMacControllerDriver fmMacControllerDriver; 203 t_Handle h_App; /**< Handle to the upper layer application */ 204 struct dtsec_regs *p_MemMap; /**< pointer to dTSEC memory mapped registers. */ 205 struct dtsec_mii_reg *p_MiiMemMap; /**< pointer to dTSEC MII memory mapped registers. */ 206 uint64_t addr; /**< MAC address of device; */ 207 e_EnetMode enetMode; /**< Ethernet physical interface */ 208 t_FmMacExceptionCallback *f_Exception; 209 int mdioIrq; 210 t_FmMacExceptionCallback *f_Event; 211 bool indAddrRegUsed[DTSEC_NUM_OF_PADDRS]; /**< Whether a particular individual address recognition register is being used */ 212 uint64_t paddr[DTSEC_NUM_OF_PADDRS]; /**< MAC address for particular individual address recognition register */ 213 uint8_t numOfIndAddrInRegs; /**< Number of individual addresses in registers for this station. */ 214 bool halfDuplex; 215 t_InternalStatistics internalStatistics; 216 t_EthHash *p_MulticastAddrHash; /* pointer to driver's global address hash table */ 217 t_EthHash *p_UnicastAddrHash; /* pointer to driver's individual address hash table */ 218 uint8_t macId; 219 uint8_t tbi_phy_addr; 220 uint32_t exceptions; 221 bool ptpTsuEnabled; 222 bool enTsuErrExeption; 223 e_FmMacStatisticsLevel statisticsLevel; 224 struct dtsec_cfg *p_DtsecDriverParam; 225 } t_Dtsec; 226 227 228 #endif /* __DTSEC_H */
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