The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/dev/acpica/acpi_cpu.c

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    1 /*-
    2  * Copyright (c) 2003-2005 Nate Lawson (SDG)
    3  * Copyright (c) 2001 Michael Smith
    4  * All rights reserved.
    5  *
    6  * Redistribution and use in source and binary forms, with or without
    7  * modification, are permitted provided that the following conditions
    8  * are met:
    9  * 1. Redistributions of source code must retain the above copyright
   10  *    notice, this list of conditions and the following disclaimer.
   11  * 2. Redistributions in binary form must reproduce the above copyright
   12  *    notice, this list of conditions and the following disclaimer in the
   13  *    documentation and/or other materials provided with the distribution.
   14  *
   15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   25  * SUCH DAMAGE.
   26  */
   27 
   28 #include <sys/cdefs.h>
   29 __FBSDID("$FreeBSD: releng/10.4/sys/dev/acpica/acpi_cpu.c 303229 2016-07-23 17:41:47Z jhb $");
   30 
   31 #include "opt_acpi.h"
   32 #include <sys/param.h>
   33 #include <sys/bus.h>
   34 #include <sys/cpu.h>
   35 #include <sys/kernel.h>
   36 #include <sys/malloc.h>
   37 #include <sys/module.h>
   38 #include <sys/pcpu.h>
   39 #include <sys/power.h>
   40 #include <sys/proc.h>
   41 #include <sys/sched.h>
   42 #include <sys/sbuf.h>
   43 #include <sys/smp.h>
   44 
   45 #include <dev/pci/pcivar.h>
   46 #include <machine/atomic.h>
   47 #include <machine/bus.h>
   48 #if defined(__amd64__) || defined(__i386__)
   49 #include <machine/clock.h>
   50 #endif
   51 #include <sys/rman.h>
   52 
   53 #include <contrib/dev/acpica/include/acpi.h>
   54 #include <contrib/dev/acpica/include/accommon.h>
   55 
   56 #include <dev/acpica/acpivar.h>
   57 
   58 /*
   59  * Support for ACPI Processor devices, including C[1-3] sleep states.
   60  */
   61 
   62 /* Hooks for the ACPI CA debugging infrastructure */
   63 #define _COMPONENT      ACPI_PROCESSOR
   64 ACPI_MODULE_NAME("PROCESSOR")
   65 
   66 struct acpi_cx {
   67     struct resource     *p_lvlx;        /* Register to read to enter state. */
   68     uint32_t             type;          /* C1-3 (C4 and up treated as C3). */
   69     uint32_t             trans_lat;     /* Transition latency (usec). */
   70     uint32_t             power;         /* Power consumed (mW). */
   71     int                  res_type;      /* Resource type for p_lvlx. */
   72     int                  res_rid;       /* Resource ID for p_lvlx. */
   73 };
   74 #define MAX_CX_STATES    8
   75 
   76 struct acpi_cpu_softc {
   77     device_t             cpu_dev;
   78     ACPI_HANDLE          cpu_handle;
   79     struct pcpu         *cpu_pcpu;
   80     uint32_t             cpu_acpi_id;   /* ACPI processor id */
   81     uint32_t             cpu_p_blk;     /* ACPI P_BLK location */
   82     uint32_t             cpu_p_blk_len; /* P_BLK length (must be 6). */
   83     struct acpi_cx       cpu_cx_states[MAX_CX_STATES];
   84     int                  cpu_cx_count;  /* Number of valid Cx states. */
   85     int                  cpu_prev_sleep;/* Last idle sleep duration. */
   86     int                  cpu_features;  /* Child driver supported features. */
   87     /* Runtime state. */
   88     int                  cpu_non_c2;    /* Index of lowest non-C2 state. */
   89     int                  cpu_non_c3;    /* Index of lowest non-C3 state. */
   90     u_int                cpu_cx_stats[MAX_CX_STATES];/* Cx usage history. */
   91     /* Values for sysctl. */
   92     struct sysctl_ctx_list cpu_sysctl_ctx;
   93     struct sysctl_oid   *cpu_sysctl_tree;
   94     int                  cpu_cx_lowest;
   95     int                  cpu_cx_lowest_lim;
   96     int                  cpu_disable_idle; /* Disable entry to idle function */
   97     char                 cpu_cx_supported[64];
   98 };
   99 
  100 struct acpi_cpu_device {
  101     struct resource_list        ad_rl;
  102 };
  103 
  104 #define CPU_GET_REG(reg, width)                                         \
  105     (bus_space_read_ ## width(rman_get_bustag((reg)),                   \
  106                       rman_get_bushandle((reg)), 0))
  107 #define CPU_SET_REG(reg, width, val)                                    \
  108     (bus_space_write_ ## width(rman_get_bustag((reg)),                  \
  109                        rman_get_bushandle((reg)), 0, (val)))
  110 
  111 #define PM_USEC(x)       ((x) >> 2)     /* ~4 clocks per usec (3.57955 Mhz) */
  112 
  113 #define ACPI_NOTIFY_CX_STATES   0x81    /* _CST changed. */
  114 
  115 #define CPU_QUIRK_NO_C3         (1<<0)  /* C3-type states are not usable. */
  116 #define CPU_QUIRK_NO_BM_CTRL    (1<<2)  /* No bus mastering control. */
  117 
  118 #define PCI_VENDOR_INTEL        0x8086
  119 #define PCI_DEVICE_82371AB_3    0x7113  /* PIIX4 chipset for quirks. */
  120 #define PCI_REVISION_A_STEP     0
  121 #define PCI_REVISION_B_STEP     1
  122 #define PCI_REVISION_4E         2
  123 #define PCI_REVISION_4M         3
  124 #define PIIX4_DEVACTB_REG       0x58
  125 #define PIIX4_BRLD_EN_IRQ0      (1<<0)
  126 #define PIIX4_BRLD_EN_IRQ       (1<<1)
  127 #define PIIX4_BRLD_EN_IRQ8      (1<<5)
  128 #define PIIX4_STOP_BREAK_MASK   (PIIX4_BRLD_EN_IRQ0 | PIIX4_BRLD_EN_IRQ | PIIX4_BRLD_EN_IRQ8)
  129 #define PIIX4_PCNTRL_BST_EN     (1<<10)
  130 
  131 /* Allow users to ignore processor orders in MADT. */
  132 static int cpu_unordered;
  133 TUNABLE_INT("debug.acpi.cpu_unordered", &cpu_unordered);
  134 SYSCTL_INT(_debug_acpi, OID_AUTO, cpu_unordered, CTLFLAG_RDTUN,
  135     &cpu_unordered, 0,
  136     "Do not use the MADT to match ACPI Processor objects to CPUs.");
  137 
  138 /* Platform hardware resource information. */
  139 static uint32_t          cpu_smi_cmd;   /* Value to write to SMI_CMD. */
  140 static uint8_t           cpu_cst_cnt;   /* Indicate we are _CST aware. */
  141 static int               cpu_quirks;    /* Indicate any hardware bugs. */
  142 
  143 /* Values for sysctl. */
  144 static struct sysctl_ctx_list cpu_sysctl_ctx;
  145 static struct sysctl_oid *cpu_sysctl_tree;
  146 static int               cpu_cx_generic;
  147 static int               cpu_cx_lowest_lim;
  148 
  149 static device_t         *cpu_devices;
  150 static int               cpu_ndevices;
  151 static struct acpi_cpu_softc **cpu_softc;
  152 ACPI_SERIAL_DECL(cpu, "ACPI CPU");
  153 
  154 static int      acpi_cpu_probe(device_t dev);
  155 static int      acpi_cpu_attach(device_t dev);
  156 static int      acpi_cpu_suspend(device_t dev);
  157 static int      acpi_cpu_resume(device_t dev);
  158 static int      acpi_pcpu_get_id(device_t dev, uint32_t *acpi_id,
  159                     uint32_t *cpu_id);
  160 static struct resource_list *acpi_cpu_get_rlist(device_t dev, device_t child);
  161 static device_t acpi_cpu_add_child(device_t dev, u_int order, const char *name,
  162                     int unit);
  163 static int      acpi_cpu_read_ivar(device_t dev, device_t child, int index,
  164                     uintptr_t *result);
  165 static int      acpi_cpu_shutdown(device_t dev);
  166 static void     acpi_cpu_cx_probe(struct acpi_cpu_softc *sc);
  167 static void     acpi_cpu_generic_cx_probe(struct acpi_cpu_softc *sc);
  168 static int      acpi_cpu_cx_cst(struct acpi_cpu_softc *sc);
  169 static void     acpi_cpu_startup(void *arg);
  170 static void     acpi_cpu_startup_cx(struct acpi_cpu_softc *sc);
  171 static void     acpi_cpu_cx_list(struct acpi_cpu_softc *sc);
  172 static void     acpi_cpu_idle(sbintime_t sbt);
  173 static void     acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context);
  174 static void     acpi_cpu_quirks(void);
  175 static void     acpi_cpu_quirks_piix4(void);
  176 static int      acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS);
  177 static int      acpi_cpu_set_cx_lowest(struct acpi_cpu_softc *sc);
  178 static int      acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS);
  179 static int      acpi_cpu_global_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS);
  180 
  181 static device_method_t acpi_cpu_methods[] = {
  182     /* Device interface */
  183     DEVMETHOD(device_probe,     acpi_cpu_probe),
  184     DEVMETHOD(device_attach,    acpi_cpu_attach),
  185     DEVMETHOD(device_detach,    bus_generic_detach),
  186     DEVMETHOD(device_shutdown,  acpi_cpu_shutdown),
  187     DEVMETHOD(device_suspend,   acpi_cpu_suspend),
  188     DEVMETHOD(device_resume,    acpi_cpu_resume),
  189 
  190     /* Bus interface */
  191     DEVMETHOD(bus_add_child,    acpi_cpu_add_child),
  192     DEVMETHOD(bus_read_ivar,    acpi_cpu_read_ivar),
  193     DEVMETHOD(bus_get_resource_list, acpi_cpu_get_rlist),
  194     DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource),
  195     DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource),
  196     DEVMETHOD(bus_alloc_resource, bus_generic_rl_alloc_resource),
  197     DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource),
  198     DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
  199     DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
  200     DEVMETHOD(bus_setup_intr,   bus_generic_setup_intr),
  201     DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
  202 
  203     DEVMETHOD_END
  204 };
  205 
  206 static driver_t acpi_cpu_driver = {
  207     "cpu",
  208     acpi_cpu_methods,
  209     sizeof(struct acpi_cpu_softc),
  210 };
  211 
  212 static devclass_t acpi_cpu_devclass;
  213 DRIVER_MODULE(cpu, acpi, acpi_cpu_driver, acpi_cpu_devclass, 0, 0);
  214 MODULE_DEPEND(cpu, acpi, 1, 1, 1);
  215 
  216 static int
  217 acpi_cpu_probe(device_t dev)
  218 {
  219     int                    acpi_id, cpu_id;
  220     ACPI_BUFFER            buf;
  221     ACPI_HANDLE            handle;
  222     ACPI_OBJECT            *obj;
  223     ACPI_STATUS            status;
  224 
  225     if (acpi_disabled("cpu") || acpi_get_type(dev) != ACPI_TYPE_PROCESSOR)
  226         return (ENXIO);
  227 
  228     handle = acpi_get_handle(dev);
  229     if (cpu_softc == NULL)
  230         cpu_softc = malloc(sizeof(struct acpi_cpu_softc *) *
  231             (mp_maxid + 1), M_TEMP /* XXX */, M_WAITOK | M_ZERO);
  232 
  233     /* Get our Processor object. */
  234     buf.Pointer = NULL;
  235     buf.Length = ACPI_ALLOCATE_BUFFER;
  236     status = AcpiEvaluateObject(handle, NULL, NULL, &buf);
  237     if (ACPI_FAILURE(status)) {
  238         device_printf(dev, "probe failed to get Processor obj - %s\n",
  239                       AcpiFormatException(status));
  240         return (ENXIO);
  241     }
  242     obj = (ACPI_OBJECT *)buf.Pointer;
  243     if (obj->Type != ACPI_TYPE_PROCESSOR) {
  244         device_printf(dev, "Processor object has bad type %d\n", obj->Type);
  245         AcpiOsFree(obj);
  246         return (ENXIO);
  247     }
  248 
  249     /*
  250      * Find the processor associated with our unit.  We could use the
  251      * ProcId as a key, however, some boxes do not have the same values
  252      * in their Processor object as the ProcId values in the MADT.
  253      */
  254     acpi_id = obj->Processor.ProcId;
  255     AcpiOsFree(obj);
  256     if (acpi_pcpu_get_id(dev, &acpi_id, &cpu_id) != 0)
  257         return (ENXIO);
  258 
  259     /*
  260      * Check if we already probed this processor.  We scan the bus twice
  261      * so it's possible we've already seen this one.
  262      */
  263     if (cpu_softc[cpu_id] != NULL)
  264         return (ENXIO);
  265 
  266     /* Mark this processor as in-use and save our derived id for attach. */
  267     cpu_softc[cpu_id] = (void *)1;
  268     acpi_set_private(dev, (void*)(intptr_t)cpu_id);
  269     device_set_desc(dev, "ACPI CPU");
  270 
  271     return (0);
  272 }
  273 
  274 static int
  275 acpi_cpu_attach(device_t dev)
  276 {
  277     ACPI_BUFFER            buf;
  278     ACPI_OBJECT            arg, *obj;
  279     ACPI_OBJECT_LIST       arglist;
  280     struct pcpu            *pcpu_data;
  281     struct acpi_cpu_softc *sc;
  282     struct acpi_softc     *acpi_sc;
  283     ACPI_STATUS            status;
  284     u_int                  features;
  285     int                    cpu_id, drv_count, i;
  286     driver_t              **drivers;
  287     uint32_t               cap_set[3];
  288 
  289     /* UUID needed by _OSC evaluation */
  290     static uint8_t cpu_oscuuid[16] = { 0x16, 0xA6, 0x77, 0x40, 0x0C, 0x29,
  291                                        0xBE, 0x47, 0x9E, 0xBD, 0xD8, 0x70,
  292                                        0x58, 0x71, 0x39, 0x53 };
  293 
  294     ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
  295 
  296     sc = device_get_softc(dev);
  297     sc->cpu_dev = dev;
  298     sc->cpu_handle = acpi_get_handle(dev);
  299     cpu_id = (int)(intptr_t)acpi_get_private(dev);
  300     cpu_softc[cpu_id] = sc;
  301     pcpu_data = pcpu_find(cpu_id);
  302     pcpu_data->pc_device = dev;
  303     sc->cpu_pcpu = pcpu_data;
  304     cpu_smi_cmd = AcpiGbl_FADT.SmiCommand;
  305     cpu_cst_cnt = AcpiGbl_FADT.CstControl;
  306 
  307     buf.Pointer = NULL;
  308     buf.Length = ACPI_ALLOCATE_BUFFER;
  309     status = AcpiEvaluateObject(sc->cpu_handle, NULL, NULL, &buf);
  310     if (ACPI_FAILURE(status)) {
  311         device_printf(dev, "attach failed to get Processor obj - %s\n",
  312                       AcpiFormatException(status));
  313         return (ENXIO);
  314     }
  315     obj = (ACPI_OBJECT *)buf.Pointer;
  316     sc->cpu_p_blk = obj->Processor.PblkAddress;
  317     sc->cpu_p_blk_len = obj->Processor.PblkLength;
  318     sc->cpu_acpi_id = obj->Processor.ProcId;
  319     AcpiOsFree(obj);
  320     ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_BLK at %#x/%d\n",
  321                      device_get_unit(dev), sc->cpu_p_blk, sc->cpu_p_blk_len));
  322 
  323     /*
  324      * If this is the first cpu we attach, create and initialize the generic
  325      * resources that will be used by all acpi cpu devices.
  326      */
  327     if (device_get_unit(dev) == 0) {
  328         /* Assume we won't be using generic Cx mode by default */
  329         cpu_cx_generic = FALSE;
  330 
  331         /* Install hw.acpi.cpu sysctl tree */
  332         acpi_sc = acpi_device_get_parent_softc(dev);
  333         sysctl_ctx_init(&cpu_sysctl_ctx);
  334         cpu_sysctl_tree = SYSCTL_ADD_NODE(&cpu_sysctl_ctx,
  335             SYSCTL_CHILDREN(acpi_sc->acpi_sysctl_tree), OID_AUTO, "cpu",
  336             CTLFLAG_RD, 0, "node for CPU children");
  337 
  338         /* Queue post cpu-probing task handler */
  339         AcpiOsExecute(OSL_NOTIFY_HANDLER, acpi_cpu_startup, NULL);
  340     }
  341 
  342     /*
  343      * Before calling any CPU methods, collect child driver feature hints
  344      * and notify ACPI of them.  We support unified SMP power control
  345      * so advertise this ourselves.  Note this is not the same as independent
  346      * SMP control where each CPU can have different settings.
  347      */
  348     sc->cpu_features = ACPI_CAP_SMP_SAME | ACPI_CAP_SMP_SAME_C3;
  349     if (devclass_get_drivers(acpi_cpu_devclass, &drivers, &drv_count) == 0) {
  350         for (i = 0; i < drv_count; i++) {
  351             if (ACPI_GET_FEATURES(drivers[i], &features) == 0)
  352                 sc->cpu_features |= features;
  353         }
  354         free(drivers, M_TEMP);
  355     }
  356 
  357     /*
  358      * CPU capabilities are specified in
  359      * Intel Processor Vendor-Specific ACPI Interface Specification.
  360      */
  361     if (sc->cpu_features) {
  362         cap_set[1] = sc->cpu_features;
  363         status = acpi_EvaluateOSC(sc->cpu_handle, cpu_oscuuid, 1, 2, cap_set,
  364             cap_set, false);
  365         if (ACPI_SUCCESS(status)) {
  366             if (cap_set[0] != 0)
  367                 device_printf(dev, "_OSC returned status %#x\n", cap_set[0]);
  368         }
  369         else {
  370             arglist.Pointer = &arg;
  371             arglist.Count = 1;
  372             arg.Type = ACPI_TYPE_BUFFER;
  373             arg.Buffer.Length = sizeof(cap_set);
  374             arg.Buffer.Pointer = (uint8_t *)cap_set;
  375             cap_set[0] = 1; /* revision */
  376             cap_set[1] = 1; /* number of capabilities integers */
  377             cap_set[2] = sc->cpu_features;
  378             AcpiEvaluateObject(sc->cpu_handle, "_PDC", &arglist, NULL);
  379         }
  380     }
  381 
  382     /* Probe for Cx state support. */
  383     acpi_cpu_cx_probe(sc);
  384 
  385     return (0);
  386 }
  387 
  388 static void
  389 acpi_cpu_postattach(void *unused __unused)
  390 {
  391     device_t *devices;
  392     int err;
  393     int i, n;
  394 
  395     err = devclass_get_devices(acpi_cpu_devclass, &devices, &n);
  396     if (err != 0) {
  397         printf("devclass_get_devices(acpi_cpu_devclass) failed\n");
  398         return;
  399     }
  400     for (i = 0; i < n; i++)
  401         bus_generic_probe(devices[i]);
  402     for (i = 0; i < n; i++)
  403         bus_generic_attach(devices[i]);
  404     free(devices, M_TEMP);
  405 }
  406 
  407 SYSINIT(acpi_cpu, SI_SUB_CONFIGURE, SI_ORDER_MIDDLE,
  408     acpi_cpu_postattach, NULL);
  409 
  410 static void
  411 disable_idle(struct acpi_cpu_softc *sc)
  412 {
  413     cpuset_t cpuset;
  414 
  415     CPU_SETOF(sc->cpu_pcpu->pc_cpuid, &cpuset);
  416     sc->cpu_disable_idle = TRUE;
  417 
  418     /*
  419      * Ensure that the CPU is not in idle state or in acpi_cpu_idle().
  420      * Note that this code depends on the fact that the rendezvous IPI
  421      * can not penetrate context where interrupts are disabled and acpi_cpu_idle
  422      * is called and executed in such a context with interrupts being re-enabled
  423      * right before return.
  424      */
  425     smp_rendezvous_cpus(cpuset, smp_no_rendevous_barrier, NULL,
  426         smp_no_rendevous_barrier, NULL);
  427 }
  428 
  429 static void
  430 enable_idle(struct acpi_cpu_softc *sc)
  431 {
  432 
  433     sc->cpu_disable_idle = FALSE;
  434 }
  435 
  436 static int
  437 is_idle_disabled(struct acpi_cpu_softc *sc)
  438 {
  439 
  440     return (sc->cpu_disable_idle);
  441 }
  442 
  443 /*
  444  * Disable any entry to the idle function during suspend and re-enable it
  445  * during resume.
  446  */
  447 static int
  448 acpi_cpu_suspend(device_t dev)
  449 {
  450     int error;
  451 
  452     error = bus_generic_suspend(dev);
  453     if (error)
  454         return (error);
  455     disable_idle(device_get_softc(dev));
  456     return (0);
  457 }
  458 
  459 static int
  460 acpi_cpu_resume(device_t dev)
  461 {
  462 
  463     enable_idle(device_get_softc(dev));
  464     return (bus_generic_resume(dev));
  465 }
  466 
  467 /*
  468  * Find the processor associated with a given ACPI ID.  By default,
  469  * use the MADT to map ACPI IDs to APIC IDs and use that to locate a
  470  * processor.  Some systems have inconsistent ASL and MADT however.
  471  * For these systems the cpu_unordered tunable can be set in which
  472  * case we assume that Processor objects are listed in the same order
  473  * in both the MADT and ASL.
  474  */
  475 static int
  476 acpi_pcpu_get_id(device_t dev, uint32_t *acpi_id, uint32_t *cpu_id)
  477 {
  478     struct pcpu *pc;
  479     uint32_t     i, idx;
  480 
  481     KASSERT(acpi_id != NULL, ("Null acpi_id"));
  482     KASSERT(cpu_id != NULL, ("Null cpu_id"));
  483     idx = device_get_unit(dev);
  484 
  485     /*
  486      * If pc_acpi_id for CPU 0 is not initialized (e.g. a non-APIC
  487      * UP box) use the ACPI ID from the first processor we find.
  488      */
  489     if (idx == 0 && mp_ncpus == 1) {
  490         pc = pcpu_find(0);
  491         if (pc->pc_acpi_id == 0xffffffff)
  492             pc->pc_acpi_id = *acpi_id;
  493         *cpu_id = 0;
  494         return (0);
  495     }
  496 
  497     CPU_FOREACH(i) {
  498         pc = pcpu_find(i);
  499         KASSERT(pc != NULL, ("no pcpu data for %d", i));
  500         if (cpu_unordered) {
  501             if (idx-- == 0) {
  502                 /*
  503                  * If pc_acpi_id doesn't match the ACPI ID from the
  504                  * ASL, prefer the MADT-derived value.
  505                  */
  506                 if (pc->pc_acpi_id != *acpi_id)
  507                     *acpi_id = pc->pc_acpi_id;
  508                 *cpu_id = pc->pc_cpuid;
  509                 return (0);
  510             }
  511         } else {
  512             if (pc->pc_acpi_id == *acpi_id) {
  513                 if (bootverbose)
  514                     device_printf(dev,
  515                         "Processor %s (ACPI ID %u) -> APIC ID %d\n",
  516                         acpi_name(acpi_get_handle(dev)), *acpi_id,
  517                         pc->pc_cpuid);
  518                 *cpu_id = pc->pc_cpuid;
  519                 return (0);
  520             }
  521         }
  522     }
  523 
  524     if (bootverbose)
  525         printf("ACPI: Processor %s (ACPI ID %u) ignored\n",
  526             acpi_name(acpi_get_handle(dev)), *acpi_id);
  527 
  528     return (ESRCH);
  529 }
  530 
  531 static struct resource_list *
  532 acpi_cpu_get_rlist(device_t dev, device_t child)
  533 {
  534     struct acpi_cpu_device *ad;
  535 
  536     ad = device_get_ivars(child);
  537     if (ad == NULL)
  538         return (NULL);
  539     return (&ad->ad_rl);
  540 }
  541 
  542 static device_t
  543 acpi_cpu_add_child(device_t dev, u_int order, const char *name, int unit)
  544 {
  545     struct acpi_cpu_device *ad;
  546     device_t child;
  547 
  548     if ((ad = malloc(sizeof(*ad), M_TEMP, M_NOWAIT | M_ZERO)) == NULL)
  549         return (NULL);
  550 
  551     resource_list_init(&ad->ad_rl);
  552     
  553     child = device_add_child_ordered(dev, order, name, unit);
  554     if (child != NULL)
  555         device_set_ivars(child, ad);
  556     else
  557         free(ad, M_TEMP);
  558     return (child);
  559 }
  560 
  561 static int
  562 acpi_cpu_read_ivar(device_t dev, device_t child, int index, uintptr_t *result)
  563 {
  564     struct acpi_cpu_softc *sc;
  565 
  566     sc = device_get_softc(dev);
  567     switch (index) {
  568     case ACPI_IVAR_HANDLE:
  569         *result = (uintptr_t)sc->cpu_handle;
  570         break;
  571     case CPU_IVAR_PCPU:
  572         *result = (uintptr_t)sc->cpu_pcpu;
  573         break;
  574 #if defined(__amd64__) || defined(__i386__)
  575     case CPU_IVAR_NOMINAL_MHZ:
  576         if (tsc_is_invariant) {
  577             *result = (uintptr_t)(atomic_load_acq_64(&tsc_freq) / 1000000);
  578             break;
  579         }
  580         /* FALLTHROUGH */
  581 #endif
  582     default:
  583         return (ENOENT);
  584     }
  585     return (0);
  586 }
  587 
  588 static int
  589 acpi_cpu_shutdown(device_t dev)
  590 {
  591     ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
  592 
  593     /* Allow children to shutdown first. */
  594     bus_generic_shutdown(dev);
  595 
  596     /*
  597      * Disable any entry to the idle function.
  598      */
  599     disable_idle(device_get_softc(dev));
  600 
  601     /*
  602      * CPU devices are not truely detached and remain referenced,
  603      * so their resources are not freed.
  604      */
  605 
  606     return_VALUE (0);
  607 }
  608 
  609 static void
  610 acpi_cpu_cx_probe(struct acpi_cpu_softc *sc)
  611 {
  612     ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
  613 
  614     /* Use initial sleep value of 1 sec. to start with lowest idle state. */
  615     sc->cpu_prev_sleep = 1000000;
  616     sc->cpu_cx_lowest = 0;
  617     sc->cpu_cx_lowest_lim = 0;
  618 
  619     /*
  620      * Check for the ACPI 2.0 _CST sleep states object. If we can't find
  621      * any, we'll revert to generic FADT/P_BLK Cx control method which will
  622      * be handled by acpi_cpu_startup. We need to defer to after having
  623      * probed all the cpus in the system before probing for generic Cx
  624      * states as we may already have found cpus with valid _CST packages
  625      */
  626     if (!cpu_cx_generic && acpi_cpu_cx_cst(sc) != 0) {
  627         /*
  628          * We were unable to find a _CST package for this cpu or there
  629          * was an error parsing it. Switch back to generic mode.
  630          */
  631         cpu_cx_generic = TRUE;
  632         if (bootverbose)
  633             device_printf(sc->cpu_dev, "switching to generic Cx mode\n");
  634     }
  635 
  636     /*
  637      * TODO: _CSD Package should be checked here.
  638      */
  639 }
  640 
  641 static void
  642 acpi_cpu_generic_cx_probe(struct acpi_cpu_softc *sc)
  643 {
  644     ACPI_GENERIC_ADDRESS         gas;
  645     struct acpi_cx              *cx_ptr;
  646 
  647     sc->cpu_cx_count = 0;
  648     cx_ptr = sc->cpu_cx_states;
  649 
  650     /* Use initial sleep value of 1 sec. to start with lowest idle state. */
  651     sc->cpu_prev_sleep = 1000000;
  652 
  653     /* C1 has been required since just after ACPI 1.0 */
  654     cx_ptr->type = ACPI_STATE_C1;
  655     cx_ptr->trans_lat = 0;
  656     cx_ptr++;
  657     sc->cpu_non_c2 = sc->cpu_cx_count;
  658     sc->cpu_non_c3 = sc->cpu_cx_count;
  659     sc->cpu_cx_count++;
  660     cpu_deepest_sleep = 1;
  661 
  662     /* 
  663      * The spec says P_BLK must be 6 bytes long.  However, some systems
  664      * use it to indicate a fractional set of features present so we
  665      * take 5 as C2.  Some may also have a value of 7 to indicate
  666      * another C3 but most use _CST for this (as required) and having
  667      * "only" C1-C3 is not a hardship.
  668      */
  669     if (sc->cpu_p_blk_len < 5)
  670         return; 
  671 
  672     /* Validate and allocate resources for C2 (P_LVL2). */
  673     gas.SpaceId = ACPI_ADR_SPACE_SYSTEM_IO;
  674     gas.BitWidth = 8;
  675     if (AcpiGbl_FADT.C2Latency <= 100) {
  676         gas.Address = sc->cpu_p_blk + 4;
  677         cx_ptr->res_rid = 0;
  678         acpi_bus_alloc_gas(sc->cpu_dev, &cx_ptr->res_type, &cx_ptr->res_rid,
  679             &gas, &cx_ptr->p_lvlx, RF_SHAREABLE);
  680         if (cx_ptr->p_lvlx != NULL) {
  681             cx_ptr->type = ACPI_STATE_C2;
  682             cx_ptr->trans_lat = AcpiGbl_FADT.C2Latency;
  683             cx_ptr++;
  684             sc->cpu_non_c3 = sc->cpu_cx_count;
  685             sc->cpu_cx_count++;
  686             cpu_deepest_sleep = 2;
  687         }
  688     }
  689     if (sc->cpu_p_blk_len < 6)
  690         return;
  691 
  692     /* Validate and allocate resources for C3 (P_LVL3). */
  693     if (AcpiGbl_FADT.C3Latency <= 1000 && !(cpu_quirks & CPU_QUIRK_NO_C3)) {
  694         gas.Address = sc->cpu_p_blk + 5;
  695         cx_ptr->res_rid = 1;
  696         acpi_bus_alloc_gas(sc->cpu_dev, &cx_ptr->res_type, &cx_ptr->res_rid,
  697             &gas, &cx_ptr->p_lvlx, RF_SHAREABLE);
  698         if (cx_ptr->p_lvlx != NULL) {
  699             cx_ptr->type = ACPI_STATE_C3;
  700             cx_ptr->trans_lat = AcpiGbl_FADT.C3Latency;
  701             cx_ptr++;
  702             sc->cpu_cx_count++;
  703             cpu_deepest_sleep = 3;
  704         }
  705     }
  706 }
  707 
  708 /*
  709  * Parse a _CST package and set up its Cx states.  Since the _CST object
  710  * can change dynamically, our notify handler may call this function
  711  * to clean up and probe the new _CST package.
  712  */
  713 static int
  714 acpi_cpu_cx_cst(struct acpi_cpu_softc *sc)
  715 {
  716     struct       acpi_cx *cx_ptr;
  717     ACPI_STATUS  status;
  718     ACPI_BUFFER  buf;
  719     ACPI_OBJECT *top;
  720     ACPI_OBJECT *pkg;
  721     uint32_t     count;
  722     int          i;
  723 
  724     ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
  725 
  726     buf.Pointer = NULL;
  727     buf.Length = ACPI_ALLOCATE_BUFFER;
  728     status = AcpiEvaluateObject(sc->cpu_handle, "_CST", NULL, &buf);
  729     if (ACPI_FAILURE(status))
  730         return (ENXIO);
  731 
  732     /* _CST is a package with a count and at least one Cx package. */
  733     top = (ACPI_OBJECT *)buf.Pointer;
  734     if (!ACPI_PKG_VALID(top, 2) || acpi_PkgInt32(top, 0, &count) != 0) {
  735         device_printf(sc->cpu_dev, "invalid _CST package\n");
  736         AcpiOsFree(buf.Pointer);
  737         return (ENXIO);
  738     }
  739     if (count != top->Package.Count - 1) {
  740         device_printf(sc->cpu_dev, "invalid _CST state count (%d != %d)\n",
  741                count, top->Package.Count - 1);
  742         count = top->Package.Count - 1;
  743     }
  744     if (count > MAX_CX_STATES) {
  745         device_printf(sc->cpu_dev, "_CST has too many states (%d)\n", count);
  746         count = MAX_CX_STATES;
  747     }
  748 
  749     sc->cpu_non_c2 = 0;
  750     sc->cpu_non_c3 = 0;
  751     sc->cpu_cx_count = 0;
  752     cx_ptr = sc->cpu_cx_states;
  753 
  754     /*
  755      * C1 has been required since just after ACPI 1.0.
  756      * Reserve the first slot for it.
  757      */
  758     cx_ptr->type = ACPI_STATE_C0;
  759     cx_ptr++;
  760     sc->cpu_cx_count++;
  761     cpu_deepest_sleep = 1;
  762 
  763     /* Set up all valid states. */
  764     for (i = 0; i < count; i++) {
  765         pkg = &top->Package.Elements[i + 1];
  766         if (!ACPI_PKG_VALID(pkg, 4) ||
  767             acpi_PkgInt32(pkg, 1, &cx_ptr->type) != 0 ||
  768             acpi_PkgInt32(pkg, 2, &cx_ptr->trans_lat) != 0 ||
  769             acpi_PkgInt32(pkg, 3, &cx_ptr->power) != 0) {
  770 
  771             device_printf(sc->cpu_dev, "skipping invalid Cx state package\n");
  772             continue;
  773         }
  774 
  775         /* Validate the state to see if we should use it. */
  776         switch (cx_ptr->type) {
  777         case ACPI_STATE_C1:
  778             if (sc->cpu_cx_states[0].type == ACPI_STATE_C0) {
  779                 /* This is the first C1 state.  Use the reserved slot. */
  780                 sc->cpu_cx_states[0] = *cx_ptr;
  781             } else {
  782                 sc->cpu_non_c2 = sc->cpu_cx_count;
  783                 sc->cpu_non_c3 = sc->cpu_cx_count;
  784                 cx_ptr++;
  785                 sc->cpu_cx_count++;
  786             }
  787             continue;
  788         case ACPI_STATE_C2:
  789             sc->cpu_non_c3 = sc->cpu_cx_count;
  790             if (cpu_deepest_sleep < 2)
  791                     cpu_deepest_sleep = 2;
  792             break;
  793         case ACPI_STATE_C3:
  794         default:
  795             if ((cpu_quirks & CPU_QUIRK_NO_C3) != 0) {
  796                 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  797                                  "acpi_cpu%d: C3[%d] not available.\n",
  798                                  device_get_unit(sc->cpu_dev), i));
  799                 continue;
  800             } else
  801                 cpu_deepest_sleep = 3;
  802             break;
  803         }
  804 
  805         /* Free up any previous register. */
  806         if (cx_ptr->p_lvlx != NULL) {
  807             bus_release_resource(sc->cpu_dev, cx_ptr->res_type, cx_ptr->res_rid,
  808                 cx_ptr->p_lvlx);
  809             cx_ptr->p_lvlx = NULL;
  810         }
  811 
  812         /* Allocate the control register for C2 or C3. */
  813         cx_ptr->res_rid = sc->cpu_cx_count;
  814         acpi_PkgGas(sc->cpu_dev, pkg, 0, &cx_ptr->res_type, &cx_ptr->res_rid,
  815             &cx_ptr->p_lvlx, RF_SHAREABLE);
  816         if (cx_ptr->p_lvlx) {
  817             ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  818                              "acpi_cpu%d: Got C%d - %d latency\n",
  819                              device_get_unit(sc->cpu_dev), cx_ptr->type,
  820                              cx_ptr->trans_lat));
  821             cx_ptr++;
  822             sc->cpu_cx_count++;
  823         }
  824     }
  825     AcpiOsFree(buf.Pointer);
  826 
  827     /* If C1 state was not found, we need one now. */
  828     cx_ptr = sc->cpu_cx_states;
  829     if (cx_ptr->type == ACPI_STATE_C0) {
  830         cx_ptr->type = ACPI_STATE_C1;
  831         cx_ptr->trans_lat = 0;
  832     }
  833 
  834     return (0);
  835 }
  836 
  837 /*
  838  * Call this *after* all CPUs have been attached.
  839  */
  840 static void
  841 acpi_cpu_startup(void *arg)
  842 {
  843     struct acpi_cpu_softc *sc;
  844     int i;
  845 
  846     /* Get set of CPU devices */
  847     devclass_get_devices(acpi_cpu_devclass, &cpu_devices, &cpu_ndevices);
  848 
  849     /*
  850      * Setup any quirks that might necessary now that we have probed
  851      * all the CPUs
  852      */
  853     acpi_cpu_quirks();
  854 
  855     if (cpu_cx_generic) {
  856         /*
  857          * We are using generic Cx mode, probe for available Cx states
  858          * for all processors.
  859          */
  860         for (i = 0; i < cpu_ndevices; i++) {
  861             sc = device_get_softc(cpu_devices[i]);
  862             acpi_cpu_generic_cx_probe(sc);
  863         }
  864     } else {
  865         /*
  866          * We are using _CST mode, remove C3 state if necessary.
  867          * As we now know for sure that we will be using _CST mode
  868          * install our notify handler.
  869          */
  870         for (i = 0; i < cpu_ndevices; i++) {
  871             sc = device_get_softc(cpu_devices[i]);
  872             if (cpu_quirks & CPU_QUIRK_NO_C3) {
  873                 sc->cpu_cx_count = min(sc->cpu_cx_count, sc->cpu_non_c3 + 1);
  874             }
  875             AcpiInstallNotifyHandler(sc->cpu_handle, ACPI_DEVICE_NOTIFY,
  876                 acpi_cpu_notify, sc);
  877         }
  878     }
  879 
  880     /* Perform Cx final initialization. */
  881     for (i = 0; i < cpu_ndevices; i++) {
  882         sc = device_get_softc(cpu_devices[i]);
  883         acpi_cpu_startup_cx(sc);
  884     }
  885 
  886     /* Add a sysctl handler to handle global Cx lowest setting */
  887     SYSCTL_ADD_PROC(&cpu_sysctl_ctx, SYSCTL_CHILDREN(cpu_sysctl_tree),
  888         OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW,
  889         NULL, 0, acpi_cpu_global_cx_lowest_sysctl, "A",
  890         "Global lowest Cx sleep state to use");
  891 
  892     /* Take over idling from cpu_idle_default(). */
  893     cpu_cx_lowest_lim = 0;
  894     for (i = 0; i < cpu_ndevices; i++) {
  895         sc = device_get_softc(cpu_devices[i]);
  896         enable_idle(sc);
  897     }
  898     cpu_idle_hook = acpi_cpu_idle;
  899 }
  900 
  901 static void
  902 acpi_cpu_cx_list(struct acpi_cpu_softc *sc)
  903 {
  904     struct sbuf sb;
  905     int i;
  906 
  907     /*
  908      * Set up the list of Cx states
  909      */
  910     sbuf_new(&sb, sc->cpu_cx_supported, sizeof(sc->cpu_cx_supported),
  911         SBUF_FIXEDLEN);
  912     for (i = 0; i < sc->cpu_cx_count; i++)
  913         sbuf_printf(&sb, "C%d/%d/%d ", i + 1, sc->cpu_cx_states[i].type,
  914             sc->cpu_cx_states[i].trans_lat);
  915     sbuf_trim(&sb);
  916     sbuf_finish(&sb);
  917 }       
  918 
  919 static void
  920 acpi_cpu_startup_cx(struct acpi_cpu_softc *sc)
  921 {
  922     acpi_cpu_cx_list(sc);
  923     
  924     SYSCTL_ADD_STRING(&sc->cpu_sysctl_ctx,
  925                       SYSCTL_CHILDREN(device_get_sysctl_tree(sc->cpu_dev)),
  926                       OID_AUTO, "cx_supported", CTLFLAG_RD,
  927                       sc->cpu_cx_supported, 0,
  928                       "Cx/microsecond values for supported Cx states");
  929     SYSCTL_ADD_PROC(&sc->cpu_sysctl_ctx,
  930                     SYSCTL_CHILDREN(device_get_sysctl_tree(sc->cpu_dev)),
  931                     OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW,
  932                     (void *)sc, 0, acpi_cpu_cx_lowest_sysctl, "A",
  933                     "lowest Cx sleep state to use");
  934     SYSCTL_ADD_PROC(&sc->cpu_sysctl_ctx,
  935                     SYSCTL_CHILDREN(device_get_sysctl_tree(sc->cpu_dev)),
  936                     OID_AUTO, "cx_usage", CTLTYPE_STRING | CTLFLAG_RD,
  937                     (void *)sc, 0, acpi_cpu_usage_sysctl, "A",
  938                     "percent usage for each Cx state");
  939 
  940     /* Signal platform that we can handle _CST notification. */
  941     if (!cpu_cx_generic && cpu_cst_cnt != 0) {
  942         ACPI_LOCK(acpi);
  943         AcpiOsWritePort(cpu_smi_cmd, cpu_cst_cnt, 8);
  944         ACPI_UNLOCK(acpi);
  945     }
  946 }
  947 
  948 /*
  949  * Idle the CPU in the lowest state possible.  This function is called with
  950  * interrupts disabled.  Note that once it re-enables interrupts, a task
  951  * switch can occur so do not access shared data (i.e. the softc) after
  952  * interrupts are re-enabled.
  953  */
  954 static void
  955 acpi_cpu_idle(sbintime_t sbt)
  956 {
  957     struct      acpi_cpu_softc *sc;
  958     struct      acpi_cx *cx_next;
  959     uint64_t    cputicks;
  960     uint32_t    start_time, end_time;
  961     int         bm_active, cx_next_idx, i, us;
  962 
  963     /*
  964      * Look up our CPU id to get our softc.  If it's NULL, we'll use C1
  965      * since there is no ACPI processor object for this CPU.  This occurs
  966      * for logical CPUs in the HTT case.
  967      */
  968     sc = cpu_softc[PCPU_GET(cpuid)];
  969     if (sc == NULL) {
  970         acpi_cpu_c1();
  971         return;
  972     }
  973 
  974     /* If disabled, take the safe path. */
  975     if (is_idle_disabled(sc)) {
  976         acpi_cpu_c1();
  977         return;
  978     }
  979 
  980     /* Find the lowest state that has small enough latency. */
  981     us = sc->cpu_prev_sleep;
  982     if (sbt >= 0 && us > (sbt >> 12))
  983         us = (sbt >> 12);
  984     cx_next_idx = 0;
  985     if (cpu_disable_c2_sleep)
  986         i = min(sc->cpu_cx_lowest, sc->cpu_non_c2);
  987     else if (cpu_disable_c3_sleep)
  988         i = min(sc->cpu_cx_lowest, sc->cpu_non_c3);
  989     else
  990         i = sc->cpu_cx_lowest;
  991     for (; i >= 0; i--) {
  992         if (sc->cpu_cx_states[i].trans_lat * 3 <= us) {
  993             cx_next_idx = i;
  994             break;
  995         }
  996     }
  997 
  998     /*
  999      * Check for bus master activity.  If there was activity, clear
 1000      * the bit and use the lowest non-C3 state.  Note that the USB
 1001      * driver polling for new devices keeps this bit set all the
 1002      * time if USB is loaded.
 1003      */
 1004     if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0 &&
 1005         cx_next_idx > sc->cpu_non_c3) {
 1006         AcpiReadBitRegister(ACPI_BITREG_BUS_MASTER_STATUS, &bm_active);
 1007         if (bm_active != 0) {
 1008             AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_STATUS, 1);
 1009             cx_next_idx = sc->cpu_non_c3;
 1010         }
 1011     }
 1012 
 1013     /* Select the next state and update statistics. */
 1014     cx_next = &sc->cpu_cx_states[cx_next_idx];
 1015     sc->cpu_cx_stats[cx_next_idx]++;
 1016     KASSERT(cx_next->type != ACPI_STATE_C0, ("acpi_cpu_idle: C0 sleep"));
 1017 
 1018     /*
 1019      * Execute HLT (or equivalent) and wait for an interrupt.  We can't
 1020      * precisely calculate the time spent in C1 since the place we wake up
 1021      * is an ISR.  Assume we slept no more then half of quantum, unless
 1022      * we are called inside critical section, delaying context switch.
 1023      */
 1024     if (cx_next->type == ACPI_STATE_C1) {
 1025         cputicks = cpu_ticks();
 1026         acpi_cpu_c1();
 1027         end_time = ((cpu_ticks() - cputicks) << 20) / cpu_tickrate();
 1028         if (curthread->td_critnest == 0)
 1029                 end_time = min(end_time, 500000 / hz);
 1030         sc->cpu_prev_sleep = (sc->cpu_prev_sleep * 3 + end_time) / 4;
 1031         return;
 1032     }
 1033 
 1034     /*
 1035      * For C3, disable bus master arbitration and enable bus master wake
 1036      * if BM control is available, otherwise flush the CPU cache.
 1037      */
 1038     if (cx_next->type == ACPI_STATE_C3) {
 1039         if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) {
 1040             AcpiWriteBitRegister(ACPI_BITREG_ARB_DISABLE, 1);
 1041             AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_RLD, 1);
 1042         } else
 1043             ACPI_FLUSH_CPU_CACHE();
 1044     }
 1045 
 1046     /*
 1047      * Read from P_LVLx to enter C2(+), checking time spent asleep.
 1048      * Use the ACPI timer for measuring sleep time.  Since we need to
 1049      * get the time very close to the CPU start/stop clock logic, this
 1050      * is the only reliable time source.
 1051      */
 1052     if (cx_next->type == ACPI_STATE_C3) {
 1053         AcpiHwRead(&start_time, &AcpiGbl_FADT.XPmTimerBlock);
 1054         cputicks = 0;
 1055     } else {
 1056         start_time = 0;
 1057         cputicks = cpu_ticks();
 1058     }
 1059     CPU_GET_REG(cx_next->p_lvlx, 1);
 1060 
 1061     /*
 1062      * Read the end time twice.  Since it may take an arbitrary time
 1063      * to enter the idle state, the first read may be executed before
 1064      * the processor has stopped.  Doing it again provides enough
 1065      * margin that we are certain to have a correct value.
 1066      */
 1067     AcpiHwRead(&end_time, &AcpiGbl_FADT.XPmTimerBlock);
 1068     if (cx_next->type == ACPI_STATE_C3) {
 1069         AcpiHwRead(&end_time, &AcpiGbl_FADT.XPmTimerBlock);
 1070         end_time = acpi_TimerDelta(end_time, start_time);
 1071     } else
 1072         end_time = ((cpu_ticks() - cputicks) << 20) / cpu_tickrate();
 1073 
 1074     /* Enable bus master arbitration and disable bus master wakeup. */
 1075     if (cx_next->type == ACPI_STATE_C3 &&
 1076         (cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) {
 1077         AcpiWriteBitRegister(ACPI_BITREG_ARB_DISABLE, 0);
 1078         AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_RLD, 0);
 1079     }
 1080     ACPI_ENABLE_IRQS();
 1081 
 1082     sc->cpu_prev_sleep = (sc->cpu_prev_sleep * 3 + PM_USEC(end_time)) / 4;
 1083 }
 1084 
 1085 /*
 1086  * Re-evaluate the _CST object when we are notified that it changed.
 1087  */
 1088 static void
 1089 acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context)
 1090 {
 1091     struct acpi_cpu_softc *sc = (struct acpi_cpu_softc *)context;
 1092 
 1093     if (notify != ACPI_NOTIFY_CX_STATES)
 1094         return;
 1095 
 1096     /*
 1097      * C-state data for target CPU is going to be in flux while we execute
 1098      * acpi_cpu_cx_cst, so disable entering acpi_cpu_idle.
 1099      * Also, it may happen that multiple ACPI taskqueues may concurrently
 1100      * execute notifications for the same CPU.  ACPI_SERIAL is used to
 1101      * protect against that.
 1102      */
 1103     ACPI_SERIAL_BEGIN(cpu);
 1104     disable_idle(sc);
 1105 
 1106     /* Update the list of Cx states. */
 1107     acpi_cpu_cx_cst(sc);
 1108     acpi_cpu_cx_list(sc);
 1109     acpi_cpu_set_cx_lowest(sc);
 1110 
 1111     enable_idle(sc);
 1112     ACPI_SERIAL_END(cpu);
 1113 
 1114     acpi_UserNotify("PROCESSOR", sc->cpu_handle, notify);
 1115 }
 1116 
 1117 static void
 1118 acpi_cpu_quirks(void)
 1119 {
 1120     ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
 1121 
 1122     /*
 1123      * Bus mastering arbitration control is needed to keep caches coherent
 1124      * while sleeping in C3.  If it's not present but a working flush cache
 1125      * instruction is present, flush the caches before entering C3 instead.
 1126      * Otherwise, just disable C3 completely.
 1127      */
 1128     if (AcpiGbl_FADT.Pm2ControlBlock == 0 ||
 1129         AcpiGbl_FADT.Pm2ControlLength == 0) {
 1130         if ((AcpiGbl_FADT.Flags & ACPI_FADT_WBINVD) &&
 1131             (AcpiGbl_FADT.Flags & ACPI_FADT_WBINVD_FLUSH) == 0) {
 1132             cpu_quirks |= CPU_QUIRK_NO_BM_CTRL;
 1133             ACPI_DEBUG_PRINT((ACPI_DB_INFO,
 1134                 "acpi_cpu: no BM control, using flush cache method\n"));
 1135         } else {
 1136             cpu_quirks |= CPU_QUIRK_NO_C3;
 1137             ACPI_DEBUG_PRINT((ACPI_DB_INFO,
 1138                 "acpi_cpu: no BM control, C3 not available\n"));
 1139         }
 1140     }
 1141 
 1142     /*
 1143      * If we are using generic Cx mode, C3 on multiple CPUs requires using
 1144      * the expensive flush cache instruction.
 1145      */
 1146     if (cpu_cx_generic && mp_ncpus > 1) {
 1147         cpu_quirks |= CPU_QUIRK_NO_BM_CTRL;
 1148         ACPI_DEBUG_PRINT((ACPI_DB_INFO,
 1149             "acpi_cpu: SMP, using flush cache mode for C3\n"));
 1150     }
 1151 
 1152     /* Look for various quirks of the PIIX4 part. */
 1153     acpi_cpu_quirks_piix4();
 1154 }
 1155 
 1156 static void
 1157 acpi_cpu_quirks_piix4(void)
 1158 {
 1159 #ifdef __i386__
 1160     device_t acpi_dev;
 1161     uint32_t val;
 1162 
 1163     acpi_dev = pci_find_device(PCI_VENDOR_INTEL, PCI_DEVICE_82371AB_3);
 1164     if (acpi_dev != NULL) {
 1165         switch (pci_get_revid(acpi_dev)) {
 1166         /*
 1167          * Disable C3 support for all PIIX4 chipsets.  Some of these parts
 1168          * do not report the BMIDE status to the BM status register and
 1169          * others have a livelock bug if Type-F DMA is enabled.  Linux
 1170          * works around the BMIDE bug by reading the BM status directly
 1171          * but we take the simpler approach of disabling C3 for these
 1172          * parts.
 1173          *
 1174          * See erratum #18 ("C3 Power State/BMIDE and Type-F DMA
 1175          * Livelock") from the January 2002 PIIX4 specification update.
 1176          * Applies to all PIIX4 models.
 1177          *
 1178          * Also, make sure that all interrupts cause a "Stop Break"
 1179          * event to exit from C2 state.
 1180          * Also, BRLD_EN_BM (ACPI_BITREG_BUS_MASTER_RLD in ACPI-speak)
 1181          * should be set to zero, otherwise it causes C2 to short-sleep.
 1182          * PIIX4 doesn't properly support C3 and bus master activity
 1183          * need not break out of C2.
 1184          */
 1185         case PCI_REVISION_A_STEP:
 1186         case PCI_REVISION_B_STEP:
 1187         case PCI_REVISION_4E:
 1188         case PCI_REVISION_4M:
 1189             cpu_quirks |= CPU_QUIRK_NO_C3;
 1190             ACPI_DEBUG_PRINT((ACPI_DB_INFO,
 1191                 "acpi_cpu: working around PIIX4 bug, disabling C3\n"));
 1192 
 1193             val = pci_read_config(acpi_dev, PIIX4_DEVACTB_REG, 4);
 1194             if ((val & PIIX4_STOP_BREAK_MASK) != PIIX4_STOP_BREAK_MASK) {
 1195                 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
 1196                     "acpi_cpu: PIIX4: enabling IRQs to generate Stop Break\n"));
 1197                 val |= PIIX4_STOP_BREAK_MASK;
 1198                 pci_write_config(acpi_dev, PIIX4_DEVACTB_REG, val, 4);
 1199             }
 1200             AcpiReadBitRegister(ACPI_BITREG_BUS_MASTER_RLD, &val);
 1201             if (val) {
 1202                 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
 1203                     "acpi_cpu: PIIX4: reset BRLD_EN_BM\n"));
 1204                 AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_RLD, 0);
 1205             }
 1206             break;
 1207         default:
 1208             break;
 1209         }
 1210     }
 1211 #endif
 1212 }
 1213 
 1214 static int
 1215 acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS)
 1216 {
 1217     struct acpi_cpu_softc *sc;
 1218     struct sbuf  sb;
 1219     char         buf[128];
 1220     int          i;
 1221     uintmax_t    fract, sum, whole;
 1222 
 1223     sc = (struct acpi_cpu_softc *) arg1;
 1224     sum = 0;
 1225     for (i = 0; i < sc->cpu_cx_count; i++)
 1226         sum += sc->cpu_cx_stats[i];
 1227     sbuf_new(&sb, buf, sizeof(buf), SBUF_FIXEDLEN);
 1228     for (i = 0; i < sc->cpu_cx_count; i++) {
 1229         if (sum > 0) {
 1230             whole = (uintmax_t)sc->cpu_cx_stats[i] * 100;
 1231             fract = (whole % sum) * 100;
 1232             sbuf_printf(&sb, "%u.%02u%% ", (u_int)(whole / sum),
 1233                 (u_int)(fract / sum));
 1234         } else
 1235             sbuf_printf(&sb, "0.00%% ");
 1236     }
 1237     sbuf_printf(&sb, "last %dus", sc->cpu_prev_sleep);
 1238     sbuf_trim(&sb);
 1239     sbuf_finish(&sb);
 1240     sysctl_handle_string(oidp, sbuf_data(&sb), sbuf_len(&sb), req);
 1241     sbuf_delete(&sb);
 1242 
 1243     return (0);
 1244 }
 1245 
 1246 static int
 1247 acpi_cpu_set_cx_lowest(struct acpi_cpu_softc *sc)
 1248 {
 1249     int i;
 1250 
 1251     ACPI_SERIAL_ASSERT(cpu);
 1252     sc->cpu_cx_lowest = min(sc->cpu_cx_lowest_lim, sc->cpu_cx_count - 1);
 1253 
 1254     /* If not disabling, cache the new lowest non-C3 state. */
 1255     sc->cpu_non_c3 = 0;
 1256     for (i = sc->cpu_cx_lowest; i >= 0; i--) {
 1257         if (sc->cpu_cx_states[i].type < ACPI_STATE_C3) {
 1258             sc->cpu_non_c3 = i;
 1259             break;
 1260         }
 1261     }
 1262 
 1263     /* Reset the statistics counters. */
 1264     bzero(sc->cpu_cx_stats, sizeof(sc->cpu_cx_stats));
 1265     return (0);
 1266 }
 1267 
 1268 static int
 1269 acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS)
 1270 {
 1271     struct       acpi_cpu_softc *sc;
 1272     char         state[8];
 1273     int          val, error;
 1274 
 1275     sc = (struct acpi_cpu_softc *) arg1;
 1276     snprintf(state, sizeof(state), "C%d", sc->cpu_cx_lowest_lim + 1);
 1277     error = sysctl_handle_string(oidp, state, sizeof(state), req);
 1278     if (error != 0 || req->newptr == NULL)
 1279         return (error);
 1280     if (strlen(state) < 2 || toupper(state[0]) != 'C')
 1281         return (EINVAL);
 1282     if (strcasecmp(state, "Cmax") == 0)
 1283         val = MAX_CX_STATES;
 1284     else {
 1285         val = (int) strtol(state + 1, NULL, 10);
 1286         if (val < 1 || val > MAX_CX_STATES)
 1287             return (EINVAL);
 1288     }
 1289 
 1290     ACPI_SERIAL_BEGIN(cpu);
 1291     sc->cpu_cx_lowest_lim = val - 1;
 1292     acpi_cpu_set_cx_lowest(sc);
 1293     ACPI_SERIAL_END(cpu);
 1294 
 1295     return (0);
 1296 }
 1297 
 1298 static int
 1299 acpi_cpu_global_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS)
 1300 {
 1301     struct      acpi_cpu_softc *sc;
 1302     char        state[8];
 1303     int         val, error, i;
 1304 
 1305     snprintf(state, sizeof(state), "C%d", cpu_cx_lowest_lim + 1);
 1306     error = sysctl_handle_string(oidp, state, sizeof(state), req);
 1307     if (error != 0 || req->newptr == NULL)
 1308         return (error);
 1309     if (strlen(state) < 2 || toupper(state[0]) != 'C')
 1310         return (EINVAL);
 1311     if (strcasecmp(state, "Cmax") == 0)
 1312         val = MAX_CX_STATES;
 1313     else {
 1314         val = (int) strtol(state + 1, NULL, 10);
 1315         if (val < 1 || val > MAX_CX_STATES)
 1316             return (EINVAL);
 1317     }
 1318 
 1319     /* Update the new lowest useable Cx state for all CPUs. */
 1320     ACPI_SERIAL_BEGIN(cpu);
 1321     cpu_cx_lowest_lim = val - 1;
 1322     for (i = 0; i < cpu_ndevices; i++) {
 1323         sc = device_get_softc(cpu_devices[i]);
 1324         sc->cpu_cx_lowest_lim = cpu_cx_lowest_lim;
 1325         acpi_cpu_set_cx_lowest(sc);
 1326     }
 1327     ACPI_SERIAL_END(cpu);
 1328 
 1329     return (0);
 1330 }

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