1 /*-
2 * Copyright (c) 2003-2005 Nate Lawson (SDG)
3 * Copyright (c) 2001 Michael Smith
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD: releng/6.1/sys/dev/acpica/acpi_cpu.c 152107 2005-11-05 23:49:39Z njl $");
30
31 #include "opt_acpi.h"
32 #include <sys/param.h>
33 #include <sys/bus.h>
34 #include <sys/cpu.h>
35 #include <sys/kernel.h>
36 #include <sys/malloc.h>
37 #include <sys/module.h>
38 #include <sys/pcpu.h>
39 #include <sys/power.h>
40 #include <sys/proc.h>
41 #include <sys/sbuf.h>
42 #include <sys/smp.h>
43
44 #include <dev/pci/pcivar.h>
45 #include <machine/atomic.h>
46 #include <machine/bus.h>
47 #include <sys/rman.h>
48
49 #include <contrib/dev/acpica/acpi.h>
50 #include <dev/acpica/acpivar.h>
51
52 /*
53 * Support for ACPI Processor devices, including C[1-3] sleep states.
54 *
55 * TODO: implement scans of all CPUs to be sure all Cx states are
56 * equivalent.
57 */
58
59 /* Hooks for the ACPI CA debugging infrastructure */
60 #define _COMPONENT ACPI_PROCESSOR
61 ACPI_MODULE_NAME("PROCESSOR")
62
63 struct acpi_cx {
64 struct resource *p_lvlx; /* Register to read to enter state. */
65 uint32_t type; /* C1-3 (C4 and up treated as C3). */
66 uint32_t trans_lat; /* Transition latency (usec). */
67 uint32_t power; /* Power consumed (mW). */
68 int res_type; /* Resource type for p_lvlx. */
69 };
70 #define MAX_CX_STATES 8
71
72 struct acpi_cpu_softc {
73 device_t cpu_dev;
74 ACPI_HANDLE cpu_handle;
75 struct pcpu *cpu_pcpu;
76 uint32_t cpu_acpi_id; /* ACPI processor id */
77 uint32_t cpu_p_blk; /* ACPI P_BLK location */
78 uint32_t cpu_p_blk_len; /* P_BLK length (must be 6). */
79 struct acpi_cx cpu_cx_states[MAX_CX_STATES];
80 int cpu_cx_count; /* Number of valid Cx states. */
81 int cpu_prev_sleep;/* Last idle sleep duration. */
82 int cpu_features; /* Child driver supported features. */
83 };
84
85 struct acpi_cpu_device {
86 struct resource_list ad_rl;
87 };
88
89 #define CPU_GET_REG(reg, width) \
90 (bus_space_read_ ## width(rman_get_bustag((reg)), \
91 rman_get_bushandle((reg)), 0))
92 #define CPU_SET_REG(reg, width, val) \
93 (bus_space_write_ ## width(rman_get_bustag((reg)), \
94 rman_get_bushandle((reg)), 0, (val)))
95
96 #define PM_USEC(x) ((x) >> 2) /* ~4 clocks per usec (3.57955 Mhz) */
97
98 #define ACPI_NOTIFY_CX_STATES 0x81 /* _CST changed. */
99
100 #define CPU_QUIRK_NO_C3 (1<<0) /* C3-type states are not usable. */
101 #define CPU_QUIRK_NO_BM_CTRL (1<<2) /* No bus mastering control. */
102
103 #define PCI_VENDOR_INTEL 0x8086
104 #define PCI_DEVICE_82371AB_3 0x7113 /* PIIX4 chipset for quirks. */
105 #define PCI_REVISION_A_STEP 0
106 #define PCI_REVISION_B_STEP 1
107 #define PCI_REVISION_4E 2
108 #define PCI_REVISION_4M 3
109
110 /* Platform hardware resource information. */
111 static uint32_t cpu_smi_cmd; /* Value to write to SMI_CMD. */
112 static uint8_t cpu_cst_cnt; /* Indicate we are _CST aware. */
113 static int cpu_rid; /* Driver-wide resource id. */
114 static int cpu_quirks; /* Indicate any hardware bugs. */
115
116 /* Runtime state. */
117 static int cpu_cx_count; /* Number of valid states */
118 static int cpu_non_c3; /* Index of lowest non-C3 state. */
119 static int cpu_short_slp; /* Count of < 1us sleeps. */
120 static u_int cpu_cx_stats[MAX_CX_STATES];/* Cx usage history. */
121
122 /* Values for sysctl. */
123 static struct sysctl_ctx_list acpi_cpu_sysctl_ctx;
124 static struct sysctl_oid *acpi_cpu_sysctl_tree;
125 static int cpu_cx_lowest;
126 static char cpu_cx_supported[64];
127
128 static device_t *cpu_devices;
129 static int cpu_ndevices;
130 static struct acpi_cpu_softc **cpu_softc;
131 ACPI_SERIAL_DECL(cpu, "ACPI CPU");
132
133 static int acpi_cpu_probe(device_t dev);
134 static int acpi_cpu_attach(device_t dev);
135 static int acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id,
136 uint32_t *cpu_id);
137 static struct resource_list *acpi_cpu_get_rlist(device_t dev, device_t child);
138 static device_t acpi_cpu_add_child(device_t dev, int order, const char *name,
139 int unit);
140 static int acpi_cpu_read_ivar(device_t dev, device_t child, int index,
141 uintptr_t *result);
142 static int acpi_cpu_shutdown(device_t dev);
143 static int acpi_cpu_cx_probe(struct acpi_cpu_softc *sc);
144 static int acpi_cpu_cx_cst(struct acpi_cpu_softc *sc);
145 static void acpi_cpu_startup(void *arg);
146 static void acpi_cpu_startup_cx(void);
147 static void acpi_cpu_idle(void);
148 static void acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context);
149 static int acpi_cpu_quirks(struct acpi_cpu_softc *sc);
150 static int acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS);
151 static int acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS);
152
153 static device_method_t acpi_cpu_methods[] = {
154 /* Device interface */
155 DEVMETHOD(device_probe, acpi_cpu_probe),
156 DEVMETHOD(device_attach, acpi_cpu_attach),
157 DEVMETHOD(device_detach, bus_generic_detach),
158 DEVMETHOD(device_shutdown, acpi_cpu_shutdown),
159 DEVMETHOD(device_suspend, bus_generic_suspend),
160 DEVMETHOD(device_resume, bus_generic_resume),
161
162 /* Bus interface */
163 DEVMETHOD(bus_add_child, acpi_cpu_add_child),
164 DEVMETHOD(bus_read_ivar, acpi_cpu_read_ivar),
165 DEVMETHOD(bus_get_resource_list, acpi_cpu_get_rlist),
166 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource),
167 DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource),
168 DEVMETHOD(bus_alloc_resource, bus_generic_rl_alloc_resource),
169 DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource),
170 DEVMETHOD(bus_driver_added, bus_generic_driver_added),
171 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
172 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
173 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
174 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
175
176 {0, 0}
177 };
178
179 static driver_t acpi_cpu_driver = {
180 "cpu",
181 acpi_cpu_methods,
182 sizeof(struct acpi_cpu_softc),
183 };
184
185 static devclass_t acpi_cpu_devclass;
186 DRIVER_MODULE(cpu, acpi, acpi_cpu_driver, acpi_cpu_devclass, 0, 0);
187 MODULE_DEPEND(cpu, acpi, 1, 1, 1);
188
189 static int
190 acpi_cpu_probe(device_t dev)
191 {
192 int acpi_id, cpu_id;
193 ACPI_BUFFER buf;
194 ACPI_HANDLE handle;
195 ACPI_OBJECT *obj;
196 ACPI_STATUS status;
197
198 if (acpi_disabled("cpu") || acpi_get_type(dev) != ACPI_TYPE_PROCESSOR)
199 return (ENXIO);
200
201 handle = acpi_get_handle(dev);
202 if (cpu_softc == NULL)
203 cpu_softc = malloc(sizeof(struct acpi_cpu_softc *) *
204 (mp_maxid + 1), M_TEMP /* XXX */, M_WAITOK | M_ZERO);
205
206 /* Get our Processor object. */
207 buf.Pointer = NULL;
208 buf.Length = ACPI_ALLOCATE_BUFFER;
209 status = AcpiEvaluateObject(handle, NULL, NULL, &buf);
210 if (ACPI_FAILURE(status)) {
211 device_printf(dev, "probe failed to get Processor obj - %s\n",
212 AcpiFormatException(status));
213 return (ENXIO);
214 }
215 obj = (ACPI_OBJECT *)buf.Pointer;
216 if (obj->Type != ACPI_TYPE_PROCESSOR) {
217 device_printf(dev, "Processor object has bad type %d\n", obj->Type);
218 AcpiOsFree(obj);
219 return (ENXIO);
220 }
221
222 /*
223 * Find the processor associated with our unit. We could use the
224 * ProcId as a key, however, some boxes do not have the same values
225 * in their Processor object as the ProcId values in the MADT.
226 */
227 acpi_id = obj->Processor.ProcId;
228 AcpiOsFree(obj);
229 if (acpi_pcpu_get_id(device_get_unit(dev), &acpi_id, &cpu_id) != 0)
230 return (ENXIO);
231
232 /*
233 * Check if we already probed this processor. We scan the bus twice
234 * so it's possible we've already seen this one.
235 */
236 if (cpu_softc[cpu_id] != NULL)
237 return (ENXIO);
238
239 /* Mark this processor as in-use and save our derived id for attach. */
240 cpu_softc[cpu_id] = (void *)1;
241 acpi_set_magic(dev, cpu_id);
242 device_set_desc(dev, "ACPI CPU");
243
244 return (0);
245 }
246
247 static int
248 acpi_cpu_attach(device_t dev)
249 {
250 ACPI_BUFFER buf;
251 ACPI_OBJECT arg, *obj;
252 ACPI_OBJECT_LIST arglist;
253 struct pcpu *pcpu_data;
254 struct acpi_cpu_softc *sc;
255 struct acpi_softc *acpi_sc;
256 ACPI_STATUS status;
257 u_int features;
258 int cpu_id, drv_count, i;
259 driver_t **drivers;
260 uint32_t cap_set[3];
261
262 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
263
264 sc = device_get_softc(dev);
265 sc->cpu_dev = dev;
266 sc->cpu_handle = acpi_get_handle(dev);
267 cpu_id = acpi_get_magic(dev);
268 cpu_softc[cpu_id] = sc;
269 pcpu_data = pcpu_find(cpu_id);
270 pcpu_data->pc_device = dev;
271 sc->cpu_pcpu = pcpu_data;
272 cpu_smi_cmd = AcpiGbl_FADT->SmiCmd;
273 cpu_cst_cnt = AcpiGbl_FADT->CstCnt;
274
275 buf.Pointer = NULL;
276 buf.Length = ACPI_ALLOCATE_BUFFER;
277 status = AcpiEvaluateObject(sc->cpu_handle, NULL, NULL, &buf);
278 if (ACPI_FAILURE(status)) {
279 device_printf(dev, "attach failed to get Processor obj - %s\n",
280 AcpiFormatException(status));
281 return (ENXIO);
282 }
283 obj = (ACPI_OBJECT *)buf.Pointer;
284 sc->cpu_p_blk = obj->Processor.PblkAddress;
285 sc->cpu_p_blk_len = obj->Processor.PblkLength;
286 sc->cpu_acpi_id = obj->Processor.ProcId;
287 AcpiOsFree(obj);
288 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_BLK at %#x/%d\n",
289 device_get_unit(dev), sc->cpu_p_blk, sc->cpu_p_blk_len));
290
291 acpi_sc = acpi_device_get_parent_softc(dev);
292 sysctl_ctx_init(&acpi_cpu_sysctl_ctx);
293 acpi_cpu_sysctl_tree = SYSCTL_ADD_NODE(&acpi_cpu_sysctl_ctx,
294 SYSCTL_CHILDREN(acpi_sc->acpi_sysctl_tree), OID_AUTO, "cpu",
295 CTLFLAG_RD, 0, "");
296
297 /*
298 * Before calling any CPU methods, collect child driver feature hints
299 * and notify ACPI of them. We support unified SMP power control
300 * so advertise this ourselves. Note this is not the same as independent
301 * SMP control where each CPU can have different settings.
302 */
303 sc->cpu_features = ACPI_CAP_SMP_SAME | ACPI_CAP_SMP_SAME_C3;
304 if (devclass_get_drivers(acpi_cpu_devclass, &drivers, &drv_count) == 0) {
305 for (i = 0; i < drv_count; i++) {
306 if (ACPI_GET_FEATURES(drivers[i], &features) == 0)
307 sc->cpu_features |= features;
308 }
309 free(drivers, M_TEMP);
310 }
311
312 /*
313 * CPU capabilities are specified as a buffer of 32-bit integers:
314 * revision, count, and one or more capabilities. The revision of
315 * "1" is not specified anywhere but seems to match Linux. We should
316 * also support _OSC here.
317 */
318 if (sc->cpu_features) {
319 arglist.Pointer = &arg;
320 arglist.Count = 1;
321 arg.Type = ACPI_TYPE_BUFFER;
322 arg.Buffer.Length = sizeof(cap_set);
323 arg.Buffer.Pointer = (uint8_t *)cap_set;
324 cap_set[0] = 1; /* revision */
325 cap_set[1] = 1; /* number of capabilities integers */
326 cap_set[2] = sc->cpu_features;
327 AcpiEvaluateObject(sc->cpu_handle, "_PDC", &arglist, NULL);
328 }
329
330 /*
331 * Probe for Cx state support. If it isn't present, free up unused
332 * resources.
333 */
334 if (acpi_cpu_cx_probe(sc) == 0) {
335 status = AcpiInstallNotifyHandler(sc->cpu_handle, ACPI_DEVICE_NOTIFY,
336 acpi_cpu_notify, sc);
337 if (device_get_unit(dev) == 0)
338 AcpiOsQueueForExecution(OSD_PRIORITY_LO, acpi_cpu_startup, NULL);
339 } else
340 sysctl_ctx_free(&acpi_cpu_sysctl_ctx);
341
342 /* Finally, call identify and probe/attach for child devices. */
343 bus_generic_probe(dev);
344 bus_generic_attach(dev);
345
346 return (0);
347 }
348
349 /*
350 * Find the nth present CPU and return its pc_cpuid as well as set the
351 * pc_acpi_id from the most reliable source.
352 */
353 static int
354 acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id, uint32_t *cpu_id)
355 {
356 struct pcpu *pcpu_data;
357 uint32_t i;
358
359 KASSERT(acpi_id != NULL, ("Null acpi_id"));
360 KASSERT(cpu_id != NULL, ("Null cpu_id"));
361 for (i = 0; i <= mp_maxid; i++) {
362 if (CPU_ABSENT(i))
363 continue;
364 pcpu_data = pcpu_find(i);
365 KASSERT(pcpu_data != NULL, ("no pcpu data for %d", i));
366 if (idx-- == 0) {
367 /*
368 * If pc_acpi_id was not initialized (e.g., a non-APIC UP box)
369 * override it with the value from the ASL. Otherwise, if the
370 * two don't match, prefer the MADT-derived value. Finally,
371 * return the pc_cpuid to reference this processor.
372 */
373 if (pcpu_data->pc_acpi_id == 0xffffffff)
374 pcpu_data->pc_acpi_id = *acpi_id;
375 else if (pcpu_data->pc_acpi_id != *acpi_id)
376 *acpi_id = pcpu_data->pc_acpi_id;
377 *cpu_id = pcpu_data->pc_cpuid;
378 return (0);
379 }
380 }
381
382 return (ESRCH);
383 }
384
385 static struct resource_list *
386 acpi_cpu_get_rlist(device_t dev, device_t child)
387 {
388 struct acpi_cpu_device *ad;
389
390 ad = device_get_ivars(child);
391 if (ad == NULL)
392 return (NULL);
393 return (&ad->ad_rl);
394 }
395
396 static device_t
397 acpi_cpu_add_child(device_t dev, int order, const char *name, int unit)
398 {
399 struct acpi_cpu_device *ad;
400 device_t child;
401
402 if ((ad = malloc(sizeof(*ad), M_TEMP, M_NOWAIT | M_ZERO)) == NULL)
403 return (NULL);
404
405 resource_list_init(&ad->ad_rl);
406
407 child = device_add_child_ordered(dev, order, name, unit);
408 if (child != NULL)
409 device_set_ivars(child, ad);
410 else
411 free(ad, M_TEMP);
412 return (child);
413 }
414
415 static int
416 acpi_cpu_read_ivar(device_t dev, device_t child, int index, uintptr_t *result)
417 {
418 struct acpi_cpu_softc *sc;
419
420 sc = device_get_softc(dev);
421 switch (index) {
422 case ACPI_IVAR_HANDLE:
423 *result = (uintptr_t)sc->cpu_handle;
424 break;
425 case CPU_IVAR_PCPU:
426 *result = (uintptr_t)sc->cpu_pcpu;
427 break;
428 default:
429 return (ENOENT);
430 }
431 return (0);
432 }
433
434 static int
435 acpi_cpu_shutdown(device_t dev)
436 {
437 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
438
439 /* Allow children to shutdown first. */
440 bus_generic_shutdown(dev);
441
442 /* Disable any entry to the idle function. */
443 cpu_cx_count = 0;
444
445 /* Signal and wait for all processors to exit acpi_cpu_idle(). */
446 smp_rendezvous(NULL, NULL, NULL, NULL);
447
448 return_VALUE (0);
449 }
450
451 static int
452 acpi_cpu_cx_probe(struct acpi_cpu_softc *sc)
453 {
454 ACPI_GENERIC_ADDRESS gas;
455 struct acpi_cx *cx_ptr;
456 int error;
457
458 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
459
460 /*
461 * Bus mastering arbitration control is needed to keep caches coherent
462 * while sleeping in C3. If it's not present but a working flush cache
463 * instruction is present, flush the caches before entering C3 instead.
464 * Otherwise, just disable C3 completely.
465 */
466 if (AcpiGbl_FADT->V1_Pm2CntBlk == 0 || AcpiGbl_FADT->Pm2CntLen == 0) {
467 if (AcpiGbl_FADT->WbInvd && AcpiGbl_FADT->WbInvdFlush == 0) {
468 cpu_quirks |= CPU_QUIRK_NO_BM_CTRL;
469 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
470 "acpi_cpu%d: no BM control, using flush cache method\n",
471 device_get_unit(sc->cpu_dev)));
472 } else {
473 cpu_quirks |= CPU_QUIRK_NO_C3;
474 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
475 "acpi_cpu%d: no BM control, C3 not available\n",
476 device_get_unit(sc->cpu_dev)));
477 }
478 }
479
480 /*
481 * First, check for the ACPI 2.0 _CST sleep states object.
482 * If not usable, fall back to the P_BLK's P_LVL2 and P_LVL3.
483 */
484 sc->cpu_cx_count = 0;
485 error = acpi_cpu_cx_cst(sc);
486 if (error != 0) {
487 cx_ptr = sc->cpu_cx_states;
488
489 /* C1 has been required since just after ACPI 1.0 */
490 cx_ptr->type = ACPI_STATE_C1;
491 cx_ptr->trans_lat = 0;
492 cpu_non_c3 = 0;
493 cx_ptr++;
494 sc->cpu_cx_count++;
495
496 /*
497 * The spec says P_BLK must be 6 bytes long. However, some systems
498 * use it to indicate a fractional set of features present so we
499 * take 5 as C2. Some may also have a value of 7 to indicate
500 * another C3 but most use _CST for this (as required) and having
501 * "only" C1-C3 is not a hardship.
502 */
503 if (sc->cpu_p_blk_len < 5)
504 goto done;
505
506 /* Validate and allocate resources for C2 (P_LVL2). */
507 gas.AddressSpaceId = ACPI_ADR_SPACE_SYSTEM_IO;
508 gas.RegisterBitWidth = 8;
509 if (AcpiGbl_FADT->Plvl2Lat <= 100) {
510 gas.Address = sc->cpu_p_blk + 4;
511 acpi_bus_alloc_gas(sc->cpu_dev, &cx_ptr->res_type, &cpu_rid, &gas,
512 &cx_ptr->p_lvlx);
513 if (cx_ptr->p_lvlx != NULL) {
514 cpu_rid++;
515 cx_ptr->type = ACPI_STATE_C2;
516 cx_ptr->trans_lat = AcpiGbl_FADT->Plvl2Lat;
517 cpu_non_c3 = 1;
518 cx_ptr++;
519 sc->cpu_cx_count++;
520 }
521 }
522 if (sc->cpu_p_blk_len < 6)
523 goto done;
524
525 /* Validate and allocate resources for C3 (P_LVL3). */
526 if (AcpiGbl_FADT->Plvl3Lat <= 1000 &&
527 (cpu_quirks & CPU_QUIRK_NO_C3) == 0) {
528 gas.Address = sc->cpu_p_blk + 5;
529 acpi_bus_alloc_gas(sc->cpu_dev, &cx_ptr->res_type, &cpu_rid, &gas,
530 &cx_ptr->p_lvlx);
531 if (cx_ptr->p_lvlx != NULL) {
532 cpu_rid++;
533 cx_ptr->type = ACPI_STATE_C3;
534 cx_ptr->trans_lat = AcpiGbl_FADT->Plvl3Lat;
535 cx_ptr++;
536 sc->cpu_cx_count++;
537 }
538 }
539 }
540
541 done:
542 /* If no valid registers were found, don't attach. */
543 if (sc->cpu_cx_count == 0)
544 return (ENXIO);
545
546 /* Use initial sleep value of 1 sec. to start with lowest idle state. */
547 sc->cpu_prev_sleep = 1000000;
548
549 return (0);
550 }
551
552 /*
553 * Parse a _CST package and set up its Cx states. Since the _CST object
554 * can change dynamically, our notify handler may call this function
555 * to clean up and probe the new _CST package.
556 */
557 static int
558 acpi_cpu_cx_cst(struct acpi_cpu_softc *sc)
559 {
560 struct acpi_cx *cx_ptr;
561 ACPI_STATUS status;
562 ACPI_BUFFER buf;
563 ACPI_OBJECT *top;
564 ACPI_OBJECT *pkg;
565 uint32_t count;
566 int i;
567
568 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
569
570 buf.Pointer = NULL;
571 buf.Length = ACPI_ALLOCATE_BUFFER;
572 status = AcpiEvaluateObject(sc->cpu_handle, "_CST", NULL, &buf);
573 if (ACPI_FAILURE(status))
574 return (ENXIO);
575
576 /* _CST is a package with a count and at least one Cx package. */
577 top = (ACPI_OBJECT *)buf.Pointer;
578 if (!ACPI_PKG_VALID(top, 2) || acpi_PkgInt32(top, 0, &count) != 0) {
579 device_printf(sc->cpu_dev, "Invalid _CST package\n");
580 AcpiOsFree(buf.Pointer);
581 return (ENXIO);
582 }
583 if (count != top->Package.Count - 1) {
584 device_printf(sc->cpu_dev, "Invalid _CST state count (%d != %d)\n",
585 count, top->Package.Count - 1);
586 count = top->Package.Count - 1;
587 }
588 if (count > MAX_CX_STATES) {
589 device_printf(sc->cpu_dev, "_CST has too many states (%d)\n", count);
590 count = MAX_CX_STATES;
591 }
592
593 /* Set up all valid states. */
594 sc->cpu_cx_count = 0;
595 cx_ptr = sc->cpu_cx_states;
596 for (i = 0; i < count; i++) {
597 pkg = &top->Package.Elements[i + 1];
598 if (!ACPI_PKG_VALID(pkg, 4) ||
599 acpi_PkgInt32(pkg, 1, &cx_ptr->type) != 0 ||
600 acpi_PkgInt32(pkg, 2, &cx_ptr->trans_lat) != 0 ||
601 acpi_PkgInt32(pkg, 3, &cx_ptr->power) != 0) {
602
603 device_printf(sc->cpu_dev, "skipping invalid Cx state package\n");
604 continue;
605 }
606
607 /* Validate the state to see if we should use it. */
608 switch (cx_ptr->type) {
609 case ACPI_STATE_C1:
610 cpu_non_c3 = i;
611 cx_ptr++;
612 sc->cpu_cx_count++;
613 continue;
614 case ACPI_STATE_C2:
615 if (cx_ptr->trans_lat > 100) {
616 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
617 "acpi_cpu%d: C2[%d] not available.\n",
618 device_get_unit(sc->cpu_dev), i));
619 continue;
620 }
621 cpu_non_c3 = i;
622 break;
623 case ACPI_STATE_C3:
624 default:
625 if (cx_ptr->trans_lat > 1000 ||
626 (cpu_quirks & CPU_QUIRK_NO_C3) != 0) {
627
628 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
629 "acpi_cpu%d: C3[%d] not available.\n",
630 device_get_unit(sc->cpu_dev), i));
631 continue;
632 }
633 break;
634 }
635
636 #ifdef notyet
637 /* Free up any previous register. */
638 if (cx_ptr->p_lvlx != NULL) {
639 bus_release_resource(sc->cpu_dev, 0, 0, cx_ptr->p_lvlx);
640 cx_ptr->p_lvlx = NULL;
641 }
642 #endif
643
644 /* Allocate the control register for C2 or C3. */
645 acpi_PkgGas(sc->cpu_dev, pkg, 0, &cx_ptr->res_type, &cpu_rid,
646 &cx_ptr->p_lvlx);
647 if (cx_ptr->p_lvlx) {
648 cpu_rid++;
649 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
650 "acpi_cpu%d: Got C%d - %d latency\n",
651 device_get_unit(sc->cpu_dev), cx_ptr->type,
652 cx_ptr->trans_lat));
653 cx_ptr++;
654 sc->cpu_cx_count++;
655 }
656 }
657 AcpiOsFree(buf.Pointer);
658
659 return (0);
660 }
661
662 /*
663 * Call this *after* all CPUs have been attached.
664 */
665 static void
666 acpi_cpu_startup(void *arg)
667 {
668 struct acpi_cpu_softc *sc;
669 int count, i;
670
671 /* Get set of CPU devices */
672 devclass_get_devices(acpi_cpu_devclass, &cpu_devices, &cpu_ndevices);
673
674 /* Check for quirks via the first CPU device. */
675 sc = device_get_softc(cpu_devices[0]);
676 acpi_cpu_quirks(sc);
677
678 /*
679 * Make sure all the processors' Cx counts match. We should probably
680 * also check the contents of each. However, no known systems have
681 * non-matching Cx counts so we'll deal with this later.
682 */
683 count = MAX_CX_STATES;
684 for (i = 0; i < cpu_ndevices; i++) {
685 sc = device_get_softc(cpu_devices[i]);
686 count = min(sc->cpu_cx_count, count);
687 }
688 cpu_cx_count = count;
689
690 /* Perform Cx final initialization. */
691 sc = device_get_softc(cpu_devices[0]);
692 if (cpu_cx_count > 0)
693 acpi_cpu_startup_cx();
694 }
695
696 static void
697 acpi_cpu_startup_cx()
698 {
699 struct acpi_cpu_softc *sc;
700 struct sbuf sb;
701 int i;
702
703 /*
704 * Set up the list of Cx states, eliminating C3 states by truncating
705 * cpu_cx_count if quirks indicate C3 is not usable.
706 */
707 sc = device_get_softc(cpu_devices[0]);
708 sbuf_new(&sb, cpu_cx_supported, sizeof(cpu_cx_supported), SBUF_FIXEDLEN);
709 for (i = 0; i < cpu_cx_count; i++) {
710 if ((cpu_quirks & CPU_QUIRK_NO_C3) == 0 ||
711 sc->cpu_cx_states[i].type != ACPI_STATE_C3)
712 sbuf_printf(&sb, "C%d/%d ", i + 1, sc->cpu_cx_states[i].trans_lat);
713 else
714 cpu_cx_count = i;
715 }
716 sbuf_trim(&sb);
717 sbuf_finish(&sb);
718 SYSCTL_ADD_STRING(&acpi_cpu_sysctl_ctx,
719 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree),
720 OID_AUTO, "cx_supported", CTLFLAG_RD, cpu_cx_supported,
721 0, "Cx/microsecond values for supported Cx states");
722 SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx,
723 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree),
724 OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW,
725 NULL, 0, acpi_cpu_cx_lowest_sysctl, "A",
726 "lowest Cx sleep state to use");
727 SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx,
728 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree),
729 OID_AUTO, "cx_usage", CTLTYPE_STRING | CTLFLAG_RD,
730 NULL, 0, acpi_cpu_usage_sysctl, "A",
731 "percent usage for each Cx state");
732
733 #ifdef notyet
734 /* Signal platform that we can handle _CST notification. */
735 if (cpu_cst_cnt != 0) {
736 ACPI_LOCK(acpi);
737 AcpiOsWritePort(cpu_smi_cmd, cpu_cst_cnt, 8);
738 ACPI_UNLOCK(acpi);
739 }
740 #endif
741
742 /* Take over idling from cpu_idle_default(). */
743 cpu_idle_hook = acpi_cpu_idle;
744 }
745
746 /*
747 * Idle the CPU in the lowest state possible. This function is called with
748 * interrupts disabled. Note that once it re-enables interrupts, a task
749 * switch can occur so do not access shared data (i.e. the softc) after
750 * interrupts are re-enabled.
751 */
752 static void
753 acpi_cpu_idle()
754 {
755 struct acpi_cpu_softc *sc;
756 struct acpi_cx *cx_next;
757 uint32_t start_time, end_time;
758 int bm_active, cx_next_idx, i;
759
760 /* If disabled, return immediately. */
761 if (cpu_cx_count == 0) {
762 ACPI_ENABLE_IRQS();
763 return;
764 }
765
766 /*
767 * Look up our CPU id to get our softc. If it's NULL, we'll use C1
768 * since there is no ACPI processor object for this CPU. This occurs
769 * for logical CPUs in the HTT case.
770 */
771 sc = cpu_softc[PCPU_GET(cpuid)];
772 if (sc == NULL) {
773 acpi_cpu_c1();
774 return;
775 }
776
777 /*
778 * If we slept 100 us or more, use the lowest Cx state. Otherwise,
779 * find the lowest state that has a latency less than or equal to
780 * the length of our last sleep.
781 */
782 cx_next_idx = cpu_cx_lowest;
783 if (sc->cpu_prev_sleep < 100) {
784 /*
785 * If we sleep too short all the time, this system may not implement
786 * C2/3 correctly (i.e. reads return immediately). In this case,
787 * back off and use the next higher level.
788 */
789 if (sc->cpu_prev_sleep <= 1) {
790 cpu_short_slp++;
791 if (cpu_short_slp == 1000 && cpu_cx_lowest != 0) {
792 if (cpu_non_c3 == cpu_cx_lowest && cpu_non_c3 != 0)
793 cpu_non_c3--;
794 cpu_cx_lowest--;
795 cpu_short_slp = 0;
796 device_printf(sc->cpu_dev,
797 "too many short sleeps, backing off to C%d\n",
798 cpu_cx_lowest + 1);
799 }
800 } else
801 cpu_short_slp = 0;
802
803 for (i = cpu_cx_lowest; i >= 0; i--)
804 if (sc->cpu_cx_states[i].trans_lat <= sc->cpu_prev_sleep) {
805 cx_next_idx = i;
806 break;
807 }
808 }
809
810 /*
811 * Check for bus master activity. If there was activity, clear
812 * the bit and use the lowest non-C3 state. Note that the USB
813 * driver polling for new devices keeps this bit set all the
814 * time if USB is loaded.
815 */
816 if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) {
817 AcpiGetRegister(ACPI_BITREG_BUS_MASTER_STATUS, &bm_active,
818 ACPI_MTX_DO_NOT_LOCK);
819 if (bm_active != 0) {
820 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_STATUS, 1,
821 ACPI_MTX_DO_NOT_LOCK);
822 cx_next_idx = min(cx_next_idx, cpu_non_c3);
823 }
824 }
825
826 /* Select the next state and update statistics. */
827 cx_next = &sc->cpu_cx_states[cx_next_idx];
828 cpu_cx_stats[cx_next_idx]++;
829 KASSERT(cx_next->type != ACPI_STATE_C0, ("acpi_cpu_idle: C0 sleep"));
830
831 /*
832 * Execute HLT (or equivalent) and wait for an interrupt. We can't
833 * calculate the time spent in C1 since the place we wake up is an
834 * ISR. Assume we slept one quantum and return.
835 */
836 if (cx_next->type == ACPI_STATE_C1) {
837 sc->cpu_prev_sleep = 1000000 / hz;
838 acpi_cpu_c1();
839 return;
840 }
841
842 /*
843 * For C3, disable bus master arbitration and enable bus master wake
844 * if BM control is available, otherwise flush the CPU cache.
845 */
846 if (cx_next->type == ACPI_STATE_C3) {
847 if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) {
848 AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 1, ACPI_MTX_DO_NOT_LOCK);
849 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 1,
850 ACPI_MTX_DO_NOT_LOCK);
851 } else
852 ACPI_FLUSH_CPU_CACHE();
853 }
854
855 /*
856 * Read from P_LVLx to enter C2(+), checking time spent asleep.
857 * Use the ACPI timer for measuring sleep time. Since we need to
858 * get the time very close to the CPU start/stop clock logic, this
859 * is the only reliable time source.
860 */
861 AcpiHwLowLevelRead(32, &start_time, &AcpiGbl_FADT->XPmTmrBlk);
862 CPU_GET_REG(cx_next->p_lvlx, 1);
863
864 /*
865 * Read the end time twice. Since it may take an arbitrary time
866 * to enter the idle state, the first read may be executed before
867 * the processor has stopped. Doing it again provides enough
868 * margin that we are certain to have a correct value.
869 */
870 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT->XPmTmrBlk);
871 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT->XPmTmrBlk);
872
873 /* Enable bus master arbitration and disable bus master wakeup. */
874 if (cx_next->type == ACPI_STATE_C3 &&
875 (cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) {
876 AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 0, ACPI_MTX_DO_NOT_LOCK);
877 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 0, ACPI_MTX_DO_NOT_LOCK);
878 }
879 ACPI_ENABLE_IRQS();
880
881 /* Find the actual time asleep in microseconds, minus overhead. */
882 end_time = acpi_TimerDelta(end_time, start_time);
883 sc->cpu_prev_sleep = PM_USEC(end_time) - cx_next->trans_lat;
884 }
885
886 /*
887 * Re-evaluate the _CST object when we are notified that it changed.
888 *
889 * XXX Re-evaluation disabled until locking is done.
890 */
891 static void
892 acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context)
893 {
894 struct acpi_cpu_softc *sc = (struct acpi_cpu_softc *)context;
895
896 if (notify != ACPI_NOTIFY_CX_STATES)
897 return;
898
899 device_printf(sc->cpu_dev, "Cx states changed\n");
900 /* acpi_cpu_cx_cst(sc); */
901 }
902
903 static int
904 acpi_cpu_quirks(struct acpi_cpu_softc *sc)
905 {
906 device_t acpi_dev;
907
908 /*
909 * C3 on multiple CPUs requires using the expensive flush cache
910 * instruction.
911 */
912 if (mp_ncpus > 1)
913 cpu_quirks |= CPU_QUIRK_NO_BM_CTRL;
914
915 /* Look for various quirks of the PIIX4 part. */
916 acpi_dev = pci_find_device(PCI_VENDOR_INTEL, PCI_DEVICE_82371AB_3);
917 if (acpi_dev != NULL) {
918 switch (pci_get_revid(acpi_dev)) {
919 /*
920 * Disable C3 support for all PIIX4 chipsets. Some of these parts
921 * do not report the BMIDE status to the BM status register and
922 * others have a livelock bug if Type-F DMA is enabled. Linux
923 * works around the BMIDE bug by reading the BM status directly
924 * but we take the simpler approach of disabling C3 for these
925 * parts.
926 *
927 * See erratum #18 ("C3 Power State/BMIDE and Type-F DMA
928 * Livelock") from the January 2002 PIIX4 specification update.
929 * Applies to all PIIX4 models.
930 */
931 case PCI_REVISION_4E:
932 case PCI_REVISION_4M:
933 cpu_quirks |= CPU_QUIRK_NO_C3;
934 break;
935 default:
936 break;
937 }
938 }
939
940 return (0);
941 }
942
943 static int
944 acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS)
945 {
946 struct sbuf sb;
947 char buf[128];
948 int i;
949 uintmax_t fract, sum, whole;
950
951 sum = 0;
952 for (i = 0; i < cpu_cx_count; i++)
953 sum += cpu_cx_stats[i];
954 sbuf_new(&sb, buf, sizeof(buf), SBUF_FIXEDLEN);
955 for (i = 0; i < cpu_cx_count; i++) {
956 if (sum > 0) {
957 whole = (uintmax_t)cpu_cx_stats[i] * 100;
958 fract = (whole % sum) * 100;
959 sbuf_printf(&sb, "%u.%02u%% ", (u_int)(whole / sum),
960 (u_int)(fract / sum));
961 } else
962 sbuf_printf(&sb, "0%% ");
963 }
964 sbuf_trim(&sb);
965 sbuf_finish(&sb);
966 sysctl_handle_string(oidp, sbuf_data(&sb), sbuf_len(&sb), req);
967 sbuf_delete(&sb);
968
969 return (0);
970 }
971
972 static int
973 acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS)
974 {
975 struct acpi_cpu_softc *sc;
976 char state[8];
977 int val, error, i;
978
979 sc = device_get_softc(cpu_devices[0]);
980 snprintf(state, sizeof(state), "C%d", cpu_cx_lowest + 1);
981 error = sysctl_handle_string(oidp, state, sizeof(state), req);
982 if (error != 0 || req->newptr == NULL)
983 return (error);
984 if (strlen(state) < 2 || toupper(state[0]) != 'C')
985 return (EINVAL);
986 val = (int) strtol(state + 1, NULL, 10) - 1;
987 if (val < 0 || val > cpu_cx_count - 1)
988 return (EINVAL);
989
990 ACPI_SERIAL_BEGIN(cpu);
991 cpu_cx_lowest = val;
992
993 /* If not disabling, cache the new lowest non-C3 state. */
994 cpu_non_c3 = 0;
995 for (i = cpu_cx_lowest; i >= 0; i--) {
996 if (sc->cpu_cx_states[i].type < ACPI_STATE_C3) {
997 cpu_non_c3 = i;
998 break;
999 }
1000 }
1001
1002 /* Reset the statistics counters. */
1003 bzero(cpu_cx_stats, sizeof(cpu_cx_stats));
1004 ACPI_SERIAL_END(cpu);
1005
1006 return (0);
1007 }
Cache object: 5dbf4477945a2cf602582e50a0b77f40
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