1 /*-
2 * Copyright (c) 2003-2005 Nate Lawson (SDG)
3 * Copyright (c) 2001 Michael Smith
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
30
31 #include "opt_acpi.h"
32 #include <sys/param.h>
33 #include <sys/bus.h>
34 #include <sys/cpu.h>
35 #include <sys/kernel.h>
36 #include <sys/malloc.h>
37 #include <sys/module.h>
38 #include <sys/pcpu.h>
39 #include <sys/power.h>
40 #include <sys/proc.h>
41 #include <sys/sbuf.h>
42 #include <sys/smp.h>
43
44 #include <dev/pci/pcivar.h>
45 #include <machine/atomic.h>
46 #include <machine/bus.h>
47 #include <sys/rman.h>
48
49 #include <contrib/dev/acpica/acpi.h>
50 #include <dev/acpica/acpivar.h>
51
52 /*
53 * Support for ACPI Processor devices, including C[1-3] sleep states.
54 */
55
56 /* Hooks for the ACPI CA debugging infrastructure */
57 #define _COMPONENT ACPI_PROCESSOR
58 ACPI_MODULE_NAME("PROCESSOR")
59
60 struct acpi_cx {
61 struct resource *p_lvlx; /* Register to read to enter state. */
62 uint32_t type; /* C1-3 (C4 and up treated as C3). */
63 uint32_t trans_lat; /* Transition latency (usec). */
64 uint32_t power; /* Power consumed (mW). */
65 int res_type; /* Resource type for p_lvlx. */
66 };
67 #define MAX_CX_STATES 8
68
69 struct acpi_cpu_softc {
70 device_t cpu_dev;
71 ACPI_HANDLE cpu_handle;
72 struct pcpu *cpu_pcpu;
73 uint32_t cpu_acpi_id; /* ACPI processor id */
74 uint32_t cpu_p_blk; /* ACPI P_BLK location */
75 uint32_t cpu_p_blk_len; /* P_BLK length (must be 6). */
76 struct acpi_cx cpu_cx_states[MAX_CX_STATES];
77 int cpu_cx_count; /* Number of valid Cx states. */
78 int cpu_prev_sleep;/* Last idle sleep duration. */
79 int cpu_features; /* Child driver supported features. */
80 /* Runtime state. */
81 int cpu_non_c3; /* Index of lowest non-C3 state. */
82 int cpu_short_slp; /* Count of < 1us sleeps. */
83 u_int cpu_cx_stats[MAX_CX_STATES];/* Cx usage history. */
84 /* Values for sysctl. */
85 struct sysctl_ctx_list cpu_sysctl_ctx;
86 struct sysctl_oid *cpu_sysctl_tree;
87 int cpu_cx_lowest;
88 char cpu_cx_supported[64];
89 int cpu_rid;
90 };
91
92 struct acpi_cpu_device {
93 struct resource_list ad_rl;
94 };
95
96 #define CPU_GET_REG(reg, width) \
97 (bus_space_read_ ## width(rman_get_bustag((reg)), \
98 rman_get_bushandle((reg)), 0))
99 #define CPU_SET_REG(reg, width, val) \
100 (bus_space_write_ ## width(rman_get_bustag((reg)), \
101 rman_get_bushandle((reg)), 0, (val)))
102
103 #define PM_USEC(x) ((x) >> 2) /* ~4 clocks per usec (3.57955 Mhz) */
104
105 #define ACPI_NOTIFY_CX_STATES 0x81 /* _CST changed. */
106
107 #define CPU_QUIRK_NO_C3 (1<<0) /* C3-type states are not usable. */
108 #define CPU_QUIRK_NO_BM_CTRL (1<<2) /* No bus mastering control. */
109
110 #define PCI_VENDOR_INTEL 0x8086
111 #define PCI_DEVICE_82371AB_3 0x7113 /* PIIX4 chipset for quirks. */
112 #define PCI_REVISION_A_STEP 0
113 #define PCI_REVISION_B_STEP 1
114 #define PCI_REVISION_4E 2
115 #define PCI_REVISION_4M 3
116
117 /* Platform hardware resource information. */
118 static uint32_t cpu_smi_cmd; /* Value to write to SMI_CMD. */
119 static uint8_t cpu_cst_cnt; /* Indicate we are _CST aware. */
120 static int cpu_quirks; /* Indicate any hardware bugs. */
121
122 /* Runtime state. */
123 static int cpu_disable_idle; /* Disable entry to idle function */
124 static int cpu_cx_count; /* Number of valid Cx states */
125
126 /* Values for sysctl. */
127 static struct sysctl_ctx_list cpu_sysctl_ctx;
128 static struct sysctl_oid *cpu_sysctl_tree;
129 static int cpu_cx_generic;
130 static int cpu_cx_lowest;
131
132 static device_t *cpu_devices;
133 static int cpu_ndevices;
134 static struct acpi_cpu_softc **cpu_softc;
135 ACPI_SERIAL_DECL(cpu, "ACPI CPU");
136
137 static int acpi_cpu_probe(device_t dev);
138 static int acpi_cpu_attach(device_t dev);
139 static int acpi_cpu_suspend(device_t dev);
140 static int acpi_cpu_resume(device_t dev);
141 static int acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id,
142 uint32_t *cpu_id);
143 static struct resource_list *acpi_cpu_get_rlist(device_t dev, device_t child);
144 static device_t acpi_cpu_add_child(device_t dev, int order, const char *name,
145 int unit);
146 static int acpi_cpu_read_ivar(device_t dev, device_t child, int index,
147 uintptr_t *result);
148 static int acpi_cpu_shutdown(device_t dev);
149 static void acpi_cpu_cx_probe(struct acpi_cpu_softc *sc);
150 static void acpi_cpu_generic_cx_probe(struct acpi_cpu_softc *sc);
151 static int acpi_cpu_cx_cst(struct acpi_cpu_softc *sc);
152 static void acpi_cpu_startup(void *arg);
153 static void acpi_cpu_startup_cx(struct acpi_cpu_softc *sc);
154 static void acpi_cpu_idle(void);
155 static void acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context);
156 static int acpi_cpu_quirks(void);
157 static int acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS);
158 static int acpi_cpu_set_cx_lowest(struct acpi_cpu_softc *sc, int val);
159 static int acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS);
160 static int acpi_cpu_global_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS);
161
162 static device_method_t acpi_cpu_methods[] = {
163 /* Device interface */
164 DEVMETHOD(device_probe, acpi_cpu_probe),
165 DEVMETHOD(device_attach, acpi_cpu_attach),
166 DEVMETHOD(device_detach, bus_generic_detach),
167 DEVMETHOD(device_shutdown, acpi_cpu_shutdown),
168 DEVMETHOD(device_suspend, acpi_cpu_suspend),
169 DEVMETHOD(device_resume, acpi_cpu_resume),
170
171 /* Bus interface */
172 DEVMETHOD(bus_add_child, acpi_cpu_add_child),
173 DEVMETHOD(bus_read_ivar, acpi_cpu_read_ivar),
174 DEVMETHOD(bus_get_resource_list, acpi_cpu_get_rlist),
175 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource),
176 DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource),
177 DEVMETHOD(bus_alloc_resource, bus_generic_rl_alloc_resource),
178 DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource),
179 DEVMETHOD(bus_driver_added, bus_generic_driver_added),
180 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
181 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
182 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
183 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
184
185 {0, 0}
186 };
187
188 static driver_t acpi_cpu_driver = {
189 "cpu",
190 acpi_cpu_methods,
191 sizeof(struct acpi_cpu_softc),
192 };
193
194 static devclass_t acpi_cpu_devclass;
195 DRIVER_MODULE(cpu, acpi, acpi_cpu_driver, acpi_cpu_devclass, 0, 0);
196 MODULE_DEPEND(cpu, acpi, 1, 1, 1);
197
198 static int
199 acpi_cpu_probe(device_t dev)
200 {
201 int acpi_id, cpu_id;
202 ACPI_BUFFER buf;
203 ACPI_HANDLE handle;
204 ACPI_OBJECT *obj;
205 ACPI_STATUS status;
206
207 if (acpi_disabled("cpu") || acpi_get_type(dev) != ACPI_TYPE_PROCESSOR)
208 return (ENXIO);
209
210 handle = acpi_get_handle(dev);
211 if (cpu_softc == NULL)
212 cpu_softc = malloc(sizeof(struct acpi_cpu_softc *) *
213 (mp_maxid + 1), M_TEMP /* XXX */, M_WAITOK | M_ZERO);
214
215 /* Get our Processor object. */
216 buf.Pointer = NULL;
217 buf.Length = ACPI_ALLOCATE_BUFFER;
218 status = AcpiEvaluateObject(handle, NULL, NULL, &buf);
219 if (ACPI_FAILURE(status)) {
220 device_printf(dev, "probe failed to get Processor obj - %s\n",
221 AcpiFormatException(status));
222 return (ENXIO);
223 }
224 obj = (ACPI_OBJECT *)buf.Pointer;
225 if (obj->Type != ACPI_TYPE_PROCESSOR) {
226 device_printf(dev, "Processor object has bad type %d\n", obj->Type);
227 AcpiOsFree(obj);
228 return (ENXIO);
229 }
230
231 /*
232 * Find the processor associated with our unit. We could use the
233 * ProcId as a key, however, some boxes do not have the same values
234 * in their Processor object as the ProcId values in the MADT.
235 */
236 acpi_id = obj->Processor.ProcId;
237 AcpiOsFree(obj);
238 if (acpi_pcpu_get_id(device_get_unit(dev), &acpi_id, &cpu_id) != 0)
239 return (ENXIO);
240
241 /*
242 * Check if we already probed this processor. We scan the bus twice
243 * so it's possible we've already seen this one.
244 */
245 if (cpu_softc[cpu_id] != NULL)
246 return (ENXIO);
247
248 /* Mark this processor as in-use and save our derived id for attach. */
249 cpu_softc[cpu_id] = (void *)1;
250 acpi_set_magic(dev, cpu_id);
251 device_set_desc(dev, "ACPI CPU");
252
253 return (0);
254 }
255
256 static int
257 acpi_cpu_attach(device_t dev)
258 {
259 ACPI_BUFFER buf;
260 ACPI_OBJECT arg[4], *obj;
261 ACPI_OBJECT_LIST arglist;
262 struct pcpu *pcpu_data;
263 struct acpi_cpu_softc *sc;
264 struct acpi_softc *acpi_sc;
265 ACPI_STATUS status;
266 u_int features;
267 int cpu_id, drv_count, i;
268 driver_t **drivers;
269 uint32_t cap_set[3];
270
271 /* UUID needed by _OSC evaluation */
272 static uint8_t cpu_oscuuid[16] = { 0x16, 0xA6, 0x77, 0x40, 0x0C, 0x29,
273 0xBE, 0x47, 0x9E, 0xBD, 0xD8, 0x70,
274 0x58, 0x71, 0x39, 0x53 };
275
276 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
277
278 sc = device_get_softc(dev);
279 sc->cpu_dev = dev;
280 sc->cpu_handle = acpi_get_handle(dev);
281 cpu_id = acpi_get_magic(dev);
282 cpu_softc[cpu_id] = sc;
283 pcpu_data = pcpu_find(cpu_id);
284 pcpu_data->pc_device = dev;
285 sc->cpu_pcpu = pcpu_data;
286 cpu_smi_cmd = AcpiGbl_FADT.SmiCommand;
287 cpu_cst_cnt = AcpiGbl_FADT.CstControl;
288
289 buf.Pointer = NULL;
290 buf.Length = ACPI_ALLOCATE_BUFFER;
291 status = AcpiEvaluateObject(sc->cpu_handle, NULL, NULL, &buf);
292 if (ACPI_FAILURE(status)) {
293 device_printf(dev, "attach failed to get Processor obj - %s\n",
294 AcpiFormatException(status));
295 return (ENXIO);
296 }
297 obj = (ACPI_OBJECT *)buf.Pointer;
298 sc->cpu_p_blk = obj->Processor.PblkAddress;
299 sc->cpu_p_blk_len = obj->Processor.PblkLength;
300 sc->cpu_acpi_id = obj->Processor.ProcId;
301 AcpiOsFree(obj);
302 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_BLK at %#x/%d\n",
303 device_get_unit(dev), sc->cpu_p_blk, sc->cpu_p_blk_len));
304
305 /*
306 * If this is the first cpu we attach, create and initialize the generic
307 * resources that will be used by all acpi cpu devices.
308 */
309 if (device_get_unit(dev) == 0) {
310 /* Assume we won't be using generic Cx mode by default */
311 cpu_cx_generic = FALSE;
312
313 /* Install hw.acpi.cpu sysctl tree */
314 acpi_sc = acpi_device_get_parent_softc(dev);
315 sysctl_ctx_init(&cpu_sysctl_ctx);
316 cpu_sysctl_tree = SYSCTL_ADD_NODE(&cpu_sysctl_ctx,
317 SYSCTL_CHILDREN(acpi_sc->acpi_sysctl_tree), OID_AUTO, "cpu",
318 CTLFLAG_RD, 0, "node for CPU children");
319
320 /* Queue post cpu-probing task handler */
321 AcpiOsExecute(OSL_NOTIFY_HANDLER, acpi_cpu_startup, NULL);
322 }
323
324 /*
325 * Before calling any CPU methods, collect child driver feature hints
326 * and notify ACPI of them. We support unified SMP power control
327 * so advertise this ourselves. Note this is not the same as independent
328 * SMP control where each CPU can have different settings.
329 */
330 sc->cpu_features = ACPI_CAP_SMP_SAME | ACPI_CAP_SMP_SAME_C3;
331 if (devclass_get_drivers(acpi_cpu_devclass, &drivers, &drv_count) == 0) {
332 for (i = 0; i < drv_count; i++) {
333 if (ACPI_GET_FEATURES(drivers[i], &features) == 0)
334 sc->cpu_features |= features;
335 }
336 free(drivers, M_TEMP);
337 }
338
339 /*
340 * CPU capabilities are specified as a buffer of 32-bit integers:
341 * revision, count, and one or more capabilities. The revision of
342 * "1" is not specified anywhere but seems to match Linux.
343 */
344 if (sc->cpu_features) {
345 arglist.Pointer = arg;
346 arglist.Count = 1;
347 arg[0].Type = ACPI_TYPE_BUFFER;
348 arg[0].Buffer.Length = sizeof(cap_set);
349 arg[0].Buffer.Pointer = (uint8_t *)cap_set;
350 cap_set[0] = 1; /* revision */
351 cap_set[1] = 1; /* number of capabilities integers */
352 cap_set[2] = sc->cpu_features;
353 AcpiEvaluateObject(sc->cpu_handle, "_PDC", &arglist, NULL);
354
355 /*
356 * On some systems we need to evaluate _OSC so that the ASL
357 * loads the _PSS and/or _PDC methods at runtime.
358 *
359 * TODO: evaluate failure of _OSC.
360 */
361 arglist.Pointer = arg;
362 arglist.Count = 4;
363 arg[0].Type = ACPI_TYPE_BUFFER;
364 arg[0].Buffer.Length = sizeof(cpu_oscuuid);
365 arg[0].Buffer.Pointer = cpu_oscuuid; /* UUID */
366 arg[1].Type = ACPI_TYPE_INTEGER;
367 arg[1].Integer.Value = 1; /* revision */
368 arg[2].Type = ACPI_TYPE_INTEGER;
369 arg[2].Integer.Value = 1; /* count */
370 arg[3].Type = ACPI_TYPE_BUFFER;
371 arg[3].Buffer.Length = sizeof(cap_set); /* Capabilities buffer */
372 arg[3].Buffer.Pointer = (uint8_t *)cap_set;
373 cap_set[0] = 0;
374 AcpiEvaluateObject(sc->cpu_handle, "_OSC", &arglist, NULL);
375 }
376
377 /* Probe for Cx state support. */
378 acpi_cpu_cx_probe(sc);
379
380 /* Finally, call identify and probe/attach for child devices. */
381 bus_generic_probe(dev);
382 bus_generic_attach(dev);
383
384 return (0);
385 }
386
387 /*
388 * Disable any entry to the idle function during suspend and re-enable it
389 * during resume.
390 */
391 static int
392 acpi_cpu_suspend(device_t dev)
393 {
394 int error;
395
396 error = bus_generic_suspend(dev);
397 if (error)
398 return (error);
399 cpu_disable_idle = TRUE;
400 return (0);
401 }
402
403 static int
404 acpi_cpu_resume(device_t dev)
405 {
406
407 cpu_disable_idle = FALSE;
408 return (bus_generic_resume(dev));
409 }
410
411 /*
412 * Find the nth present CPU and return its pc_cpuid as well as set the
413 * pc_acpi_id from the most reliable source.
414 */
415 static int
416 acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id, uint32_t *cpu_id)
417 {
418 struct pcpu *pcpu_data;
419 uint32_t i;
420
421 KASSERT(acpi_id != NULL, ("Null acpi_id"));
422 KASSERT(cpu_id != NULL, ("Null cpu_id"));
423 for (i = 0; i <= mp_maxid; i++) {
424 if (CPU_ABSENT(i))
425 continue;
426 pcpu_data = pcpu_find(i);
427 KASSERT(pcpu_data != NULL, ("no pcpu data for %d", i));
428 if (idx-- == 0) {
429 /*
430 * If pc_acpi_id was not initialized (e.g., a non-APIC UP box)
431 * override it with the value from the ASL. Otherwise, if the
432 * two don't match, prefer the MADT-derived value. Finally,
433 * return the pc_cpuid to reference this processor.
434 */
435 if (pcpu_data->pc_acpi_id == 0xffffffff)
436 pcpu_data->pc_acpi_id = *acpi_id;
437 else if (pcpu_data->pc_acpi_id != *acpi_id)
438 *acpi_id = pcpu_data->pc_acpi_id;
439 *cpu_id = pcpu_data->pc_cpuid;
440 return (0);
441 }
442 }
443
444 return (ESRCH);
445 }
446
447 static struct resource_list *
448 acpi_cpu_get_rlist(device_t dev, device_t child)
449 {
450 struct acpi_cpu_device *ad;
451
452 ad = device_get_ivars(child);
453 if (ad == NULL)
454 return (NULL);
455 return (&ad->ad_rl);
456 }
457
458 static device_t
459 acpi_cpu_add_child(device_t dev, int order, const char *name, int unit)
460 {
461 struct acpi_cpu_device *ad;
462 device_t child;
463
464 if ((ad = malloc(sizeof(*ad), M_TEMP, M_NOWAIT | M_ZERO)) == NULL)
465 return (NULL);
466
467 resource_list_init(&ad->ad_rl);
468
469 child = device_add_child_ordered(dev, order, name, unit);
470 if (child != NULL)
471 device_set_ivars(child, ad);
472 else
473 free(ad, M_TEMP);
474 return (child);
475 }
476
477 static int
478 acpi_cpu_read_ivar(device_t dev, device_t child, int index, uintptr_t *result)
479 {
480 struct acpi_cpu_softc *sc;
481
482 sc = device_get_softc(dev);
483 switch (index) {
484 case ACPI_IVAR_HANDLE:
485 *result = (uintptr_t)sc->cpu_handle;
486 break;
487 case CPU_IVAR_PCPU:
488 *result = (uintptr_t)sc->cpu_pcpu;
489 break;
490 default:
491 return (ENOENT);
492 }
493 return (0);
494 }
495
496 static int
497 acpi_cpu_shutdown(device_t dev)
498 {
499 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
500
501 /* Allow children to shutdown first. */
502 bus_generic_shutdown(dev);
503
504 /*
505 * Disable any entry to the idle function. There is a small race where
506 * an idle thread have passed this check but not gone to sleep. This
507 * is ok since device_shutdown() does not free the softc, otherwise
508 * we'd have to be sure all threads were evicted before returning.
509 */
510 cpu_disable_idle = TRUE;
511
512 return_VALUE (0);
513 }
514
515 static void
516 acpi_cpu_cx_probe(struct acpi_cpu_softc *sc)
517 {
518 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
519
520 /* Use initial sleep value of 1 sec. to start with lowest idle state. */
521 sc->cpu_prev_sleep = 1000000;
522 sc->cpu_cx_lowest = 0;
523
524 /*
525 * Check for the ACPI 2.0 _CST sleep states object. If we can't find
526 * any, we'll revert to generic FADT/P_BLK Cx control method which will
527 * be handled by acpi_cpu_startup. We need to defer to after having
528 * probed all the cpus in the system before probing for generic Cx
529 * states as we may already have found cpus with valid _CST packages
530 */
531 if (!cpu_cx_generic && acpi_cpu_cx_cst(sc) != 0) {
532 /*
533 * We were unable to find a _CST package for this cpu or there
534 * was an error parsing it. Switch back to generic mode.
535 */
536 cpu_cx_generic = TRUE;
537 if (bootverbose)
538 device_printf(sc->cpu_dev, "switching to generic Cx mode\n");
539 }
540
541 /*
542 * TODO: _CSD Package should be checked here.
543 */
544 }
545
546 static void
547 acpi_cpu_generic_cx_probe(struct acpi_cpu_softc *sc)
548 {
549 ACPI_GENERIC_ADDRESS gas;
550 struct acpi_cx *cx_ptr;
551
552 sc->cpu_cx_count = 0;
553 cx_ptr = sc->cpu_cx_states;
554
555 /* Use initial sleep value of 1 sec. to start with lowest idle state. */
556 sc->cpu_prev_sleep = 1000000;
557
558 /* C1 has been required since just after ACPI 1.0 */
559 cx_ptr->type = ACPI_STATE_C1;
560 cx_ptr->trans_lat = 0;
561 cx_ptr++;
562 sc->cpu_cx_count++;
563
564 /*
565 * The spec says P_BLK must be 6 bytes long. However, some systems
566 * use it to indicate a fractional set of features present so we
567 * take 5 as C2. Some may also have a value of 7 to indicate
568 * another C3 but most use _CST for this (as required) and having
569 * "only" C1-C3 is not a hardship.
570 */
571 if (sc->cpu_p_blk_len < 5)
572 return;
573
574 /* Validate and allocate resources for C2 (P_LVL2). */
575 gas.SpaceId = ACPI_ADR_SPACE_SYSTEM_IO;
576 gas.BitWidth = 8;
577 if (AcpiGbl_FADT.C2Latency <= 100) {
578 gas.Address = sc->cpu_p_blk + 4;
579 acpi_bus_alloc_gas(sc->cpu_dev, &cx_ptr->res_type, &sc->cpu_rid,
580 &gas, &cx_ptr->p_lvlx, RF_SHAREABLE);
581 if (cx_ptr->p_lvlx != NULL) {
582 sc->cpu_rid++;
583 cx_ptr->type = ACPI_STATE_C2;
584 cx_ptr->trans_lat = AcpiGbl_FADT.C2Latency;
585 cx_ptr++;
586 sc->cpu_cx_count++;
587 }
588 }
589 if (sc->cpu_p_blk_len < 6)
590 return;
591
592 /* Validate and allocate resources for C3 (P_LVL3). */
593 if (AcpiGbl_FADT.C3Latency <= 1000) {
594 gas.Address = sc->cpu_p_blk + 5;
595 acpi_bus_alloc_gas(sc->cpu_dev, &cx_ptr->res_type, &sc->cpu_rid, &gas,
596 &cx_ptr->p_lvlx, RF_SHAREABLE);
597 if (cx_ptr->p_lvlx != NULL) {
598 sc->cpu_rid++;
599 cx_ptr->type = ACPI_STATE_C3;
600 cx_ptr->trans_lat = AcpiGbl_FADT.C3Latency;
601 cx_ptr++;
602 sc->cpu_cx_count++;
603 }
604 }
605
606 /* Update the largest cx_count seen so far */
607 if (sc->cpu_cx_count > cpu_cx_count)
608 cpu_cx_count = sc->cpu_cx_count;
609 }
610
611 /*
612 * Parse a _CST package and set up its Cx states. Since the _CST object
613 * can change dynamically, our notify handler may call this function
614 * to clean up and probe the new _CST package.
615 */
616 static int
617 acpi_cpu_cx_cst(struct acpi_cpu_softc *sc)
618 {
619 struct acpi_cx *cx_ptr;
620 ACPI_STATUS status;
621 ACPI_BUFFER buf;
622 ACPI_OBJECT *top;
623 ACPI_OBJECT *pkg;
624 uint32_t count;
625 int i;
626
627 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
628
629 buf.Pointer = NULL;
630 buf.Length = ACPI_ALLOCATE_BUFFER;
631 status = AcpiEvaluateObject(sc->cpu_handle, "_CST", NULL, &buf);
632 if (ACPI_FAILURE(status))
633 return (ENXIO);
634
635 /* _CST is a package with a count and at least one Cx package. */
636 top = (ACPI_OBJECT *)buf.Pointer;
637 if (!ACPI_PKG_VALID(top, 2) || acpi_PkgInt32(top, 0, &count) != 0) {
638 device_printf(sc->cpu_dev, "invalid _CST package\n");
639 AcpiOsFree(buf.Pointer);
640 return (ENXIO);
641 }
642 if (count != top->Package.Count - 1) {
643 device_printf(sc->cpu_dev, "invalid _CST state count (%d != %d)\n",
644 count, top->Package.Count - 1);
645 count = top->Package.Count - 1;
646 }
647 if (count > MAX_CX_STATES) {
648 device_printf(sc->cpu_dev, "_CST has too many states (%d)\n", count);
649 count = MAX_CX_STATES;
650 }
651
652 /* Set up all valid states. */
653 sc->cpu_cx_count = 0;
654 cx_ptr = sc->cpu_cx_states;
655 for (i = 0; i < count; i++) {
656 pkg = &top->Package.Elements[i + 1];
657 if (!ACPI_PKG_VALID(pkg, 4) ||
658 acpi_PkgInt32(pkg, 1, &cx_ptr->type) != 0 ||
659 acpi_PkgInt32(pkg, 2, &cx_ptr->trans_lat) != 0 ||
660 acpi_PkgInt32(pkg, 3, &cx_ptr->power) != 0) {
661
662 device_printf(sc->cpu_dev, "skipping invalid Cx state package\n");
663 continue;
664 }
665
666 /* Validate the state to see if we should use it. */
667 switch (cx_ptr->type) {
668 case ACPI_STATE_C1:
669 sc->cpu_non_c3 = i;
670 cx_ptr++;
671 sc->cpu_cx_count++;
672 continue;
673 case ACPI_STATE_C2:
674 if (cx_ptr->trans_lat > 100) {
675 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
676 "acpi_cpu%d: C2[%d] not available.\n",
677 device_get_unit(sc->cpu_dev), i));
678 continue;
679 }
680 sc->cpu_non_c3 = i;
681 break;
682 case ACPI_STATE_C3:
683 default:
684 if (cx_ptr->trans_lat > 1000 ||
685 (cpu_quirks & CPU_QUIRK_NO_C3) != 0) {
686
687 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
688 "acpi_cpu%d: C3[%d] not available.\n",
689 device_get_unit(sc->cpu_dev), i));
690 continue;
691 }
692 break;
693 }
694
695 #ifdef notyet
696 /* Free up any previous register. */
697 if (cx_ptr->p_lvlx != NULL) {
698 bus_release_resource(sc->cpu_dev, 0, 0, cx_ptr->p_lvlx);
699 cx_ptr->p_lvlx = NULL;
700 }
701 #endif
702
703 /* Allocate the control register for C2 or C3. */
704 acpi_PkgGas(sc->cpu_dev, pkg, 0, &cx_ptr->res_type, &sc->cpu_rid,
705 &cx_ptr->p_lvlx, RF_SHAREABLE);
706 if (cx_ptr->p_lvlx) {
707 sc->cpu_rid++;
708 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
709 "acpi_cpu%d: Got C%d - %d latency\n",
710 device_get_unit(sc->cpu_dev), cx_ptr->type,
711 cx_ptr->trans_lat));
712 cx_ptr++;
713 sc->cpu_cx_count++;
714 }
715 }
716 AcpiOsFree(buf.Pointer);
717
718 return (0);
719 }
720
721 /*
722 * Call this *after* all CPUs have been attached.
723 */
724 static void
725 acpi_cpu_startup(void *arg)
726 {
727 struct acpi_cpu_softc *sc;
728 int i;
729
730 /* Get set of CPU devices */
731 devclass_get_devices(acpi_cpu_devclass, &cpu_devices, &cpu_ndevices);
732
733 /*
734 * Setup any quirks that might necessary now that we have probed
735 * all the CPUs
736 */
737 acpi_cpu_quirks();
738
739 cpu_cx_count = 0;
740 if (cpu_cx_generic) {
741 /*
742 * We are using generic Cx mode, probe for available Cx states
743 * for all processors.
744 */
745 for (i = 0; i < cpu_ndevices; i++) {
746 sc = device_get_softc(cpu_devices[i]);
747 acpi_cpu_generic_cx_probe(sc);
748 }
749
750 /*
751 * Find the highest Cx state common to all CPUs
752 * in the system, taking quirks into account.
753 */
754 for (i = 0; i < cpu_ndevices; i++) {
755 sc = device_get_softc(cpu_devices[i]);
756 if (sc->cpu_cx_count < cpu_cx_count)
757 cpu_cx_count = sc->cpu_cx_count;
758 }
759 } else {
760 /*
761 * We are using _CST mode, remove C3 state if necessary.
762 * Update the largest Cx state supported in the global cpu_cx_count.
763 * It will be used in the global Cx sysctl handler.
764 * As we now know for sure that we will be using _CST mode
765 * install our notify handler.
766 */
767 for (i = 0; i < cpu_ndevices; i++) {
768 sc = device_get_softc(cpu_devices[i]);
769 if (cpu_quirks && CPU_QUIRK_NO_C3) {
770 sc->cpu_cx_count = sc->cpu_non_c3 + 1;
771 }
772 if (sc->cpu_cx_count > cpu_cx_count)
773 cpu_cx_count = sc->cpu_cx_count;
774 AcpiInstallNotifyHandler(sc->cpu_handle, ACPI_DEVICE_NOTIFY,
775 acpi_cpu_notify, sc);
776 }
777 }
778
779 /* Perform Cx final initialization. */
780 for (i = 0; i < cpu_ndevices; i++) {
781 sc = device_get_softc(cpu_devices[i]);
782 acpi_cpu_startup_cx(sc);
783 }
784
785 /* Add a sysctl handler to handle global Cx lowest setting */
786 SYSCTL_ADD_PROC(&cpu_sysctl_ctx, SYSCTL_CHILDREN(cpu_sysctl_tree),
787 OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW,
788 NULL, 0, acpi_cpu_global_cx_lowest_sysctl, "A",
789 "Global lowest Cx sleep state to use");
790
791 /* Take over idling from cpu_idle_default(). */
792 cpu_cx_lowest = 0;
793 cpu_disable_idle = FALSE;
794 cpu_idle_hook = acpi_cpu_idle;
795 }
796
797 static void
798 acpi_cpu_startup_cx(struct acpi_cpu_softc *sc)
799 {
800 struct sbuf sb;
801 int i;
802
803 /*
804 * Set up the list of Cx states
805 */
806 sc->cpu_non_c3 = 0;
807 sbuf_new(&sb, sc->cpu_cx_supported, sizeof(sc->cpu_cx_supported),
808 SBUF_FIXEDLEN);
809 for (i = 0; i < sc->cpu_cx_count; i++) {
810 sbuf_printf(&sb, "C%d/%d ", i + 1, sc->cpu_cx_states[i].trans_lat);
811 if (sc->cpu_cx_states[i].type < ACPI_STATE_C3)
812 sc->cpu_non_c3 = i;
813 }
814 sbuf_trim(&sb);
815 sbuf_finish(&sb);
816
817 SYSCTL_ADD_STRING(&sc->cpu_sysctl_ctx,
818 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->cpu_dev)),
819 OID_AUTO, "cx_supported", CTLFLAG_RD,
820 sc->cpu_cx_supported, 0,
821 "Cx/microsecond values for supported Cx states");
822 SYSCTL_ADD_PROC(&sc->cpu_sysctl_ctx,
823 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->cpu_dev)),
824 OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW,
825 (void *)sc, 0, acpi_cpu_cx_lowest_sysctl, "A",
826 "lowest Cx sleep state to use");
827 SYSCTL_ADD_PROC(&sc->cpu_sysctl_ctx,
828 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->cpu_dev)),
829 OID_AUTO, "cx_usage", CTLTYPE_STRING | CTLFLAG_RD,
830 (void *)sc, 0, acpi_cpu_usage_sysctl, "A",
831 "percent usage for each Cx state");
832
833 #ifdef notyet
834 /* Signal platform that we can handle _CST notification. */
835 if (!cpu_cx_generic && cpu_cst_cnt != 0) {
836 ACPI_LOCK(acpi);
837 AcpiOsWritePort(cpu_smi_cmd, cpu_cst_cnt, 8);
838 ACPI_UNLOCK(acpi);
839 }
840 #endif
841 }
842
843 /*
844 * Idle the CPU in the lowest state possible. This function is called with
845 * interrupts disabled. Note that once it re-enables interrupts, a task
846 * switch can occur so do not access shared data (i.e. the softc) after
847 * interrupts are re-enabled.
848 */
849 static void
850 acpi_cpu_idle()
851 {
852 struct acpi_cpu_softc *sc;
853 struct acpi_cx *cx_next;
854 uint32_t start_time, end_time;
855 int bm_active, cx_next_idx, i;
856
857 /* If disabled, return immediately. */
858 if (cpu_disable_idle) {
859 ACPI_ENABLE_IRQS();
860 return;
861 }
862
863 /*
864 * Look up our CPU id to get our softc. If it's NULL, we'll use C1
865 * since there is no ACPI processor object for this CPU. This occurs
866 * for logical CPUs in the HTT case.
867 */
868 sc = cpu_softc[PCPU_GET(cpuid)];
869 if (sc == NULL) {
870 acpi_cpu_c1();
871 return;
872 }
873
874 /*
875 * If we slept 100 us or more, use the lowest Cx state. Otherwise,
876 * find the lowest state that has a latency less than or equal to
877 * the length of our last sleep.
878 */
879 cx_next_idx = sc->cpu_cx_lowest;
880 if (sc->cpu_prev_sleep < 100) {
881 /*
882 * If we sleep too short all the time, this system may not implement
883 * C2/3 correctly (i.e. reads return immediately). In this case,
884 * back off and use the next higher level.
885 * It seems that when you have a dual core cpu (like the Intel Core Duo)
886 * that both cores will get out of C3 state as soon as one of them
887 * requires it. This breaks the sleep detection logic as the sleep
888 * counter is local to each cpu. Disable the sleep logic for now as a
889 * workaround if there's more than one CPU. The right fix would probably
890 * be to add quirks for system that don't really support C3 state.
891 */
892 if (mp_ncpus < 2 && sc->cpu_prev_sleep <= 1) {
893 sc->cpu_short_slp++;
894 if (sc->cpu_short_slp == 1000 && sc->cpu_cx_lowest != 0) {
895 if (sc->cpu_non_c3 == sc->cpu_cx_lowest && sc->cpu_non_c3 != 0)
896 sc->cpu_non_c3--;
897 sc->cpu_cx_lowest--;
898 sc->cpu_short_slp = 0;
899 device_printf(sc->cpu_dev,
900 "too many short sleeps, backing off to C%d\n",
901 sc->cpu_cx_lowest + 1);
902 }
903 } else
904 sc->cpu_short_slp = 0;
905
906 for (i = sc->cpu_cx_lowest; i >= 0; i--)
907 if (sc->cpu_cx_states[i].trans_lat <= sc->cpu_prev_sleep) {
908 cx_next_idx = i;
909 break;
910 }
911 }
912
913 /*
914 * Check for bus master activity. If there was activity, clear
915 * the bit and use the lowest non-C3 state. Note that the USB
916 * driver polling for new devices keeps this bit set all the
917 * time if USB is loaded.
918 */
919 if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) {
920 AcpiGetRegister(ACPI_BITREG_BUS_MASTER_STATUS, &bm_active);
921 if (bm_active != 0) {
922 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_STATUS, 1);
923 cx_next_idx = min(cx_next_idx, sc->cpu_non_c3);
924 }
925 }
926
927 /* Select the next state and update statistics. */
928 cx_next = &sc->cpu_cx_states[cx_next_idx];
929 sc->cpu_cx_stats[cx_next_idx]++;
930 KASSERT(cx_next->type != ACPI_STATE_C0, ("acpi_cpu_idle: C0 sleep"));
931
932 /*
933 * Execute HLT (or equivalent) and wait for an interrupt. We can't
934 * calculate the time spent in C1 since the place we wake up is an
935 * ISR. Assume we slept one quantum and return.
936 */
937 if (cx_next->type == ACPI_STATE_C1) {
938 sc->cpu_prev_sleep = 1000000 / hz;
939 acpi_cpu_c1();
940 return;
941 }
942
943 /*
944 * For C3, disable bus master arbitration and enable bus master wake
945 * if BM control is available, otherwise flush the CPU cache.
946 */
947 if (cx_next->type == ACPI_STATE_C3) {
948 if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) {
949 AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 1);
950 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 1);
951 } else
952 ACPI_FLUSH_CPU_CACHE();
953 }
954
955 /*
956 * Read from P_LVLx to enter C2(+), checking time spent asleep.
957 * Use the ACPI timer for measuring sleep time. Since we need to
958 * get the time very close to the CPU start/stop clock logic, this
959 * is the only reliable time source.
960 */
961 AcpiHwLowLevelRead(32, &start_time, &AcpiGbl_FADT.XPmTimerBlock);
962 CPU_GET_REG(cx_next->p_lvlx, 1);
963
964 /*
965 * Read the end time twice. Since it may take an arbitrary time
966 * to enter the idle state, the first read may be executed before
967 * the processor has stopped. Doing it again provides enough
968 * margin that we are certain to have a correct value.
969 */
970 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT.XPmTimerBlock);
971 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT.XPmTimerBlock);
972
973 /* Enable bus master arbitration and disable bus master wakeup. */
974 if (cx_next->type == ACPI_STATE_C3 &&
975 (cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) {
976 AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 0);
977 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 0);
978 }
979 ACPI_ENABLE_IRQS();
980
981 /* Find the actual time asleep in microseconds, minus overhead. */
982 end_time = acpi_TimerDelta(end_time, start_time);
983 sc->cpu_prev_sleep = PM_USEC(end_time) - cx_next->trans_lat;
984 }
985
986 /*
987 * Re-evaluate the _CST object when we are notified that it changed.
988 *
989 * XXX Re-evaluation disabled until locking is done.
990 */
991 static void
992 acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context)
993 {
994 struct acpi_cpu_softc *sc = (struct acpi_cpu_softc *)context;
995
996 if (notify != ACPI_NOTIFY_CX_STATES)
997 return;
998
999 device_printf(sc->cpu_dev, "Cx states changed\n");
1000 /* acpi_cpu_cx_cst(sc); */
1001 }
1002
1003 static int
1004 acpi_cpu_quirks(void)
1005 {
1006 device_t acpi_dev;
1007
1008 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
1009
1010 /*
1011 * Bus mastering arbitration control is needed to keep caches coherent
1012 * while sleeping in C3. If it's not present but a working flush cache
1013 * instruction is present, flush the caches before entering C3 instead.
1014 * Otherwise, just disable C3 completely.
1015 */
1016 if (AcpiGbl_FADT.Pm2ControlBlock == 0 ||
1017 AcpiGbl_FADT.Pm2ControlLength == 0) {
1018 if ((AcpiGbl_FADT.Flags & ACPI_FADT_WBINVD) &&
1019 (AcpiGbl_FADT.Flags & ACPI_FADT_WBINVD_FLUSH) == 0) {
1020 cpu_quirks |= CPU_QUIRK_NO_BM_CTRL;
1021 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1022 "acpi_cpu: no BM control, using flush cache method\n"));
1023 } else {
1024 cpu_quirks |= CPU_QUIRK_NO_C3;
1025 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1026 "acpi_cpu: no BM control, C3 not available\n"));
1027 }
1028 }
1029
1030 /*
1031 * If we are using generic Cx mode, C3 on multiple CPUs requires using
1032 * the expensive flush cache instruction.
1033 */
1034 if (cpu_cx_generic && mp_ncpus > 1) {
1035 cpu_quirks |= CPU_QUIRK_NO_BM_CTRL;
1036 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1037 "acpi_cpu: SMP, using flush cache mode for C3\n"));
1038 }
1039
1040 /* Look for various quirks of the PIIX4 part. */
1041 acpi_dev = pci_find_device(PCI_VENDOR_INTEL, PCI_DEVICE_82371AB_3);
1042 if (acpi_dev != NULL) {
1043 switch (pci_get_revid(acpi_dev)) {
1044 /*
1045 * Disable C3 support for all PIIX4 chipsets. Some of these parts
1046 * do not report the BMIDE status to the BM status register and
1047 * others have a livelock bug if Type-F DMA is enabled. Linux
1048 * works around the BMIDE bug by reading the BM status directly
1049 * but we take the simpler approach of disabling C3 for these
1050 * parts.
1051 *
1052 * See erratum #18 ("C3 Power State/BMIDE and Type-F DMA
1053 * Livelock") from the January 2002 PIIX4 specification update.
1054 * Applies to all PIIX4 models.
1055 */
1056 case PCI_REVISION_4E:
1057 case PCI_REVISION_4M:
1058 cpu_quirks |= CPU_QUIRK_NO_C3;
1059 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1060 "acpi_cpu: working around PIIX4 bug, disabling C3\n"));
1061 break;
1062 default:
1063 break;
1064 }
1065 }
1066
1067 return (0);
1068 }
1069
1070 static int
1071 acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS)
1072 {
1073 struct acpi_cpu_softc *sc;
1074 struct sbuf sb;
1075 char buf[128];
1076 int i;
1077 uintmax_t fract, sum, whole;
1078
1079 sc = (struct acpi_cpu_softc *) arg1;
1080 sum = 0;
1081 for (i = 0; i < sc->cpu_cx_count; i++)
1082 sum += sc->cpu_cx_stats[i];
1083 sbuf_new(&sb, buf, sizeof(buf), SBUF_FIXEDLEN);
1084 for (i = 0; i < sc->cpu_cx_count; i++) {
1085 if (sum > 0) {
1086 whole = (uintmax_t)sc->cpu_cx_stats[i] * 100;
1087 fract = (whole % sum) * 100;
1088 sbuf_printf(&sb, "%u.%02u%% ", (u_int)(whole / sum),
1089 (u_int)(fract / sum));
1090 } else
1091 sbuf_printf(&sb, "0%% ");
1092 }
1093 sbuf_trim(&sb);
1094 sbuf_finish(&sb);
1095 sysctl_handle_string(oidp, sbuf_data(&sb), sbuf_len(&sb), req);
1096 sbuf_delete(&sb);
1097
1098 return (0);
1099 }
1100
1101 static int
1102 acpi_cpu_set_cx_lowest(struct acpi_cpu_softc *sc, int val)
1103 {
1104 int i;
1105
1106 ACPI_SERIAL_ASSERT(cpu);
1107 sc->cpu_cx_lowest = val;
1108
1109 /* If not disabling, cache the new lowest non-C3 state. */
1110 sc->cpu_non_c3 = 0;
1111 for (i = sc->cpu_cx_lowest; i >= 0; i--) {
1112 if (sc->cpu_cx_states[i].type < ACPI_STATE_C3) {
1113 sc->cpu_non_c3 = i;
1114 break;
1115 }
1116 }
1117
1118 /* Reset the statistics counters. */
1119 bzero(sc->cpu_cx_stats, sizeof(sc->cpu_cx_stats));
1120 return (0);
1121 }
1122
1123 static int
1124 acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS)
1125 {
1126 struct acpi_cpu_softc *sc;
1127 char state[8];
1128 int val, error;
1129
1130 sc = (struct acpi_cpu_softc *) arg1;
1131 snprintf(state, sizeof(state), "C%d", sc->cpu_cx_lowest + 1);
1132 error = sysctl_handle_string(oidp, state, sizeof(state), req);
1133 if (error != 0 || req->newptr == NULL)
1134 return (error);
1135 if (strlen(state) < 2 || toupper(state[0]) != 'C')
1136 return (EINVAL);
1137 val = (int) strtol(state + 1, NULL, 10) - 1;
1138 if (val < 0 || val > sc->cpu_cx_count - 1)
1139 return (EINVAL);
1140
1141 ACPI_SERIAL_BEGIN(cpu);
1142 acpi_cpu_set_cx_lowest(sc, val);
1143 ACPI_SERIAL_END(cpu);
1144
1145 return (0);
1146 }
1147
1148 static int
1149 acpi_cpu_global_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS)
1150 {
1151 struct acpi_cpu_softc *sc;
1152 char state[8];
1153 int val, error, i;
1154
1155 snprintf(state, sizeof(state), "C%d", cpu_cx_lowest + 1);
1156 error = sysctl_handle_string(oidp, state, sizeof(state), req);
1157 if (error != 0 || req->newptr == NULL)
1158 return (error);
1159 if (strlen(state) < 2 || toupper(state[0]) != 'C')
1160 return (EINVAL);
1161 val = (int) strtol(state + 1, NULL, 10) - 1;
1162 if (val < 0 || val > cpu_cx_count - 1)
1163 return (EINVAL);
1164 cpu_cx_lowest = val;
1165
1166 /* Update the new lowest useable Cx state for all CPUs. */
1167 ACPI_SERIAL_BEGIN(cpu);
1168 for (i = 0; i < cpu_ndevices; i++) {
1169 sc = device_get_softc(cpu_devices[i]);
1170 acpi_cpu_set_cx_lowest(sc, val);
1171 }
1172 ACPI_SERIAL_END(cpu);
1173
1174 return (0);
1175 }
Cache object: de04cc723b9138fde654c29490c4a1e4
|