1 /*-
2 * Copyright (c) 2003-2005 Nate Lawson (SDG)
3 * Copyright (c) 2001 Michael Smith
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
30
31 #include "opt_acpi.h"
32 #include <sys/param.h>
33 #include <sys/bus.h>
34 #include <sys/cpu.h>
35 #include <sys/kernel.h>
36 #include <sys/malloc.h>
37 #include <sys/module.h>
38 #include <sys/pcpu.h>
39 #include <sys/power.h>
40 #include <sys/proc.h>
41 #include <sys/sbuf.h>
42 #include <sys/smp.h>
43
44 #include <dev/pci/pcivar.h>
45 #include <machine/atomic.h>
46 #include <machine/bus.h>
47 #include <sys/rman.h>
48
49 #include <contrib/dev/acpica/acpi.h>
50 #include <dev/acpica/acpivar.h>
51
52 /*
53 * Support for ACPI Processor devices, including C[1-3] sleep states.
54 */
55
56 /* Hooks for the ACPI CA debugging infrastructure */
57 #define _COMPONENT ACPI_PROCESSOR
58 ACPI_MODULE_NAME("PROCESSOR")
59
60 struct acpi_cx {
61 struct resource *p_lvlx; /* Register to read to enter state. */
62 uint32_t type; /* C1-3 (C4 and up treated as C3). */
63 uint32_t trans_lat; /* Transition latency (usec). */
64 uint32_t power; /* Power consumed (mW). */
65 int res_type; /* Resource type for p_lvlx. */
66 };
67 #define MAX_CX_STATES 8
68
69 struct acpi_cpu_softc {
70 device_t cpu_dev;
71 ACPI_HANDLE cpu_handle;
72 struct pcpu *cpu_pcpu;
73 uint32_t cpu_acpi_id; /* ACPI processor id */
74 uint32_t cpu_p_blk; /* ACPI P_BLK location */
75 uint32_t cpu_p_blk_len; /* P_BLK length (must be 6). */
76 struct acpi_cx cpu_cx_states[MAX_CX_STATES];
77 int cpu_cx_count; /* Number of valid Cx states. */
78 int cpu_prev_sleep;/* Last idle sleep duration. */
79 int cpu_features; /* Child driver supported features. */
80 /* Runtime state. */
81 int cpu_non_c3; /* Index of lowest non-C3 state. */
82 int cpu_short_slp; /* Count of < 1us sleeps. */
83 u_int cpu_cx_stats[MAX_CX_STATES];/* Cx usage history. */
84 /* Values for sysctl. */
85 struct sysctl_ctx_list cpu_sysctl_ctx;
86 struct sysctl_oid *cpu_sysctl_tree;
87 int cpu_cx_lowest;
88 char cpu_cx_supported[64];
89 int cpu_rid;
90 };
91
92 struct acpi_cpu_device {
93 struct resource_list ad_rl;
94 };
95
96 #define CPU_GET_REG(reg, width) \
97 (bus_space_read_ ## width(rman_get_bustag((reg)), \
98 rman_get_bushandle((reg)), 0))
99 #define CPU_SET_REG(reg, width, val) \
100 (bus_space_write_ ## width(rman_get_bustag((reg)), \
101 rman_get_bushandle((reg)), 0, (val)))
102
103 #define PM_USEC(x) ((x) >> 2) /* ~4 clocks per usec (3.57955 Mhz) */
104
105 #define ACPI_NOTIFY_CX_STATES 0x81 /* _CST changed. */
106
107 #define CPU_QUIRK_NO_C3 (1<<0) /* C3-type states are not usable. */
108 #define CPU_QUIRK_NO_BM_CTRL (1<<2) /* No bus mastering control. */
109
110 #define PCI_VENDOR_INTEL 0x8086
111 #define PCI_DEVICE_82371AB_3 0x7113 /* PIIX4 chipset for quirks. */
112 #define PCI_REVISION_A_STEP 0
113 #define PCI_REVISION_B_STEP 1
114 #define PCI_REVISION_4E 2
115 #define PCI_REVISION_4M 3
116 #define PIIX4_DEVACTB_REG 0x58
117 #define PIIX4_BRLD_EN_IRQ0 (1<<0)
118 #define PIIX4_BRLD_EN_IRQ (1<<1)
119 #define PIIX4_BRLD_EN_IRQ8 (1<<5)
120 #define PIIX4_STOP_BREAK_MASK (PIIX4_BRLD_EN_IRQ0 | PIIX4_BRLD_EN_IRQ | PIIX4_BRLD_EN_IRQ8)
121 #define PIIX4_PCNTRL_BST_EN (1<<10)
122
123 /* Platform hardware resource information. */
124 static uint32_t cpu_smi_cmd; /* Value to write to SMI_CMD. */
125 static uint8_t cpu_cst_cnt; /* Indicate we are _CST aware. */
126 static int cpu_quirks; /* Indicate any hardware bugs. */
127
128 /* Runtime state. */
129 static int cpu_disable_idle; /* Disable entry to idle function */
130 static int cpu_cx_count; /* Number of valid Cx states */
131
132 /* Values for sysctl. */
133 static struct sysctl_ctx_list cpu_sysctl_ctx;
134 static struct sysctl_oid *cpu_sysctl_tree;
135 static int cpu_cx_generic;
136 static int cpu_cx_lowest;
137
138 static device_t *cpu_devices;
139 static int cpu_ndevices;
140 static struct acpi_cpu_softc **cpu_softc;
141 ACPI_SERIAL_DECL(cpu, "ACPI CPU");
142
143 static int acpi_cpu_probe(device_t dev);
144 static int acpi_cpu_attach(device_t dev);
145 static int acpi_cpu_suspend(device_t dev);
146 static int acpi_cpu_resume(device_t dev);
147 static int acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id,
148 uint32_t *cpu_id);
149 static struct resource_list *acpi_cpu_get_rlist(device_t dev, device_t child);
150 static device_t acpi_cpu_add_child(device_t dev, int order, const char *name,
151 int unit);
152 static int acpi_cpu_read_ivar(device_t dev, device_t child, int index,
153 uintptr_t *result);
154 static int acpi_cpu_shutdown(device_t dev);
155 static void acpi_cpu_cx_probe(struct acpi_cpu_softc *sc);
156 static void acpi_cpu_generic_cx_probe(struct acpi_cpu_softc *sc);
157 static int acpi_cpu_cx_cst(struct acpi_cpu_softc *sc);
158 static void acpi_cpu_startup(void *arg);
159 static void acpi_cpu_startup_cx(struct acpi_cpu_softc *sc);
160 static void acpi_cpu_idle(void);
161 static void acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context);
162 static int acpi_cpu_quirks(void);
163 static int acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS);
164 static int acpi_cpu_set_cx_lowest(struct acpi_cpu_softc *sc, int val);
165 static int acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS);
166 static int acpi_cpu_global_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS);
167
168 static device_method_t acpi_cpu_methods[] = {
169 /* Device interface */
170 DEVMETHOD(device_probe, acpi_cpu_probe),
171 DEVMETHOD(device_attach, acpi_cpu_attach),
172 DEVMETHOD(device_detach, bus_generic_detach),
173 DEVMETHOD(device_shutdown, acpi_cpu_shutdown),
174 DEVMETHOD(device_suspend, acpi_cpu_suspend),
175 DEVMETHOD(device_resume, acpi_cpu_resume),
176
177 /* Bus interface */
178 DEVMETHOD(bus_add_child, acpi_cpu_add_child),
179 DEVMETHOD(bus_read_ivar, acpi_cpu_read_ivar),
180 DEVMETHOD(bus_get_resource_list, acpi_cpu_get_rlist),
181 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource),
182 DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource),
183 DEVMETHOD(bus_alloc_resource, bus_generic_rl_alloc_resource),
184 DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource),
185 DEVMETHOD(bus_driver_added, bus_generic_driver_added),
186 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
187 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
188 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
189 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
190
191 {0, 0}
192 };
193
194 static driver_t acpi_cpu_driver = {
195 "cpu",
196 acpi_cpu_methods,
197 sizeof(struct acpi_cpu_softc),
198 };
199
200 static devclass_t acpi_cpu_devclass;
201 DRIVER_MODULE(cpu, acpi, acpi_cpu_driver, acpi_cpu_devclass, 0, 0);
202 MODULE_DEPEND(cpu, acpi, 1, 1, 1);
203
204 static int
205 acpi_cpu_probe(device_t dev)
206 {
207 int acpi_id, cpu_id;
208 ACPI_BUFFER buf;
209 ACPI_HANDLE handle;
210 ACPI_OBJECT *obj;
211 ACPI_STATUS status;
212
213 if (acpi_disabled("cpu") || acpi_get_type(dev) != ACPI_TYPE_PROCESSOR)
214 return (ENXIO);
215
216 handle = acpi_get_handle(dev);
217 if (cpu_softc == NULL)
218 cpu_softc = malloc(sizeof(struct acpi_cpu_softc *) *
219 (mp_maxid + 1), M_TEMP /* XXX */, M_WAITOK | M_ZERO);
220
221 /* Get our Processor object. */
222 buf.Pointer = NULL;
223 buf.Length = ACPI_ALLOCATE_BUFFER;
224 status = AcpiEvaluateObject(handle, NULL, NULL, &buf);
225 if (ACPI_FAILURE(status)) {
226 device_printf(dev, "probe failed to get Processor obj - %s\n",
227 AcpiFormatException(status));
228 return (ENXIO);
229 }
230 obj = (ACPI_OBJECT *)buf.Pointer;
231 if (obj->Type != ACPI_TYPE_PROCESSOR) {
232 device_printf(dev, "Processor object has bad type %d\n", obj->Type);
233 AcpiOsFree(obj);
234 return (ENXIO);
235 }
236
237 /*
238 * Find the processor associated with our unit. We could use the
239 * ProcId as a key, however, some boxes do not have the same values
240 * in their Processor object as the ProcId values in the MADT.
241 */
242 acpi_id = obj->Processor.ProcId;
243 AcpiOsFree(obj);
244 if (acpi_pcpu_get_id(device_get_unit(dev), &acpi_id, &cpu_id) != 0)
245 return (ENXIO);
246
247 /*
248 * Check if we already probed this processor. We scan the bus twice
249 * so it's possible we've already seen this one.
250 */
251 if (cpu_softc[cpu_id] != NULL)
252 return (ENXIO);
253
254 /* Mark this processor as in-use and save our derived id for attach. */
255 cpu_softc[cpu_id] = (void *)1;
256 acpi_set_magic(dev, cpu_id);
257 device_set_desc(dev, "ACPI CPU");
258
259 return (0);
260 }
261
262 static int
263 acpi_cpu_attach(device_t dev)
264 {
265 ACPI_BUFFER buf;
266 ACPI_OBJECT arg[4], *obj;
267 ACPI_OBJECT_LIST arglist;
268 struct pcpu *pcpu_data;
269 struct acpi_cpu_softc *sc;
270 struct acpi_softc *acpi_sc;
271 ACPI_STATUS status;
272 u_int features;
273 int cpu_id, drv_count, i;
274 driver_t **drivers;
275 uint32_t cap_set[3];
276
277 /* UUID needed by _OSC evaluation */
278 static uint8_t cpu_oscuuid[16] = { 0x16, 0xA6, 0x77, 0x40, 0x0C, 0x29,
279 0xBE, 0x47, 0x9E, 0xBD, 0xD8, 0x70,
280 0x58, 0x71, 0x39, 0x53 };
281
282 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
283
284 sc = device_get_softc(dev);
285 sc->cpu_dev = dev;
286 sc->cpu_handle = acpi_get_handle(dev);
287 cpu_id = acpi_get_magic(dev);
288 cpu_softc[cpu_id] = sc;
289 pcpu_data = pcpu_find(cpu_id);
290 pcpu_data->pc_device = dev;
291 sc->cpu_pcpu = pcpu_data;
292 cpu_smi_cmd = AcpiGbl_FADT.SmiCommand;
293 cpu_cst_cnt = AcpiGbl_FADT.CstControl;
294
295 buf.Pointer = NULL;
296 buf.Length = ACPI_ALLOCATE_BUFFER;
297 status = AcpiEvaluateObject(sc->cpu_handle, NULL, NULL, &buf);
298 if (ACPI_FAILURE(status)) {
299 device_printf(dev, "attach failed to get Processor obj - %s\n",
300 AcpiFormatException(status));
301 return (ENXIO);
302 }
303 obj = (ACPI_OBJECT *)buf.Pointer;
304 sc->cpu_p_blk = obj->Processor.PblkAddress;
305 sc->cpu_p_blk_len = obj->Processor.PblkLength;
306 sc->cpu_acpi_id = obj->Processor.ProcId;
307 AcpiOsFree(obj);
308 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_BLK at %#x/%d\n",
309 device_get_unit(dev), sc->cpu_p_blk, sc->cpu_p_blk_len));
310
311 /*
312 * If this is the first cpu we attach, create and initialize the generic
313 * resources that will be used by all acpi cpu devices.
314 */
315 if (device_get_unit(dev) == 0) {
316 /* Assume we won't be using generic Cx mode by default */
317 cpu_cx_generic = FALSE;
318
319 /* Install hw.acpi.cpu sysctl tree */
320 acpi_sc = acpi_device_get_parent_softc(dev);
321 sysctl_ctx_init(&cpu_sysctl_ctx);
322 cpu_sysctl_tree = SYSCTL_ADD_NODE(&cpu_sysctl_ctx,
323 SYSCTL_CHILDREN(acpi_sc->acpi_sysctl_tree), OID_AUTO, "cpu",
324 CTLFLAG_RD, 0, "node for CPU children");
325
326 /* Queue post cpu-probing task handler */
327 AcpiOsExecute(OSL_NOTIFY_HANDLER, acpi_cpu_startup, NULL);
328 }
329
330 /*
331 * Before calling any CPU methods, collect child driver feature hints
332 * and notify ACPI of them. We support unified SMP power control
333 * so advertise this ourselves. Note this is not the same as independent
334 * SMP control where each CPU can have different settings.
335 */
336 sc->cpu_features = ACPI_CAP_SMP_SAME | ACPI_CAP_SMP_SAME_C3;
337 if (devclass_get_drivers(acpi_cpu_devclass, &drivers, &drv_count) == 0) {
338 for (i = 0; i < drv_count; i++) {
339 if (ACPI_GET_FEATURES(drivers[i], &features) == 0)
340 sc->cpu_features |= features;
341 }
342 free(drivers, M_TEMP);
343 }
344
345 /*
346 * CPU capabilities are specified as a buffer of 32-bit integers:
347 * revision, count, and one or more capabilities. The revision of
348 * "1" is not specified anywhere but seems to match Linux.
349 */
350 if (sc->cpu_features) {
351 arglist.Pointer = arg;
352 arglist.Count = 1;
353 arg[0].Type = ACPI_TYPE_BUFFER;
354 arg[0].Buffer.Length = sizeof(cap_set);
355 arg[0].Buffer.Pointer = (uint8_t *)cap_set;
356 cap_set[0] = 1; /* revision */
357 cap_set[1] = 1; /* number of capabilities integers */
358 cap_set[2] = sc->cpu_features;
359 AcpiEvaluateObject(sc->cpu_handle, "_PDC", &arglist, NULL);
360
361 /*
362 * On some systems we need to evaluate _OSC so that the ASL
363 * loads the _PSS and/or _PDC methods at runtime.
364 *
365 * TODO: evaluate failure of _OSC.
366 */
367 arglist.Pointer = arg;
368 arglist.Count = 4;
369 arg[0].Type = ACPI_TYPE_BUFFER;
370 arg[0].Buffer.Length = sizeof(cpu_oscuuid);
371 arg[0].Buffer.Pointer = cpu_oscuuid; /* UUID */
372 arg[1].Type = ACPI_TYPE_INTEGER;
373 arg[1].Integer.Value = 1; /* revision */
374 arg[2].Type = ACPI_TYPE_INTEGER;
375 arg[2].Integer.Value = 1; /* count */
376 arg[3].Type = ACPI_TYPE_BUFFER;
377 arg[3].Buffer.Length = sizeof(cap_set); /* Capabilities buffer */
378 arg[3].Buffer.Pointer = (uint8_t *)cap_set;
379 cap_set[0] = 0;
380 AcpiEvaluateObject(sc->cpu_handle, "_OSC", &arglist, NULL);
381 }
382
383 /* Probe for Cx state support. */
384 acpi_cpu_cx_probe(sc);
385
386 /* Finally, call identify and probe/attach for child devices. */
387 bus_generic_probe(dev);
388 bus_generic_attach(dev);
389
390 return (0);
391 }
392
393 /*
394 * Disable any entry to the idle function during suspend and re-enable it
395 * during resume.
396 */
397 static int
398 acpi_cpu_suspend(device_t dev)
399 {
400 int error;
401
402 error = bus_generic_suspend(dev);
403 if (error)
404 return (error);
405 cpu_disable_idle = TRUE;
406 return (0);
407 }
408
409 static int
410 acpi_cpu_resume(device_t dev)
411 {
412
413 cpu_disable_idle = FALSE;
414 return (bus_generic_resume(dev));
415 }
416
417 /*
418 * Find the nth present CPU and return its pc_cpuid as well as set the
419 * pc_acpi_id from the most reliable source.
420 */
421 static int
422 acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id, uint32_t *cpu_id)
423 {
424 struct pcpu *pcpu_data;
425 uint32_t i;
426
427 KASSERT(acpi_id != NULL, ("Null acpi_id"));
428 KASSERT(cpu_id != NULL, ("Null cpu_id"));
429 for (i = 0; i <= mp_maxid; i++) {
430 if (CPU_ABSENT(i))
431 continue;
432 pcpu_data = pcpu_find(i);
433 KASSERT(pcpu_data != NULL, ("no pcpu data for %d", i));
434 if (idx-- == 0) {
435 /*
436 * If pc_acpi_id was not initialized (e.g., a non-APIC UP box)
437 * override it with the value from the ASL. Otherwise, if the
438 * two don't match, prefer the MADT-derived value. Finally,
439 * return the pc_cpuid to reference this processor.
440 */
441 if (pcpu_data->pc_acpi_id == 0xffffffff)
442 pcpu_data->pc_acpi_id = *acpi_id;
443 else if (pcpu_data->pc_acpi_id != *acpi_id)
444 *acpi_id = pcpu_data->pc_acpi_id;
445 *cpu_id = pcpu_data->pc_cpuid;
446 return (0);
447 }
448 }
449
450 return (ESRCH);
451 }
452
453 static struct resource_list *
454 acpi_cpu_get_rlist(device_t dev, device_t child)
455 {
456 struct acpi_cpu_device *ad;
457
458 ad = device_get_ivars(child);
459 if (ad == NULL)
460 return (NULL);
461 return (&ad->ad_rl);
462 }
463
464 static device_t
465 acpi_cpu_add_child(device_t dev, int order, const char *name, int unit)
466 {
467 struct acpi_cpu_device *ad;
468 device_t child;
469
470 if ((ad = malloc(sizeof(*ad), M_TEMP, M_NOWAIT | M_ZERO)) == NULL)
471 return (NULL);
472
473 resource_list_init(&ad->ad_rl);
474
475 child = device_add_child_ordered(dev, order, name, unit);
476 if (child != NULL)
477 device_set_ivars(child, ad);
478 else
479 free(ad, M_TEMP);
480 return (child);
481 }
482
483 static int
484 acpi_cpu_read_ivar(device_t dev, device_t child, int index, uintptr_t *result)
485 {
486 struct acpi_cpu_softc *sc;
487
488 sc = device_get_softc(dev);
489 switch (index) {
490 case ACPI_IVAR_HANDLE:
491 *result = (uintptr_t)sc->cpu_handle;
492 break;
493 case CPU_IVAR_PCPU:
494 *result = (uintptr_t)sc->cpu_pcpu;
495 break;
496 default:
497 return (ENOENT);
498 }
499 return (0);
500 }
501
502 static int
503 acpi_cpu_shutdown(device_t dev)
504 {
505 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
506
507 /* Allow children to shutdown first. */
508 bus_generic_shutdown(dev);
509
510 /*
511 * Disable any entry to the idle function. There is a small race where
512 * an idle thread have passed this check but not gone to sleep. This
513 * is ok since device_shutdown() does not free the softc, otherwise
514 * we'd have to be sure all threads were evicted before returning.
515 */
516 cpu_disable_idle = TRUE;
517
518 return_VALUE (0);
519 }
520
521 static void
522 acpi_cpu_cx_probe(struct acpi_cpu_softc *sc)
523 {
524 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
525
526 /* Use initial sleep value of 1 sec. to start with lowest idle state. */
527 sc->cpu_prev_sleep = 1000000;
528 sc->cpu_cx_lowest = 0;
529
530 /*
531 * Check for the ACPI 2.0 _CST sleep states object. If we can't find
532 * any, we'll revert to generic FADT/P_BLK Cx control method which will
533 * be handled by acpi_cpu_startup. We need to defer to after having
534 * probed all the cpus in the system before probing for generic Cx
535 * states as we may already have found cpus with valid _CST packages
536 */
537 if (!cpu_cx_generic && acpi_cpu_cx_cst(sc) != 0) {
538 /*
539 * We were unable to find a _CST package for this cpu or there
540 * was an error parsing it. Switch back to generic mode.
541 */
542 cpu_cx_generic = TRUE;
543 if (bootverbose)
544 device_printf(sc->cpu_dev, "switching to generic Cx mode\n");
545 }
546
547 /*
548 * TODO: _CSD Package should be checked here.
549 */
550 }
551
552 static void
553 acpi_cpu_generic_cx_probe(struct acpi_cpu_softc *sc)
554 {
555 ACPI_GENERIC_ADDRESS gas;
556 struct acpi_cx *cx_ptr;
557
558 sc->cpu_cx_count = 0;
559 cx_ptr = sc->cpu_cx_states;
560
561 /* Use initial sleep value of 1 sec. to start with lowest idle state. */
562 sc->cpu_prev_sleep = 1000000;
563
564 /* C1 has been required since just after ACPI 1.0 */
565 cx_ptr->type = ACPI_STATE_C1;
566 cx_ptr->trans_lat = 0;
567 cx_ptr++;
568 sc->cpu_cx_count++;
569
570 /*
571 * The spec says P_BLK must be 6 bytes long. However, some systems
572 * use it to indicate a fractional set of features present so we
573 * take 5 as C2. Some may also have a value of 7 to indicate
574 * another C3 but most use _CST for this (as required) and having
575 * "only" C1-C3 is not a hardship.
576 */
577 if (sc->cpu_p_blk_len < 5)
578 return;
579
580 /* Validate and allocate resources for C2 (P_LVL2). */
581 gas.SpaceId = ACPI_ADR_SPACE_SYSTEM_IO;
582 gas.BitWidth = 8;
583 if (AcpiGbl_FADT.C2Latency <= 100) {
584 gas.Address = sc->cpu_p_blk + 4;
585 acpi_bus_alloc_gas(sc->cpu_dev, &cx_ptr->res_type, &sc->cpu_rid,
586 &gas, &cx_ptr->p_lvlx, RF_SHAREABLE);
587 if (cx_ptr->p_lvlx != NULL) {
588 sc->cpu_rid++;
589 cx_ptr->type = ACPI_STATE_C2;
590 cx_ptr->trans_lat = AcpiGbl_FADT.C2Latency;
591 cx_ptr++;
592 sc->cpu_cx_count++;
593 }
594 }
595 if (sc->cpu_p_blk_len < 6)
596 return;
597
598 /* Validate and allocate resources for C3 (P_LVL3). */
599 if (AcpiGbl_FADT.C3Latency <= 1000 && !(cpu_quirks & CPU_QUIRK_NO_C3)) {
600 gas.Address = sc->cpu_p_blk + 5;
601 acpi_bus_alloc_gas(sc->cpu_dev, &cx_ptr->res_type, &sc->cpu_rid, &gas,
602 &cx_ptr->p_lvlx, RF_SHAREABLE);
603 if (cx_ptr->p_lvlx != NULL) {
604 sc->cpu_rid++;
605 cx_ptr->type = ACPI_STATE_C3;
606 cx_ptr->trans_lat = AcpiGbl_FADT.C3Latency;
607 cx_ptr++;
608 sc->cpu_cx_count++;
609 }
610 }
611 }
612
613 /*
614 * Parse a _CST package and set up its Cx states. Since the _CST object
615 * can change dynamically, our notify handler may call this function
616 * to clean up and probe the new _CST package.
617 */
618 static int
619 acpi_cpu_cx_cst(struct acpi_cpu_softc *sc)
620 {
621 struct acpi_cx *cx_ptr;
622 ACPI_STATUS status;
623 ACPI_BUFFER buf;
624 ACPI_OBJECT *top;
625 ACPI_OBJECT *pkg;
626 uint32_t count;
627 int i;
628
629 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
630
631 buf.Pointer = NULL;
632 buf.Length = ACPI_ALLOCATE_BUFFER;
633 status = AcpiEvaluateObject(sc->cpu_handle, "_CST", NULL, &buf);
634 if (ACPI_FAILURE(status))
635 return (ENXIO);
636
637 /* _CST is a package with a count and at least one Cx package. */
638 top = (ACPI_OBJECT *)buf.Pointer;
639 if (!ACPI_PKG_VALID(top, 2) || acpi_PkgInt32(top, 0, &count) != 0) {
640 device_printf(sc->cpu_dev, "invalid _CST package\n");
641 AcpiOsFree(buf.Pointer);
642 return (ENXIO);
643 }
644 if (count != top->Package.Count - 1) {
645 device_printf(sc->cpu_dev, "invalid _CST state count (%d != %d)\n",
646 count, top->Package.Count - 1);
647 count = top->Package.Count - 1;
648 }
649 if (count > MAX_CX_STATES) {
650 device_printf(sc->cpu_dev, "_CST has too many states (%d)\n", count);
651 count = MAX_CX_STATES;
652 }
653
654 /* Set up all valid states. */
655 sc->cpu_cx_count = 0;
656 cx_ptr = sc->cpu_cx_states;
657 for (i = 0; i < count; i++) {
658 pkg = &top->Package.Elements[i + 1];
659 if (!ACPI_PKG_VALID(pkg, 4) ||
660 acpi_PkgInt32(pkg, 1, &cx_ptr->type) != 0 ||
661 acpi_PkgInt32(pkg, 2, &cx_ptr->trans_lat) != 0 ||
662 acpi_PkgInt32(pkg, 3, &cx_ptr->power) != 0) {
663
664 device_printf(sc->cpu_dev, "skipping invalid Cx state package\n");
665 continue;
666 }
667
668 /* Validate the state to see if we should use it. */
669 switch (cx_ptr->type) {
670 case ACPI_STATE_C1:
671 sc->cpu_non_c3 = i;
672 cx_ptr++;
673 sc->cpu_cx_count++;
674 continue;
675 case ACPI_STATE_C2:
676 if (cx_ptr->trans_lat > 100) {
677 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
678 "acpi_cpu%d: C2[%d] not available.\n",
679 device_get_unit(sc->cpu_dev), i));
680 continue;
681 }
682 sc->cpu_non_c3 = i;
683 break;
684 case ACPI_STATE_C3:
685 default:
686 if (cx_ptr->trans_lat > 1000 ||
687 (cpu_quirks & CPU_QUIRK_NO_C3) != 0) {
688
689 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
690 "acpi_cpu%d: C3[%d] not available.\n",
691 device_get_unit(sc->cpu_dev), i));
692 continue;
693 }
694 break;
695 }
696
697 #ifdef notyet
698 /* Free up any previous register. */
699 if (cx_ptr->p_lvlx != NULL) {
700 bus_release_resource(sc->cpu_dev, 0, 0, cx_ptr->p_lvlx);
701 cx_ptr->p_lvlx = NULL;
702 }
703 #endif
704
705 /* Allocate the control register for C2 or C3. */
706 acpi_PkgGas(sc->cpu_dev, pkg, 0, &cx_ptr->res_type, &sc->cpu_rid,
707 &cx_ptr->p_lvlx, RF_SHAREABLE);
708 if (cx_ptr->p_lvlx) {
709 sc->cpu_rid++;
710 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
711 "acpi_cpu%d: Got C%d - %d latency\n",
712 device_get_unit(sc->cpu_dev), cx_ptr->type,
713 cx_ptr->trans_lat));
714 cx_ptr++;
715 sc->cpu_cx_count++;
716 }
717 }
718 AcpiOsFree(buf.Pointer);
719
720 return (0);
721 }
722
723 /*
724 * Call this *after* all CPUs have been attached.
725 */
726 static void
727 acpi_cpu_startup(void *arg)
728 {
729 struct acpi_cpu_softc *sc;
730 int i;
731
732 /* Get set of CPU devices */
733 devclass_get_devices(acpi_cpu_devclass, &cpu_devices, &cpu_ndevices);
734
735 /*
736 * Setup any quirks that might necessary now that we have probed
737 * all the CPUs
738 */
739 acpi_cpu_quirks();
740
741 cpu_cx_count = 0;
742 if (cpu_cx_generic) {
743 /*
744 * We are using generic Cx mode, probe for available Cx states
745 * for all processors.
746 */
747 for (i = 0; i < cpu_ndevices; i++) {
748 sc = device_get_softc(cpu_devices[i]);
749 acpi_cpu_generic_cx_probe(sc);
750 if (sc->cpu_cx_count > cpu_cx_count)
751 cpu_cx_count = sc->cpu_cx_count;
752 }
753
754 /*
755 * Find the highest Cx state common to all CPUs
756 * in the system, taking quirks into account.
757 */
758 for (i = 0; i < cpu_ndevices; i++) {
759 sc = device_get_softc(cpu_devices[i]);
760 if (sc->cpu_cx_count < cpu_cx_count)
761 cpu_cx_count = sc->cpu_cx_count;
762 }
763 } else {
764 /*
765 * We are using _CST mode, remove C3 state if necessary.
766 * Update the largest Cx state supported in the global cpu_cx_count.
767 * It will be used in the global Cx sysctl handler.
768 * As we now know for sure that we will be using _CST mode
769 * install our notify handler.
770 */
771 for (i = 0; i < cpu_ndevices; i++) {
772 sc = device_get_softc(cpu_devices[i]);
773 if (cpu_quirks & CPU_QUIRK_NO_C3) {
774 sc->cpu_cx_count = sc->cpu_non_c3 + 1;
775 }
776 if (sc->cpu_cx_count > cpu_cx_count)
777 cpu_cx_count = sc->cpu_cx_count;
778 AcpiInstallNotifyHandler(sc->cpu_handle, ACPI_DEVICE_NOTIFY,
779 acpi_cpu_notify, sc);
780 }
781 }
782
783 /* Perform Cx final initialization. */
784 for (i = 0; i < cpu_ndevices; i++) {
785 sc = device_get_softc(cpu_devices[i]);
786 acpi_cpu_startup_cx(sc);
787 }
788
789 /* Add a sysctl handler to handle global Cx lowest setting */
790 SYSCTL_ADD_PROC(&cpu_sysctl_ctx, SYSCTL_CHILDREN(cpu_sysctl_tree),
791 OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW,
792 NULL, 0, acpi_cpu_global_cx_lowest_sysctl, "A",
793 "Global lowest Cx sleep state to use");
794
795 /* Take over idling from cpu_idle_default(). */
796 cpu_cx_lowest = 0;
797 cpu_disable_idle = FALSE;
798 cpu_idle_hook = acpi_cpu_idle;
799 }
800
801 static void
802 acpi_cpu_startup_cx(struct acpi_cpu_softc *sc)
803 {
804 struct sbuf sb;
805 int i;
806
807 /*
808 * Set up the list of Cx states
809 */
810 sc->cpu_non_c3 = 0;
811 sbuf_new(&sb, sc->cpu_cx_supported, sizeof(sc->cpu_cx_supported),
812 SBUF_FIXEDLEN);
813 for (i = 0; i < sc->cpu_cx_count; i++) {
814 sbuf_printf(&sb, "C%d/%d ", i + 1, sc->cpu_cx_states[i].trans_lat);
815 if (sc->cpu_cx_states[i].type < ACPI_STATE_C3)
816 sc->cpu_non_c3 = i;
817 }
818 sbuf_trim(&sb);
819 sbuf_finish(&sb);
820
821 SYSCTL_ADD_STRING(&sc->cpu_sysctl_ctx,
822 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->cpu_dev)),
823 OID_AUTO, "cx_supported", CTLFLAG_RD,
824 sc->cpu_cx_supported, 0,
825 "Cx/microsecond values for supported Cx states");
826 SYSCTL_ADD_PROC(&sc->cpu_sysctl_ctx,
827 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->cpu_dev)),
828 OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW,
829 (void *)sc, 0, acpi_cpu_cx_lowest_sysctl, "A",
830 "lowest Cx sleep state to use");
831 SYSCTL_ADD_PROC(&sc->cpu_sysctl_ctx,
832 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->cpu_dev)),
833 OID_AUTO, "cx_usage", CTLTYPE_STRING | CTLFLAG_RD,
834 (void *)sc, 0, acpi_cpu_usage_sysctl, "A",
835 "percent usage for each Cx state");
836
837 #ifdef notyet
838 /* Signal platform that we can handle _CST notification. */
839 if (!cpu_cx_generic && cpu_cst_cnt != 0) {
840 ACPI_LOCK(acpi);
841 AcpiOsWritePort(cpu_smi_cmd, cpu_cst_cnt, 8);
842 ACPI_UNLOCK(acpi);
843 }
844 #endif
845 }
846
847 /*
848 * Idle the CPU in the lowest state possible. This function is called with
849 * interrupts disabled. Note that once it re-enables interrupts, a task
850 * switch can occur so do not access shared data (i.e. the softc) after
851 * interrupts are re-enabled.
852 */
853 static void
854 acpi_cpu_idle()
855 {
856 struct acpi_cpu_softc *sc;
857 struct acpi_cx *cx_next;
858 uint32_t start_time, end_time;
859 int bm_active, cx_next_idx, i;
860
861 /* If disabled, return immediately. */
862 if (cpu_disable_idle) {
863 ACPI_ENABLE_IRQS();
864 return;
865 }
866
867 /*
868 * Look up our CPU id to get our softc. If it's NULL, we'll use C1
869 * since there is no ACPI processor object for this CPU. This occurs
870 * for logical CPUs in the HTT case.
871 */
872 sc = cpu_softc[PCPU_GET(cpuid)];
873 if (sc == NULL) {
874 acpi_cpu_c1();
875 return;
876 }
877
878 /*
879 * If we slept 100 us or more, use the lowest Cx state. Otherwise,
880 * find the lowest state that has a latency less than or equal to
881 * the length of our last sleep.
882 */
883 cx_next_idx = sc->cpu_cx_lowest;
884 if (sc->cpu_prev_sleep < 100) {
885 /*
886 * If we sleep too short all the time, this system may not implement
887 * C2/3 correctly (i.e. reads return immediately). In this case,
888 * back off and use the next higher level.
889 * It seems that when you have a dual core cpu (like the Intel Core Duo)
890 * that both cores will get out of C3 state as soon as one of them
891 * requires it. This breaks the sleep detection logic as the sleep
892 * counter is local to each cpu. Disable the sleep logic for now as a
893 * workaround if there's more than one CPU. The right fix would probably
894 * be to add quirks for system that don't really support C3 state.
895 */
896 if (mp_ncpus < 2 && sc->cpu_prev_sleep <= 1) {
897 sc->cpu_short_slp++;
898 if (sc->cpu_short_slp == 1000 && sc->cpu_cx_lowest != 0) {
899 if (sc->cpu_non_c3 == sc->cpu_cx_lowest && sc->cpu_non_c3 != 0)
900 sc->cpu_non_c3--;
901 sc->cpu_cx_lowest--;
902 sc->cpu_short_slp = 0;
903 device_printf(sc->cpu_dev,
904 "too many short sleeps, backing off to C%d\n",
905 sc->cpu_cx_lowest + 1);
906 }
907 } else
908 sc->cpu_short_slp = 0;
909
910 for (i = sc->cpu_cx_lowest; i >= 0; i--)
911 if (sc->cpu_cx_states[i].trans_lat <= sc->cpu_prev_sleep) {
912 cx_next_idx = i;
913 break;
914 }
915 }
916
917 /*
918 * Check for bus master activity. If there was activity, clear
919 * the bit and use the lowest non-C3 state. Note that the USB
920 * driver polling for new devices keeps this bit set all the
921 * time if USB is loaded.
922 */
923 if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) {
924 AcpiGetRegister(ACPI_BITREG_BUS_MASTER_STATUS, &bm_active);
925 if (bm_active != 0) {
926 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_STATUS, 1);
927 cx_next_idx = min(cx_next_idx, sc->cpu_non_c3);
928 }
929 }
930
931 /* Select the next state and update statistics. */
932 cx_next = &sc->cpu_cx_states[cx_next_idx];
933 sc->cpu_cx_stats[cx_next_idx]++;
934 KASSERT(cx_next->type != ACPI_STATE_C0, ("acpi_cpu_idle: C0 sleep"));
935
936 /*
937 * Execute HLT (or equivalent) and wait for an interrupt. We can't
938 * calculate the time spent in C1 since the place we wake up is an
939 * ISR. Assume we slept one quantum and return.
940 */
941 if (cx_next->type == ACPI_STATE_C1) {
942 sc->cpu_prev_sleep = 1000000 / hz;
943 acpi_cpu_c1();
944 return;
945 }
946
947 /*
948 * For C3, disable bus master arbitration and enable bus master wake
949 * if BM control is available, otherwise flush the CPU cache.
950 */
951 if (cx_next->type == ACPI_STATE_C3) {
952 if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) {
953 AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 1);
954 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 1);
955 } else
956 ACPI_FLUSH_CPU_CACHE();
957 }
958
959 /*
960 * Read from P_LVLx to enter C2(+), checking time spent asleep.
961 * Use the ACPI timer for measuring sleep time. Since we need to
962 * get the time very close to the CPU start/stop clock logic, this
963 * is the only reliable time source.
964 */
965 AcpiHwLowLevelRead(32, &start_time, &AcpiGbl_FADT.XPmTimerBlock);
966 CPU_GET_REG(cx_next->p_lvlx, 1);
967
968 /*
969 * Read the end time twice. Since it may take an arbitrary time
970 * to enter the idle state, the first read may be executed before
971 * the processor has stopped. Doing it again provides enough
972 * margin that we are certain to have a correct value.
973 */
974 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT.XPmTimerBlock);
975 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT.XPmTimerBlock);
976
977 /* Enable bus master arbitration and disable bus master wakeup. */
978 if (cx_next->type == ACPI_STATE_C3 &&
979 (cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) {
980 AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 0);
981 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 0);
982 }
983 ACPI_ENABLE_IRQS();
984
985 /* Find the actual time asleep in microseconds, minus overhead. */
986 end_time = acpi_TimerDelta(end_time, start_time);
987 sc->cpu_prev_sleep = PM_USEC(end_time) - cx_next->trans_lat;
988 }
989
990 /*
991 * Re-evaluate the _CST object when we are notified that it changed.
992 *
993 * XXX Re-evaluation disabled until locking is done.
994 */
995 static void
996 acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context)
997 {
998 struct acpi_cpu_softc *sc = (struct acpi_cpu_softc *)context;
999
1000 if (notify != ACPI_NOTIFY_CX_STATES)
1001 return;
1002
1003 device_printf(sc->cpu_dev, "Cx states changed\n");
1004 /* acpi_cpu_cx_cst(sc); */
1005 }
1006
1007 static int
1008 acpi_cpu_quirks(void)
1009 {
1010 device_t acpi_dev;
1011 uint32_t val;
1012
1013 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
1014
1015 /*
1016 * Bus mastering arbitration control is needed to keep caches coherent
1017 * while sleeping in C3. If it's not present but a working flush cache
1018 * instruction is present, flush the caches before entering C3 instead.
1019 * Otherwise, just disable C3 completely.
1020 */
1021 if (AcpiGbl_FADT.Pm2ControlBlock == 0 ||
1022 AcpiGbl_FADT.Pm2ControlLength == 0) {
1023 if ((AcpiGbl_FADT.Flags & ACPI_FADT_WBINVD) &&
1024 (AcpiGbl_FADT.Flags & ACPI_FADT_WBINVD_FLUSH) == 0) {
1025 cpu_quirks |= CPU_QUIRK_NO_BM_CTRL;
1026 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1027 "acpi_cpu: no BM control, using flush cache method\n"));
1028 } else {
1029 cpu_quirks |= CPU_QUIRK_NO_C3;
1030 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1031 "acpi_cpu: no BM control, C3 not available\n"));
1032 }
1033 }
1034
1035 /*
1036 * If we are using generic Cx mode, C3 on multiple CPUs requires using
1037 * the expensive flush cache instruction.
1038 */
1039 if (cpu_cx_generic && mp_ncpus > 1) {
1040 cpu_quirks |= CPU_QUIRK_NO_BM_CTRL;
1041 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1042 "acpi_cpu: SMP, using flush cache mode for C3\n"));
1043 }
1044
1045 /* Look for various quirks of the PIIX4 part. */
1046 acpi_dev = pci_find_device(PCI_VENDOR_INTEL, PCI_DEVICE_82371AB_3);
1047 if (acpi_dev != NULL) {
1048 switch (pci_get_revid(acpi_dev)) {
1049 /*
1050 * Disable C3 support for all PIIX4 chipsets. Some of these parts
1051 * do not report the BMIDE status to the BM status register and
1052 * others have a livelock bug if Type-F DMA is enabled. Linux
1053 * works around the BMIDE bug by reading the BM status directly
1054 * but we take the simpler approach of disabling C3 for these
1055 * parts.
1056 *
1057 * See erratum #18 ("C3 Power State/BMIDE and Type-F DMA
1058 * Livelock") from the January 2002 PIIX4 specification update.
1059 * Applies to all PIIX4 models.
1060 *
1061 * Also, make sure that all interrupts cause a "Stop Break"
1062 * event to exit from C2 state.
1063 */
1064 case PCI_REVISION_A_STEP:
1065 case PCI_REVISION_B_STEP:
1066 case PCI_REVISION_4E:
1067 case PCI_REVISION_4M:
1068 cpu_quirks |= CPU_QUIRK_NO_C3;
1069 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1070 "acpi_cpu: working around PIIX4 bug, disabling C3\n"));
1071
1072 val = pci_read_config(acpi_dev, PIIX4_DEVACTB_REG, 4);
1073 if ((val & PIIX4_STOP_BREAK_MASK) != PIIX4_STOP_BREAK_MASK) {
1074 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1075 "PIIX4: enabling IRQs to generate Stop Break\n"));
1076 val |= PIIX4_STOP_BREAK_MASK;
1077 pci_write_config(acpi_dev, PIIX4_DEVACTB_REG, val, 4);
1078 }
1079 break;
1080 default:
1081 break;
1082 }
1083 }
1084
1085 return (0);
1086 }
1087
1088 static int
1089 acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS)
1090 {
1091 struct acpi_cpu_softc *sc;
1092 struct sbuf sb;
1093 char buf[128];
1094 int i;
1095 uintmax_t fract, sum, whole;
1096
1097 sc = (struct acpi_cpu_softc *) arg1;
1098 sum = 0;
1099 for (i = 0; i < sc->cpu_cx_count; i++)
1100 sum += sc->cpu_cx_stats[i];
1101 sbuf_new(&sb, buf, sizeof(buf), SBUF_FIXEDLEN);
1102 for (i = 0; i < sc->cpu_cx_count; i++) {
1103 if (sum > 0) {
1104 whole = (uintmax_t)sc->cpu_cx_stats[i] * 100;
1105 fract = (whole % sum) * 100;
1106 sbuf_printf(&sb, "%u.%02u%% ", (u_int)(whole / sum),
1107 (u_int)(fract / sum));
1108 } else
1109 sbuf_printf(&sb, "0%% ");
1110 }
1111 sbuf_trim(&sb);
1112 sbuf_finish(&sb);
1113 sysctl_handle_string(oidp, sbuf_data(&sb), sbuf_len(&sb), req);
1114 sbuf_delete(&sb);
1115
1116 return (0);
1117 }
1118
1119 static int
1120 acpi_cpu_set_cx_lowest(struct acpi_cpu_softc *sc, int val)
1121 {
1122 int i;
1123
1124 ACPI_SERIAL_ASSERT(cpu);
1125 sc->cpu_cx_lowest = val;
1126
1127 /* If not disabling, cache the new lowest non-C3 state. */
1128 sc->cpu_non_c3 = 0;
1129 for (i = sc->cpu_cx_lowest; i >= 0; i--) {
1130 if (sc->cpu_cx_states[i].type < ACPI_STATE_C3) {
1131 sc->cpu_non_c3 = i;
1132 break;
1133 }
1134 }
1135
1136 /* Reset the statistics counters. */
1137 bzero(sc->cpu_cx_stats, sizeof(sc->cpu_cx_stats));
1138 return (0);
1139 }
1140
1141 static int
1142 acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS)
1143 {
1144 struct acpi_cpu_softc *sc;
1145 char state[8];
1146 int val, error;
1147
1148 sc = (struct acpi_cpu_softc *) arg1;
1149 snprintf(state, sizeof(state), "C%d", sc->cpu_cx_lowest + 1);
1150 error = sysctl_handle_string(oidp, state, sizeof(state), req);
1151 if (error != 0 || req->newptr == NULL)
1152 return (error);
1153 if (strlen(state) < 2 || toupper(state[0]) != 'C')
1154 return (EINVAL);
1155 val = (int) strtol(state + 1, NULL, 10) - 1;
1156 if (val < 0 || val > sc->cpu_cx_count - 1)
1157 return (EINVAL);
1158
1159 ACPI_SERIAL_BEGIN(cpu);
1160 acpi_cpu_set_cx_lowest(sc, val);
1161 ACPI_SERIAL_END(cpu);
1162
1163 return (0);
1164 }
1165
1166 static int
1167 acpi_cpu_global_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS)
1168 {
1169 struct acpi_cpu_softc *sc;
1170 char state[8];
1171 int val, error, i;
1172
1173 snprintf(state, sizeof(state), "C%d", cpu_cx_lowest + 1);
1174 error = sysctl_handle_string(oidp, state, sizeof(state), req);
1175 if (error != 0 || req->newptr == NULL)
1176 return (error);
1177 if (strlen(state) < 2 || toupper(state[0]) != 'C')
1178 return (EINVAL);
1179 val = (int) strtol(state + 1, NULL, 10) - 1;
1180 if (val < 0 || val > cpu_cx_count - 1)
1181 return (EINVAL);
1182 cpu_cx_lowest = val;
1183
1184 /* Update the new lowest useable Cx state for all CPUs. */
1185 ACPI_SERIAL_BEGIN(cpu);
1186 for (i = 0; i < cpu_ndevices; i++) {
1187 sc = device_get_softc(cpu_devices[i]);
1188 acpi_cpu_set_cx_lowest(sc, val);
1189 }
1190 ACPI_SERIAL_END(cpu);
1191
1192 return (0);
1193 }
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