1 /*-
2 * Copyright (c) 2003-2005 Nate Lawson (SDG)
3 * Copyright (c) 2001 Michael Smith
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
30
31 #include "opt_acpi.h"
32 #include <sys/param.h>
33 #include <sys/bus.h>
34 #include <sys/cpu.h>
35 #include <sys/kernel.h>
36 #include <sys/malloc.h>
37 #include <sys/module.h>
38 #include <sys/pcpu.h>
39 #include <sys/power.h>
40 #include <sys/proc.h>
41 #include <sys/sbuf.h>
42 #include <sys/smp.h>
43
44 #include <dev/pci/pcivar.h>
45 #include <machine/atomic.h>
46 #include <machine/bus.h>
47 #include <sys/rman.h>
48
49 #include <contrib/dev/acpica/acpi.h>
50 #include <dev/acpica/acpivar.h>
51
52 /*
53 * Support for ACPI Processor devices, including C[1-3] sleep states.
54 */
55
56 /* Hooks for the ACPI CA debugging infrastructure */
57 #define _COMPONENT ACPI_PROCESSOR
58 ACPI_MODULE_NAME("PROCESSOR")
59
60 struct acpi_cx {
61 struct resource *p_lvlx; /* Register to read to enter state. */
62 uint32_t type; /* C1-3 (C4 and up treated as C3). */
63 uint32_t trans_lat; /* Transition latency (usec). */
64 uint32_t power; /* Power consumed (mW). */
65 int res_type; /* Resource type for p_lvlx. */
66 };
67 #define MAX_CX_STATES 8
68
69 struct acpi_cpu_softc {
70 device_t cpu_dev;
71 ACPI_HANDLE cpu_handle;
72 struct pcpu *cpu_pcpu;
73 uint32_t cpu_acpi_id; /* ACPI processor id */
74 uint32_t cpu_p_blk; /* ACPI P_BLK location */
75 uint32_t cpu_p_blk_len; /* P_BLK length (must be 6). */
76 struct acpi_cx cpu_cx_states[MAX_CX_STATES];
77 int cpu_cx_count; /* Number of valid Cx states. */
78 int cpu_prev_sleep;/* Last idle sleep duration. */
79 int cpu_features; /* Child driver supported features. */
80 /* Runtime state. */
81 int cpu_non_c3; /* Index of lowest non-C3 state. */
82 u_int cpu_cx_stats[MAX_CX_STATES];/* Cx usage history. */
83 /* Values for sysctl. */
84 struct sysctl_ctx_list cpu_sysctl_ctx;
85 struct sysctl_oid *cpu_sysctl_tree;
86 int cpu_cx_lowest;
87 char cpu_cx_supported[64];
88 int cpu_rid;
89 };
90
91 struct acpi_cpu_device {
92 struct resource_list ad_rl;
93 };
94
95 #define CPU_GET_REG(reg, width) \
96 (bus_space_read_ ## width(rman_get_bustag((reg)), \
97 rman_get_bushandle((reg)), 0))
98 #define CPU_SET_REG(reg, width, val) \
99 (bus_space_write_ ## width(rman_get_bustag((reg)), \
100 rman_get_bushandle((reg)), 0, (val)))
101
102 #define PM_USEC(x) ((x) >> 2) /* ~4 clocks per usec (3.57955 Mhz) */
103
104 #define ACPI_NOTIFY_CX_STATES 0x81 /* _CST changed. */
105
106 #define CPU_QUIRK_NO_C3 (1<<0) /* C3-type states are not usable. */
107 #define CPU_QUIRK_NO_BM_CTRL (1<<2) /* No bus mastering control. */
108
109 #define PCI_VENDOR_INTEL 0x8086
110 #define PCI_DEVICE_82371AB_3 0x7113 /* PIIX4 chipset for quirks. */
111 #define PCI_REVISION_A_STEP 0
112 #define PCI_REVISION_B_STEP 1
113 #define PCI_REVISION_4E 2
114 #define PCI_REVISION_4M 3
115 #define PIIX4_DEVACTB_REG 0x58
116 #define PIIX4_BRLD_EN_IRQ0 (1<<0)
117 #define PIIX4_BRLD_EN_IRQ (1<<1)
118 #define PIIX4_BRLD_EN_IRQ8 (1<<5)
119 #define PIIX4_STOP_BREAK_MASK (PIIX4_BRLD_EN_IRQ0 | PIIX4_BRLD_EN_IRQ | PIIX4_BRLD_EN_IRQ8)
120 #define PIIX4_PCNTRL_BST_EN (1<<10)
121
122 /* Platform hardware resource information. */
123 static uint32_t cpu_smi_cmd; /* Value to write to SMI_CMD. */
124 static uint8_t cpu_cst_cnt; /* Indicate we are _CST aware. */
125 static int cpu_quirks; /* Indicate any hardware bugs. */
126
127 /* Runtime state. */
128 static int cpu_disable_idle; /* Disable entry to idle function */
129 static int cpu_cx_count; /* Number of valid Cx states */
130
131 /* Values for sysctl. */
132 static struct sysctl_ctx_list cpu_sysctl_ctx;
133 static struct sysctl_oid *cpu_sysctl_tree;
134 static int cpu_cx_generic;
135 static int cpu_cx_lowest;
136
137 static device_t *cpu_devices;
138 static int cpu_ndevices;
139 static struct acpi_cpu_softc **cpu_softc;
140 ACPI_SERIAL_DECL(cpu, "ACPI CPU");
141
142 static int acpi_cpu_probe(device_t dev);
143 static int acpi_cpu_attach(device_t dev);
144 static int acpi_cpu_suspend(device_t dev);
145 static int acpi_cpu_resume(device_t dev);
146 static int acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id,
147 uint32_t *cpu_id);
148 static struct resource_list *acpi_cpu_get_rlist(device_t dev, device_t child);
149 static device_t acpi_cpu_add_child(device_t dev, u_int order, const char *name,
150 int unit);
151 static int acpi_cpu_read_ivar(device_t dev, device_t child, int index,
152 uintptr_t *result);
153 static int acpi_cpu_shutdown(device_t dev);
154 static void acpi_cpu_cx_probe(struct acpi_cpu_softc *sc);
155 static void acpi_cpu_generic_cx_probe(struct acpi_cpu_softc *sc);
156 static int acpi_cpu_cx_cst(struct acpi_cpu_softc *sc);
157 static void acpi_cpu_startup(void *arg);
158 static void acpi_cpu_startup_cx(struct acpi_cpu_softc *sc);
159 static void acpi_cpu_idle(void);
160 static void acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context);
161 static int acpi_cpu_quirks(void);
162 static int acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS);
163 static int acpi_cpu_set_cx_lowest(struct acpi_cpu_softc *sc, int val);
164 static int acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS);
165 static int acpi_cpu_global_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS);
166
167 static device_method_t acpi_cpu_methods[] = {
168 /* Device interface */
169 DEVMETHOD(device_probe, acpi_cpu_probe),
170 DEVMETHOD(device_attach, acpi_cpu_attach),
171 DEVMETHOD(device_detach, bus_generic_detach),
172 DEVMETHOD(device_shutdown, acpi_cpu_shutdown),
173 DEVMETHOD(device_suspend, acpi_cpu_suspend),
174 DEVMETHOD(device_resume, acpi_cpu_resume),
175
176 /* Bus interface */
177 DEVMETHOD(bus_add_child, acpi_cpu_add_child),
178 DEVMETHOD(bus_read_ivar, acpi_cpu_read_ivar),
179 DEVMETHOD(bus_get_resource_list, acpi_cpu_get_rlist),
180 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource),
181 DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource),
182 DEVMETHOD(bus_alloc_resource, bus_generic_rl_alloc_resource),
183 DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource),
184 DEVMETHOD(bus_driver_added, bus_generic_driver_added),
185 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
186 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
187 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
188 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
189
190 {0, 0}
191 };
192
193 static driver_t acpi_cpu_driver = {
194 "cpu",
195 acpi_cpu_methods,
196 sizeof(struct acpi_cpu_softc),
197 };
198
199 static devclass_t acpi_cpu_devclass;
200 DRIVER_MODULE(cpu, acpi, acpi_cpu_driver, acpi_cpu_devclass, 0, 0);
201 MODULE_DEPEND(cpu, acpi, 1, 1, 1);
202
203 static int
204 acpi_cpu_probe(device_t dev)
205 {
206 int acpi_id, cpu_id;
207 ACPI_BUFFER buf;
208 ACPI_HANDLE handle;
209 ACPI_OBJECT *obj;
210 ACPI_STATUS status;
211
212 if (acpi_disabled("cpu") || acpi_get_type(dev) != ACPI_TYPE_PROCESSOR)
213 return (ENXIO);
214
215 handle = acpi_get_handle(dev);
216 if (cpu_softc == NULL)
217 cpu_softc = malloc(sizeof(struct acpi_cpu_softc *) *
218 (mp_maxid + 1), M_TEMP /* XXX */, M_WAITOK | M_ZERO);
219
220 /* Get our Processor object. */
221 buf.Pointer = NULL;
222 buf.Length = ACPI_ALLOCATE_BUFFER;
223 status = AcpiEvaluateObject(handle, NULL, NULL, &buf);
224 if (ACPI_FAILURE(status)) {
225 device_printf(dev, "probe failed to get Processor obj - %s\n",
226 AcpiFormatException(status));
227 return (ENXIO);
228 }
229 obj = (ACPI_OBJECT *)buf.Pointer;
230 if (obj->Type != ACPI_TYPE_PROCESSOR) {
231 device_printf(dev, "Processor object has bad type %d\n", obj->Type);
232 AcpiOsFree(obj);
233 return (ENXIO);
234 }
235
236 /*
237 * Find the processor associated with our unit. We could use the
238 * ProcId as a key, however, some boxes do not have the same values
239 * in their Processor object as the ProcId values in the MADT.
240 */
241 acpi_id = obj->Processor.ProcId;
242 AcpiOsFree(obj);
243 if (acpi_pcpu_get_id(device_get_unit(dev), &acpi_id, &cpu_id) != 0)
244 return (ENXIO);
245
246 /*
247 * Check if we already probed this processor. We scan the bus twice
248 * so it's possible we've already seen this one.
249 */
250 if (cpu_softc[cpu_id] != NULL)
251 return (ENXIO);
252
253 /* Mark this processor as in-use and save our derived id for attach. */
254 cpu_softc[cpu_id] = (void *)1;
255 acpi_set_private(dev, (void*)(intptr_t)cpu_id);
256 device_set_desc(dev, "ACPI CPU");
257
258 return (0);
259 }
260
261 static int
262 acpi_cpu_attach(device_t dev)
263 {
264 ACPI_BUFFER buf;
265 ACPI_OBJECT arg[4], *obj;
266 ACPI_OBJECT_LIST arglist;
267 struct pcpu *pcpu_data;
268 struct acpi_cpu_softc *sc;
269 struct acpi_softc *acpi_sc;
270 ACPI_STATUS status;
271 u_int features;
272 int cpu_id, drv_count, i;
273 driver_t **drivers;
274 uint32_t cap_set[3];
275
276 /* UUID needed by _OSC evaluation */
277 static uint8_t cpu_oscuuid[16] = { 0x16, 0xA6, 0x77, 0x40, 0x0C, 0x29,
278 0xBE, 0x47, 0x9E, 0xBD, 0xD8, 0x70,
279 0x58, 0x71, 0x39, 0x53 };
280
281 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
282
283 sc = device_get_softc(dev);
284 sc->cpu_dev = dev;
285 sc->cpu_handle = acpi_get_handle(dev);
286 cpu_id = (int)(intptr_t)acpi_get_private(dev);
287 cpu_softc[cpu_id] = sc;
288 pcpu_data = pcpu_find(cpu_id);
289 pcpu_data->pc_device = dev;
290 sc->cpu_pcpu = pcpu_data;
291 cpu_smi_cmd = AcpiGbl_FADT.SmiCommand;
292 cpu_cst_cnt = AcpiGbl_FADT.CstControl;
293
294 buf.Pointer = NULL;
295 buf.Length = ACPI_ALLOCATE_BUFFER;
296 status = AcpiEvaluateObject(sc->cpu_handle, NULL, NULL, &buf);
297 if (ACPI_FAILURE(status)) {
298 device_printf(dev, "attach failed to get Processor obj - %s\n",
299 AcpiFormatException(status));
300 return (ENXIO);
301 }
302 obj = (ACPI_OBJECT *)buf.Pointer;
303 sc->cpu_p_blk = obj->Processor.PblkAddress;
304 sc->cpu_p_blk_len = obj->Processor.PblkLength;
305 sc->cpu_acpi_id = obj->Processor.ProcId;
306 AcpiOsFree(obj);
307 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_BLK at %#x/%d\n",
308 device_get_unit(dev), sc->cpu_p_blk, sc->cpu_p_blk_len));
309
310 /*
311 * If this is the first cpu we attach, create and initialize the generic
312 * resources that will be used by all acpi cpu devices.
313 */
314 if (device_get_unit(dev) == 0) {
315 /* Assume we won't be using generic Cx mode by default */
316 cpu_cx_generic = FALSE;
317
318 /* Install hw.acpi.cpu sysctl tree */
319 acpi_sc = acpi_device_get_parent_softc(dev);
320 sysctl_ctx_init(&cpu_sysctl_ctx);
321 cpu_sysctl_tree = SYSCTL_ADD_NODE(&cpu_sysctl_ctx,
322 SYSCTL_CHILDREN(acpi_sc->acpi_sysctl_tree), OID_AUTO, "cpu",
323 CTLFLAG_RD, 0, "node for CPU children");
324
325 /* Queue post cpu-probing task handler */
326 AcpiOsExecute(OSL_NOTIFY_HANDLER, acpi_cpu_startup, NULL);
327 }
328
329 /*
330 * Before calling any CPU methods, collect child driver feature hints
331 * and notify ACPI of them. We support unified SMP power control
332 * so advertise this ourselves. Note this is not the same as independent
333 * SMP control where each CPU can have different settings.
334 */
335 sc->cpu_features = ACPI_CAP_SMP_SAME | ACPI_CAP_SMP_SAME_C3;
336 if (devclass_get_drivers(acpi_cpu_devclass, &drivers, &drv_count) == 0) {
337 for (i = 0; i < drv_count; i++) {
338 if (ACPI_GET_FEATURES(drivers[i], &features) == 0)
339 sc->cpu_features |= features;
340 }
341 free(drivers, M_TEMP);
342 }
343
344 /*
345 * CPU capabilities are specified in
346 * Intel Processor Vendor-Specific ACPI Interface Specification.
347 */
348 if (sc->cpu_features) {
349 arglist.Pointer = arg;
350 arglist.Count = 4;
351 arg[0].Type = ACPI_TYPE_BUFFER;
352 arg[0].Buffer.Length = sizeof(cpu_oscuuid);
353 arg[0].Buffer.Pointer = cpu_oscuuid; /* UUID */
354 arg[1].Type = ACPI_TYPE_INTEGER;
355 arg[1].Integer.Value = 1; /* revision */
356 arg[2].Type = ACPI_TYPE_INTEGER;
357 arg[2].Integer.Value = 1; /* count */
358 arg[3].Type = ACPI_TYPE_BUFFER;
359 arg[3].Buffer.Length = sizeof(cap_set); /* Capabilities buffer */
360 arg[3].Buffer.Pointer = (uint8_t *)cap_set;
361 cap_set[0] = 0; /* status */
362 cap_set[1] = sc->cpu_features;
363 status = AcpiEvaluateObject(sc->cpu_handle, "_OSC", &arglist, NULL);
364 if (ACPI_SUCCESS(status)) {
365 if (cap_set[0] != 0)
366 device_printf(dev, "_OSC returned status %#x\n", cap_set[0]);
367 }
368 else {
369 arglist.Pointer = arg;
370 arglist.Count = 1;
371 arg[0].Type = ACPI_TYPE_BUFFER;
372 arg[0].Buffer.Length = sizeof(cap_set);
373 arg[0].Buffer.Pointer = (uint8_t *)cap_set;
374 cap_set[0] = 1; /* revision */
375 cap_set[1] = 1; /* number of capabilities integers */
376 cap_set[2] = sc->cpu_features;
377 AcpiEvaluateObject(sc->cpu_handle, "_PDC", &arglist, NULL);
378 }
379 }
380
381 /* Probe for Cx state support. */
382 acpi_cpu_cx_probe(sc);
383
384 /* Finally, call identify and probe/attach for child devices. */
385 bus_generic_probe(dev);
386 bus_generic_attach(dev);
387
388 return (0);
389 }
390
391 /*
392 * Disable any entry to the idle function during suspend and re-enable it
393 * during resume.
394 */
395 static int
396 acpi_cpu_suspend(device_t dev)
397 {
398 int error;
399
400 error = bus_generic_suspend(dev);
401 if (error)
402 return (error);
403 cpu_disable_idle = TRUE;
404 return (0);
405 }
406
407 static int
408 acpi_cpu_resume(device_t dev)
409 {
410
411 cpu_disable_idle = FALSE;
412 return (bus_generic_resume(dev));
413 }
414
415 /*
416 * Find the nth present CPU and return its pc_cpuid as well as set the
417 * pc_acpi_id from the most reliable source.
418 */
419 static int
420 acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id, uint32_t *cpu_id)
421 {
422 struct pcpu *pcpu_data;
423 uint32_t i;
424
425 KASSERT(acpi_id != NULL, ("Null acpi_id"));
426 KASSERT(cpu_id != NULL, ("Null cpu_id"));
427 for (i = 0; i <= mp_maxid; i++) {
428 if (CPU_ABSENT(i))
429 continue;
430 pcpu_data = pcpu_find(i);
431 KASSERT(pcpu_data != NULL, ("no pcpu data for %d", i));
432 if (idx-- == 0) {
433 /*
434 * If pc_acpi_id was not initialized (e.g., a non-APIC UP box)
435 * override it with the value from the ASL. Otherwise, if the
436 * two don't match, prefer the MADT-derived value. Finally,
437 * return the pc_cpuid to reference this processor.
438 */
439 if (pcpu_data->pc_acpi_id == 0xffffffff)
440 pcpu_data->pc_acpi_id = *acpi_id;
441 else if (pcpu_data->pc_acpi_id != *acpi_id)
442 *acpi_id = pcpu_data->pc_acpi_id;
443 *cpu_id = pcpu_data->pc_cpuid;
444 return (0);
445 }
446 }
447
448 return (ESRCH);
449 }
450
451 static struct resource_list *
452 acpi_cpu_get_rlist(device_t dev, device_t child)
453 {
454 struct acpi_cpu_device *ad;
455
456 ad = device_get_ivars(child);
457 if (ad == NULL)
458 return (NULL);
459 return (&ad->ad_rl);
460 }
461
462 static device_t
463 acpi_cpu_add_child(device_t dev, u_int order, const char *name, int unit)
464 {
465 struct acpi_cpu_device *ad;
466 device_t child;
467
468 if ((ad = malloc(sizeof(*ad), M_TEMP, M_NOWAIT | M_ZERO)) == NULL)
469 return (NULL);
470
471 resource_list_init(&ad->ad_rl);
472
473 child = device_add_child_ordered(dev, order, name, unit);
474 if (child != NULL)
475 device_set_ivars(child, ad);
476 else
477 free(ad, M_TEMP);
478 return (child);
479 }
480
481 static int
482 acpi_cpu_read_ivar(device_t dev, device_t child, int index, uintptr_t *result)
483 {
484 struct acpi_cpu_softc *sc;
485
486 sc = device_get_softc(dev);
487 switch (index) {
488 case ACPI_IVAR_HANDLE:
489 *result = (uintptr_t)sc->cpu_handle;
490 break;
491 case CPU_IVAR_PCPU:
492 *result = (uintptr_t)sc->cpu_pcpu;
493 break;
494 default:
495 return (ENOENT);
496 }
497 return (0);
498 }
499
500 static int
501 acpi_cpu_shutdown(device_t dev)
502 {
503 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
504
505 /* Allow children to shutdown first. */
506 bus_generic_shutdown(dev);
507
508 /*
509 * Disable any entry to the idle function. There is a small race where
510 * an idle thread have passed this check but not gone to sleep. This
511 * is ok since device_shutdown() does not free the softc, otherwise
512 * we'd have to be sure all threads were evicted before returning.
513 */
514 cpu_disable_idle = TRUE;
515
516 return_VALUE (0);
517 }
518
519 static void
520 acpi_cpu_cx_probe(struct acpi_cpu_softc *sc)
521 {
522 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
523
524 /* Use initial sleep value of 1 sec. to start with lowest idle state. */
525 sc->cpu_prev_sleep = 1000000;
526 sc->cpu_cx_lowest = 0;
527
528 /*
529 * Check for the ACPI 2.0 _CST sleep states object. If we can't find
530 * any, we'll revert to generic FADT/P_BLK Cx control method which will
531 * be handled by acpi_cpu_startup. We need to defer to after having
532 * probed all the cpus in the system before probing for generic Cx
533 * states as we may already have found cpus with valid _CST packages
534 */
535 if (!cpu_cx_generic && acpi_cpu_cx_cst(sc) != 0) {
536 /*
537 * We were unable to find a _CST package for this cpu or there
538 * was an error parsing it. Switch back to generic mode.
539 */
540 cpu_cx_generic = TRUE;
541 if (bootverbose)
542 device_printf(sc->cpu_dev, "switching to generic Cx mode\n");
543 }
544
545 /*
546 * TODO: _CSD Package should be checked here.
547 */
548 }
549
550 static void
551 acpi_cpu_generic_cx_probe(struct acpi_cpu_softc *sc)
552 {
553 ACPI_GENERIC_ADDRESS gas;
554 struct acpi_cx *cx_ptr;
555
556 sc->cpu_cx_count = 0;
557 cx_ptr = sc->cpu_cx_states;
558
559 /* Use initial sleep value of 1 sec. to start with lowest idle state. */
560 sc->cpu_prev_sleep = 1000000;
561
562 /* C1 has been required since just after ACPI 1.0 */
563 cx_ptr->type = ACPI_STATE_C1;
564 cx_ptr->trans_lat = 0;
565 cx_ptr++;
566 sc->cpu_cx_count++;
567
568 /*
569 * The spec says P_BLK must be 6 bytes long. However, some systems
570 * use it to indicate a fractional set of features present so we
571 * take 5 as C2. Some may also have a value of 7 to indicate
572 * another C3 but most use _CST for this (as required) and having
573 * "only" C1-C3 is not a hardship.
574 */
575 if (sc->cpu_p_blk_len < 5)
576 return;
577
578 /* Validate and allocate resources for C2 (P_LVL2). */
579 gas.SpaceId = ACPI_ADR_SPACE_SYSTEM_IO;
580 gas.BitWidth = 8;
581 if (AcpiGbl_FADT.C2Latency <= 100) {
582 gas.Address = sc->cpu_p_blk + 4;
583 acpi_bus_alloc_gas(sc->cpu_dev, &cx_ptr->res_type, &sc->cpu_rid,
584 &gas, &cx_ptr->p_lvlx, RF_SHAREABLE);
585 if (cx_ptr->p_lvlx != NULL) {
586 sc->cpu_rid++;
587 cx_ptr->type = ACPI_STATE_C2;
588 cx_ptr->trans_lat = AcpiGbl_FADT.C2Latency;
589 cx_ptr++;
590 sc->cpu_cx_count++;
591 }
592 }
593 if (sc->cpu_p_blk_len < 6)
594 return;
595
596 /* Validate and allocate resources for C3 (P_LVL3). */
597 if (AcpiGbl_FADT.C3Latency <= 1000 && !(cpu_quirks & CPU_QUIRK_NO_C3)) {
598 gas.Address = sc->cpu_p_blk + 5;
599 acpi_bus_alloc_gas(sc->cpu_dev, &cx_ptr->res_type, &sc->cpu_rid, &gas,
600 &cx_ptr->p_lvlx, RF_SHAREABLE);
601 if (cx_ptr->p_lvlx != NULL) {
602 sc->cpu_rid++;
603 cx_ptr->type = ACPI_STATE_C3;
604 cx_ptr->trans_lat = AcpiGbl_FADT.C3Latency;
605 cx_ptr++;
606 sc->cpu_cx_count++;
607 }
608 }
609 }
610
611 /*
612 * Parse a _CST package and set up its Cx states. Since the _CST object
613 * can change dynamically, our notify handler may call this function
614 * to clean up and probe the new _CST package.
615 */
616 static int
617 acpi_cpu_cx_cst(struct acpi_cpu_softc *sc)
618 {
619 struct acpi_cx *cx_ptr;
620 ACPI_STATUS status;
621 ACPI_BUFFER buf;
622 ACPI_OBJECT *top;
623 ACPI_OBJECT *pkg;
624 uint32_t count;
625 int i;
626
627 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
628
629 buf.Pointer = NULL;
630 buf.Length = ACPI_ALLOCATE_BUFFER;
631 status = AcpiEvaluateObject(sc->cpu_handle, "_CST", NULL, &buf);
632 if (ACPI_FAILURE(status))
633 return (ENXIO);
634
635 /* _CST is a package with a count and at least one Cx package. */
636 top = (ACPI_OBJECT *)buf.Pointer;
637 if (!ACPI_PKG_VALID(top, 2) || acpi_PkgInt32(top, 0, &count) != 0) {
638 device_printf(sc->cpu_dev, "invalid _CST package\n");
639 AcpiOsFree(buf.Pointer);
640 return (ENXIO);
641 }
642 if (count != top->Package.Count - 1) {
643 device_printf(sc->cpu_dev, "invalid _CST state count (%d != %d)\n",
644 count, top->Package.Count - 1);
645 count = top->Package.Count - 1;
646 }
647 if (count > MAX_CX_STATES) {
648 device_printf(sc->cpu_dev, "_CST has too many states (%d)\n", count);
649 count = MAX_CX_STATES;
650 }
651
652 /* Set up all valid states. */
653 sc->cpu_cx_count = 0;
654 cx_ptr = sc->cpu_cx_states;
655 for (i = 0; i < count; i++) {
656 pkg = &top->Package.Elements[i + 1];
657 if (!ACPI_PKG_VALID(pkg, 4) ||
658 acpi_PkgInt32(pkg, 1, &cx_ptr->type) != 0 ||
659 acpi_PkgInt32(pkg, 2, &cx_ptr->trans_lat) != 0 ||
660 acpi_PkgInt32(pkg, 3, &cx_ptr->power) != 0) {
661
662 device_printf(sc->cpu_dev, "skipping invalid Cx state package\n");
663 continue;
664 }
665
666 /* Validate the state to see if we should use it. */
667 switch (cx_ptr->type) {
668 case ACPI_STATE_C1:
669 sc->cpu_non_c3 = i;
670 cx_ptr++;
671 sc->cpu_cx_count++;
672 continue;
673 case ACPI_STATE_C2:
674 sc->cpu_non_c3 = i;
675 break;
676 case ACPI_STATE_C3:
677 default:
678 if ((cpu_quirks & CPU_QUIRK_NO_C3) != 0) {
679 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
680 "acpi_cpu%d: C3[%d] not available.\n",
681 device_get_unit(sc->cpu_dev), i));
682 continue;
683 }
684 break;
685 }
686
687 #ifdef notyet
688 /* Free up any previous register. */
689 if (cx_ptr->p_lvlx != NULL) {
690 bus_release_resource(sc->cpu_dev, 0, 0, cx_ptr->p_lvlx);
691 cx_ptr->p_lvlx = NULL;
692 }
693 #endif
694
695 /* Allocate the control register for C2 or C3. */
696 acpi_PkgGas(sc->cpu_dev, pkg, 0, &cx_ptr->res_type, &sc->cpu_rid,
697 &cx_ptr->p_lvlx, RF_SHAREABLE);
698 if (cx_ptr->p_lvlx) {
699 sc->cpu_rid++;
700 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
701 "acpi_cpu%d: Got C%d - %d latency\n",
702 device_get_unit(sc->cpu_dev), cx_ptr->type,
703 cx_ptr->trans_lat));
704 cx_ptr++;
705 sc->cpu_cx_count++;
706 }
707 }
708 AcpiOsFree(buf.Pointer);
709
710 return (0);
711 }
712
713 /*
714 * Call this *after* all CPUs have been attached.
715 */
716 static void
717 acpi_cpu_startup(void *arg)
718 {
719 struct acpi_cpu_softc *sc;
720 int i;
721
722 /* Get set of CPU devices */
723 devclass_get_devices(acpi_cpu_devclass, &cpu_devices, &cpu_ndevices);
724
725 /*
726 * Setup any quirks that might necessary now that we have probed
727 * all the CPUs
728 */
729 acpi_cpu_quirks();
730
731 cpu_cx_count = 0;
732 if (cpu_cx_generic) {
733 /*
734 * We are using generic Cx mode, probe for available Cx states
735 * for all processors.
736 */
737 for (i = 0; i < cpu_ndevices; i++) {
738 sc = device_get_softc(cpu_devices[i]);
739 acpi_cpu_generic_cx_probe(sc);
740 if (sc->cpu_cx_count > cpu_cx_count)
741 cpu_cx_count = sc->cpu_cx_count;
742 }
743
744 /*
745 * Find the highest Cx state common to all CPUs
746 * in the system, taking quirks into account.
747 */
748 for (i = 0; i < cpu_ndevices; i++) {
749 sc = device_get_softc(cpu_devices[i]);
750 if (sc->cpu_cx_count < cpu_cx_count)
751 cpu_cx_count = sc->cpu_cx_count;
752 }
753 } else {
754 /*
755 * We are using _CST mode, remove C3 state if necessary.
756 * Update the largest Cx state supported in the global cpu_cx_count.
757 * It will be used in the global Cx sysctl handler.
758 * As we now know for sure that we will be using _CST mode
759 * install our notify handler.
760 */
761 for (i = 0; i < cpu_ndevices; i++) {
762 sc = device_get_softc(cpu_devices[i]);
763 if (cpu_quirks & CPU_QUIRK_NO_C3) {
764 sc->cpu_cx_count = sc->cpu_non_c3 + 1;
765 }
766 if (sc->cpu_cx_count > cpu_cx_count)
767 cpu_cx_count = sc->cpu_cx_count;
768 AcpiInstallNotifyHandler(sc->cpu_handle, ACPI_DEVICE_NOTIFY,
769 acpi_cpu_notify, sc);
770 }
771 }
772
773 /* Perform Cx final initialization. */
774 for (i = 0; i < cpu_ndevices; i++) {
775 sc = device_get_softc(cpu_devices[i]);
776 acpi_cpu_startup_cx(sc);
777 }
778
779 /* Add a sysctl handler to handle global Cx lowest setting */
780 SYSCTL_ADD_PROC(&cpu_sysctl_ctx, SYSCTL_CHILDREN(cpu_sysctl_tree),
781 OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW,
782 NULL, 0, acpi_cpu_global_cx_lowest_sysctl, "A",
783 "Global lowest Cx sleep state to use");
784
785 /* Take over idling from cpu_idle_default(). */
786 cpu_cx_lowest = 0;
787 cpu_disable_idle = FALSE;
788 cpu_idle_hook = acpi_cpu_idle;
789 }
790
791 static void
792 acpi_cpu_startup_cx(struct acpi_cpu_softc *sc)
793 {
794 struct sbuf sb;
795 int i;
796
797 /*
798 * Set up the list of Cx states
799 */
800 sc->cpu_non_c3 = 0;
801 sbuf_new(&sb, sc->cpu_cx_supported, sizeof(sc->cpu_cx_supported),
802 SBUF_FIXEDLEN);
803 for (i = 0; i < sc->cpu_cx_count; i++) {
804 sbuf_printf(&sb, "C%d/%d ", i + 1, sc->cpu_cx_states[i].trans_lat);
805 if (sc->cpu_cx_states[i].type < ACPI_STATE_C3)
806 sc->cpu_non_c3 = i;
807 }
808 sbuf_trim(&sb);
809 sbuf_finish(&sb);
810
811 SYSCTL_ADD_STRING(&sc->cpu_sysctl_ctx,
812 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->cpu_dev)),
813 OID_AUTO, "cx_supported", CTLFLAG_RD,
814 sc->cpu_cx_supported, 0,
815 "Cx/microsecond values for supported Cx states");
816 SYSCTL_ADD_PROC(&sc->cpu_sysctl_ctx,
817 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->cpu_dev)),
818 OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW,
819 (void *)sc, 0, acpi_cpu_cx_lowest_sysctl, "A",
820 "lowest Cx sleep state to use");
821 SYSCTL_ADD_PROC(&sc->cpu_sysctl_ctx,
822 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->cpu_dev)),
823 OID_AUTO, "cx_usage", CTLTYPE_STRING | CTLFLAG_RD,
824 (void *)sc, 0, acpi_cpu_usage_sysctl, "A",
825 "percent usage for each Cx state");
826
827 #ifdef notyet
828 /* Signal platform that we can handle _CST notification. */
829 if (!cpu_cx_generic && cpu_cst_cnt != 0) {
830 ACPI_LOCK(acpi);
831 AcpiOsWritePort(cpu_smi_cmd, cpu_cst_cnt, 8);
832 ACPI_UNLOCK(acpi);
833 }
834 #endif
835 }
836
837 /*
838 * Idle the CPU in the lowest state possible. This function is called with
839 * interrupts disabled. Note that once it re-enables interrupts, a task
840 * switch can occur so do not access shared data (i.e. the softc) after
841 * interrupts are re-enabled.
842 */
843 static void
844 acpi_cpu_idle()
845 {
846 struct acpi_cpu_softc *sc;
847 struct acpi_cx *cx_next;
848 uint32_t start_time, end_time;
849 int bm_active, cx_next_idx, i;
850
851 /* If disabled, return immediately. */
852 if (cpu_disable_idle) {
853 ACPI_ENABLE_IRQS();
854 return;
855 }
856
857 /*
858 * Look up our CPU id to get our softc. If it's NULL, we'll use C1
859 * since there is no ACPI processor object for this CPU. This occurs
860 * for logical CPUs in the HTT case.
861 */
862 sc = cpu_softc[PCPU_GET(cpuid)];
863 if (sc == NULL) {
864 acpi_cpu_c1();
865 return;
866 }
867
868 /* Find the lowest state that has small enough latency. */
869 cx_next_idx = 0;
870 for (i = sc->cpu_cx_lowest; i >= 0; i--) {
871 if (sc->cpu_cx_states[i].trans_lat * 3 <= sc->cpu_prev_sleep) {
872 cx_next_idx = i;
873 break;
874 }
875 }
876
877 /*
878 * Check for bus master activity. If there was activity, clear
879 * the bit and use the lowest non-C3 state. Note that the USB
880 * driver polling for new devices keeps this bit set all the
881 * time if USB is loaded.
882 */
883 if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) {
884 AcpiGetRegister(ACPI_BITREG_BUS_MASTER_STATUS, &bm_active);
885 if (bm_active != 0) {
886 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_STATUS, 1);
887 cx_next_idx = min(cx_next_idx, sc->cpu_non_c3);
888 }
889 }
890
891 /* Select the next state and update statistics. */
892 cx_next = &sc->cpu_cx_states[cx_next_idx];
893 sc->cpu_cx_stats[cx_next_idx]++;
894 KASSERT(cx_next->type != ACPI_STATE_C0, ("acpi_cpu_idle: C0 sleep"));
895
896 /*
897 * Execute HLT (or equivalent) and wait for an interrupt. We can't
898 * calculate the time spent in C1 since the place we wake up is an
899 * ISR. Assume we slept half of quantum and return.
900 */
901 if (cx_next->type == ACPI_STATE_C1) {
902 sc->cpu_prev_sleep = (sc->cpu_prev_sleep * 3 + 500000 / hz) / 4;
903 acpi_cpu_c1();
904 return;
905 }
906
907 /*
908 * For C3, disable bus master arbitration and enable bus master wake
909 * if BM control is available, otherwise flush the CPU cache.
910 */
911 if (cx_next->type == ACPI_STATE_C3) {
912 if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) {
913 AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 1);
914 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 1);
915 } else
916 ACPI_FLUSH_CPU_CACHE();
917 }
918
919 /*
920 * Read from P_LVLx to enter C2(+), checking time spent asleep.
921 * Use the ACPI timer for measuring sleep time. Since we need to
922 * get the time very close to the CPU start/stop clock logic, this
923 * is the only reliable time source.
924 */
925 AcpiHwLowLevelRead(32, &start_time, &AcpiGbl_FADT.XPmTimerBlock);
926 CPU_GET_REG(cx_next->p_lvlx, 1);
927
928 /*
929 * Read the end time twice. Since it may take an arbitrary time
930 * to enter the idle state, the first read may be executed before
931 * the processor has stopped. Doing it again provides enough
932 * margin that we are certain to have a correct value.
933 */
934 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT.XPmTimerBlock);
935 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT.XPmTimerBlock);
936
937 /* Enable bus master arbitration and disable bus master wakeup. */
938 if (cx_next->type == ACPI_STATE_C3 &&
939 (cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) {
940 AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 0);
941 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 0);
942 }
943 ACPI_ENABLE_IRQS();
944
945 /* Find the actual time asleep in microseconds. */
946 end_time = acpi_TimerDelta(end_time, start_time);
947 sc->cpu_prev_sleep = (sc->cpu_prev_sleep * 3 + PM_USEC(end_time)) / 4;
948 }
949
950 /*
951 * Re-evaluate the _CST object when we are notified that it changed.
952 *
953 * XXX Re-evaluation disabled until locking is done.
954 */
955 static void
956 acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context)
957 {
958 struct acpi_cpu_softc *sc = (struct acpi_cpu_softc *)context;
959
960 if (notify != ACPI_NOTIFY_CX_STATES)
961 return;
962
963 device_printf(sc->cpu_dev, "Cx states changed\n");
964 /* acpi_cpu_cx_cst(sc); */
965 }
966
967 static int
968 acpi_cpu_quirks(void)
969 {
970 device_t acpi_dev;
971 uint32_t val;
972
973 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
974
975 /*
976 * Bus mastering arbitration control is needed to keep caches coherent
977 * while sleeping in C3. If it's not present but a working flush cache
978 * instruction is present, flush the caches before entering C3 instead.
979 * Otherwise, just disable C3 completely.
980 */
981 if (AcpiGbl_FADT.Pm2ControlBlock == 0 ||
982 AcpiGbl_FADT.Pm2ControlLength == 0) {
983 if ((AcpiGbl_FADT.Flags & ACPI_FADT_WBINVD) &&
984 (AcpiGbl_FADT.Flags & ACPI_FADT_WBINVD_FLUSH) == 0) {
985 cpu_quirks |= CPU_QUIRK_NO_BM_CTRL;
986 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
987 "acpi_cpu: no BM control, using flush cache method\n"));
988 } else {
989 cpu_quirks |= CPU_QUIRK_NO_C3;
990 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
991 "acpi_cpu: no BM control, C3 not available\n"));
992 }
993 }
994
995 /*
996 * If we are using generic Cx mode, C3 on multiple CPUs requires using
997 * the expensive flush cache instruction.
998 */
999 if (cpu_cx_generic && mp_ncpus > 1) {
1000 cpu_quirks |= CPU_QUIRK_NO_BM_CTRL;
1001 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1002 "acpi_cpu: SMP, using flush cache mode for C3\n"));
1003 }
1004
1005 /* Look for various quirks of the PIIX4 part. */
1006 acpi_dev = pci_find_device(PCI_VENDOR_INTEL, PCI_DEVICE_82371AB_3);
1007 if (acpi_dev != NULL) {
1008 switch (pci_get_revid(acpi_dev)) {
1009 /*
1010 * Disable C3 support for all PIIX4 chipsets. Some of these parts
1011 * do not report the BMIDE status to the BM status register and
1012 * others have a livelock bug if Type-F DMA is enabled. Linux
1013 * works around the BMIDE bug by reading the BM status directly
1014 * but we take the simpler approach of disabling C3 for these
1015 * parts.
1016 *
1017 * See erratum #18 ("C3 Power State/BMIDE and Type-F DMA
1018 * Livelock") from the January 2002 PIIX4 specification update.
1019 * Applies to all PIIX4 models.
1020 *
1021 * Also, make sure that all interrupts cause a "Stop Break"
1022 * event to exit from C2 state.
1023 */
1024 case PCI_REVISION_A_STEP:
1025 case PCI_REVISION_B_STEP:
1026 case PCI_REVISION_4E:
1027 case PCI_REVISION_4M:
1028 cpu_quirks |= CPU_QUIRK_NO_C3;
1029 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1030 "acpi_cpu: working around PIIX4 bug, disabling C3\n"));
1031
1032 val = pci_read_config(acpi_dev, PIIX4_DEVACTB_REG, 4);
1033 if ((val & PIIX4_STOP_BREAK_MASK) != PIIX4_STOP_BREAK_MASK) {
1034 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1035 "PIIX4: enabling IRQs to generate Stop Break\n"));
1036 val |= PIIX4_STOP_BREAK_MASK;
1037 pci_write_config(acpi_dev, PIIX4_DEVACTB_REG, val, 4);
1038 }
1039 break;
1040 default:
1041 break;
1042 }
1043 }
1044
1045 return (0);
1046 }
1047
1048 static int
1049 acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS)
1050 {
1051 struct acpi_cpu_softc *sc;
1052 struct sbuf sb;
1053 char buf[128];
1054 int i;
1055 uintmax_t fract, sum, whole;
1056
1057 sc = (struct acpi_cpu_softc *) arg1;
1058 sum = 0;
1059 for (i = 0; i < sc->cpu_cx_count; i++)
1060 sum += sc->cpu_cx_stats[i];
1061 sbuf_new(&sb, buf, sizeof(buf), SBUF_FIXEDLEN);
1062 for (i = 0; i < sc->cpu_cx_count; i++) {
1063 if (sum > 0) {
1064 whole = (uintmax_t)sc->cpu_cx_stats[i] * 100;
1065 fract = (whole % sum) * 100;
1066 sbuf_printf(&sb, "%u.%02u%% ", (u_int)(whole / sum),
1067 (u_int)(fract / sum));
1068 } else
1069 sbuf_printf(&sb, "0.00%% ");
1070 }
1071 sbuf_printf(&sb, "last %dus", sc->cpu_prev_sleep);
1072 sbuf_trim(&sb);
1073 sbuf_finish(&sb);
1074 sysctl_handle_string(oidp, sbuf_data(&sb), sbuf_len(&sb), req);
1075 sbuf_delete(&sb);
1076
1077 return (0);
1078 }
1079
1080 static int
1081 acpi_cpu_set_cx_lowest(struct acpi_cpu_softc *sc, int val)
1082 {
1083 int i;
1084
1085 ACPI_SERIAL_ASSERT(cpu);
1086 sc->cpu_cx_lowest = val;
1087
1088 /* If not disabling, cache the new lowest non-C3 state. */
1089 sc->cpu_non_c3 = 0;
1090 for (i = sc->cpu_cx_lowest; i >= 0; i--) {
1091 if (sc->cpu_cx_states[i].type < ACPI_STATE_C3) {
1092 sc->cpu_non_c3 = i;
1093 break;
1094 }
1095 }
1096
1097 /* Reset the statistics counters. */
1098 bzero(sc->cpu_cx_stats, sizeof(sc->cpu_cx_stats));
1099 return (0);
1100 }
1101
1102 static int
1103 acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS)
1104 {
1105 struct acpi_cpu_softc *sc;
1106 char state[8];
1107 int val, error;
1108
1109 sc = (struct acpi_cpu_softc *) arg1;
1110 snprintf(state, sizeof(state), "C%d", sc->cpu_cx_lowest + 1);
1111 error = sysctl_handle_string(oidp, state, sizeof(state), req);
1112 if (error != 0 || req->newptr == NULL)
1113 return (error);
1114 if (strlen(state) < 2 || toupper(state[0]) != 'C')
1115 return (EINVAL);
1116 val = (int) strtol(state + 1, NULL, 10) - 1;
1117 if (val < 0 || val > sc->cpu_cx_count - 1)
1118 return (EINVAL);
1119
1120 ACPI_SERIAL_BEGIN(cpu);
1121 acpi_cpu_set_cx_lowest(sc, val);
1122 ACPI_SERIAL_END(cpu);
1123
1124 return (0);
1125 }
1126
1127 static int
1128 acpi_cpu_global_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS)
1129 {
1130 struct acpi_cpu_softc *sc;
1131 char state[8];
1132 int val, error, i;
1133
1134 snprintf(state, sizeof(state), "C%d", cpu_cx_lowest + 1);
1135 error = sysctl_handle_string(oidp, state, sizeof(state), req);
1136 if (error != 0 || req->newptr == NULL)
1137 return (error);
1138 if (strlen(state) < 2 || toupper(state[0]) != 'C')
1139 return (EINVAL);
1140 val = (int) strtol(state + 1, NULL, 10) - 1;
1141 if (val < 0 || val > cpu_cx_count - 1)
1142 return (EINVAL);
1143 cpu_cx_lowest = val;
1144
1145 /* Update the new lowest useable Cx state for all CPUs. */
1146 ACPI_SERIAL_BEGIN(cpu);
1147 for (i = 0; i < cpu_ndevices; i++) {
1148 sc = device_get_softc(cpu_devices[i]);
1149 acpi_cpu_set_cx_lowest(sc, val);
1150 }
1151 ACPI_SERIAL_END(cpu);
1152
1153 return (0);
1154 }
Cache object: 0e8b5449207d4eb540d12f98067cc941
|