1 /*-
2 * Copyright (c) 2003-2005 Nate Lawson (SDG)
3 * Copyright (c) 2001 Michael Smith
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD: releng/8.3/sys/dev/acpica/acpi_cpu.c 230714 2012-01-29 01:22:48Z marius $");
30
31 #include "opt_acpi.h"
32 #include <sys/param.h>
33 #include <sys/bus.h>
34 #include <sys/cpu.h>
35 #include <sys/kernel.h>
36 #include <sys/malloc.h>
37 #include <sys/module.h>
38 #include <sys/pcpu.h>
39 #include <sys/power.h>
40 #include <sys/proc.h>
41 #include <sys/sbuf.h>
42 #include <sys/smp.h>
43
44 #include <dev/pci/pcivar.h>
45 #include <machine/atomic.h>
46 #include <machine/bus.h>
47 #include <sys/rman.h>
48
49 #include <contrib/dev/acpica/include/acpi.h>
50 #include <contrib/dev/acpica/include/accommon.h>
51
52 #include <dev/acpica/acpivar.h>
53
54 /*
55 * Support for ACPI Processor devices, including C[1-3] sleep states.
56 */
57
58 /* Hooks for the ACPI CA debugging infrastructure */
59 #define _COMPONENT ACPI_PROCESSOR
60 ACPI_MODULE_NAME("PROCESSOR")
61
62 struct acpi_cx {
63 struct resource *p_lvlx; /* Register to read to enter state. */
64 uint32_t type; /* C1-3 (C4 and up treated as C3). */
65 uint32_t trans_lat; /* Transition latency (usec). */
66 uint32_t power; /* Power consumed (mW). */
67 int res_type; /* Resource type for p_lvlx. */
68 };
69 #define MAX_CX_STATES 8
70
71 struct acpi_cpu_softc {
72 device_t cpu_dev;
73 ACPI_HANDLE cpu_handle;
74 struct pcpu *cpu_pcpu;
75 uint32_t cpu_acpi_id; /* ACPI processor id */
76 uint32_t cpu_p_blk; /* ACPI P_BLK location */
77 uint32_t cpu_p_blk_len; /* P_BLK length (must be 6). */
78 struct acpi_cx cpu_cx_states[MAX_CX_STATES];
79 int cpu_cx_count; /* Number of valid Cx states. */
80 int cpu_prev_sleep;/* Last idle sleep duration. */
81 int cpu_features; /* Child driver supported features. */
82 /* Runtime state. */
83 int cpu_non_c3; /* Index of lowest non-C3 state. */
84 u_int cpu_cx_stats[MAX_CX_STATES];/* Cx usage history. */
85 /* Values for sysctl. */
86 struct sysctl_ctx_list cpu_sysctl_ctx;
87 struct sysctl_oid *cpu_sysctl_tree;
88 int cpu_cx_lowest;
89 char cpu_cx_supported[64];
90 int cpu_rid;
91 };
92
93 struct acpi_cpu_device {
94 struct resource_list ad_rl;
95 };
96
97 #define CPU_GET_REG(reg, width) \
98 (bus_space_read_ ## width(rman_get_bustag((reg)), \
99 rman_get_bushandle((reg)), 0))
100 #define CPU_SET_REG(reg, width, val) \
101 (bus_space_write_ ## width(rman_get_bustag((reg)), \
102 rman_get_bushandle((reg)), 0, (val)))
103
104 #define PM_USEC(x) ((x) >> 2) /* ~4 clocks per usec (3.57955 Mhz) */
105
106 #define ACPI_NOTIFY_CX_STATES 0x81 /* _CST changed. */
107
108 #define CPU_QUIRK_NO_C3 (1<<0) /* C3-type states are not usable. */
109 #define CPU_QUIRK_NO_BM_CTRL (1<<2) /* No bus mastering control. */
110
111 #define PCI_VENDOR_INTEL 0x8086
112 #define PCI_DEVICE_82371AB_3 0x7113 /* PIIX4 chipset for quirks. */
113 #define PCI_REVISION_A_STEP 0
114 #define PCI_REVISION_B_STEP 1
115 #define PCI_REVISION_4E 2
116 #define PCI_REVISION_4M 3
117 #define PIIX4_DEVACTB_REG 0x58
118 #define PIIX4_BRLD_EN_IRQ0 (1<<0)
119 #define PIIX4_BRLD_EN_IRQ (1<<1)
120 #define PIIX4_BRLD_EN_IRQ8 (1<<5)
121 #define PIIX4_STOP_BREAK_MASK (PIIX4_BRLD_EN_IRQ0 | PIIX4_BRLD_EN_IRQ | PIIX4_BRLD_EN_IRQ8)
122 #define PIIX4_PCNTRL_BST_EN (1<<10)
123
124 /* Platform hardware resource information. */
125 static uint32_t cpu_smi_cmd; /* Value to write to SMI_CMD. */
126 static uint8_t cpu_cst_cnt; /* Indicate we are _CST aware. */
127 static int cpu_quirks; /* Indicate any hardware bugs. */
128
129 /* Runtime state. */
130 static int cpu_disable_idle; /* Disable entry to idle function */
131 static int cpu_cx_count; /* Number of valid Cx states */
132
133 /* Values for sysctl. */
134 static struct sysctl_ctx_list cpu_sysctl_ctx;
135 static struct sysctl_oid *cpu_sysctl_tree;
136 static int cpu_cx_generic;
137 static int cpu_cx_lowest;
138
139 static device_t *cpu_devices;
140 static int cpu_ndevices;
141 static struct acpi_cpu_softc **cpu_softc;
142 ACPI_SERIAL_DECL(cpu, "ACPI CPU");
143
144 static int acpi_cpu_probe(device_t dev);
145 static int acpi_cpu_attach(device_t dev);
146 static int acpi_cpu_suspend(device_t dev);
147 static int acpi_cpu_resume(device_t dev);
148 static int acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id,
149 uint32_t *cpu_id);
150 static struct resource_list *acpi_cpu_get_rlist(device_t dev, device_t child);
151 static device_t acpi_cpu_add_child(device_t dev, u_int order, const char *name,
152 int unit);
153 static int acpi_cpu_read_ivar(device_t dev, device_t child, int index,
154 uintptr_t *result);
155 static int acpi_cpu_shutdown(device_t dev);
156 static void acpi_cpu_cx_probe(struct acpi_cpu_softc *sc);
157 static void acpi_cpu_generic_cx_probe(struct acpi_cpu_softc *sc);
158 static int acpi_cpu_cx_cst(struct acpi_cpu_softc *sc);
159 static void acpi_cpu_startup(void *arg);
160 static void acpi_cpu_startup_cx(struct acpi_cpu_softc *sc);
161 static void acpi_cpu_cx_list(struct acpi_cpu_softc *sc);
162 static void acpi_cpu_idle(void);
163 static void acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context);
164 static int acpi_cpu_quirks(void);
165 static int acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS);
166 static int acpi_cpu_set_cx_lowest(struct acpi_cpu_softc *sc, int val);
167 static int acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS);
168 static int acpi_cpu_global_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS);
169
170 static device_method_t acpi_cpu_methods[] = {
171 /* Device interface */
172 DEVMETHOD(device_probe, acpi_cpu_probe),
173 DEVMETHOD(device_attach, acpi_cpu_attach),
174 DEVMETHOD(device_detach, bus_generic_detach),
175 DEVMETHOD(device_shutdown, acpi_cpu_shutdown),
176 DEVMETHOD(device_suspend, acpi_cpu_suspend),
177 DEVMETHOD(device_resume, acpi_cpu_resume),
178
179 /* Bus interface */
180 DEVMETHOD(bus_add_child, acpi_cpu_add_child),
181 DEVMETHOD(bus_read_ivar, acpi_cpu_read_ivar),
182 DEVMETHOD(bus_get_resource_list, acpi_cpu_get_rlist),
183 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource),
184 DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource),
185 DEVMETHOD(bus_alloc_resource, bus_generic_rl_alloc_resource),
186 DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource),
187 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
188 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
189 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
190 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
191
192 DEVMETHOD_END
193 };
194
195 static driver_t acpi_cpu_driver = {
196 "cpu",
197 acpi_cpu_methods,
198 sizeof(struct acpi_cpu_softc),
199 };
200
201 static devclass_t acpi_cpu_devclass;
202 DRIVER_MODULE(cpu, acpi, acpi_cpu_driver, acpi_cpu_devclass, 0, 0);
203 MODULE_DEPEND(cpu, acpi, 1, 1, 1);
204
205 static int
206 acpi_cpu_probe(device_t dev)
207 {
208 int acpi_id, cpu_id;
209 ACPI_BUFFER buf;
210 ACPI_HANDLE handle;
211 ACPI_OBJECT *obj;
212 ACPI_STATUS status;
213
214 if (acpi_disabled("cpu") || acpi_get_type(dev) != ACPI_TYPE_PROCESSOR)
215 return (ENXIO);
216
217 handle = acpi_get_handle(dev);
218 if (cpu_softc == NULL)
219 cpu_softc = malloc(sizeof(struct acpi_cpu_softc *) *
220 (mp_maxid + 1), M_TEMP /* XXX */, M_WAITOK | M_ZERO);
221
222 /* Get our Processor object. */
223 buf.Pointer = NULL;
224 buf.Length = ACPI_ALLOCATE_BUFFER;
225 status = AcpiEvaluateObject(handle, NULL, NULL, &buf);
226 if (ACPI_FAILURE(status)) {
227 device_printf(dev, "probe failed to get Processor obj - %s\n",
228 AcpiFormatException(status));
229 return (ENXIO);
230 }
231 obj = (ACPI_OBJECT *)buf.Pointer;
232 if (obj->Type != ACPI_TYPE_PROCESSOR) {
233 device_printf(dev, "Processor object has bad type %d\n", obj->Type);
234 AcpiOsFree(obj);
235 return (ENXIO);
236 }
237
238 /*
239 * Find the processor associated with our unit. We could use the
240 * ProcId as a key, however, some boxes do not have the same values
241 * in their Processor object as the ProcId values in the MADT.
242 */
243 acpi_id = obj->Processor.ProcId;
244 AcpiOsFree(obj);
245 if (acpi_pcpu_get_id(device_get_unit(dev), &acpi_id, &cpu_id) != 0)
246 return (ENXIO);
247
248 /*
249 * Check if we already probed this processor. We scan the bus twice
250 * so it's possible we've already seen this one.
251 */
252 if (cpu_softc[cpu_id] != NULL)
253 return (ENXIO);
254
255 /* Mark this processor as in-use and save our derived id for attach. */
256 cpu_softc[cpu_id] = (void *)1;
257 acpi_set_private(dev, (void*)(intptr_t)cpu_id);
258 device_set_desc(dev, "ACPI CPU");
259
260 return (0);
261 }
262
263 static int
264 acpi_cpu_attach(device_t dev)
265 {
266 ACPI_BUFFER buf;
267 ACPI_OBJECT arg[4], *obj;
268 ACPI_OBJECT_LIST arglist;
269 struct pcpu *pcpu_data;
270 struct acpi_cpu_softc *sc;
271 struct acpi_softc *acpi_sc;
272 ACPI_STATUS status;
273 u_int features;
274 int cpu_id, drv_count, i;
275 driver_t **drivers;
276 uint32_t cap_set[3];
277
278 /* UUID needed by _OSC evaluation */
279 static uint8_t cpu_oscuuid[16] = { 0x16, 0xA6, 0x77, 0x40, 0x0C, 0x29,
280 0xBE, 0x47, 0x9E, 0xBD, 0xD8, 0x70,
281 0x58, 0x71, 0x39, 0x53 };
282
283 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
284
285 sc = device_get_softc(dev);
286 sc->cpu_dev = dev;
287 sc->cpu_handle = acpi_get_handle(dev);
288 cpu_id = (int)(intptr_t)acpi_get_private(dev);
289 cpu_softc[cpu_id] = sc;
290 pcpu_data = pcpu_find(cpu_id);
291 pcpu_data->pc_device = dev;
292 sc->cpu_pcpu = pcpu_data;
293 cpu_smi_cmd = AcpiGbl_FADT.SmiCommand;
294 cpu_cst_cnt = AcpiGbl_FADT.CstControl;
295
296 buf.Pointer = NULL;
297 buf.Length = ACPI_ALLOCATE_BUFFER;
298 status = AcpiEvaluateObject(sc->cpu_handle, NULL, NULL, &buf);
299 if (ACPI_FAILURE(status)) {
300 device_printf(dev, "attach failed to get Processor obj - %s\n",
301 AcpiFormatException(status));
302 return (ENXIO);
303 }
304 obj = (ACPI_OBJECT *)buf.Pointer;
305 sc->cpu_p_blk = obj->Processor.PblkAddress;
306 sc->cpu_p_blk_len = obj->Processor.PblkLength;
307 sc->cpu_acpi_id = obj->Processor.ProcId;
308 AcpiOsFree(obj);
309 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_BLK at %#x/%d\n",
310 device_get_unit(dev), sc->cpu_p_blk, sc->cpu_p_blk_len));
311
312 /*
313 * If this is the first cpu we attach, create and initialize the generic
314 * resources that will be used by all acpi cpu devices.
315 */
316 if (device_get_unit(dev) == 0) {
317 /* Assume we won't be using generic Cx mode by default */
318 cpu_cx_generic = FALSE;
319
320 /* Install hw.acpi.cpu sysctl tree */
321 acpi_sc = acpi_device_get_parent_softc(dev);
322 sysctl_ctx_init(&cpu_sysctl_ctx);
323 cpu_sysctl_tree = SYSCTL_ADD_NODE(&cpu_sysctl_ctx,
324 SYSCTL_CHILDREN(acpi_sc->acpi_sysctl_tree), OID_AUTO, "cpu",
325 CTLFLAG_RD, 0, "node for CPU children");
326
327 /* Queue post cpu-probing task handler */
328 AcpiOsExecute(OSL_NOTIFY_HANDLER, acpi_cpu_startup, NULL);
329 }
330
331 /*
332 * Before calling any CPU methods, collect child driver feature hints
333 * and notify ACPI of them. We support unified SMP power control
334 * so advertise this ourselves. Note this is not the same as independent
335 * SMP control where each CPU can have different settings.
336 */
337 sc->cpu_features = ACPI_CAP_SMP_SAME | ACPI_CAP_SMP_SAME_C3;
338 if (devclass_get_drivers(acpi_cpu_devclass, &drivers, &drv_count) == 0) {
339 for (i = 0; i < drv_count; i++) {
340 if (ACPI_GET_FEATURES(drivers[i], &features) == 0)
341 sc->cpu_features |= features;
342 }
343 free(drivers, M_TEMP);
344 }
345
346 /*
347 * CPU capabilities are specified in
348 * Intel Processor Vendor-Specific ACPI Interface Specification.
349 */
350 if (sc->cpu_features) {
351 arglist.Pointer = arg;
352 arglist.Count = 4;
353 arg[0].Type = ACPI_TYPE_BUFFER;
354 arg[0].Buffer.Length = sizeof(cpu_oscuuid);
355 arg[0].Buffer.Pointer = cpu_oscuuid; /* UUID */
356 arg[1].Type = ACPI_TYPE_INTEGER;
357 arg[1].Integer.Value = 1; /* revision */
358 arg[2].Type = ACPI_TYPE_INTEGER;
359 arg[2].Integer.Value = 1; /* count */
360 arg[3].Type = ACPI_TYPE_BUFFER;
361 arg[3].Buffer.Length = sizeof(cap_set); /* Capabilities buffer */
362 arg[3].Buffer.Pointer = (uint8_t *)cap_set;
363 cap_set[0] = 0; /* status */
364 cap_set[1] = sc->cpu_features;
365 status = AcpiEvaluateObject(sc->cpu_handle, "_OSC", &arglist, NULL);
366 if (ACPI_SUCCESS(status)) {
367 if (cap_set[0] != 0)
368 device_printf(dev, "_OSC returned status %#x\n", cap_set[0]);
369 }
370 else {
371 arglist.Pointer = arg;
372 arglist.Count = 1;
373 arg[0].Type = ACPI_TYPE_BUFFER;
374 arg[0].Buffer.Length = sizeof(cap_set);
375 arg[0].Buffer.Pointer = (uint8_t *)cap_set;
376 cap_set[0] = 1; /* revision */
377 cap_set[1] = 1; /* number of capabilities integers */
378 cap_set[2] = sc->cpu_features;
379 AcpiEvaluateObject(sc->cpu_handle, "_PDC", &arglist, NULL);
380 }
381 }
382
383 /* Probe for Cx state support. */
384 acpi_cpu_cx_probe(sc);
385
386 return (0);
387 }
388
389 static void
390 acpi_cpu_postattach(void *unused __unused)
391 {
392 device_t *devices;
393 int err;
394 int i, n;
395
396 err = devclass_get_devices(acpi_cpu_devclass, &devices, &n);
397 if (err != 0) {
398 printf("devclass_get_devices(acpi_cpu_devclass) failed\n");
399 return;
400 }
401 for (i = 0; i < n; i++)
402 bus_generic_probe(devices[i]);
403 for (i = 0; i < n; i++)
404 bus_generic_attach(devices[i]);
405 free(devices, M_TEMP);
406 }
407
408 SYSINIT(acpi_cpu, SI_SUB_CONFIGURE, SI_ORDER_MIDDLE,
409 acpi_cpu_postattach, NULL);
410
411 /*
412 * Disable any entry to the idle function during suspend and re-enable it
413 * during resume.
414 */
415 static int
416 acpi_cpu_suspend(device_t dev)
417 {
418 int error;
419
420 error = bus_generic_suspend(dev);
421 if (error)
422 return (error);
423 cpu_disable_idle = TRUE;
424 return (0);
425 }
426
427 static int
428 acpi_cpu_resume(device_t dev)
429 {
430
431 cpu_disable_idle = FALSE;
432 return (bus_generic_resume(dev));
433 }
434
435 /*
436 * Find the nth present CPU and return its pc_cpuid as well as set the
437 * pc_acpi_id from the most reliable source.
438 */
439 static int
440 acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id, uint32_t *cpu_id)
441 {
442 struct pcpu *pcpu_data;
443 uint32_t i;
444
445 KASSERT(acpi_id != NULL, ("Null acpi_id"));
446 KASSERT(cpu_id != NULL, ("Null cpu_id"));
447 CPU_FOREACH(i) {
448 pcpu_data = pcpu_find(i);
449 KASSERT(pcpu_data != NULL, ("no pcpu data for %d", i));
450 if (idx-- == 0) {
451 /*
452 * If pc_acpi_id was not initialized (e.g., a non-APIC UP box)
453 * override it with the value from the ASL. Otherwise, if the
454 * two don't match, prefer the MADT-derived value. Finally,
455 * return the pc_cpuid to reference this processor.
456 */
457 if (pcpu_data->pc_acpi_id == 0xffffffff)
458 pcpu_data->pc_acpi_id = *acpi_id;
459 else if (pcpu_data->pc_acpi_id != *acpi_id)
460 *acpi_id = pcpu_data->pc_acpi_id;
461 *cpu_id = pcpu_data->pc_cpuid;
462 return (0);
463 }
464 }
465
466 return (ESRCH);
467 }
468
469 static struct resource_list *
470 acpi_cpu_get_rlist(device_t dev, device_t child)
471 {
472 struct acpi_cpu_device *ad;
473
474 ad = device_get_ivars(child);
475 if (ad == NULL)
476 return (NULL);
477 return (&ad->ad_rl);
478 }
479
480 static device_t
481 acpi_cpu_add_child(device_t dev, u_int order, const char *name, int unit)
482 {
483 struct acpi_cpu_device *ad;
484 device_t child;
485
486 if ((ad = malloc(sizeof(*ad), M_TEMP, M_NOWAIT | M_ZERO)) == NULL)
487 return (NULL);
488
489 resource_list_init(&ad->ad_rl);
490
491 child = device_add_child_ordered(dev, order, name, unit);
492 if (child != NULL)
493 device_set_ivars(child, ad);
494 else
495 free(ad, M_TEMP);
496 return (child);
497 }
498
499 static int
500 acpi_cpu_read_ivar(device_t dev, device_t child, int index, uintptr_t *result)
501 {
502 struct acpi_cpu_softc *sc;
503
504 sc = device_get_softc(dev);
505 switch (index) {
506 case ACPI_IVAR_HANDLE:
507 *result = (uintptr_t)sc->cpu_handle;
508 break;
509 case CPU_IVAR_PCPU:
510 *result = (uintptr_t)sc->cpu_pcpu;
511 break;
512 default:
513 return (ENOENT);
514 }
515 return (0);
516 }
517
518 static int
519 acpi_cpu_shutdown(device_t dev)
520 {
521 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
522
523 /* Allow children to shutdown first. */
524 bus_generic_shutdown(dev);
525
526 /*
527 * Disable any entry to the idle function. There is a small race where
528 * an idle thread have passed this check but not gone to sleep. This
529 * is ok since device_shutdown() does not free the softc, otherwise
530 * we'd have to be sure all threads were evicted before returning.
531 */
532 cpu_disable_idle = TRUE;
533
534 return_VALUE (0);
535 }
536
537 static void
538 acpi_cpu_cx_probe(struct acpi_cpu_softc *sc)
539 {
540 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
541
542 /* Use initial sleep value of 1 sec. to start with lowest idle state. */
543 sc->cpu_prev_sleep = 1000000;
544 sc->cpu_cx_lowest = 0;
545
546 /*
547 * Check for the ACPI 2.0 _CST sleep states object. If we can't find
548 * any, we'll revert to generic FADT/P_BLK Cx control method which will
549 * be handled by acpi_cpu_startup. We need to defer to after having
550 * probed all the cpus in the system before probing for generic Cx
551 * states as we may already have found cpus with valid _CST packages
552 */
553 if (!cpu_cx_generic && acpi_cpu_cx_cst(sc) != 0) {
554 /*
555 * We were unable to find a _CST package for this cpu or there
556 * was an error parsing it. Switch back to generic mode.
557 */
558 cpu_cx_generic = TRUE;
559 if (bootverbose)
560 device_printf(sc->cpu_dev, "switching to generic Cx mode\n");
561 }
562
563 /*
564 * TODO: _CSD Package should be checked here.
565 */
566 }
567
568 static void
569 acpi_cpu_generic_cx_probe(struct acpi_cpu_softc *sc)
570 {
571 ACPI_GENERIC_ADDRESS gas;
572 struct acpi_cx *cx_ptr;
573
574 sc->cpu_cx_count = 0;
575 cx_ptr = sc->cpu_cx_states;
576
577 /* Use initial sleep value of 1 sec. to start with lowest idle state. */
578 sc->cpu_prev_sleep = 1000000;
579
580 /* C1 has been required since just after ACPI 1.0 */
581 cx_ptr->type = ACPI_STATE_C1;
582 cx_ptr->trans_lat = 0;
583 cx_ptr++;
584 sc->cpu_cx_count++;
585
586 /*
587 * The spec says P_BLK must be 6 bytes long. However, some systems
588 * use it to indicate a fractional set of features present so we
589 * take 5 as C2. Some may also have a value of 7 to indicate
590 * another C3 but most use _CST for this (as required) and having
591 * "only" C1-C3 is not a hardship.
592 */
593 if (sc->cpu_p_blk_len < 5)
594 return;
595
596 /* Validate and allocate resources for C2 (P_LVL2). */
597 gas.SpaceId = ACPI_ADR_SPACE_SYSTEM_IO;
598 gas.BitWidth = 8;
599 if (AcpiGbl_FADT.C2Latency <= 100) {
600 gas.Address = sc->cpu_p_blk + 4;
601 acpi_bus_alloc_gas(sc->cpu_dev, &cx_ptr->res_type, &sc->cpu_rid,
602 &gas, &cx_ptr->p_lvlx, RF_SHAREABLE);
603 if (cx_ptr->p_lvlx != NULL) {
604 sc->cpu_rid++;
605 cx_ptr->type = ACPI_STATE_C2;
606 cx_ptr->trans_lat = AcpiGbl_FADT.C2Latency;
607 cx_ptr++;
608 sc->cpu_cx_count++;
609 }
610 }
611 if (sc->cpu_p_blk_len < 6)
612 return;
613
614 /* Validate and allocate resources for C3 (P_LVL3). */
615 if (AcpiGbl_FADT.C3Latency <= 1000 && !(cpu_quirks & CPU_QUIRK_NO_C3)) {
616 gas.Address = sc->cpu_p_blk + 5;
617 acpi_bus_alloc_gas(sc->cpu_dev, &cx_ptr->res_type, &sc->cpu_rid, &gas,
618 &cx_ptr->p_lvlx, RF_SHAREABLE);
619 if (cx_ptr->p_lvlx != NULL) {
620 sc->cpu_rid++;
621 cx_ptr->type = ACPI_STATE_C3;
622 cx_ptr->trans_lat = AcpiGbl_FADT.C3Latency;
623 cx_ptr++;
624 sc->cpu_cx_count++;
625 }
626 }
627 }
628
629 /*
630 * Parse a _CST package and set up its Cx states. Since the _CST object
631 * can change dynamically, our notify handler may call this function
632 * to clean up and probe the new _CST package.
633 */
634 static int
635 acpi_cpu_cx_cst(struct acpi_cpu_softc *sc)
636 {
637 struct acpi_cx *cx_ptr;
638 ACPI_STATUS status;
639 ACPI_BUFFER buf;
640 ACPI_OBJECT *top;
641 ACPI_OBJECT *pkg;
642 uint32_t count;
643 int i;
644
645 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
646
647 buf.Pointer = NULL;
648 buf.Length = ACPI_ALLOCATE_BUFFER;
649 status = AcpiEvaluateObject(sc->cpu_handle, "_CST", NULL, &buf);
650 if (ACPI_FAILURE(status))
651 return (ENXIO);
652
653 /* _CST is a package with a count and at least one Cx package. */
654 top = (ACPI_OBJECT *)buf.Pointer;
655 if (!ACPI_PKG_VALID(top, 2) || acpi_PkgInt32(top, 0, &count) != 0) {
656 device_printf(sc->cpu_dev, "invalid _CST package\n");
657 AcpiOsFree(buf.Pointer);
658 return (ENXIO);
659 }
660 if (count != top->Package.Count - 1) {
661 device_printf(sc->cpu_dev, "invalid _CST state count (%d != %d)\n",
662 count, top->Package.Count - 1);
663 count = top->Package.Count - 1;
664 }
665 if (count > MAX_CX_STATES) {
666 device_printf(sc->cpu_dev, "_CST has too many states (%d)\n", count);
667 count = MAX_CX_STATES;
668 }
669
670 /* Set up all valid states. */
671 sc->cpu_cx_count = 0;
672 cx_ptr = sc->cpu_cx_states;
673 for (i = 0; i < count; i++) {
674 pkg = &top->Package.Elements[i + 1];
675 if (!ACPI_PKG_VALID(pkg, 4) ||
676 acpi_PkgInt32(pkg, 1, &cx_ptr->type) != 0 ||
677 acpi_PkgInt32(pkg, 2, &cx_ptr->trans_lat) != 0 ||
678 acpi_PkgInt32(pkg, 3, &cx_ptr->power) != 0) {
679
680 device_printf(sc->cpu_dev, "skipping invalid Cx state package\n");
681 continue;
682 }
683
684 /* Validate the state to see if we should use it. */
685 switch (cx_ptr->type) {
686 case ACPI_STATE_C1:
687 sc->cpu_non_c3 = i;
688 cx_ptr++;
689 sc->cpu_cx_count++;
690 continue;
691 case ACPI_STATE_C2:
692 sc->cpu_non_c3 = i;
693 break;
694 case ACPI_STATE_C3:
695 default:
696 if ((cpu_quirks & CPU_QUIRK_NO_C3) != 0) {
697 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
698 "acpi_cpu%d: C3[%d] not available.\n",
699 device_get_unit(sc->cpu_dev), i));
700 continue;
701 }
702 break;
703 }
704
705 #ifdef notyet
706 /* Free up any previous register. */
707 if (cx_ptr->p_lvlx != NULL) {
708 bus_release_resource(sc->cpu_dev, 0, 0, cx_ptr->p_lvlx);
709 cx_ptr->p_lvlx = NULL;
710 }
711 #endif
712
713 /* Allocate the control register for C2 or C3. */
714 acpi_PkgGas(sc->cpu_dev, pkg, 0, &cx_ptr->res_type, &sc->cpu_rid,
715 &cx_ptr->p_lvlx, RF_SHAREABLE);
716 if (cx_ptr->p_lvlx) {
717 sc->cpu_rid++;
718 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
719 "acpi_cpu%d: Got C%d - %d latency\n",
720 device_get_unit(sc->cpu_dev), cx_ptr->type,
721 cx_ptr->trans_lat));
722 cx_ptr++;
723 sc->cpu_cx_count++;
724 }
725 }
726 AcpiOsFree(buf.Pointer);
727
728 return (0);
729 }
730
731 /*
732 * Call this *after* all CPUs have been attached.
733 */
734 static void
735 acpi_cpu_startup(void *arg)
736 {
737 struct acpi_cpu_softc *sc;
738 int i;
739
740 /* Get set of CPU devices */
741 devclass_get_devices(acpi_cpu_devclass, &cpu_devices, &cpu_ndevices);
742
743 /*
744 * Setup any quirks that might necessary now that we have probed
745 * all the CPUs
746 */
747 acpi_cpu_quirks();
748
749 cpu_cx_count = 0;
750 if (cpu_cx_generic) {
751 /*
752 * We are using generic Cx mode, probe for available Cx states
753 * for all processors.
754 */
755 for (i = 0; i < cpu_ndevices; i++) {
756 sc = device_get_softc(cpu_devices[i]);
757 acpi_cpu_generic_cx_probe(sc);
758 if (sc->cpu_cx_count > cpu_cx_count)
759 cpu_cx_count = sc->cpu_cx_count;
760 }
761
762 /*
763 * Find the highest Cx state common to all CPUs
764 * in the system, taking quirks into account.
765 */
766 for (i = 0; i < cpu_ndevices; i++) {
767 sc = device_get_softc(cpu_devices[i]);
768 if (sc->cpu_cx_count < cpu_cx_count)
769 cpu_cx_count = sc->cpu_cx_count;
770 }
771 } else {
772 /*
773 * We are using _CST mode, remove C3 state if necessary.
774 * Update the largest Cx state supported in the global cpu_cx_count.
775 * It will be used in the global Cx sysctl handler.
776 * As we now know for sure that we will be using _CST mode
777 * install our notify handler.
778 */
779 for (i = 0; i < cpu_ndevices; i++) {
780 sc = device_get_softc(cpu_devices[i]);
781 if (cpu_quirks & CPU_QUIRK_NO_C3) {
782 sc->cpu_cx_count = sc->cpu_non_c3 + 1;
783 }
784 if (sc->cpu_cx_count > cpu_cx_count)
785 cpu_cx_count = sc->cpu_cx_count;
786 AcpiInstallNotifyHandler(sc->cpu_handle, ACPI_DEVICE_NOTIFY,
787 acpi_cpu_notify, sc);
788 }
789 }
790
791 /* Perform Cx final initialization. */
792 for (i = 0; i < cpu_ndevices; i++) {
793 sc = device_get_softc(cpu_devices[i]);
794 acpi_cpu_startup_cx(sc);
795 }
796
797 /* Add a sysctl handler to handle global Cx lowest setting */
798 SYSCTL_ADD_PROC(&cpu_sysctl_ctx, SYSCTL_CHILDREN(cpu_sysctl_tree),
799 OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW,
800 NULL, 0, acpi_cpu_global_cx_lowest_sysctl, "A",
801 "Global lowest Cx sleep state to use");
802
803 /* Take over idling from cpu_idle_default(). */
804 cpu_cx_lowest = 0;
805 cpu_disable_idle = FALSE;
806 cpu_idle_hook = acpi_cpu_idle;
807 }
808
809 static void
810 acpi_cpu_cx_list(struct acpi_cpu_softc *sc)
811 {
812 struct sbuf sb;
813 int i;
814
815 /*
816 * Set up the list of Cx states
817 */
818 sc->cpu_non_c3 = 0;
819 sbuf_new(&sb, sc->cpu_cx_supported, sizeof(sc->cpu_cx_supported),
820 SBUF_FIXEDLEN);
821 for (i = 0; i < sc->cpu_cx_count; i++) {
822 sbuf_printf(&sb, "C%d/%d ", i + 1, sc->cpu_cx_states[i].trans_lat);
823 if (sc->cpu_cx_states[i].type < ACPI_STATE_C3)
824 sc->cpu_non_c3 = i;
825 }
826 sbuf_trim(&sb);
827 sbuf_finish(&sb);
828 }
829
830 static void
831 acpi_cpu_startup_cx(struct acpi_cpu_softc *sc)
832 {
833 acpi_cpu_cx_list(sc);
834
835 SYSCTL_ADD_STRING(&sc->cpu_sysctl_ctx,
836 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->cpu_dev)),
837 OID_AUTO, "cx_supported", CTLFLAG_RD,
838 sc->cpu_cx_supported, 0,
839 "Cx/microsecond values for supported Cx states");
840 SYSCTL_ADD_PROC(&sc->cpu_sysctl_ctx,
841 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->cpu_dev)),
842 OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW,
843 (void *)sc, 0, acpi_cpu_cx_lowest_sysctl, "A",
844 "lowest Cx sleep state to use");
845 SYSCTL_ADD_PROC(&sc->cpu_sysctl_ctx,
846 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->cpu_dev)),
847 OID_AUTO, "cx_usage", CTLTYPE_STRING | CTLFLAG_RD,
848 (void *)sc, 0, acpi_cpu_usage_sysctl, "A",
849 "percent usage for each Cx state");
850
851 #ifdef notyet
852 /* Signal platform that we can handle _CST notification. */
853 if (!cpu_cx_generic && cpu_cst_cnt != 0) {
854 ACPI_LOCK(acpi);
855 AcpiOsWritePort(cpu_smi_cmd, cpu_cst_cnt, 8);
856 ACPI_UNLOCK(acpi);
857 }
858 #endif
859 }
860
861 /*
862 * Idle the CPU in the lowest state possible. This function is called with
863 * interrupts disabled. Note that once it re-enables interrupts, a task
864 * switch can occur so do not access shared data (i.e. the softc) after
865 * interrupts are re-enabled.
866 */
867 static void
868 acpi_cpu_idle()
869 {
870 struct acpi_cpu_softc *sc;
871 struct acpi_cx *cx_next;
872 uint32_t start_time, end_time;
873 int bm_active, cx_next_idx, i;
874
875 /* If disabled, return immediately. */
876 if (cpu_disable_idle) {
877 ACPI_ENABLE_IRQS();
878 return;
879 }
880
881 /*
882 * Look up our CPU id to get our softc. If it's NULL, we'll use C1
883 * since there is no ACPI processor object for this CPU. This occurs
884 * for logical CPUs in the HTT case.
885 */
886 sc = cpu_softc[PCPU_GET(cpuid)];
887 if (sc == NULL) {
888 acpi_cpu_c1();
889 return;
890 }
891
892 /* Find the lowest state that has small enough latency. */
893 cx_next_idx = 0;
894 for (i = sc->cpu_cx_lowest; i >= 0; i--) {
895 if (sc->cpu_cx_states[i].trans_lat * 3 <= sc->cpu_prev_sleep) {
896 cx_next_idx = i;
897 break;
898 }
899 }
900
901 /*
902 * Check for bus master activity. If there was activity, clear
903 * the bit and use the lowest non-C3 state. Note that the USB
904 * driver polling for new devices keeps this bit set all the
905 * time if USB is loaded.
906 */
907 if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) {
908 AcpiReadBitRegister(ACPI_BITREG_BUS_MASTER_STATUS, &bm_active);
909 if (bm_active != 0) {
910 AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_STATUS, 1);
911 cx_next_idx = min(cx_next_idx, sc->cpu_non_c3);
912 }
913 }
914
915 /* Select the next state and update statistics. */
916 cx_next = &sc->cpu_cx_states[cx_next_idx];
917 sc->cpu_cx_stats[cx_next_idx]++;
918 KASSERT(cx_next->type != ACPI_STATE_C0, ("acpi_cpu_idle: C0 sleep"));
919
920 /*
921 * Execute HLT (or equivalent) and wait for an interrupt. We can't
922 * precisely calculate the time spent in C1 since the place we wake up
923 * is an ISR. Assume we slept no more then half of quantum.
924 */
925 if (cx_next->type == ACPI_STATE_C1) {
926 AcpiHwRead(&start_time, &AcpiGbl_FADT.XPmTimerBlock);
927 acpi_cpu_c1();
928 AcpiHwRead(&end_time, &AcpiGbl_FADT.XPmTimerBlock);
929 end_time = acpi_TimerDelta(end_time, start_time);
930 sc->cpu_prev_sleep = (sc->cpu_prev_sleep * 3 +
931 min(PM_USEC(end_time), 500000 / hz)) / 4;
932 return;
933 }
934
935 /*
936 * For C3, disable bus master arbitration and enable bus master wake
937 * if BM control is available, otherwise flush the CPU cache.
938 */
939 if (cx_next->type == ACPI_STATE_C3) {
940 if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) {
941 AcpiWriteBitRegister(ACPI_BITREG_ARB_DISABLE, 1);
942 AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_RLD, 1);
943 } else
944 ACPI_FLUSH_CPU_CACHE();
945 }
946
947 /*
948 * Read from P_LVLx to enter C2(+), checking time spent asleep.
949 * Use the ACPI timer for measuring sleep time. Since we need to
950 * get the time very close to the CPU start/stop clock logic, this
951 * is the only reliable time source.
952 */
953 AcpiHwRead(&start_time, &AcpiGbl_FADT.XPmTimerBlock);
954 CPU_GET_REG(cx_next->p_lvlx, 1);
955
956 /*
957 * Read the end time twice. Since it may take an arbitrary time
958 * to enter the idle state, the first read may be executed before
959 * the processor has stopped. Doing it again provides enough
960 * margin that we are certain to have a correct value.
961 */
962 AcpiHwRead(&end_time, &AcpiGbl_FADT.XPmTimerBlock);
963 AcpiHwRead(&end_time, &AcpiGbl_FADT.XPmTimerBlock);
964
965 /* Enable bus master arbitration and disable bus master wakeup. */
966 if (cx_next->type == ACPI_STATE_C3 &&
967 (cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) {
968 AcpiWriteBitRegister(ACPI_BITREG_ARB_DISABLE, 0);
969 AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_RLD, 0);
970 }
971 ACPI_ENABLE_IRQS();
972
973 /* Find the actual time asleep in microseconds. */
974 end_time = acpi_TimerDelta(end_time, start_time);
975 sc->cpu_prev_sleep = (sc->cpu_prev_sleep * 3 + PM_USEC(end_time)) / 4;
976 }
977
978 /*
979 * Re-evaluate the _CST object when we are notified that it changed.
980 *
981 * XXX Re-evaluation disabled until locking is done.
982 */
983 static void
984 acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context)
985 {
986 struct acpi_cpu_softc *sc = (struct acpi_cpu_softc *)context;
987 struct acpi_cpu_softc *isc;
988 int i;
989
990 if (notify != ACPI_NOTIFY_CX_STATES)
991 return;
992
993 /* Update the list of Cx states. */
994 acpi_cpu_cx_cst(sc);
995 acpi_cpu_cx_list(sc);
996
997 /* Update the new lowest useable Cx state for all CPUs. */
998 ACPI_SERIAL_BEGIN(cpu);
999 cpu_cx_count = 0;
1000 for (i = 0; i < cpu_ndevices; i++) {
1001 isc = device_get_softc(cpu_devices[i]);
1002 if (isc->cpu_cx_count > cpu_cx_count)
1003 cpu_cx_count = isc->cpu_cx_count;
1004 }
1005 if (sc->cpu_cx_lowest < cpu_cx_lowest)
1006 acpi_cpu_set_cx_lowest(sc, min(cpu_cx_lowest, sc->cpu_cx_count - 1));
1007 ACPI_SERIAL_END(cpu);
1008 }
1009
1010 static int
1011 acpi_cpu_quirks(void)
1012 {
1013 device_t acpi_dev;
1014 uint32_t val;
1015
1016 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
1017
1018 /*
1019 * Bus mastering arbitration control is needed to keep caches coherent
1020 * while sleeping in C3. If it's not present but a working flush cache
1021 * instruction is present, flush the caches before entering C3 instead.
1022 * Otherwise, just disable C3 completely.
1023 */
1024 if (AcpiGbl_FADT.Pm2ControlBlock == 0 ||
1025 AcpiGbl_FADT.Pm2ControlLength == 0) {
1026 if ((AcpiGbl_FADT.Flags & ACPI_FADT_WBINVD) &&
1027 (AcpiGbl_FADT.Flags & ACPI_FADT_WBINVD_FLUSH) == 0) {
1028 cpu_quirks |= CPU_QUIRK_NO_BM_CTRL;
1029 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1030 "acpi_cpu: no BM control, using flush cache method\n"));
1031 } else {
1032 cpu_quirks |= CPU_QUIRK_NO_C3;
1033 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1034 "acpi_cpu: no BM control, C3 not available\n"));
1035 }
1036 }
1037
1038 /*
1039 * If we are using generic Cx mode, C3 on multiple CPUs requires using
1040 * the expensive flush cache instruction.
1041 */
1042 if (cpu_cx_generic && mp_ncpus > 1) {
1043 cpu_quirks |= CPU_QUIRK_NO_BM_CTRL;
1044 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1045 "acpi_cpu: SMP, using flush cache mode for C3\n"));
1046 }
1047
1048 /* Look for various quirks of the PIIX4 part. */
1049 acpi_dev = pci_find_device(PCI_VENDOR_INTEL, PCI_DEVICE_82371AB_3);
1050 if (acpi_dev != NULL) {
1051 switch (pci_get_revid(acpi_dev)) {
1052 /*
1053 * Disable C3 support for all PIIX4 chipsets. Some of these parts
1054 * do not report the BMIDE status to the BM status register and
1055 * others have a livelock bug if Type-F DMA is enabled. Linux
1056 * works around the BMIDE bug by reading the BM status directly
1057 * but we take the simpler approach of disabling C3 for these
1058 * parts.
1059 *
1060 * See erratum #18 ("C3 Power State/BMIDE and Type-F DMA
1061 * Livelock") from the January 2002 PIIX4 specification update.
1062 * Applies to all PIIX4 models.
1063 *
1064 * Also, make sure that all interrupts cause a "Stop Break"
1065 * event to exit from C2 state.
1066 * Also, BRLD_EN_BM (ACPI_BITREG_BUS_MASTER_RLD in ACPI-speak)
1067 * should be set to zero, otherwise it causes C2 to short-sleep.
1068 * PIIX4 doesn't properly support C3 and bus master activity
1069 * need not break out of C2.
1070 */
1071 case PCI_REVISION_A_STEP:
1072 case PCI_REVISION_B_STEP:
1073 case PCI_REVISION_4E:
1074 case PCI_REVISION_4M:
1075 cpu_quirks |= CPU_QUIRK_NO_C3;
1076 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1077 "acpi_cpu: working around PIIX4 bug, disabling C3\n"));
1078
1079 val = pci_read_config(acpi_dev, PIIX4_DEVACTB_REG, 4);
1080 if ((val & PIIX4_STOP_BREAK_MASK) != PIIX4_STOP_BREAK_MASK) {
1081 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1082 "acpi_cpu: PIIX4: enabling IRQs to generate Stop Break\n"));
1083 val |= PIIX4_STOP_BREAK_MASK;
1084 pci_write_config(acpi_dev, PIIX4_DEVACTB_REG, val, 4);
1085 }
1086 AcpiReadBitRegister(ACPI_BITREG_BUS_MASTER_RLD, &val);
1087 if (val) {
1088 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1089 "acpi_cpu: PIIX4: reset BRLD_EN_BM\n"));
1090 AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_RLD, 0);
1091 }
1092 break;
1093 default:
1094 break;
1095 }
1096 }
1097
1098 return (0);
1099 }
1100
1101 static int
1102 acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS)
1103 {
1104 struct acpi_cpu_softc *sc;
1105 struct sbuf sb;
1106 char buf[128];
1107 int i;
1108 uintmax_t fract, sum, whole;
1109
1110 sc = (struct acpi_cpu_softc *) arg1;
1111 sum = 0;
1112 for (i = 0; i < sc->cpu_cx_count; i++)
1113 sum += sc->cpu_cx_stats[i];
1114 sbuf_new(&sb, buf, sizeof(buf), SBUF_FIXEDLEN);
1115 for (i = 0; i < sc->cpu_cx_count; i++) {
1116 if (sum > 0) {
1117 whole = (uintmax_t)sc->cpu_cx_stats[i] * 100;
1118 fract = (whole % sum) * 100;
1119 sbuf_printf(&sb, "%u.%02u%% ", (u_int)(whole / sum),
1120 (u_int)(fract / sum));
1121 } else
1122 sbuf_printf(&sb, "0.00%% ");
1123 }
1124 sbuf_printf(&sb, "last %dus", sc->cpu_prev_sleep);
1125 sbuf_trim(&sb);
1126 sbuf_finish(&sb);
1127 sysctl_handle_string(oidp, sbuf_data(&sb), sbuf_len(&sb), req);
1128 sbuf_delete(&sb);
1129
1130 return (0);
1131 }
1132
1133 static int
1134 acpi_cpu_set_cx_lowest(struct acpi_cpu_softc *sc, int val)
1135 {
1136 int i;
1137
1138 ACPI_SERIAL_ASSERT(cpu);
1139 sc->cpu_cx_lowest = val;
1140
1141 /* If not disabling, cache the new lowest non-C3 state. */
1142 sc->cpu_non_c3 = 0;
1143 for (i = sc->cpu_cx_lowest; i >= 0; i--) {
1144 if (sc->cpu_cx_states[i].type < ACPI_STATE_C3) {
1145 sc->cpu_non_c3 = i;
1146 break;
1147 }
1148 }
1149
1150 /* Reset the statistics counters. */
1151 bzero(sc->cpu_cx_stats, sizeof(sc->cpu_cx_stats));
1152 return (0);
1153 }
1154
1155 static int
1156 acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS)
1157 {
1158 struct acpi_cpu_softc *sc;
1159 char state[8];
1160 int val, error;
1161
1162 sc = (struct acpi_cpu_softc *) arg1;
1163 snprintf(state, sizeof(state), "C%d", sc->cpu_cx_lowest + 1);
1164 error = sysctl_handle_string(oidp, state, sizeof(state), req);
1165 if (error != 0 || req->newptr == NULL)
1166 return (error);
1167 if (strlen(state) < 2 || toupper(state[0]) != 'C')
1168 return (EINVAL);
1169 val = (int) strtol(state + 1, NULL, 10) - 1;
1170 if (val < 0 || val > sc->cpu_cx_count - 1)
1171 return (EINVAL);
1172
1173 ACPI_SERIAL_BEGIN(cpu);
1174 acpi_cpu_set_cx_lowest(sc, val);
1175 ACPI_SERIAL_END(cpu);
1176
1177 return (0);
1178 }
1179
1180 static int
1181 acpi_cpu_global_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS)
1182 {
1183 struct acpi_cpu_softc *sc;
1184 char state[8];
1185 int val, error, i;
1186
1187 snprintf(state, sizeof(state), "C%d", cpu_cx_lowest + 1);
1188 error = sysctl_handle_string(oidp, state, sizeof(state), req);
1189 if (error != 0 || req->newptr == NULL)
1190 return (error);
1191 if (strlen(state) < 2 || toupper(state[0]) != 'C')
1192 return (EINVAL);
1193 val = (int) strtol(state + 1, NULL, 10) - 1;
1194 if (val < 0 || val > cpu_cx_count - 1)
1195 return (EINVAL);
1196 cpu_cx_lowest = val;
1197
1198 /* Update the new lowest useable Cx state for all CPUs. */
1199 ACPI_SERIAL_BEGIN(cpu);
1200 for (i = 0; i < cpu_ndevices; i++) {
1201 sc = device_get_softc(cpu_devices[i]);
1202 acpi_cpu_set_cx_lowest(sc, min(val, sc->cpu_cx_count - 1));
1203 }
1204 ACPI_SERIAL_END(cpu);
1205
1206 return (0);
1207 }
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