1 /*-
2 * Copyright (c) 2000 Michael Smith
3 * Copyright (c) 2000 BSDi
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD: releng/10.4/sys/dev/acpica/acpi_pcib_acpi.c 318393 2017-05-17 02:40:06Z sephe $");
30
31 #include "opt_acpi.h"
32 #include <sys/param.h>
33 #include <sys/bus.h>
34 #include <sys/kernel.h>
35 #include <sys/limits.h>
36 #include <sys/malloc.h>
37 #include <sys/module.h>
38 #include <sys/rman.h>
39 #include <sys/sysctl.h>
40
41 #include <contrib/dev/acpica/include/acpi.h>
42 #include <contrib/dev/acpica/include/accommon.h>
43
44 #include <dev/acpica/acpivar.h>
45
46 #include <machine/pci_cfgreg.h>
47 #include <dev/pci/pcireg.h>
48 #include <dev/pci/pcivar.h>
49 #include <dev/pci/pcib_private.h>
50 #include "pcib_if.h"
51
52 #include <dev/acpica/acpi_pcibvar.h>
53
54 /* Hooks for the ACPI CA debugging infrastructure. */
55 #define _COMPONENT ACPI_BUS
56 ACPI_MODULE_NAME("PCI_ACPI")
57
58 struct acpi_hpcib_softc {
59 device_t ap_dev;
60 ACPI_HANDLE ap_handle;
61 int ap_flags;
62
63 int ap_segment; /* PCI domain */
64 int ap_bus; /* bios-assigned bus number */
65 int ap_addr; /* device/func of PCI-Host bridge */
66
67 ACPI_BUFFER ap_prt; /* interrupt routing table */
68 #ifdef NEW_PCIB
69 struct pcib_host_resources ap_host_res;
70 #endif
71 };
72
73 static int acpi_pcib_acpi_probe(device_t bus);
74 static int acpi_pcib_acpi_attach(device_t bus);
75 static int acpi_pcib_read_ivar(device_t dev, device_t child,
76 int which, uintptr_t *result);
77 static int acpi_pcib_write_ivar(device_t dev, device_t child,
78 int which, uintptr_t value);
79 static uint32_t acpi_pcib_read_config(device_t dev, u_int bus,
80 u_int slot, u_int func, u_int reg, int bytes);
81 static void acpi_pcib_write_config(device_t dev, u_int bus,
82 u_int slot, u_int func, u_int reg, uint32_t data,
83 int bytes);
84 static int acpi_pcib_acpi_route_interrupt(device_t pcib,
85 device_t dev, int pin);
86 static int acpi_pcib_alloc_msi(device_t pcib, device_t dev,
87 int count, int maxcount, int *irqs);
88 static int acpi_pcib_map_msi(device_t pcib, device_t dev,
89 int irq, uint64_t *addr, uint32_t *data);
90 static int acpi_pcib_alloc_msix(device_t pcib, device_t dev,
91 int *irq);
92 static struct resource *acpi_pcib_acpi_alloc_resource(device_t dev,
93 device_t child, int type, int *rid,
94 u_long start, u_long end, u_long count,
95 u_int flags);
96 #ifdef NEW_PCIB
97 static int acpi_pcib_acpi_adjust_resource(device_t dev,
98 device_t child, int type, struct resource *r,
99 u_long start, u_long end);
100 #ifdef PCI_RES_BUS
101 static int acpi_pcib_acpi_release_resource(device_t dev,
102 device_t child, int type, int rid,
103 struct resource *r);
104 #endif
105 #endif
106
107 static device_method_t acpi_pcib_acpi_methods[] = {
108 /* Device interface */
109 DEVMETHOD(device_probe, acpi_pcib_acpi_probe),
110 DEVMETHOD(device_attach, acpi_pcib_acpi_attach),
111 DEVMETHOD(device_shutdown, bus_generic_shutdown),
112 DEVMETHOD(device_suspend, bus_generic_suspend),
113 DEVMETHOD(device_resume, bus_generic_resume),
114
115 /* Bus interface */
116 DEVMETHOD(bus_read_ivar, acpi_pcib_read_ivar),
117 DEVMETHOD(bus_write_ivar, acpi_pcib_write_ivar),
118 DEVMETHOD(bus_alloc_resource, acpi_pcib_acpi_alloc_resource),
119 #ifdef NEW_PCIB
120 DEVMETHOD(bus_adjust_resource, acpi_pcib_acpi_adjust_resource),
121 #else
122 DEVMETHOD(bus_adjust_resource, bus_generic_adjust_resource),
123 #endif
124 #if defined(NEW_PCIB) && defined(PCI_RES_BUS)
125 DEVMETHOD(bus_release_resource, acpi_pcib_acpi_release_resource),
126 #else
127 DEVMETHOD(bus_release_resource, bus_generic_release_resource),
128 #endif
129 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
130 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
131 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
132 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
133
134 /* pcib interface */
135 DEVMETHOD(pcib_maxslots, pcib_maxslots),
136 DEVMETHOD(pcib_read_config, acpi_pcib_read_config),
137 DEVMETHOD(pcib_write_config, acpi_pcib_write_config),
138 DEVMETHOD(pcib_route_interrupt, acpi_pcib_acpi_route_interrupt),
139 DEVMETHOD(pcib_alloc_msi, acpi_pcib_alloc_msi),
140 DEVMETHOD(pcib_release_msi, pcib_release_msi),
141 DEVMETHOD(pcib_alloc_msix, acpi_pcib_alloc_msix),
142 DEVMETHOD(pcib_release_msix, pcib_release_msix),
143 DEVMETHOD(pcib_map_msi, acpi_pcib_map_msi),
144 DEVMETHOD(pcib_power_for_sleep, acpi_pcib_power_for_sleep),
145
146 DEVMETHOD_END
147 };
148
149 static devclass_t pcib_devclass;
150
151 DEFINE_CLASS_0(pcib, acpi_pcib_acpi_driver, acpi_pcib_acpi_methods,
152 sizeof(struct acpi_hpcib_softc));
153 DRIVER_MODULE(acpi_pcib, acpi, acpi_pcib_acpi_driver, pcib_devclass, 0, 0);
154 MODULE_DEPEND(acpi_pcib, acpi, 1, 1, 1);
155
156 static int
157 acpi_pcib_acpi_probe(device_t dev)
158 {
159 ACPI_DEVICE_INFO *devinfo;
160 ACPI_HANDLE h;
161 int root;
162
163 if (acpi_disabled("pcib") || (h = acpi_get_handle(dev)) == NULL ||
164 ACPI_FAILURE(AcpiGetObjectInfo(h, &devinfo)))
165 return (ENXIO);
166 root = (devinfo->Flags & ACPI_PCI_ROOT_BRIDGE) != 0;
167 AcpiOsFree(devinfo);
168 if (!root || pci_cfgregopen() == 0)
169 return (ENXIO);
170
171 device_set_desc(dev, "ACPI Host-PCI bridge");
172 return (0);
173 }
174
175 #ifdef NEW_PCIB
176 static ACPI_STATUS
177 acpi_pcib_producer_handler(ACPI_RESOURCE *res, void *context)
178 {
179 struct acpi_hpcib_softc *sc;
180 UINT64 length, min, max;
181 u_int flags;
182 int error, type;
183
184 sc = context;
185 switch (res->Type) {
186 case ACPI_RESOURCE_TYPE_START_DEPENDENT:
187 case ACPI_RESOURCE_TYPE_END_DEPENDENT:
188 panic("host bridge has depenedent resources");
189 case ACPI_RESOURCE_TYPE_ADDRESS16:
190 case ACPI_RESOURCE_TYPE_ADDRESS32:
191 case ACPI_RESOURCE_TYPE_ADDRESS64:
192 case ACPI_RESOURCE_TYPE_EXTENDED_ADDRESS64:
193 if (res->Data.Address.ProducerConsumer != ACPI_PRODUCER)
194 break;
195 switch (res->Type) {
196 case ACPI_RESOURCE_TYPE_ADDRESS16:
197 min = res->Data.Address16.Address.Minimum;
198 max = res->Data.Address16.Address.Maximum;
199 length = res->Data.Address16.Address.AddressLength;
200 break;
201 case ACPI_RESOURCE_TYPE_ADDRESS32:
202 min = res->Data.Address32.Address.Minimum;
203 max = res->Data.Address32.Address.Maximum;
204 length = res->Data.Address32.Address.AddressLength;
205 break;
206 case ACPI_RESOURCE_TYPE_ADDRESS64:
207 min = res->Data.Address64.Address.Minimum;
208 max = res->Data.Address64.Address.Maximum;
209 length = res->Data.Address64.Address.AddressLength;
210 break;
211 default:
212 KASSERT(res->Type ==
213 ACPI_RESOURCE_TYPE_EXTENDED_ADDRESS64,
214 ("should never happen"));
215 min = res->Data.ExtAddress64.Address.Minimum;
216 max = res->Data.ExtAddress64.Address.Maximum;
217 length = res->Data.ExtAddress64.Address.AddressLength;
218 break;
219 }
220 if (length == 0)
221 break;
222 if (min + length - 1 != max &&
223 (res->Data.Address.MinAddressFixed != ACPI_ADDRESS_FIXED ||
224 res->Data.Address.MaxAddressFixed != ACPI_ADDRESS_FIXED))
225 break;
226 flags = 0;
227 switch (res->Data.Address.ResourceType) {
228 case ACPI_MEMORY_RANGE:
229 type = SYS_RES_MEMORY;
230 if (res->Type != ACPI_RESOURCE_TYPE_EXTENDED_ADDRESS64) {
231 if (res->Data.Address.Info.Mem.Caching ==
232 ACPI_PREFETCHABLE_MEMORY)
233 flags |= RF_PREFETCHABLE;
234 } else {
235 /*
236 * XXX: Parse prefetch flag out of
237 * TypeSpecific.
238 */
239 }
240 break;
241 case ACPI_IO_RANGE:
242 type = SYS_RES_IOPORT;
243 break;
244 #ifdef PCI_RES_BUS
245 case ACPI_BUS_NUMBER_RANGE:
246 type = PCI_RES_BUS;
247 break;
248 #endif
249 default:
250 return (AE_OK);
251 }
252
253 if (min + length - 1 != max)
254 device_printf(sc->ap_dev,
255 "Length mismatch for %d range: %jx vs %jx\n", type,
256 (uintmax_t)(max - min + 1), (uintmax_t)length);
257 #ifdef __i386__
258 if (min > ULONG_MAX) {
259 device_printf(sc->ap_dev,
260 "Ignoring %d range above 4GB (%#jx-%#jx)\n",
261 type, (uintmax_t)min, (uintmax_t)max);
262 break;
263 }
264 if (max > ULONG_MAX) {
265 device_printf(sc->ap_dev,
266 "Truncating end of %d range above 4GB (%#jx-%#jx)\n",
267 type, (uintmax_t)min, (uintmax_t)max);
268 max = ULONG_MAX;
269 }
270 #endif
271 error = pcib_host_res_decodes(&sc->ap_host_res, type, min, max,
272 flags);
273 if (error)
274 panic("Failed to manage %d range (%#jx-%#jx): %d",
275 type, (uintmax_t)min, (uintmax_t)max, error);
276 break;
277 default:
278 break;
279 }
280 return (AE_OK);
281 }
282 #endif
283
284 #if defined(NEW_PCIB) && defined(PCI_RES_BUS)
285 static int
286 first_decoded_bus(struct acpi_hpcib_softc *sc, u_long *startp)
287 {
288 struct resource_list_entry *rle;
289
290 rle = resource_list_find(&sc->ap_host_res.hr_rl, PCI_RES_BUS, 0);
291 if (rle == NULL)
292 return (ENXIO);
293 *startp = rle->start;
294 return (0);
295 }
296 #endif
297
298 static void
299 acpi_pcib_osc(struct acpi_hpcib_softc *sc)
300 {
301 ACPI_STATUS status;
302 uint32_t cap_set[3];
303
304 static uint8_t pci_host_bridge_uuid[ACPI_UUID_LENGTH] = {
305 0x5b, 0x4d, 0xdb, 0x33, 0xf7, 0x1f, 0x1c, 0x40,
306 0x96, 0x57, 0x74, 0x41, 0xc0, 0x3d, 0xd7, 0x66
307 };
308
309 /* Support Field: Extended PCI Config Space, MSI */
310 cap_set[1] = 0x11;
311
312 /* Control Field */
313 cap_set[2] = 0;
314
315 status = acpi_EvaluateOSC(sc->ap_handle, pci_host_bridge_uuid, 1,
316 nitems(cap_set), cap_set, cap_set, false);
317 if (ACPI_FAILURE(status)) {
318 if (status == AE_NOT_FOUND)
319 return;
320 device_printf(sc->ap_dev, "_OSC failed: %s\n",
321 AcpiFormatException(status));
322 return;
323 }
324
325 if (cap_set[0] != 0) {
326 device_printf(sc->ap_dev, "_OSC returned error %#x\n",
327 cap_set[0]);
328 }
329 }
330
331 static int
332 acpi_pcib_acpi_attach(device_t dev)
333 {
334 struct acpi_hpcib_softc *sc;
335 ACPI_STATUS status;
336 static int bus0_seen = 0;
337 u_int slot, func, busok;
338 #if defined(NEW_PCIB) && defined(PCI_RES_BUS)
339 struct resource *bus_res;
340 u_long start;
341 int rid;
342 #endif
343 uint8_t busno;
344
345 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
346
347 sc = device_get_softc(dev);
348 sc->ap_dev = dev;
349 sc->ap_handle = acpi_get_handle(dev);
350
351 /*
352 * Don't attach if we're not really there.
353 */
354 if (!acpi_DeviceIsPresent(dev))
355 return (ENXIO);
356
357 acpi_pcib_osc(sc);
358
359 /*
360 * Get our segment number by evaluating _SEG.
361 * It's OK for this to not exist.
362 */
363 status = acpi_GetInteger(sc->ap_handle, "_SEG", &sc->ap_segment);
364 if (ACPI_FAILURE(status)) {
365 if (status != AE_NOT_FOUND) {
366 device_printf(dev, "could not evaluate _SEG - %s\n",
367 AcpiFormatException(status));
368 return_VALUE (ENXIO);
369 }
370 /* If it's not found, assume 0. */
371 sc->ap_segment = 0;
372 }
373
374 /*
375 * Get the address (device and function) of the associated
376 * PCI-Host bridge device from _ADR. Assume we don't have one if
377 * it doesn't exist.
378 */
379 status = acpi_GetInteger(sc->ap_handle, "_ADR", &sc->ap_addr);
380 if (ACPI_FAILURE(status)) {
381 device_printf(dev, "could not evaluate _ADR - %s\n",
382 AcpiFormatException(status));
383 sc->ap_addr = -1;
384 }
385
386 #ifdef NEW_PCIB
387 /*
388 * Determine which address ranges this bridge decodes and setup
389 * resource managers for those ranges.
390 */
391 if (pcib_host_res_init(sc->ap_dev, &sc->ap_host_res) != 0)
392 panic("failed to init hostb resources");
393 if (!acpi_disabled("hostres")) {
394 status = AcpiWalkResources(sc->ap_handle, "_CRS",
395 acpi_pcib_producer_handler, sc);
396 if (ACPI_FAILURE(status) && status != AE_NOT_FOUND)
397 device_printf(sc->ap_dev, "failed to parse resources: %s\n",
398 AcpiFormatException(status));
399 }
400 #endif
401
402 /*
403 * Get our base bus number by evaluating _BBN.
404 * If this doesn't work, we assume we're bus number 0.
405 *
406 * XXX note that it may also not exist in the case where we are
407 * meant to use a private configuration space mechanism for this bus,
408 * so we should dig out our resources and check to see if we have
409 * anything like that. How do we do this?
410 * XXX If we have the requisite information, and if we don't think the
411 * default PCI configuration space handlers can deal with this bus,
412 * we should attach our own handler.
413 * XXX invoke _REG on this for the PCI config space address space?
414 * XXX It seems many BIOS's with multiple Host-PCI bridges do not set
415 * _BBN correctly. They set _BBN to zero for all bridges. Thus,
416 * if _BBN is zero and PCI bus 0 already exists, we try to read our
417 * bus number from the configuration registers at address _ADR.
418 * We only do this for domain/segment 0 in the hopes that this is
419 * only needed for old single-domain machines.
420 */
421 status = acpi_GetInteger(sc->ap_handle, "_BBN", &sc->ap_bus);
422 if (ACPI_FAILURE(status)) {
423 if (status != AE_NOT_FOUND) {
424 device_printf(dev, "could not evaluate _BBN - %s\n",
425 AcpiFormatException(status));
426 return (ENXIO);
427 } else {
428 /* If it's not found, assume 0. */
429 sc->ap_bus = 0;
430 }
431 }
432
433 /*
434 * If this is segment 0, the bus is zero, and PCI bus 0 already
435 * exists, read the bus number via PCI config space.
436 */
437 busok = 1;
438 if (sc->ap_segment == 0 && sc->ap_bus == 0 && bus0_seen) {
439 busok = 0;
440 if (sc->ap_addr != -1) {
441 /* XXX: We assume bus 0. */
442 slot = ACPI_ADR_PCI_SLOT(sc->ap_addr);
443 func = ACPI_ADR_PCI_FUNC(sc->ap_addr);
444 if (bootverbose)
445 device_printf(dev, "reading config registers from 0:%d:%d\n",
446 slot, func);
447 if (host_pcib_get_busno(pci_cfgregread, 0, slot, func, &busno) == 0)
448 device_printf(dev, "couldn't read bus number from cfg space\n");
449 else {
450 sc->ap_bus = busno;
451 busok = 1;
452 }
453 }
454 }
455
456 #if defined(NEW_PCIB) && defined(PCI_RES_BUS)
457 /*
458 * If nothing else worked, hope that ACPI at least lays out the
459 * Host-PCI bridges in order and that as a result the next free
460 * bus number is our bus number.
461 */
462 if (busok == 0) {
463 /*
464 * If we have a region of bus numbers, use the first
465 * number for our bus.
466 */
467 if (first_decoded_bus(sc, &start) == 0)
468 sc->ap_bus = start;
469 else {
470 rid = 0;
471 bus_res = pci_domain_alloc_bus(sc->ap_segment, dev, &rid, 0,
472 PCI_BUSMAX, 1, 0);
473 if (bus_res == NULL) {
474 device_printf(dev,
475 "could not allocate bus number\n");
476 pcib_host_res_free(dev, &sc->ap_host_res);
477 return (ENXIO);
478 }
479 sc->ap_bus = rman_get_start(bus_res);
480 pci_domain_release_bus(sc->ap_segment, dev, rid, bus_res);
481 }
482 } else {
483 /*
484 * Require the bus number from _BBN to match the start of any
485 * decoded range.
486 */
487 if (first_decoded_bus(sc, &start) == 0 && sc->ap_bus != start) {
488 device_printf(dev,
489 "bus number %d does not match start of decoded range %ju\n",
490 sc->ap_bus, (uintmax_t)start);
491 pcib_host_res_free(dev, &sc->ap_host_res);
492 return (ENXIO);
493 }
494 }
495 #else
496 /*
497 * If nothing else worked, hope that ACPI at least lays out the
498 * host-PCI bridges in order and that as a result our unit number
499 * is actually our bus number. There are several reasons this
500 * might not be true.
501 */
502 if (busok == 0) {
503 sc->ap_bus = device_get_unit(dev);
504 device_printf(dev, "trying bus number %d\n", sc->ap_bus);
505 }
506 #endif
507
508 /* If this is bus 0 on segment 0, note that it has been seen already. */
509 if (sc->ap_segment == 0 && sc->ap_bus == 0)
510 bus0_seen = 1;
511
512 bus_generic_probe(dev);
513 return (acpi_pcib_attach(dev, &sc->ap_prt, sc->ap_bus));
514 }
515
516 /*
517 * Support for standard PCI bridge ivars.
518 */
519 static int
520 acpi_pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
521 {
522 struct acpi_hpcib_softc *sc = device_get_softc(dev);
523
524 switch (which) {
525 case PCIB_IVAR_DOMAIN:
526 *result = sc->ap_segment;
527 return (0);
528 case PCIB_IVAR_BUS:
529 *result = sc->ap_bus;
530 return (0);
531 case ACPI_IVAR_HANDLE:
532 *result = (uintptr_t)sc->ap_handle;
533 return (0);
534 case ACPI_IVAR_FLAGS:
535 *result = (uintptr_t)sc->ap_flags;
536 return (0);
537 }
538 return (ENOENT);
539 }
540
541 static int
542 acpi_pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
543 {
544 struct acpi_hpcib_softc *sc = device_get_softc(dev);
545
546 switch (which) {
547 case PCIB_IVAR_DOMAIN:
548 return (EINVAL);
549 case PCIB_IVAR_BUS:
550 sc->ap_bus = value;
551 return (0);
552 case ACPI_IVAR_HANDLE:
553 sc->ap_handle = (ACPI_HANDLE)value;
554 return (0);
555 case ACPI_IVAR_FLAGS:
556 sc->ap_flags = (int)value;
557 return (0);
558 }
559 return (ENOENT);
560 }
561
562 static uint32_t
563 acpi_pcib_read_config(device_t dev, u_int bus, u_int slot, u_int func,
564 u_int reg, int bytes)
565 {
566 return (pci_cfgregread(bus, slot, func, reg, bytes));
567 }
568
569 static void
570 acpi_pcib_write_config(device_t dev, u_int bus, u_int slot, u_int func,
571 u_int reg, uint32_t data, int bytes)
572 {
573 pci_cfgregwrite(bus, slot, func, reg, data, bytes);
574 }
575
576 static int
577 acpi_pcib_acpi_route_interrupt(device_t pcib, device_t dev, int pin)
578 {
579 struct acpi_hpcib_softc *sc = device_get_softc(pcib);
580
581 return (acpi_pcib_route_interrupt(pcib, dev, pin, &sc->ap_prt));
582 }
583
584 static int
585 acpi_pcib_alloc_msi(device_t pcib, device_t dev, int count, int maxcount,
586 int *irqs)
587 {
588 device_t bus;
589
590 bus = device_get_parent(pcib);
591 return (PCIB_ALLOC_MSI(device_get_parent(bus), dev, count, maxcount,
592 irqs));
593 }
594
595 static int
596 acpi_pcib_alloc_msix(device_t pcib, device_t dev, int *irq)
597 {
598 device_t bus;
599
600 bus = device_get_parent(pcib);
601 return (PCIB_ALLOC_MSIX(device_get_parent(bus), dev, irq));
602 }
603
604 static int
605 acpi_pcib_map_msi(device_t pcib, device_t dev, int irq, uint64_t *addr,
606 uint32_t *data)
607 {
608 struct acpi_hpcib_softc *sc;
609 device_t bus, hostb;
610 int error;
611
612 bus = device_get_parent(pcib);
613 error = PCIB_MAP_MSI(device_get_parent(bus), dev, irq, addr, data);
614 if (error)
615 return (error);
616
617 sc = device_get_softc(pcib);
618 if (sc->ap_addr == -1)
619 return (0);
620 /* XXX: Assumes all bridges are on bus 0. */
621 hostb = pci_find_dbsf(sc->ap_segment, 0, ACPI_ADR_PCI_SLOT(sc->ap_addr),
622 ACPI_ADR_PCI_FUNC(sc->ap_addr));
623 if (hostb != NULL)
624 pci_ht_map_msi(hostb, *addr);
625 return (0);
626 }
627
628 struct resource *
629 acpi_pcib_acpi_alloc_resource(device_t dev, device_t child, int type, int *rid,
630 u_long start, u_long end, u_long count, u_int flags)
631 {
632 #ifdef NEW_PCIB
633 struct acpi_hpcib_softc *sc;
634 struct resource *res;
635 #endif
636
637 #if defined(__i386__) || defined(__amd64__)
638 start = hostb_alloc_start(type, start, end, count);
639 #endif
640
641 #ifdef NEW_PCIB
642 sc = device_get_softc(dev);
643 #ifdef PCI_RES_BUS
644 if (type == PCI_RES_BUS)
645 return (pci_domain_alloc_bus(sc->ap_segment, child, rid, start, end,
646 count, flags));
647 #endif
648 res = pcib_host_res_alloc(&sc->ap_host_res, child, type, rid, start, end,
649 count, flags);
650
651 /*
652 * XXX: If this is a request for a specific range, assume it is
653 * correct and pass it up to the parent. What we probably want to
654 * do long-term is explicitly trust any firmware-configured
655 * resources during the initial bus scan on boot and then disable
656 * this after that.
657 */
658 if (res == NULL && start + count - 1 == end)
659 res = bus_generic_alloc_resource(dev, child, type, rid, start, end,
660 count, flags);
661 return (res);
662 #else
663 return (bus_generic_alloc_resource(dev, child, type, rid, start, end,
664 count, flags));
665 #endif
666 }
667
668 #ifdef NEW_PCIB
669 int
670 acpi_pcib_acpi_adjust_resource(device_t dev, device_t child, int type,
671 struct resource *r, u_long start, u_long end)
672 {
673 struct acpi_hpcib_softc *sc;
674
675 sc = device_get_softc(dev);
676 #ifdef PCI_RES_BUS
677 if (type == PCI_RES_BUS)
678 return (pci_domain_adjust_bus(sc->ap_segment, child, r, start,
679 end));
680 #endif
681 return (pcib_host_res_adjust(&sc->ap_host_res, child, type, r, start,
682 end));
683 }
684
685 #ifdef PCI_RES_BUS
686 int
687 acpi_pcib_acpi_release_resource(device_t dev, device_t child, int type, int rid,
688 struct resource *r)
689 {
690 struct acpi_hpcib_softc *sc;
691
692 sc = device_get_softc(dev);
693 if (type == PCI_RES_BUS)
694 return (pci_domain_release_bus(sc->ap_segment, child, rid, r));
695 return (bus_generic_release_resource(dev, child, type, rid, r));
696 }
697 #endif
698 #endif
Cache object: c4fc0fd31ab45c5b9721a998851eacc4
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