Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/dev/advansys/adv_pci.c
Version:
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1 /*- 2 * Device probe and attach routines for the following 3 * Advanced Systems Inc. SCSI controllers: 4 * 5 * Connectivity Products: 6 * ABP902/3902 - Bus-Master PCI (16 CDB) 7 * ABP3905 - Bus-Master PCI (16 CDB) 8 * ABP915 - Bus-Master PCI (16 CDB) 9 * ABP920 - Bus-Master PCI (16 CDB) 10 * ABP3922 - Bus-Master PCI (16 CDB) 11 * ABP3925 - Bus-Master PCI (16 CDB) 12 * ABP930 - Bus-Master PCI (16 CDB) * 13 * ABP930U - Bus-Master PCI Ultra (16 CDB) 14 * ABP930UA - Bus-Master PCI Ultra (16 CDB) 15 * ABP960 - Bus-Master PCI MAC/PC (16 CDB) ** 16 * ABP960U - Bus-Master PCI MAC/PC (16 CDB) ** 17 * 18 * Single Channel Products: 19 * ABP940 - Bus-Master PCI (240 CDB) 20 * ABP940U - Bus-Master PCI Ultra (240 CDB) 21 * ABP940UA/3940UA - Bus-Master PCI Ultra (240 CDB) 22 * ABP3960UA - Bus-Master PCI MAC/PC (240 CDB) 23 * ABP970 - Bus-Master PCI MAC/PC (240 CDB) 24 * ABP970U - Bus-Master PCI MAC/PC Ultra (240 CDB) 25 * 26 * Dual Channel Products: 27 * ABP950 - Dual Channel Bus-Master PCI (240 CDB Per Channel) 28 * ABP980 - Four Channel Bus-Master PCI (240 CDB Per Channel) 29 * ABP980U - Four Channel Bus-Master PCI Ultra (240 CDB Per Channel) 30 * ABP980UA/3980UA - Four Channel Bus-Master PCI Ultra (16 CDB Per Chan.) 31 * 32 * Footnotes: 33 * * This board has been sold by SIIG as the Fast SCSI Pro PCI. 34 * ** This board has been sold by Iomega as a Jaz Jet PCI adapter. 35 * 36 * Copyright (c) 1997 Justin Gibbs. 37 * All rights reserved. 38 * 39 * Redistribution and use in source and binary forms, with or without 40 * modification, are permitted provided that the following conditions 41 * are met: 42 * 1. Redistributions of source code must retain the above copyright 43 * notice, this list of conditions, and the following disclaimer, 44 * without modification. 45 * 2. The name of the author may not be used to endorse or promote products 46 * derived from this software without specific prior written permission. 47 * 48 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 49 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 50 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 51 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 52 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 53 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 54 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 55 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 56 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 57 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 58 * SUCH DAMAGE. 59 */ 60 61 #include <sys/cdefs.h> 62 __FBSDID("$FreeBSD: releng/5.4/sys/dev/advansys/adv_pci.c 141016 2005-01-30 01:00:13Z imp $"); 63 64 #include <sys/param.h> 65 #include <sys/systm.h> 66 #include <sys/kernel.h> 67 #include <sys/lock.h> 68 #include <sys/module.h> 69 #include <sys/mutex.h> 70 71 #include <machine/bus_pio.h> 72 #include <machine/bus.h> 73 #include <machine/resource.h> 74 #include <sys/bus.h> 75 #include <sys/rman.h> 76 77 #include <dev/pci/pcireg.h> 78 #include <dev/pci/pcivar.h> 79 80 #include <dev/advansys/advansys.h> 81 82 #define PCI_BASEADR0 PCIR_BAR(0) /* I/O Address */ 83 #define PCI_BASEADR1 PCIR_BAR(1) /* Mem I/O Address */ 84 85 #define PCI_DEVICE_ID_ADVANSYS_1200A 0x110010CD 86 #define PCI_DEVICE_ID_ADVANSYS_1200B 0x120010CD 87 #define PCI_DEVICE_ID_ADVANSYS_3000 0x130010CD 88 #define PCI_DEVICE_REV_ADVANSYS_3150 0x02 89 #define PCI_DEVICE_REV_ADVANSYS_3050 0x03 90 91 #define ADV_PCI_MAX_DMA_ADDR (0xFFFFFFFFL) 92 #define ADV_PCI_MAX_DMA_COUNT (0xFFFFFFFFL) 93 94 static int adv_pci_probe(device_t); 95 static int adv_pci_attach(device_t); 96 97 /* 98 * The overrun buffer shared amongst all PCI adapters. 99 */ 100 static u_int8_t* overrun_buf; 101 static bus_dma_tag_t overrun_dmat; 102 static bus_dmamap_t overrun_dmamap; 103 static bus_addr_t overrun_physbase; 104 105 static int 106 adv_pci_probe(device_t dev) 107 { 108 int rev = pci_get_revid(dev); 109 110 switch (pci_get_devid(dev)) { 111 case PCI_DEVICE_ID_ADVANSYS_1200A: 112 device_set_desc(dev, "AdvanSys ASC1200A SCSI controller"); 113 return 0; 114 case PCI_DEVICE_ID_ADVANSYS_1200B: 115 device_set_desc(dev, "AdvanSys ASC1200B SCSI controller"); 116 return 0; 117 case PCI_DEVICE_ID_ADVANSYS_3000: 118 if (rev == PCI_DEVICE_REV_ADVANSYS_3150) { 119 device_set_desc(dev, 120 "AdvanSys ASC3150 SCSI controller"); 121 return 0; 122 } else if (rev == PCI_DEVICE_REV_ADVANSYS_3050) { 123 device_set_desc(dev, 124 "AdvanSys ASC3030/50 SCSI controller"); 125 return 0; 126 } else if (rev >= PCI_DEVICE_REV_ADVANSYS_3150) { 127 device_set_desc(dev, "Unknown AdvanSys controller"); 128 return 0; 129 } 130 break; 131 default: 132 break; 133 } 134 return ENXIO; 135 } 136 137 static int 138 adv_pci_attach(device_t dev) 139 { 140 struct adv_softc *adv; 141 u_int32_t id; 142 u_int32_t command; 143 int error, rid, irqrid; 144 void *ih; 145 struct resource *iores, *irqres; 146 147 /* 148 * Determine the chip version. 149 */ 150 id = pci_read_config(dev, PCIR_DEVVENDOR, /*bytes*/4); 151 command = pci_read_config(dev, PCIR_COMMAND, /*bytes*/1); 152 153 /* 154 * These cards do not allow memory mapped accesses, so we must 155 * ensure that I/O accesses are available or we won't be able 156 * to talk to them. 157 */ 158 if ((command & (PCIM_CMD_PORTEN|PCIM_CMD_BUSMASTEREN)) 159 != (PCIM_CMD_PORTEN|PCIM_CMD_BUSMASTEREN)) { 160 command |= PCIM_CMD_PORTEN|PCIM_CMD_BUSMASTEREN; 161 pci_write_config(dev, PCIR_COMMAND, command, /*bytes*/1); 162 } 163 164 /* 165 * Early chips can't handle non-zero latency timer settings. 166 */ 167 if (id == PCI_DEVICE_ID_ADVANSYS_1200A 168 || id == PCI_DEVICE_ID_ADVANSYS_1200B) { 169 pci_write_config(dev, PCIR_LATTIMER, /*value*/0, /*bytes*/1); 170 } 171 172 rid = PCI_BASEADR0; 173 iores = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid, 174 RF_ACTIVE); 175 if (iores == NULL) 176 return ENXIO; 177 178 if (adv_find_signature(rman_get_bustag(iores), 179 rman_get_bushandle(iores)) == 0) { 180 bus_release_resource(dev, SYS_RES_IOPORT, rid, iores); 181 return ENXIO; 182 } 183 184 adv = adv_alloc(dev, rman_get_bustag(iores), rman_get_bushandle(iores)); 185 if (adv == NULL) { 186 bus_release_resource(dev, SYS_RES_IOPORT, rid, iores); 187 return ENXIO; 188 } 189 190 /* Allocate a dmatag for our transfer DMA maps */ 191 /* XXX Should be a child of the PCI bus dma tag */ 192 error = bus_dma_tag_create( 193 /* parent */ NULL, 194 /* alignment */ 1, 195 /* boundary */ 0, 196 /* lowaddr */ ADV_PCI_MAX_DMA_ADDR, 197 /* highaddr */ BUS_SPACE_MAXADDR, 198 /* filter */ NULL, 199 /* filterarg */ NULL, 200 /* maxsize */ BUS_SPACE_MAXSIZE_32BIT, 201 /* nsegments */ ~0, 202 /* maxsegsz */ ADV_PCI_MAX_DMA_COUNT, 203 /* flags */ 0, 204 /* lockfunc */ busdma_lock_mutex, 205 /* lockarg */ &Giant, 206 &adv->parent_dmat); 207 208 if (error != 0) { 209 printf("%s: Could not allocate DMA tag - error %d\n", 210 adv_name(adv), error); 211 adv_free(adv); 212 bus_release_resource(dev, SYS_RES_IOPORT, rid, iores); 213 return ENXIO; 214 } 215 216 adv->init_level++; 217 218 if (overrun_buf == NULL) { 219 /* Need to allocate our overrun buffer */ 220 if (bus_dma_tag_create( 221 /* parent */ adv->parent_dmat, 222 /* alignment */ 8, 223 /* boundary */ 0, 224 /* lowaddr */ ADV_PCI_MAX_DMA_ADDR, 225 /* highaddr */ BUS_SPACE_MAXADDR, 226 /* filter */ NULL, 227 /* filterarg */ NULL, 228 /* maxsize */ ADV_OVERRUN_BSIZE, 229 /* nsegments */ 1, 230 /* maxsegsz */ BUS_SPACE_MAXSIZE_32BIT, 231 /* flags */ 0, 232 /* lockfunc */ busdma_lock_mutex, 233 /* lockarg */ &Giant, 234 &overrun_dmat) != 0) { 235 bus_dma_tag_destroy(adv->parent_dmat); 236 adv_free(adv); 237 bus_release_resource(dev, SYS_RES_IOPORT, rid, iores); 238 return ENXIO; 239 } 240 if (bus_dmamem_alloc(overrun_dmat, 241 (void **)&overrun_buf, 242 BUS_DMA_NOWAIT, 243 &overrun_dmamap) != 0) { 244 bus_dma_tag_destroy(overrun_dmat); 245 bus_dma_tag_destroy(adv->parent_dmat); 246 adv_free(adv); 247 bus_release_resource(dev, SYS_RES_IOPORT, rid, iores); 248 return ENXIO; 249 } 250 /* And permanently map it in */ 251 bus_dmamap_load(overrun_dmat, overrun_dmamap, 252 overrun_buf, ADV_OVERRUN_BSIZE, 253 adv_map, &overrun_physbase, 254 /*flags*/0); 255 } 256 257 adv->overrun_physbase = overrun_physbase; 258 259 /* 260 * Stop the chip. 261 */ 262 ADV_OUTB(adv, ADV_CHIP_CTRL, ADV_CC_HALT); 263 ADV_OUTW(adv, ADV_CHIP_STATUS, 0); 264 265 adv->chip_version = ADV_INB(adv, ADV_NONEISA_CHIP_REVISION); 266 adv->type = ADV_PCI; 267 268 /* 269 * Setup active negation and signal filtering. 270 */ 271 { 272 u_int8_t extra_cfg; 273 274 if (adv->chip_version >= ADV_CHIP_VER_PCI_ULTRA_3150) 275 adv->type |= ADV_ULTRA; 276 if (adv->chip_version == ADV_CHIP_VER_PCI_ULTRA_3050) 277 extra_cfg = ADV_IFC_ACT_NEG | ADV_IFC_WR_EN_FILTER; 278 else 279 extra_cfg = ADV_IFC_ACT_NEG | ADV_IFC_SLEW_RATE; 280 ADV_OUTB(adv, ADV_REG_IFC, extra_cfg); 281 } 282 283 if (adv_init(adv) != 0) { 284 adv_free(adv); 285 bus_release_resource(dev, SYS_RES_IOPORT, rid, iores); 286 return ENXIO; 287 } 288 289 adv->max_dma_count = ADV_PCI_MAX_DMA_COUNT; 290 adv->max_dma_addr = ADV_PCI_MAX_DMA_ADDR; 291 292 #if CC_DISABLE_PCI_PARITY_INT 293 { 294 u_int16_t config_msw; 295 296 config_msw = ADV_INW(adv, ADV_CONFIG_MSW); 297 config_msw &= 0xFFC0; 298 ADV_OUTW(adv, ADV_CONFIG_MSW, config_msw); 299 } 300 #endif 301 302 if (id == PCI_DEVICE_ID_ADVANSYS_1200A 303 || id == PCI_DEVICE_ID_ADVANSYS_1200B) { 304 adv->bug_fix_control |= ADV_BUG_FIX_IF_NOT_DWB; 305 adv->bug_fix_control |= ADV_BUG_FIX_ASYN_USE_SYN; 306 adv->fix_asyn_xfer = ~0; 307 } 308 309 irqrid = 0; 310 irqres = bus_alloc_resource_any(dev, SYS_RES_IRQ, &irqrid, 311 RF_SHAREABLE | RF_ACTIVE); 312 if (irqres == NULL || 313 bus_setup_intr(dev, irqres, INTR_TYPE_CAM|INTR_ENTROPY, adv_intr, adv, &ih)) { 314 adv_free(adv); 315 bus_release_resource(dev, SYS_RES_IOPORT, rid, iores); 316 return ENXIO; 317 } 318 319 adv_attach(adv); 320 return 0; 321 } 322 323 static device_method_t adv_pci_methods[] = { 324 /* Device interface */ 325 DEVMETHOD(device_probe, adv_pci_probe), 326 DEVMETHOD(device_attach, adv_pci_attach), 327 { 0, 0 } 328 }; 329 330 static driver_t adv_pci_driver = { 331 "adv", adv_pci_methods, sizeof(struct adv_softc) 332 }; 333 334 static devclass_t adv_pci_devclass; 335 DRIVER_MODULE(adv, pci, adv_pci_driver, adv_pci_devclass, 0, 0);
Cache object: 706c58251e5c352022afdb8daf5e24bf
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