The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/advansys/adw_pci.c

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    1 /*-
    2  * Device probe and attach routines for the following
    3  * Advanced Systems Inc. SCSI controllers:
    4  *
    5  *      ABP[3]940UW - Bus-Master PCI Ultra-Wide (253 CDB)
    6  *      ABP950UW    - Dual Channel Bus-Master PCI Ultra-Wide (253 CDB/Channel)
    7  *      ABP970UW    - Bus-Master PCI Ultra-Wide (253 CDB)
    8  *      ABP3940U2W  - Bus-Master PCI LVD/Ultra2-Wide (253 CDB)
    9  *      ABP3950U2W  - Bus-Master PCI LVD/Ultra2-Wide (253 CDB)
   10  *
   11  * Copyright (c) 1998, 1999, 2000 Justin Gibbs.
   12  * All rights reserved.
   13  *
   14  * Redistribution and use in source and binary forms, with or without
   15  * modification, are permitted provided that the following conditions
   16  * are met:
   17  * 1. Redistributions of source code must retain the above copyright
   18  *    notice, this list of conditions, and the following disclaimer,
   19  *    without modification.
   20  * 2. The name of the author may not be used to endorse or promote products
   21  *    derived from this software without specific prior written permission.
   22  *
   23  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   25  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   26  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
   27  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   28  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   29  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   33  * SUCH DAMAGE.
   34  */
   35 
   36 #include <sys/cdefs.h>
   37 __FBSDID("$FreeBSD: releng/10.1/sys/dev/advansys/adw_pci.c 254263 2013-08-12 23:30:01Z scottl $");
   38 
   39 #include <sys/param.h>
   40 #include <sys/systm.h>
   41 #include <sys/kernel.h>
   42 #include <sys/module.h>
   43 #include <sys/lock.h>
   44 #include <sys/mutex.h>
   45 #include <sys/bus.h>
   46 
   47 #include <machine/bus.h>
   48 #include <machine/resource.h>
   49 
   50 #include <sys/rman.h>
   51 
   52 #include <dev/pci/pcireg.h>
   53 #include <dev/pci/pcivar.h>
   54 
   55 #include <cam/cam.h>
   56 #include <cam/scsi/scsi_all.h>
   57 
   58 #include <dev/advansys/adwvar.h>
   59 #include <dev/advansys/adwlib.h>
   60 #include <dev/advansys/adwmcode.h>
   61 
   62 #define ADW_PCI_IOBASE  PCIR_BAR(0)             /* I/O Address */
   63 #define ADW_PCI_MEMBASE PCIR_BAR(1)             /* Mem I/O Address */
   64 
   65 #define PCI_ID_ADVANSYS_3550            0x230010CD00000000ull
   66 #define PCI_ID_ADVANSYS_38C0800_REV1    0x250010CD00000000ull
   67 #define PCI_ID_ADVANSYS_38C1600_REV1    0x270010CD00000000ull
   68 #define PCI_ID_ALL_MASK                 0xFFFFFFFFFFFFFFFFull
   69 #define PCI_ID_DEV_VENDOR_MASK          0xFFFFFFFF00000000ull
   70 
   71 struct adw_pci_identity;
   72 typedef int (adw_device_setup_t)(device_t, struct adw_pci_identity *,
   73                                  struct adw_softc *adw);
   74 
   75 struct adw_pci_identity {
   76         u_int64_t                full_id;
   77         u_int64_t                id_mask;
   78         char                    *name;
   79         adw_device_setup_t      *setup;
   80         const struct adw_mcode  *mcode_data;
   81         const struct adw_eeprom *default_eeprom;
   82 };
   83 
   84 static adw_device_setup_t adw_asc3550_setup;
   85 static adw_device_setup_t adw_asc38C0800_setup;
   86 #ifdef NOTYET
   87 static adw_device_setup_t adw_asc38C1600_setup;
   88 #endif
   89 
   90 struct adw_pci_identity adw_pci_ident_table[] =
   91 {
   92         /* asc3550 based controllers */
   93         {
   94                 PCI_ID_ADVANSYS_3550,
   95                 PCI_ID_DEV_VENDOR_MASK,
   96                 "AdvanSys 3550 Ultra SCSI Adapter",
   97                 adw_asc3550_setup,
   98                 &adw_asc3550_mcode_data,
   99                 &adw_asc3550_default_eeprom
  100         },
  101         /* asc38C0800 based controllers */
  102         {
  103                 PCI_ID_ADVANSYS_38C0800_REV1,
  104                 PCI_ID_DEV_VENDOR_MASK,
  105                 "AdvanSys 38C0800 Ultra2 SCSI Adapter",
  106                 adw_asc38C0800_setup,
  107                 &adw_asc38C0800_mcode_data,
  108                 &adw_asc38C0800_default_eeprom
  109         },
  110 #ifdef NOTYET
  111         /* XXX Disabled until I have hardware to test with */
  112         /* asc38C1600 based controllers */
  113         {
  114                 PCI_ID_ADVANSYS_38C1600_REV1,
  115                 PCI_ID_DEV_VENDOR_MASK,
  116                 "AdvanSys 38C1600 Ultra160 SCSI Adapter",
  117                 adw_asc38C1600_setup,
  118                 NULL, /* None provided by vendor thus far */
  119                 NULL  /* None provided by vendor thus far */
  120         }
  121 #endif
  122 };
  123 
  124 static const int adw_num_pci_devs =
  125         sizeof(adw_pci_ident_table) / sizeof(*adw_pci_ident_table);
  126 
  127 #define ADW_PCI_MAX_DMA_ADDR    (0xFFFFFFFFUL)
  128 #define ADW_PCI_MAX_DMA_COUNT   (0xFFFFFFFFUL)
  129 
  130 static int adw_pci_probe(device_t dev);
  131 static int adw_pci_attach(device_t dev);
  132 
  133 static device_method_t adw_pci_methods[] = {
  134         /* Device interface */
  135         DEVMETHOD(device_probe,         adw_pci_probe),
  136         DEVMETHOD(device_attach,        adw_pci_attach),
  137         { 0, 0 }
  138 };
  139 
  140 static driver_t adw_pci_driver = {
  141         "adw",
  142         adw_pci_methods,
  143         sizeof(struct adw_softc)
  144 }; 
  145 
  146 static devclass_t adw_devclass;
  147 
  148 DRIVER_MODULE(adw, pci, adw_pci_driver, adw_devclass, 0, 0);
  149 MODULE_DEPEND(adw, pci, 1, 1, 1);
  150 
  151 static __inline u_int64_t
  152 adw_compose_id(u_int device, u_int vendor, u_int subdevice, u_int subvendor)
  153 {
  154         u_int64_t id;
  155 
  156         id = subvendor
  157            | (subdevice << 16)
  158            | ((u_int64_t)vendor << 32)
  159            | ((u_int64_t)device << 48);
  160 
  161         return (id);
  162 }
  163 
  164 static struct adw_pci_identity *
  165 adw_find_pci_device(device_t dev)
  166 {
  167         u_int64_t  full_id;
  168         struct     adw_pci_identity *entry;
  169         u_int      i;
  170 
  171         full_id = adw_compose_id(pci_get_device(dev),
  172                                  pci_get_vendor(dev),
  173                                  pci_get_subdevice(dev),
  174                                  pci_get_subvendor(dev));
  175 
  176         for (i = 0; i < adw_num_pci_devs; i++) {
  177                 entry = &adw_pci_ident_table[i];
  178                 if (entry->full_id == (full_id & entry->id_mask))
  179                         return (entry);
  180         }
  181         return (NULL);
  182 }
  183 
  184 static int
  185 adw_pci_probe(device_t dev)
  186 {
  187         struct  adw_pci_identity *entry;
  188 
  189         entry = adw_find_pci_device(dev);
  190         if (entry != NULL) {
  191                 device_set_desc(dev, entry->name);
  192                 return (BUS_PROBE_DEFAULT);
  193         }
  194         return (ENXIO);
  195 }
  196 
  197 static int
  198 adw_pci_attach(device_t dev)
  199 {
  200         struct          adw_softc *adw;
  201         struct          adw_pci_identity *entry;
  202         u_int16_t       command;
  203         struct          resource *regs;
  204         int             regs_type;
  205         int             regs_id;
  206         int             error;
  207         int             zero;
  208  
  209         entry = adw_find_pci_device(dev);
  210         if (entry == NULL)
  211                 return (ENXIO);
  212         regs = NULL;
  213         regs_type = 0;
  214         regs_id = 0;
  215 #ifdef ADW_ALLOW_MEMIO
  216         regs_type = SYS_RES_MEMORY;
  217         regs_id = ADW_PCI_MEMBASE;
  218         regs = bus_alloc_resource_any(dev, regs_type, &regs_id, RF_ACTIVE);
  219 #endif
  220         if (regs == NULL) {
  221                 regs_type = SYS_RES_IOPORT;
  222                 regs_id = ADW_PCI_IOBASE;
  223                 regs = bus_alloc_resource_any(dev, regs_type,
  224                                               &regs_id, RF_ACTIVE);
  225         }
  226 
  227         if (regs == NULL) {
  228                 device_printf(dev, "can't allocate register resources\n");
  229                 return (ENOMEM);
  230         }
  231 
  232         adw = adw_alloc(dev, regs, regs_type, regs_id);
  233         if (adw == NULL)
  234                 return(ENOMEM);
  235 
  236         /*
  237          * Now that we have access to our registers, just verify that
  238          * this really is an AdvanSys device.
  239          */
  240         if (adw_find_signature(adw) == 0) {
  241                 adw_free(adw);
  242                 return (ENXIO);
  243         }
  244 
  245         adw_reset_chip(adw);
  246 
  247         error = entry->setup(dev, entry, adw);
  248 
  249         if (error != 0)
  250                 return (error);
  251 
  252         /* Ensure busmastering is enabled */
  253         pci_enable_busmaster(dev);
  254 
  255         /* Allocate a dmatag for our transfer DMA maps */
  256         error = bus_dma_tag_create(
  257                         /* parent       */ bus_get_dma_tag(dev),
  258                         /* alignment    */ 1,
  259                         /* boundary     */ 0,
  260                         /* lowaddr      */ ADW_PCI_MAX_DMA_ADDR,
  261                         /* highaddr     */ BUS_SPACE_MAXADDR,
  262                         /* filter       */ NULL,
  263                         /* filterarg    */ NULL,
  264                         /* maxsize      */ BUS_SPACE_MAXSIZE_32BIT,
  265                         /* nsegments    */ ~0,
  266                         /* maxsegsz     */ ADW_PCI_MAX_DMA_COUNT,
  267                         /* flags        */ 0,
  268                         /* lockfunc     */ NULL,
  269                         /* lockarg      */ NULL,
  270                         &adw->parent_dmat);
  271 
  272         adw->init_level++;
  273  
  274         if (error != 0) {
  275                 device_printf(dev, "Could not allocate DMA tag - error %d\n",
  276                     error);
  277                 adw_free(adw);
  278                 return (error);
  279         }
  280 
  281         adw->init_level++;
  282 
  283         error = adw_init(adw);
  284         if (error != 0) {
  285                 adw_free(adw);
  286                 return (error);
  287         }
  288 
  289         /*
  290          * If the PCI Configuration Command Register "Parity Error Response
  291          * Control" Bit was clear (0), then set the microcode variable
  292          * 'control_flag' CONTROL_FLAG_IGNORE_PERR flag to tell the microcode
  293          * to ignore DMA parity errors.
  294          */
  295         command = pci_read_config(dev, PCIR_COMMAND, /*bytes*/2);
  296         if ((command & PCIM_CMD_PERRESPEN) == 0)
  297                 adw_lram_write_16(adw, ADW_MC_CONTROL_FLAG,
  298                                   adw_lram_read_16(adw, ADW_MC_CONTROL_FLAG)
  299                                   | ADW_MC_CONTROL_IGN_PERR);
  300 
  301         zero = 0;
  302         adw->irq_res_type = SYS_RES_IRQ;
  303         adw->irq = bus_alloc_resource_any(dev, adw->irq_res_type, &zero,
  304                                           RF_ACTIVE | RF_SHAREABLE);
  305         if (adw->irq == NULL) {
  306                 adw_free(adw);
  307                 return (ENOMEM);
  308         }
  309 
  310         error = adw_attach(adw);
  311         if (error != 0)
  312                 adw_free(adw);
  313         return (error);
  314 }
  315 
  316 static int
  317 adw_generic_setup(device_t dev, struct adw_pci_identity *entry,
  318                   struct adw_softc *adw)
  319 {
  320         adw->channel = pci_get_function(dev) == 1 ? 'B' : 'A';
  321         adw->chip = ADW_CHIP_NONE;
  322         adw->features = ADW_FENONE;
  323         adw->flags = ADW_FNONE;
  324         adw->mcode_data = entry->mcode_data;
  325         adw->default_eeprom = entry->default_eeprom;
  326         return (0);
  327 }
  328 
  329 static int
  330 adw_asc3550_setup(device_t dev, struct adw_pci_identity *entry,
  331                   struct adw_softc *adw)
  332 {
  333         int error;
  334 
  335         error = adw_generic_setup(dev, entry, adw);
  336         if (error != 0)
  337                 return (error);
  338         adw->chip = ADW_CHIP_ASC3550;
  339         adw->features = ADW_ASC3550_FE;
  340         adw->memsize = ADW_3550_MEMSIZE;
  341         /*
  342          * For ASC-3550, setting the START_CTL_EMFU [3:2] bits
  343          * sets a FIFO threshold of 128 bytes. This register is
  344          * only accessible to the host.
  345          */
  346         adw_outb(adw, ADW_DMA_CFG0,
  347                  ADW_DMA_CFG0_START_CTL_EM_FU|ADW_DMA_CFG0_READ_CMD_MRM);
  348         adw_outb(adw, ADW_MEM_CFG,
  349                  adw_inb(adw, ADW_MEM_CFG) | ADW_MEM_CFG_RAM_SZ_8KB);
  350         return (0);
  351 }
  352 
  353 static int
  354 adw_asc38C0800_setup(device_t dev, struct adw_pci_identity *entry,
  355                      struct adw_softc *adw)
  356 {
  357         int error;
  358 
  359         error = adw_generic_setup(dev, entry, adw);
  360         if (error != 0)
  361                 return (error);
  362         /*
  363          * For ASC-38C0800, set FIFO_THRESH_80B [6:4] bits and
  364          * START_CTL_TH [3:2] bits for the default FIFO threshold.
  365          *
  366          * Note: ASC-38C0800 FIFO threshold has been changed to 256 bytes.
  367          *
  368          * For DMA Errata #4 set the BC_THRESH_ENB bit.
  369          */
  370         adw_outb(adw, ADW_DMA_CFG0,
  371                  ADW_DMA_CFG0_BC_THRESH_ENB|ADW_DMA_CFG0_FIFO_THRESH_80B
  372                 |ADW_DMA_CFG0_START_CTL_TH|ADW_DMA_CFG0_READ_CMD_MRM);
  373         adw_outb(adw, ADW_MEM_CFG,
  374                  adw_inb(adw, ADW_MEM_CFG) | ADW_MEM_CFG_RAM_SZ_16KB);
  375         adw->chip = ADW_CHIP_ASC38C0800;
  376         adw->features = ADW_ASC38C0800_FE;
  377         adw->memsize = ADW_38C0800_MEMSIZE;
  378         return (error);
  379 }
  380 
  381 #ifdef NOTYET
  382 static int
  383 adw_asc38C1600_setup(device_t dev, struct adw_pci_identity *entry,
  384                      struct adw_softc *adw)
  385 {
  386         int error;
  387 
  388         error = adw_generic_setup(dev, entry, adw);
  389         if (error != 0)
  390                 return (error);
  391         adw->chip = ADW_CHIP_ASC38C1600;
  392         adw->features = ADW_ASC38C1600_FE;
  393         adw->memsize = ADW_38C1600_MEMSIZE;
  394         return (error);
  395 }
  396 #endif

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