Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/dev/advansys/adw_pci.c
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1 /*- 2 * Device probe and attach routines for the following 3 * Advanced Systems Inc. SCSI controllers: 4 * 5 * ABP[3]940UW - Bus-Master PCI Ultra-Wide (253 CDB) 6 * ABP950UW - Dual Channel Bus-Master PCI Ultra-Wide (253 CDB/Channel) 7 * ABP970UW - Bus-Master PCI Ultra-Wide (253 CDB) 8 * ABP3940U2W - Bus-Master PCI LVD/Ultra2-Wide (253 CDB) 9 * ABP3950U2W - Bus-Master PCI LVD/Ultra2-Wide (253 CDB) 10 * 11 * Copyright (c) 1998, 1999, 2000 Justin Gibbs. 12 * All rights reserved. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions, and the following disclaimer, 19 * without modification. 20 * 2. The name of the author may not be used to endorse or promote products 21 * derived from this software without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 27 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 */ 35 36 #include <sys/cdefs.h> 37 __FBSDID("$FreeBSD$"); 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/kernel.h> 42 #include <sys/module.h> 43 #include <sys/lock.h> 44 #include <sys/mutex.h> 45 #include <sys/bus.h> 46 47 #include <machine/bus.h> 48 #include <machine/resource.h> 49 50 #include <sys/rman.h> 51 52 #include <dev/pci/pcireg.h> 53 #include <dev/pci/pcivar.h> 54 55 #include <cam/cam.h> 56 #include <cam/scsi/scsi_all.h> 57 58 #include <dev/advansys/adwvar.h> 59 #include <dev/advansys/adwlib.h> 60 #include <dev/advansys/adwmcode.h> 61 62 #define ADW_PCI_IOBASE PCIR_BAR(0) /* I/O Address */ 63 #define ADW_PCI_MEMBASE PCIR_BAR(1) /* Mem I/O Address */ 64 65 #define PCI_ID_ADVANSYS_3550 0x230010CD00000000ull 66 #define PCI_ID_ADVANSYS_38C0800_REV1 0x250010CD00000000ull 67 #define PCI_ID_ADVANSYS_38C1600_REV1 0x270010CD00000000ull 68 #define PCI_ID_ALL_MASK 0xFFFFFFFFFFFFFFFFull 69 #define PCI_ID_DEV_VENDOR_MASK 0xFFFFFFFF00000000ull 70 71 struct adw_pci_identity; 72 typedef int (adw_device_setup_t)(device_t, struct adw_pci_identity *, 73 struct adw_softc *adw); 74 75 struct adw_pci_identity { 76 u_int64_t full_id; 77 u_int64_t id_mask; 78 char *name; 79 adw_device_setup_t *setup; 80 const struct adw_mcode *mcode_data; 81 const struct adw_eeprom *default_eeprom; 82 }; 83 84 static adw_device_setup_t adw_asc3550_setup; 85 static adw_device_setup_t adw_asc38C0800_setup; 86 #ifdef NOTYET 87 static adw_device_setup_t adw_asc38C1600_setup; 88 #endif 89 90 struct adw_pci_identity adw_pci_ident_table[] = 91 { 92 /* asc3550 based controllers */ 93 { 94 PCI_ID_ADVANSYS_3550, 95 PCI_ID_DEV_VENDOR_MASK, 96 "AdvanSys 3550 Ultra SCSI Adapter", 97 adw_asc3550_setup, 98 &adw_asc3550_mcode_data, 99 &adw_asc3550_default_eeprom 100 }, 101 /* asc38C0800 based controllers */ 102 { 103 PCI_ID_ADVANSYS_38C0800_REV1, 104 PCI_ID_DEV_VENDOR_MASK, 105 "AdvanSys 38C0800 Ultra2 SCSI Adapter", 106 adw_asc38C0800_setup, 107 &adw_asc38C0800_mcode_data, 108 &adw_asc38C0800_default_eeprom 109 }, 110 #ifdef NOTYET 111 /* XXX Disabled until I have hardware to test with */ 112 /* asc38C1600 based controllers */ 113 { 114 PCI_ID_ADVANSYS_38C1600_REV1, 115 PCI_ID_DEV_VENDOR_MASK, 116 "AdvanSys 38C1600 Ultra160 SCSI Adapter", 117 adw_asc38C1600_setup, 118 NULL, /* None provided by vendor thus far */ 119 NULL /* None provided by vendor thus far */ 120 } 121 #endif 122 }; 123 124 #define ADW_PCI_MAX_DMA_ADDR (0xFFFFFFFFUL) 125 #define ADW_PCI_MAX_DMA_COUNT (0xFFFFFFFFUL) 126 127 static int adw_pci_probe(device_t dev); 128 static int adw_pci_attach(device_t dev); 129 130 static device_method_t adw_pci_methods[] = { 131 /* Device interface */ 132 DEVMETHOD(device_probe, adw_pci_probe), 133 DEVMETHOD(device_attach, adw_pci_attach), 134 { 0, 0 } 135 }; 136 137 static driver_t adw_pci_driver = { 138 "adw", 139 adw_pci_methods, 140 sizeof(struct adw_softc) 141 }; 142 143 static devclass_t adw_devclass; 144 145 DRIVER_MODULE(adw, pci, adw_pci_driver, adw_devclass, 0, 0); 146 MODULE_DEPEND(adw, pci, 1, 1, 1); 147 148 static __inline u_int64_t 149 adw_compose_id(u_int device, u_int vendor, u_int subdevice, u_int subvendor) 150 { 151 u_int64_t id; 152 153 id = subvendor 154 | (subdevice << 16) 155 | ((u_int64_t)vendor << 32) 156 | ((u_int64_t)device << 48); 157 158 return (id); 159 } 160 161 static struct adw_pci_identity * 162 adw_find_pci_device(device_t dev) 163 { 164 u_int64_t full_id; 165 struct adw_pci_identity *entry; 166 u_int i; 167 168 full_id = adw_compose_id(pci_get_device(dev), 169 pci_get_vendor(dev), 170 pci_get_subdevice(dev), 171 pci_get_subvendor(dev)); 172 173 for (i = 0; i < nitems(adw_pci_ident_table); i++) { 174 entry = &adw_pci_ident_table[i]; 175 if (entry->full_id == (full_id & entry->id_mask)) 176 return (entry); 177 } 178 return (NULL); 179 } 180 181 static int 182 adw_pci_probe(device_t dev) 183 { 184 struct adw_pci_identity *entry; 185 186 entry = adw_find_pci_device(dev); 187 if (entry != NULL) { 188 device_set_desc(dev, entry->name); 189 return (BUS_PROBE_DEFAULT); 190 } 191 return (ENXIO); 192 } 193 194 static int 195 adw_pci_attach(device_t dev) 196 { 197 struct adw_softc *adw; 198 struct adw_pci_identity *entry; 199 u_int16_t command; 200 struct resource *regs; 201 int regs_type; 202 int regs_id; 203 int error; 204 int zero; 205 206 entry = adw_find_pci_device(dev); 207 if (entry == NULL) 208 return (ENXIO); 209 regs = NULL; 210 regs_type = 0; 211 regs_id = 0; 212 #ifdef ADW_ALLOW_MEMIO 213 regs_type = SYS_RES_MEMORY; 214 regs_id = ADW_PCI_MEMBASE; 215 regs = bus_alloc_resource_any(dev, regs_type, ®s_id, RF_ACTIVE); 216 #endif 217 if (regs == NULL) { 218 regs_type = SYS_RES_IOPORT; 219 regs_id = ADW_PCI_IOBASE; 220 regs = bus_alloc_resource_any(dev, regs_type, 221 ®s_id, RF_ACTIVE); 222 } 223 224 if (regs == NULL) { 225 device_printf(dev, "can't allocate register resources\n"); 226 return (ENOMEM); 227 } 228 229 adw = adw_alloc(dev, regs, regs_type, regs_id); 230 if (adw == NULL) 231 return(ENOMEM); 232 233 /* 234 * Now that we have access to our registers, just verify that 235 * this really is an AdvanSys device. 236 */ 237 if (adw_find_signature(adw) == 0) { 238 adw_free(adw); 239 return (ENXIO); 240 } 241 242 adw_reset_chip(adw); 243 244 error = entry->setup(dev, entry, adw); 245 246 if (error != 0) 247 return (error); 248 249 /* Ensure busmastering is enabled */ 250 pci_enable_busmaster(dev); 251 252 /* Allocate a dmatag for our transfer DMA maps */ 253 error = bus_dma_tag_create( 254 /* parent */ bus_get_dma_tag(dev), 255 /* alignment */ 1, 256 /* boundary */ 0, 257 /* lowaddr */ ADW_PCI_MAX_DMA_ADDR, 258 /* highaddr */ BUS_SPACE_MAXADDR, 259 /* filter */ NULL, 260 /* filterarg */ NULL, 261 /* maxsize */ BUS_SPACE_MAXSIZE_32BIT, 262 /* nsegments */ ~0, 263 /* maxsegsz */ ADW_PCI_MAX_DMA_COUNT, 264 /* flags */ 0, 265 /* lockfunc */ NULL, 266 /* lockarg */ NULL, 267 &adw->parent_dmat); 268 269 adw->init_level++; 270 271 if (error != 0) { 272 device_printf(dev, "Could not allocate DMA tag - error %d\n", 273 error); 274 adw_free(adw); 275 return (error); 276 } 277 278 adw->init_level++; 279 280 error = adw_init(adw); 281 if (error != 0) { 282 adw_free(adw); 283 return (error); 284 } 285 286 /* 287 * If the PCI Configuration Command Register "Parity Error Response 288 * Control" Bit was clear (0), then set the microcode variable 289 * 'control_flag' CONTROL_FLAG_IGNORE_PERR flag to tell the microcode 290 * to ignore DMA parity errors. 291 */ 292 command = pci_read_config(dev, PCIR_COMMAND, /*bytes*/2); 293 if ((command & PCIM_CMD_PERRESPEN) == 0) 294 adw_lram_write_16(adw, ADW_MC_CONTROL_FLAG, 295 adw_lram_read_16(adw, ADW_MC_CONTROL_FLAG) 296 | ADW_MC_CONTROL_IGN_PERR); 297 298 zero = 0; 299 adw->irq_res_type = SYS_RES_IRQ; 300 adw->irq = bus_alloc_resource_any(dev, adw->irq_res_type, &zero, 301 RF_ACTIVE | RF_SHAREABLE); 302 if (adw->irq == NULL) { 303 adw_free(adw); 304 return (ENOMEM); 305 } 306 307 error = adw_attach(adw); 308 if (error != 0) 309 adw_free(adw); 310 return (error); 311 } 312 313 static int 314 adw_generic_setup(device_t dev, struct adw_pci_identity *entry, 315 struct adw_softc *adw) 316 { 317 adw->channel = pci_get_function(dev) == 1 ? 'B' : 'A'; 318 adw->chip = ADW_CHIP_NONE; 319 adw->features = ADW_FENONE; 320 adw->flags = ADW_FNONE; 321 adw->mcode_data = entry->mcode_data; 322 adw->default_eeprom = entry->default_eeprom; 323 return (0); 324 } 325 326 static int 327 adw_asc3550_setup(device_t dev, struct adw_pci_identity *entry, 328 struct adw_softc *adw) 329 { 330 int error; 331 332 error = adw_generic_setup(dev, entry, adw); 333 if (error != 0) 334 return (error); 335 adw->chip = ADW_CHIP_ASC3550; 336 adw->features = ADW_ASC3550_FE; 337 adw->memsize = ADW_3550_MEMSIZE; 338 /* 339 * For ASC-3550, setting the START_CTL_EMFU [3:2] bits 340 * sets a FIFO threshold of 128 bytes. This register is 341 * only accessible to the host. 342 */ 343 adw_outb(adw, ADW_DMA_CFG0, 344 ADW_DMA_CFG0_START_CTL_EM_FU|ADW_DMA_CFG0_READ_CMD_MRM); 345 adw_outb(adw, ADW_MEM_CFG, 346 adw_inb(adw, ADW_MEM_CFG) | ADW_MEM_CFG_RAM_SZ_8KB); 347 return (0); 348 } 349 350 static int 351 adw_asc38C0800_setup(device_t dev, struct adw_pci_identity *entry, 352 struct adw_softc *adw) 353 { 354 int error; 355 356 error = adw_generic_setup(dev, entry, adw); 357 if (error != 0) 358 return (error); 359 /* 360 * For ASC-38C0800, set FIFO_THRESH_80B [6:4] bits and 361 * START_CTL_TH [3:2] bits for the default FIFO threshold. 362 * 363 * Note: ASC-38C0800 FIFO threshold has been changed to 256 bytes. 364 * 365 * For DMA Errata #4 set the BC_THRESH_ENB bit. 366 */ 367 adw_outb(adw, ADW_DMA_CFG0, 368 ADW_DMA_CFG0_BC_THRESH_ENB|ADW_DMA_CFG0_FIFO_THRESH_80B 369 |ADW_DMA_CFG0_START_CTL_TH|ADW_DMA_CFG0_READ_CMD_MRM); 370 adw_outb(adw, ADW_MEM_CFG, 371 adw_inb(adw, ADW_MEM_CFG) | ADW_MEM_CFG_RAM_SZ_16KB); 372 adw->chip = ADW_CHIP_ASC38C0800; 373 adw->features = ADW_ASC38C0800_FE; 374 adw->memsize = ADW_38C0800_MEMSIZE; 375 return (error); 376 } 377 378 #ifdef NOTYET 379 static int 380 adw_asc38C1600_setup(device_t dev, struct adw_pci_identity *entry, 381 struct adw_softc *adw) 382 { 383 int error; 384 385 error = adw_generic_setup(dev, entry, adw); 386 if (error != 0) 387 return (error); 388 adw->chip = ADW_CHIP_ASC38C1600; 389 adw->features = ADW_ASC38C1600_FE; 390 adw->memsize = ADW_38C1600_MEMSIZE; 391 return (error); 392 } 393 #endif
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