FreeBSD/Linux Kernel Cross Reference
sys/dev/agp/agp_amd.c
1 /*-
2 * Copyright (c) 2000 Doug Rabson
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD: releng/10.0/sys/dev/agp/agp_amd.c 244926 2013-01-01 18:16:49Z antoine $");
29
30 #include <sys/param.h>
31 #include <sys/systm.h>
32 #include <sys/malloc.h>
33 #include <sys/kernel.h>
34 #include <sys/module.h>
35 #include <sys/bus.h>
36 #include <sys/lock.h>
37 #include <sys/mutex.h>
38 #include <sys/proc.h>
39
40 #include <dev/agp/agppriv.h>
41 #include <dev/agp/agpreg.h>
42 #include <dev/pci/pcivar.h>
43 #include <dev/pci/pcireg.h>
44
45 #include <vm/vm.h>
46 #include <vm/vm_object.h>
47 #include <vm/pmap.h>
48 #include <machine/bus.h>
49 #include <machine/resource.h>
50 #include <sys/rman.h>
51
52 MALLOC_DECLARE(M_AGP);
53
54 #define READ2(off) bus_space_read_2(sc->bst, sc->bsh, off)
55 #define READ4(off) bus_space_read_4(sc->bst, sc->bsh, off)
56 #define WRITE2(off,v) bus_space_write_2(sc->bst, sc->bsh, off, v)
57 #define WRITE4(off,v) bus_space_write_4(sc->bst, sc->bsh, off, v)
58
59 struct agp_amd_gatt {
60 u_int32_t ag_entries;
61 u_int32_t *ag_virtual; /* virtual address of gatt */
62 vm_offset_t ag_physical;
63 u_int32_t *ag_vdir; /* virtual address of page dir */
64 vm_offset_t ag_pdir; /* physical address of page dir */
65 };
66
67 struct agp_amd_softc {
68 struct agp_softc agp;
69 struct resource *regs; /* memory mapped control registers */
70 bus_space_tag_t bst; /* bus_space tag */
71 bus_space_handle_t bsh; /* bus_space handle */
72 u_int32_t initial_aperture; /* aperture size at startup */
73 struct agp_amd_gatt *gatt;
74 };
75
76 static struct agp_amd_gatt *
77 agp_amd_alloc_gatt(device_t dev)
78 {
79 u_int32_t apsize = AGP_GET_APERTURE(dev);
80 u_int32_t entries = apsize >> AGP_PAGE_SHIFT;
81 struct agp_amd_gatt *gatt;
82 int i, npages, pdir_offset;
83
84 if (bootverbose)
85 device_printf(dev,
86 "allocating GATT for aperture of size %dM\n",
87 apsize / (1024*1024));
88
89 gatt = malloc(sizeof(struct agp_amd_gatt), M_AGP, M_NOWAIT);
90 if (!gatt)
91 return 0;
92
93 /*
94 * The AMD751 uses a page directory to map a non-contiguous
95 * gatt so we don't need to use contigmalloc.
96 * Malloc individual gatt pages and map them into the page
97 * directory.
98 */
99 gatt->ag_entries = entries;
100 gatt->ag_virtual = malloc(entries * sizeof(u_int32_t),
101 M_AGP, M_NOWAIT);
102 if (!gatt->ag_virtual) {
103 if (bootverbose)
104 device_printf(dev, "allocation failed\n");
105 free(gatt, M_AGP);
106 return 0;
107 }
108 bzero(gatt->ag_virtual, entries * sizeof(u_int32_t));
109
110 /*
111 * Allocate the page directory.
112 */
113 gatt->ag_vdir = malloc(AGP_PAGE_SIZE, M_AGP, M_NOWAIT);
114 if (!gatt->ag_vdir) {
115 if (bootverbose)
116 device_printf(dev,
117 "failed to allocate page directory\n");
118 free(gatt->ag_virtual, M_AGP);
119 free(gatt, M_AGP);
120 return 0;
121 }
122 bzero(gatt->ag_vdir, AGP_PAGE_SIZE);
123
124 gatt->ag_pdir = vtophys((vm_offset_t) gatt->ag_vdir);
125 if(bootverbose)
126 device_printf(dev, "gatt -> ag_pdir %#lx\n",
127 (u_long)gatt->ag_pdir);
128 /*
129 * Allocate the gatt pages
130 */
131 gatt->ag_entries = entries;
132 if(bootverbose)
133 device_printf(dev, "allocating GATT for %d AGP page entries\n",
134 gatt->ag_entries);
135
136 gatt->ag_physical = vtophys((vm_offset_t) gatt->ag_virtual);
137
138 /*
139 * Map the pages of the GATT into the page directory.
140 *
141 * The GATT page addresses are mapped into the directory offset by
142 * an amount dependent on the base address of the aperture. This
143 * is and offset into the page directory, not an offset added to
144 * the addresses of the gatt pages.
145 */
146
147 pdir_offset = pci_read_config(dev, AGP_AMD751_APBASE, 4) >> 22;
148
149 npages = ((entries * sizeof(u_int32_t) + AGP_PAGE_SIZE - 1)
150 >> AGP_PAGE_SHIFT);
151
152 for (i = 0; i < npages; i++) {
153 vm_offset_t va;
154 vm_offset_t pa;
155
156 va = ((vm_offset_t) gatt->ag_virtual) + i * AGP_PAGE_SIZE;
157 pa = vtophys(va);
158 gatt->ag_vdir[i + pdir_offset] = pa | 1;
159 }
160
161 /*
162 * Make sure the chipset can see everything.
163 */
164 agp_flush_cache();
165
166 return gatt;
167 }
168
169 static void
170 agp_amd_free_gatt(struct agp_amd_gatt *gatt)
171 {
172 free(gatt->ag_virtual, M_AGP);
173 free(gatt->ag_vdir, M_AGP);
174 free(gatt, M_AGP);
175 }
176
177 static const char*
178 agp_amd_match(device_t dev)
179 {
180 if (pci_get_class(dev) != PCIC_BRIDGE
181 || pci_get_subclass(dev) != PCIS_BRIDGE_HOST)
182 return NULL;
183
184 if (agp_find_caps(dev) == 0)
185 return NULL;
186
187 switch (pci_get_devid(dev)) {
188 case 0x70061022:
189 return ("AMD 751 host to AGP bridge");
190 case 0x700e1022:
191 return ("AMD 761 host to AGP bridge");
192 case 0x700c1022:
193 return ("AMD 762 host to AGP bridge");
194 }
195
196 return NULL;
197 }
198
199 static int
200 agp_amd_probe(device_t dev)
201 {
202 const char *desc;
203
204 if (resource_disabled("agp", device_get_unit(dev)))
205 return (ENXIO);
206 desc = agp_amd_match(dev);
207 if (desc) {
208 device_set_desc(dev, desc);
209 return BUS_PROBE_DEFAULT;
210 }
211
212 return ENXIO;
213 }
214
215 static int
216 agp_amd_attach(device_t dev)
217 {
218 struct agp_amd_softc *sc = device_get_softc(dev);
219 struct agp_amd_gatt *gatt;
220 int error, rid;
221
222 error = agp_generic_attach(dev);
223 if (error)
224 return error;
225
226 rid = AGP_AMD751_REGISTERS;
227 sc->regs = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
228 RF_ACTIVE);
229 if (!sc->regs) {
230 agp_generic_detach(dev);
231 return ENOMEM;
232 }
233
234 sc->bst = rman_get_bustag(sc->regs);
235 sc->bsh = rman_get_bushandle(sc->regs);
236
237 sc->initial_aperture = AGP_GET_APERTURE(dev);
238
239 for (;;) {
240 gatt = agp_amd_alloc_gatt(dev);
241 if (gatt)
242 break;
243
244 /*
245 * Probably contigmalloc failure. Try reducing the
246 * aperture so that the gatt size reduces.
247 */
248 if (AGP_SET_APERTURE(dev, AGP_GET_APERTURE(dev) / 2))
249 return ENOMEM;
250 }
251 sc->gatt = gatt;
252
253 /* Install the gatt. */
254 WRITE4(AGP_AMD751_ATTBASE, gatt->ag_pdir);
255
256 /* Enable synchronisation between host and agp. */
257 pci_write_config(dev,
258 AGP_AMD751_MODECTRL,
259 AGP_AMD751_MODECTRL_SYNEN, 1);
260
261 /* Set indexing mode for two-level and enable page dir cache */
262 pci_write_config(dev,
263 AGP_AMD751_MODECTRL2,
264 AGP_AMD751_MODECTRL2_GPDCE, 1);
265
266 /* Enable the TLB and flush */
267 WRITE2(AGP_AMD751_STATUS,
268 READ2(AGP_AMD751_STATUS) | AGP_AMD751_STATUS_GCE);
269 AGP_FLUSH_TLB(dev);
270
271 return 0;
272 }
273
274 static int
275 agp_amd_detach(device_t dev)
276 {
277 struct agp_amd_softc *sc = device_get_softc(dev);
278
279 agp_free_cdev(dev);
280
281 /* Disable the TLB.. */
282 WRITE2(AGP_AMD751_STATUS,
283 READ2(AGP_AMD751_STATUS) & ~AGP_AMD751_STATUS_GCE);
284
285 /* Disable host-agp sync */
286 pci_write_config(dev, AGP_AMD751_MODECTRL, 0x00, 1);
287
288 /* Clear the GATT base */
289 WRITE4(AGP_AMD751_ATTBASE, 0);
290
291 /* Put the aperture back the way it started. */
292 AGP_SET_APERTURE(dev, sc->initial_aperture);
293
294 agp_amd_free_gatt(sc->gatt);
295 agp_free_res(dev);
296
297 bus_release_resource(dev, SYS_RES_MEMORY,
298 AGP_AMD751_REGISTERS, sc->regs);
299
300 return 0;
301 }
302
303 static u_int32_t
304 agp_amd_get_aperture(device_t dev)
305 {
306 int vas;
307
308 /*
309 * The aperture size is equal to 32M<<vas.
310 */
311 vas = (pci_read_config(dev, AGP_AMD751_APCTRL, 1) & 0x06) >> 1;
312 return (32*1024*1024) << vas;
313 }
314
315 static int
316 agp_amd_set_aperture(device_t dev, u_int32_t aperture)
317 {
318 int vas;
319
320 /*
321 * Check for a power of two and make sure its within the
322 * programmable range.
323 */
324 if (aperture & (aperture - 1)
325 || aperture < 32*1024*1024
326 || aperture > 2U*1024*1024*1024)
327 return EINVAL;
328
329 vas = ffs(aperture / 32*1024*1024) - 1;
330
331 /*
332 * While the size register is bits 1-3 of APCTRL, bit 0 must be
333 * set for the size value to be 'valid'
334 */
335 pci_write_config(dev, AGP_AMD751_APCTRL,
336 (((pci_read_config(dev, AGP_AMD751_APCTRL, 1) & ~0x06)
337 | ((vas << 1) | 1))), 1);
338
339 return 0;
340 }
341
342 static int
343 agp_amd_bind_page(device_t dev, vm_offset_t offset, vm_offset_t physical)
344 {
345 struct agp_amd_softc *sc = device_get_softc(dev);
346
347 if (offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT))
348 return EINVAL;
349
350 sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = physical | 1;
351
352 /* invalidate the cache */
353 AGP_FLUSH_TLB(dev);
354 return 0;
355 }
356
357 static int
358 agp_amd_unbind_page(device_t dev, vm_offset_t offset)
359 {
360 struct agp_amd_softc *sc = device_get_softc(dev);
361
362 if (offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT))
363 return EINVAL;
364
365 sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0;
366 return 0;
367 }
368
369 static void
370 agp_amd_flush_tlb(device_t dev)
371 {
372 struct agp_amd_softc *sc = device_get_softc(dev);
373
374 /* Set the cache invalidate bit and wait for the chipset to clear */
375 WRITE4(AGP_AMD751_TLBCTRL, 1);
376 do {
377 DELAY(1);
378 } while (READ4(AGP_AMD751_TLBCTRL));
379 }
380
381 static device_method_t agp_amd_methods[] = {
382 /* Device interface */
383 DEVMETHOD(device_probe, agp_amd_probe),
384 DEVMETHOD(device_attach, agp_amd_attach),
385 DEVMETHOD(device_detach, agp_amd_detach),
386 DEVMETHOD(device_shutdown, bus_generic_shutdown),
387 DEVMETHOD(device_suspend, bus_generic_suspend),
388 DEVMETHOD(device_resume, bus_generic_resume),
389
390 /* AGP interface */
391 DEVMETHOD(agp_get_aperture, agp_amd_get_aperture),
392 DEVMETHOD(agp_set_aperture, agp_amd_set_aperture),
393 DEVMETHOD(agp_bind_page, agp_amd_bind_page),
394 DEVMETHOD(agp_unbind_page, agp_amd_unbind_page),
395 DEVMETHOD(agp_flush_tlb, agp_amd_flush_tlb),
396 DEVMETHOD(agp_enable, agp_generic_enable),
397 DEVMETHOD(agp_alloc_memory, agp_generic_alloc_memory),
398 DEVMETHOD(agp_free_memory, agp_generic_free_memory),
399 DEVMETHOD(agp_bind_memory, agp_generic_bind_memory),
400 DEVMETHOD(agp_unbind_memory, agp_generic_unbind_memory),
401
402 { 0, 0 }
403 };
404
405 static driver_t agp_amd_driver = {
406 "agp",
407 agp_amd_methods,
408 sizeof(struct agp_amd_softc),
409 };
410
411 static devclass_t agp_devclass;
412
413 DRIVER_MODULE(agp_amd, hostb, agp_amd_driver, agp_devclass, 0, 0);
414 MODULE_DEPEND(agp_amd, agp, 1, 1, 1);
415 MODULE_DEPEND(agp_amd, pci, 1, 1, 1);
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