The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/agp/agp_amd.c

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    1 /*-
    2  * Copyright (c) 2000 Doug Rabson
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  *
   14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   24  * SUCH DAMAGE.
   25  */
   26 
   27 #include <sys/cdefs.h>
   28 __FBSDID("$FreeBSD: stable/10/sys/dev/agp/agp_amd.c 275406 2014-12-02 13:46:13Z tijl $");
   29 
   30 #include <sys/param.h>
   31 #include <sys/systm.h>
   32 #include <sys/malloc.h>
   33 #include <sys/kernel.h>
   34 #include <sys/module.h>
   35 #include <sys/bus.h>
   36 #include <sys/lock.h>
   37 #include <sys/mutex.h>
   38 #include <sys/proc.h>
   39 
   40 #include <dev/agp/agppriv.h>
   41 #include <dev/agp/agpreg.h>
   42 #include <dev/pci/pcivar.h>
   43 #include <dev/pci/pcireg.h>
   44 
   45 #include <vm/vm.h>
   46 #include <vm/vm_extern.h>
   47 #include <vm/vm_kern.h>
   48 #include <vm/vm_object.h>
   49 #include <vm/pmap.h>
   50 #include <machine/bus.h>
   51 #include <machine/resource.h>
   52 #include <sys/rman.h>
   53 
   54 MALLOC_DECLARE(M_AGP);
   55 
   56 #define READ2(off)      bus_space_read_2(sc->bst, sc->bsh, off)
   57 #define READ4(off)      bus_space_read_4(sc->bst, sc->bsh, off)
   58 #define WRITE2(off,v)   bus_space_write_2(sc->bst, sc->bsh, off, v)
   59 #define WRITE4(off,v)   bus_space_write_4(sc->bst, sc->bsh, off, v)
   60 
   61 struct agp_amd_gatt {
   62         u_int32_t       ag_entries;
   63         u_int32_t      *ag_virtual;     /* virtual address of gatt */
   64         vm_offset_t     ag_physical;
   65         u_int32_t      *ag_vdir;        /* virtual address of page dir */
   66         vm_offset_t     ag_pdir;        /* physical address of page dir */
   67 };
   68 
   69 struct agp_amd_softc {
   70         struct agp_softc        agp;
   71         struct resource        *regs;   /* memory mapped control registers */
   72         bus_space_tag_t         bst;    /* bus_space tag */
   73         bus_space_handle_t      bsh;    /* bus_space handle */
   74         u_int32_t               initial_aperture; /* aperture size at startup */
   75         struct agp_amd_gatt    *gatt;
   76 };
   77 
   78 static struct agp_amd_gatt *
   79 agp_amd_alloc_gatt(device_t dev)
   80 {
   81         u_int32_t apsize = AGP_GET_APERTURE(dev);
   82         u_int32_t entries = apsize >> AGP_PAGE_SHIFT;
   83         struct agp_amd_gatt *gatt;
   84         int i, npages, pdir_offset;
   85 
   86         if (bootverbose)
   87                 device_printf(dev,
   88                               "allocating GATT for aperture of size %dM\n",
   89                               apsize / (1024*1024));
   90 
   91         gatt = malloc(sizeof(struct agp_amd_gatt), M_AGP, M_NOWAIT);
   92         if (!gatt)
   93                 return 0;
   94 
   95         /*
   96          * The AMD751 uses a page directory to map a non-contiguous
   97          * gatt so we don't need to use kmem_alloc_contig.
   98          * Allocate individual GATT pages and map them into the page
   99          * directory.
  100          */
  101         gatt->ag_entries = entries;
  102         gatt->ag_virtual = (void *)kmem_alloc_attr(kernel_arena,
  103             entries * sizeof(u_int32_t), M_NOWAIT | M_ZERO, 0, ~0,
  104             VM_MEMATTR_WRITE_COMBINING);
  105         if (!gatt->ag_virtual) {
  106                 if (bootverbose)
  107                         device_printf(dev, "allocation failed\n");
  108                 free(gatt, M_AGP);
  109                 return 0;
  110         }
  111 
  112         /*
  113          * Allocate the page directory.
  114          */
  115         gatt->ag_vdir = (void *)kmem_alloc_attr(kernel_arena, AGP_PAGE_SIZE,
  116             M_NOWAIT | M_ZERO, 0, ~0, VM_MEMATTR_WRITE_COMBINING);
  117         if (!gatt->ag_vdir) {
  118                 if (bootverbose)
  119                         device_printf(dev,
  120                                       "failed to allocate page directory\n");
  121                 kmem_free(kernel_arena, (vm_offset_t)gatt->ag_virtual,
  122                     entries * sizeof(u_int32_t));
  123                 free(gatt, M_AGP);
  124                 return 0;
  125         }
  126 
  127         gatt->ag_pdir = vtophys((vm_offset_t) gatt->ag_vdir);
  128         if(bootverbose)
  129                 device_printf(dev, "gatt -> ag_pdir %#lx\n",
  130                     (u_long)gatt->ag_pdir);
  131         /*
  132          * Allocate the gatt pages
  133          */
  134         gatt->ag_entries = entries;
  135         if(bootverbose)
  136                 device_printf(dev, "allocating GATT for %d AGP page entries\n", 
  137                         gatt->ag_entries);
  138 
  139         gatt->ag_physical = vtophys((vm_offset_t) gatt->ag_virtual);
  140 
  141         /*
  142          * Map the pages of the GATT into the page directory.
  143          *
  144          * The GATT page addresses are mapped into the directory offset by
  145          * an amount dependent on the base address of the aperture. This
  146          * is and offset into the page directory, not an offset added to
  147          * the addresses of the gatt pages.
  148          */
  149 
  150         pdir_offset = pci_read_config(dev, AGP_AMD751_APBASE, 4) >> 22;
  151 
  152         npages = ((entries * sizeof(u_int32_t) + AGP_PAGE_SIZE - 1)
  153                   >> AGP_PAGE_SHIFT);
  154 
  155         for (i = 0; i < npages; i++) {
  156                 vm_offset_t va;
  157                 vm_offset_t pa;
  158 
  159                 va = ((vm_offset_t) gatt->ag_virtual) + i * AGP_PAGE_SIZE;
  160                 pa = vtophys(va);
  161                 gatt->ag_vdir[i + pdir_offset] = pa | 1;
  162         }
  163 
  164         return gatt;
  165 }
  166 
  167 static void
  168 agp_amd_free_gatt(struct agp_amd_gatt *gatt)
  169 {
  170         kmem_free(kernel_arena, (vm_offset_t)gatt->ag_vdir, AGP_PAGE_SIZE);
  171         kmem_free(kernel_arena, (vm_offset_t)gatt->ag_virtual,
  172             gatt->ag_entries * sizeof(u_int32_t));
  173         free(gatt, M_AGP);
  174 }
  175 
  176 static const char*
  177 agp_amd_match(device_t dev)
  178 {
  179         if (pci_get_class(dev) != PCIC_BRIDGE
  180             || pci_get_subclass(dev) != PCIS_BRIDGE_HOST)
  181                 return NULL;
  182 
  183         if (agp_find_caps(dev) == 0)
  184                 return NULL;
  185 
  186         switch (pci_get_devid(dev)) {
  187         case 0x70061022:
  188                 return ("AMD 751 host to AGP bridge");
  189         case 0x700e1022:
  190                 return ("AMD 761 host to AGP bridge");
  191         case 0x700c1022:
  192                 return ("AMD 762 host to AGP bridge");
  193         }
  194 
  195         return NULL;
  196 }
  197 
  198 static int
  199 agp_amd_probe(device_t dev)
  200 {
  201         const char *desc;
  202 
  203         if (resource_disabled("agp", device_get_unit(dev)))
  204                 return (ENXIO);
  205         desc = agp_amd_match(dev);
  206         if (desc) {
  207                 device_set_desc(dev, desc);
  208                 return BUS_PROBE_DEFAULT;
  209         }
  210 
  211         return ENXIO;
  212 }
  213 
  214 static int
  215 agp_amd_attach(device_t dev)
  216 {
  217         struct agp_amd_softc *sc = device_get_softc(dev);
  218         struct agp_amd_gatt *gatt;
  219         int error, rid;
  220 
  221         error = agp_generic_attach(dev);
  222         if (error)
  223                 return error;
  224 
  225         rid = AGP_AMD751_REGISTERS;
  226         sc->regs = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
  227                                           RF_ACTIVE);
  228         if (!sc->regs) {
  229                 agp_generic_detach(dev);
  230                 return ENOMEM;
  231         }
  232 
  233         sc->bst = rman_get_bustag(sc->regs);
  234         sc->bsh = rman_get_bushandle(sc->regs);
  235 
  236         sc->initial_aperture = AGP_GET_APERTURE(dev);
  237 
  238         for (;;) {
  239                 gatt = agp_amd_alloc_gatt(dev);
  240                 if (gatt)
  241                         break;
  242 
  243                 /*
  244                  * Probably contigmalloc failure. Try reducing the
  245                  * aperture so that the gatt size reduces.
  246                  */
  247                 if (AGP_SET_APERTURE(dev, AGP_GET_APERTURE(dev) / 2))
  248                         return ENOMEM;
  249         }
  250         sc->gatt = gatt;
  251 
  252         /* Install the gatt. */
  253         WRITE4(AGP_AMD751_ATTBASE, gatt->ag_pdir);
  254         
  255         /* Enable synchronisation between host and agp. */
  256         pci_write_config(dev,
  257                          AGP_AMD751_MODECTRL,
  258                          AGP_AMD751_MODECTRL_SYNEN, 1);
  259 
  260         /* Set indexing mode for two-level and enable page dir cache */
  261         pci_write_config(dev,
  262                          AGP_AMD751_MODECTRL2,
  263                          AGP_AMD751_MODECTRL2_GPDCE, 1);
  264 
  265         /* Enable the TLB and flush */
  266         WRITE2(AGP_AMD751_STATUS,
  267                READ2(AGP_AMD751_STATUS) | AGP_AMD751_STATUS_GCE);
  268         AGP_FLUSH_TLB(dev);
  269 
  270         return 0;
  271 }
  272 
  273 static int
  274 agp_amd_detach(device_t dev)
  275 {
  276         struct agp_amd_softc *sc = device_get_softc(dev);
  277 
  278         agp_free_cdev(dev);
  279 
  280         /* Disable the TLB.. */
  281         WRITE2(AGP_AMD751_STATUS,
  282                READ2(AGP_AMD751_STATUS) & ~AGP_AMD751_STATUS_GCE);
  283         
  284         /* Disable host-agp sync */
  285         pci_write_config(dev, AGP_AMD751_MODECTRL, 0x00, 1);
  286         
  287         /* Clear the GATT base */
  288         WRITE4(AGP_AMD751_ATTBASE, 0);
  289 
  290         /* Put the aperture back the way it started. */
  291         AGP_SET_APERTURE(dev, sc->initial_aperture);
  292 
  293         agp_amd_free_gatt(sc->gatt);
  294         agp_free_res(dev);
  295 
  296         bus_release_resource(dev, SYS_RES_MEMORY,
  297                              AGP_AMD751_REGISTERS, sc->regs);
  298 
  299         return 0;
  300 }
  301 
  302 static u_int32_t
  303 agp_amd_get_aperture(device_t dev)
  304 {
  305         int vas;
  306 
  307         /*
  308          * The aperture size is equal to 32M<<vas.
  309          */
  310         vas = (pci_read_config(dev, AGP_AMD751_APCTRL, 1) & 0x06) >> 1;
  311         return (32*1024*1024) << vas;
  312 }
  313 
  314 static int
  315 agp_amd_set_aperture(device_t dev, u_int32_t aperture)
  316 {
  317         int vas;
  318 
  319         /*
  320          * Check for a power of two and make sure its within the
  321          * programmable range.
  322          */
  323         if (aperture & (aperture - 1)
  324             || aperture < 32*1024*1024
  325             || aperture > 2U*1024*1024*1024)
  326                 return EINVAL;
  327 
  328         vas = ffs(aperture / 32*1024*1024) - 1;
  329         
  330         /* 
  331          * While the size register is bits 1-3 of APCTRL, bit 0 must be
  332          * set for the size value to be 'valid'
  333          */
  334         pci_write_config(dev, AGP_AMD751_APCTRL,
  335                          (((pci_read_config(dev, AGP_AMD751_APCTRL, 1) & ~0x06)
  336                           | ((vas << 1) | 1))), 1);
  337 
  338         return 0;
  339 }
  340 
  341 static int
  342 agp_amd_bind_page(device_t dev, vm_offset_t offset, vm_offset_t physical)
  343 {
  344         struct agp_amd_softc *sc = device_get_softc(dev);
  345 
  346         if (offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT))
  347                 return EINVAL;
  348 
  349         sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = physical | 1;
  350         return 0;
  351 }
  352 
  353 static int
  354 agp_amd_unbind_page(device_t dev, vm_offset_t offset)
  355 {
  356         struct agp_amd_softc *sc = device_get_softc(dev);
  357 
  358         if (offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT))
  359                 return EINVAL;
  360 
  361         sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0;
  362         return 0;
  363 }
  364 
  365 static void
  366 agp_amd_flush_tlb(device_t dev)
  367 {
  368         struct agp_amd_softc *sc = device_get_softc(dev);
  369 
  370         /* Set the cache invalidate bit and wait for the chipset to clear */
  371         WRITE4(AGP_AMD751_TLBCTRL, 1);
  372         do {
  373                 DELAY(1);
  374         } while (READ4(AGP_AMD751_TLBCTRL));
  375 }
  376 
  377 static device_method_t agp_amd_methods[] = {
  378         /* Device interface */
  379         DEVMETHOD(device_probe,         agp_amd_probe),
  380         DEVMETHOD(device_attach,        agp_amd_attach),
  381         DEVMETHOD(device_detach,        agp_amd_detach),
  382         DEVMETHOD(device_shutdown,      bus_generic_shutdown),
  383         DEVMETHOD(device_suspend,       bus_generic_suspend),
  384         DEVMETHOD(device_resume,        bus_generic_resume),
  385 
  386         /* AGP interface */
  387         DEVMETHOD(agp_get_aperture,     agp_amd_get_aperture),
  388         DEVMETHOD(agp_set_aperture,     agp_amd_set_aperture),
  389         DEVMETHOD(agp_bind_page,        agp_amd_bind_page),
  390         DEVMETHOD(agp_unbind_page,      agp_amd_unbind_page),
  391         DEVMETHOD(agp_flush_tlb,        agp_amd_flush_tlb),
  392         DEVMETHOD(agp_enable,           agp_generic_enable),
  393         DEVMETHOD(agp_alloc_memory,     agp_generic_alloc_memory),
  394         DEVMETHOD(agp_free_memory,      agp_generic_free_memory),
  395         DEVMETHOD(agp_bind_memory,      agp_generic_bind_memory),
  396         DEVMETHOD(agp_unbind_memory,    agp_generic_unbind_memory),
  397 
  398         { 0, 0 }
  399 };
  400 
  401 static driver_t agp_amd_driver = {
  402         "agp",
  403         agp_amd_methods,
  404         sizeof(struct agp_amd_softc),
  405 };
  406 
  407 static devclass_t agp_devclass;
  408 
  409 DRIVER_MODULE(agp_amd, hostb, agp_amd_driver, agp_devclass, 0, 0);
  410 MODULE_DEPEND(agp_amd, agp, 1, 1, 1);
  411 MODULE_DEPEND(agp_amd, pci, 1, 1, 1);

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