The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/agp/agp_via.c

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    1 /*-
    2  * Copyright (c) 2000 Doug Rabson
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  *
   14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   24  * SUCH DAMAGE.
   25  *
   26  * $FreeBSD: src/sys/dev/agp/agp_via.c,v 1.30 2009/12/21 03:28:05 rnoland Exp $
   27  */
   28 
   29 #include <sys/param.h>
   30 #include <sys/systm.h>
   31 #include <sys/malloc.h>
   32 #include <sys/kernel.h>
   33 #include <sys/bus.h>
   34 #include <sys/lock.h>
   35 
   36 #include <bus/pci/pcivar.h>
   37 #include <bus/pci/pcireg.h>
   38 #include "agppriv.h"
   39 #include "agpreg.h"
   40 
   41 #include <vm/vm.h>
   42 #include <vm/vm_object.h>
   43 #include <vm/pmap.h>
   44 
   45 #define REG_GARTCTRL    0
   46 #define REG_APSIZE      1
   47 #define REG_ATTBASE     2
   48 
   49 struct agp_via_softc {
   50         struct agp_softc agp;
   51         u_int32_t       initial_aperture; /* aperture size at startup */
   52         struct agp_gatt *gatt;
   53         int             *regs;
   54 };
   55 
   56 static int via_v2_regs[] = { AGP_VIA_GARTCTRL, AGP_VIA_APSIZE,
   57     AGP_VIA_ATTBASE };
   58 static int via_v3_regs[] = { AGP3_VIA_GARTCTRL, AGP3_VIA_APSIZE,
   59     AGP3_VIA_ATTBASE };
   60 
   61 static const char*
   62 agp_via_match(device_t dev)
   63 {
   64         if (pci_get_class(dev) != PCIC_BRIDGE
   65             || pci_get_subclass(dev) != PCIS_BRIDGE_HOST)
   66                 return NULL;
   67 
   68         if (agp_find_caps(dev) == 0)
   69                 return NULL;
   70 
   71         switch (pci_get_devid(dev)) {
   72         case 0x01981106:
   73                 return ("VIA 8763 (P4X600) host to PCI bridge");
   74         case 0x02591106:
   75                 return ("VIA PM800/PN800/PM880/PN880 host to PCI bridge");
   76         case 0x02691106:
   77                 return ("VIA KT880 host to PCI bridge");
   78         case 0x02961106:
   79                 return ("VIA 3296 (P4M800) host to PCI bridge");
   80         case 0x03051106:
   81                 return ("VIA 82C8363 (Apollo KT133x/KM133) host to PCI bridge");
   82         case 0x03141106:
   83                 return ("VIA 3314 (P4M800CE) host to PCI bridge");
   84         case 0x03241106:
   85                 return ("VIA VT3324 (CX700) host to PCI bridge");
   86         case 0x03271106:
   87                 return ("VIA 3327 (P4M890) host to PCI bridge");
   88         case 0x03641106:
   89                 return ("VIA 3364 (P4M900) host to PCI bridge");
   90         case 0x03911106:
   91                 return ("VIA 8371 (Apollo KX133) host to PCI bridge");
   92         case 0x05011106:
   93                 return ("VIA 8501 (Apollo MVP4) host to PCI bridge");
   94         case 0x05971106:
   95                 return ("VIA 82C597 (Apollo VP3) host to PCI bridge");
   96         case 0x05981106:
   97                 return ("VIA 82C598 (Apollo MVP3) host to PCI bridge");
   98         case 0x06011106:
   99                 return ("VIA 8601 (Apollo ProMedia/PLE133Ta) host to PCI bridge");
  100         case 0x06051106:
  101                 return ("VIA 82C694X (Apollo Pro 133A) host to PCI bridge");
  102         case 0x06911106:
  103                 return ("VIA 82C691 (Apollo Pro) host to PCI bridge");
  104         case 0x30911106:
  105                 return ("VIA 8633 (Pro 266) host to PCI bridge");
  106         case 0x30991106:
  107                 return ("VIA 8367 (KT266/KY266x/KT333) host to PCI bridge");
  108         case 0x31011106:
  109                 return ("VIA 8653 (Pro266T) host to PCI bridge");
  110         case 0x31121106:
  111                 return ("VIA 8361 (KLE133) host to PCI bridge");
  112         case 0x31161106:
  113                 return ("VIA XM266 (PM266/KM266) host to PCI bridge");
  114         case 0x31231106:
  115                 return ("VIA 862x (CLE266) host to PCI bridge");
  116         case 0x31281106:
  117                 return ("VIA 8753 (P4X266) host to PCI bridge");
  118         case 0x31481106:
  119                 return ("VIA 8703 (P4M266x/P4N266) host to PCI bridge");
  120         case 0x31561106:
  121                 return ("VIA XN266 (Apollo Pro266) host to PCI bridge");
  122         case 0x31681106:
  123                 return ("VIA 8754 (PT800) host to PCI bridge");
  124         case 0x31891106:
  125                 return ("VIA 8377 (Apollo KT400/KT400A/KT600) host to PCI bridge");
  126         case 0x32051106:
  127                 return ("VIA 8235/8237 (Apollo KM400/KM400A) host to PCI bridge");
  128         case 0x32081106:
  129                 return ("VIA 8783 (PT890) host to PCI bridge");
  130         case 0x32581106:
  131                 return ("VIA PT880 host to PCI bridge");
  132         case 0xb1981106:
  133                 return ("VIA VT83xx/VT87xx/KTxxx/Px8xx host to PCI bridge");
  134         };
  135 
  136         return NULL;
  137 }
  138 
  139 static int
  140 agp_via_probe(device_t dev)
  141 {
  142         const char *desc;
  143 
  144         if (resource_disabled("agp", device_get_unit(dev)))
  145                 return (ENXIO);
  146         desc = agp_via_match(dev);
  147         if (desc) {
  148                 device_verbose(dev);
  149                 device_set_desc(dev, desc);
  150                 return BUS_PROBE_DEFAULT;
  151         }
  152 
  153         return ENXIO;
  154 }
  155 
  156 static int
  157 agp_via_attach(device_t dev)
  158 {
  159         struct agp_via_softc *sc = device_get_softc(dev);
  160         struct agp_gatt *gatt;
  161         int error;
  162         u_int32_t agpsel;
  163         u_int32_t capid;
  164 
  165         sc->regs = via_v2_regs;
  166 
  167         /* Look at the capability register to see if we handle AGP3 */
  168         capid = pci_read_config(dev, agp_find_caps(dev) + AGP_CAPID, 4);
  169         if (((capid >> 20) & 0x0f) >= 3) {
  170                 agpsel = pci_read_config(dev, AGP_VIA_AGPSEL, 1);
  171                 if ((agpsel & (1 << 1)) == 0)
  172                         sc->regs = via_v3_regs;
  173         }
  174         
  175         error = agp_generic_attach(dev);
  176         if (error)
  177                 return error;
  178 
  179         sc->initial_aperture = AGP_GET_APERTURE(dev);
  180         if (sc->initial_aperture == 0) {
  181                 device_printf(dev, "bad initial aperture size, disabling\n");
  182                 return ENXIO;
  183         }
  184 
  185         for (;;) {
  186                 gatt = agp_alloc_gatt(dev);
  187                 if (gatt)
  188                         break;
  189 
  190                 /*
  191                  * Probably contigmalloc failure. Try reducing the
  192                  * aperture so that the gatt size reduces.
  193                  */
  194                 if (AGP_SET_APERTURE(dev, AGP_GET_APERTURE(dev) / 2)) {
  195                         agp_generic_detach(dev);
  196                         return ENOMEM;
  197                 }
  198         }
  199         sc->gatt = gatt;
  200 
  201         if (sc->regs == via_v2_regs) {
  202                 /* Install the gatt. */
  203                 pci_write_config(dev, sc->regs[REG_ATTBASE], gatt->ag_physical | 3, 4);
  204                 
  205                 /* Enable the aperture. */
  206                 pci_write_config(dev, sc->regs[REG_GARTCTRL], 0x0f, 4);
  207         } else {
  208                 u_int32_t gartctrl;
  209 
  210                 /* Install the gatt. */
  211                 pci_write_config(dev, sc->regs[REG_ATTBASE], gatt->ag_physical, 4);
  212                 
  213                 /* Enable the aperture. */
  214                 gartctrl = pci_read_config(dev, sc->regs[REG_GARTCTRL], 4);
  215                 pci_write_config(dev, sc->regs[REG_GARTCTRL], gartctrl | (3 << 7), 4);
  216         }
  217 
  218         return 0;
  219 }
  220 
  221 static int
  222 agp_via_detach(device_t dev)
  223 {
  224         struct agp_via_softc *sc = device_get_softc(dev);
  225 
  226         agp_free_cdev(dev);
  227 
  228         pci_write_config(dev, sc->regs[REG_GARTCTRL], 0, 4);
  229         pci_write_config(dev, sc->regs[REG_ATTBASE], 0, 4);
  230         AGP_SET_APERTURE(dev, sc->initial_aperture);
  231         agp_free_gatt(sc->gatt);
  232         agp_free_res(dev);
  233 
  234         return 0;
  235 }
  236 
  237 static u_int32_t
  238 agp_via_get_aperture(device_t dev)
  239 {
  240         struct agp_via_softc *sc = device_get_softc(dev);
  241         u_int32_t apsize;
  242 
  243         if (sc->regs == via_v2_regs) {
  244                 apsize = pci_read_config(dev, sc->regs[REG_APSIZE], 1);
  245 
  246                 /*
  247                  * The size is determined by the number of low bits of
  248                  * register APBASE which are forced to zero. The low 20 bits
  249                  * are always forced to zero and each zero bit in the apsize
  250                  * field just read forces the corresponding bit in the 27:20
  251                  * to be zero. We calculate the aperture size accordingly.
  252                  */
  253                 return (((apsize ^ 0xff) << 20) | ((1 << 20) - 1)) + 1;
  254         } else {
  255                 apsize = pci_read_config(dev, sc->regs[REG_APSIZE], 2) & 0xfff;
  256                 switch (apsize) {
  257                 case 0x800:
  258                         return 0x80000000;
  259                 case 0xc00:
  260                         return 0x40000000;
  261                 case 0xe00:
  262                         return 0x20000000;
  263                 case 0xf00:
  264                         return 0x10000000;
  265                 case 0xf20:
  266                         return 0x08000000;
  267                 case 0xf30:
  268                         return 0x04000000;
  269                 case 0xf38:
  270                         return 0x02000000;
  271                 case 0xf3c:
  272                         return 0x01000000;
  273                 case 0xf3e:
  274                         return 0x00800000;
  275                 case 0xf3f:
  276                         return 0x00400000;
  277                 default:
  278                         device_printf(dev, "Invalid aperture setting 0x%x\n",
  279                             pci_read_config(dev, sc->regs[REG_APSIZE], 2));
  280                         return 0;
  281                 }
  282         }
  283 }
  284 
  285 static int
  286 agp_via_set_aperture(device_t dev, u_int32_t aperture)
  287 {
  288         struct agp_via_softc *sc = device_get_softc(dev);
  289         u_int32_t apsize, key, val;
  290 
  291         if (sc->regs == via_v2_regs) {
  292                 /*
  293                  * Reverse the magic from get_aperture.
  294                  */
  295                 apsize = ((aperture - 1) >> 20) ^ 0xff;
  296 
  297                 /*
  298                  * Double check for sanity.
  299                  */
  300                 if ((((apsize ^ 0xff) << 20) | ((1 << 20) - 1)) + 1 != aperture)
  301                         return EINVAL;
  302 
  303                 pci_write_config(dev, sc->regs[REG_APSIZE], apsize, 1);
  304         } else {
  305                 switch (aperture) {
  306                 case 0x80000000:
  307                         key = 0x800;
  308                         break;
  309                 case 0x40000000:
  310                         key = 0xc00;
  311                         break;
  312                 case 0x20000000:
  313                         key = 0xe00;
  314                         break;
  315                 case 0x10000000:
  316                         key = 0xf00;
  317                         break;
  318                 case 0x08000000:
  319                         key = 0xf20;
  320                         break;
  321                 case 0x04000000:
  322                         key = 0xf30;
  323                         break;
  324                 case 0x02000000:
  325                         key = 0xf38;
  326                         break;
  327                 case 0x01000000:
  328                         key = 0xf3c;
  329                         break;
  330                 case 0x00800000:
  331                         key = 0xf3e;
  332                         break;
  333                 case 0x00400000:
  334                         key = 0xf3f;
  335                         break;
  336                 default:
  337                         device_printf(dev, "Invalid aperture size (%dMb)\n",
  338                             aperture / 1024 / 1024);
  339                         return EINVAL;
  340                 }
  341                 val = pci_read_config(dev, sc->regs[REG_APSIZE], 2);
  342                 pci_write_config(dev, sc->regs[REG_APSIZE],
  343                     ((val & ~0xfff) | key), 2);
  344         }
  345         return 0;
  346 }
  347 
  348 static int
  349 agp_via_bind_page(device_t dev, vm_offset_t offset, vm_offset_t physical)
  350 {
  351         struct agp_via_softc *sc = device_get_softc(dev);
  352 
  353         if (offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT))
  354                 return EINVAL;
  355 
  356         sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = physical;
  357         return 0;
  358 }
  359 
  360 static int
  361 agp_via_unbind_page(device_t dev, vm_offset_t offset)
  362 {
  363         struct agp_via_softc *sc = device_get_softc(dev);
  364 
  365         if (offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT))
  366                 return EINVAL;
  367 
  368         sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0;
  369         return 0;
  370 }
  371 
  372 static void
  373 agp_via_flush_tlb(device_t dev)
  374 {
  375         struct agp_via_softc *sc = device_get_softc(dev);
  376         u_int32_t gartctrl;
  377 
  378         if (sc->regs == via_v2_regs) {
  379                 pci_write_config(dev, sc->regs[REG_GARTCTRL], 0x8f, 4);
  380                 pci_write_config(dev, sc->regs[REG_GARTCTRL], 0x0f, 4);
  381         } else {
  382                 gartctrl = pci_read_config(dev, sc->regs[REG_GARTCTRL], 4);
  383                 pci_write_config(dev, sc->regs[REG_GARTCTRL], gartctrl &
  384                     ~(1 << 7), 4);
  385                 pci_write_config(dev, sc->regs[REG_GARTCTRL], gartctrl, 4);
  386         }
  387         
  388 }
  389 
  390 static device_method_t agp_via_methods[] = {
  391         /* Device interface */
  392         DEVMETHOD(device_probe,         agp_via_probe),
  393         DEVMETHOD(device_attach,        agp_via_attach),
  394         DEVMETHOD(device_detach,        agp_via_detach),
  395         DEVMETHOD(device_shutdown,      bus_generic_shutdown),
  396         DEVMETHOD(device_suspend,       bus_generic_suspend),
  397         DEVMETHOD(device_resume,        bus_generic_resume),
  398 
  399         /* AGP interface */
  400         DEVMETHOD(agp_get_aperture,     agp_via_get_aperture),
  401         DEVMETHOD(agp_set_aperture,     agp_via_set_aperture),
  402         DEVMETHOD(agp_bind_page,        agp_via_bind_page),
  403         DEVMETHOD(agp_unbind_page,      agp_via_unbind_page),
  404         DEVMETHOD(agp_flush_tlb,        agp_via_flush_tlb),
  405         DEVMETHOD(agp_enable,           agp_generic_enable),
  406         DEVMETHOD(agp_alloc_memory,     agp_generic_alloc_memory),
  407         DEVMETHOD(agp_free_memory,      agp_generic_free_memory),
  408         DEVMETHOD(agp_bind_memory,      agp_generic_bind_memory),
  409         DEVMETHOD(agp_unbind_memory,    agp_generic_unbind_memory),
  410 
  411         DEVMETHOD_END
  412 };
  413 
  414 static driver_t agp_via_driver = {
  415         "agp",
  416         agp_via_methods,
  417         sizeof(struct agp_via_softc),
  418 };
  419 
  420 static devclass_t agp_devclass;
  421 
  422 DRIVER_MODULE(agp_via, pci, agp_via_driver, agp_devclass, NULL, NULL);
  423 MODULE_DEPEND(agp_via, agp, 1, 1, 1);
  424 MODULE_DEPEND(agp_via, pci, 1, 1, 1);

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