The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/agp/agp_via.c

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    1 /*-
    2  * Copyright (c) 2000 Doug Rabson
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  *
   14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   24  * SUCH DAMAGE.
   25  */
   26 
   27 #include <sys/cdefs.h>
   28 __FBSDID("$FreeBSD$");
   29 
   30 #include <sys/param.h>
   31 #include <sys/systm.h>
   32 #include <sys/malloc.h>
   33 #include <sys/kernel.h>
   34 #include <sys/module.h>
   35 #include <sys/bus.h>
   36 #include <sys/lock.h>
   37 #include <sys/mutex.h>
   38 #include <sys/proc.h>
   39 
   40 #include <dev/agp/agppriv.h>
   41 #include <dev/agp/agpreg.h>
   42 #include <dev/pci/pcivar.h>
   43 #include <dev/pci/pcireg.h>
   44 
   45 #include <vm/vm.h>
   46 #include <vm/vm_object.h>
   47 #include <vm/pmap.h>
   48 
   49 #define REG_GARTCTRL    0
   50 #define REG_APSIZE      1
   51 #define REG_ATTBASE     2
   52 
   53 struct agp_via_softc {
   54         struct agp_softc agp;
   55         u_int32_t       initial_aperture; /* aperture size at startup */
   56         struct agp_gatt *gatt;
   57         int             *regs;
   58 };
   59 
   60 static int via_v2_regs[] = { AGP_VIA_GARTCTRL, AGP_VIA_APSIZE,
   61     AGP_VIA_ATTBASE };
   62 static int via_v3_regs[] = { AGP3_VIA_GARTCTRL, AGP3_VIA_APSIZE,
   63     AGP3_VIA_ATTBASE };
   64 
   65 static const char*
   66 agp_via_match(device_t dev)
   67 {
   68         if (pci_get_class(dev) != PCIC_BRIDGE
   69             || pci_get_subclass(dev) != PCIS_BRIDGE_HOST)
   70                 return NULL;
   71 
   72         if (agp_find_caps(dev) == 0)
   73                 return NULL;
   74 
   75         switch (pci_get_devid(dev)) {
   76         case 0x01981106:
   77                 return ("VIA 8763 (P4X600) host to PCI bridge");
   78         case 0x02591106:
   79                 return ("VIA PM800/PN800/PM880/PN880 host to PCI bridge");
   80         case 0x02691106:
   81                 return ("VIA KT880 host to PCI bridge");
   82         case 0x02961106:
   83                 return ("VIA 3296 (P4M800) host to PCI bridge");
   84         case 0x03051106:
   85                 return ("VIA 82C8363 (Apollo KT133x/KM133) host to PCI bridge");
   86         case 0x03141106:
   87                 return ("VIA 3314 (P4M800CE) host to PCI bridge");
   88         case 0x03241106:
   89                 return ("VIA VT3324 (CX700) host to PCI bridge");
   90         case 0x03271106:
   91                 return ("VIA 3327 (P4M890) host to PCI bridge");
   92         case 0x03641106:
   93                 return ("VIA 3364 (P4M900) host to PCI bridge");
   94         case 0x03911106:
   95                 return ("VIA 8371 (Apollo KX133) host to PCI bridge");
   96         case 0x05011106:
   97                 return ("VIA 8501 (Apollo MVP4) host to PCI bridge");
   98         case 0x05971106:
   99                 return ("VIA 82C597 (Apollo VP3) host to PCI bridge");
  100         case 0x05981106:
  101                 return ("VIA 82C598 (Apollo MVP3) host to PCI bridge");
  102         case 0x06011106:
  103                 return ("VIA 8601 (Apollo ProMedia/PLE133Ta) host to PCI bridge");
  104         case 0x06051106:
  105                 return ("VIA 82C694X (Apollo Pro 133A) host to PCI bridge");
  106         case 0x06911106:
  107                 return ("VIA 82C691 (Apollo Pro) host to PCI bridge");
  108         case 0x30911106:
  109                 return ("VIA 8633 (Pro 266) host to PCI bridge");
  110         case 0x30991106:
  111                 return ("VIA 8367 (KT266/KY266x/KT333) host to PCI bridge");
  112         case 0x31011106:
  113                 return ("VIA 8653 (Pro266T) host to PCI bridge");
  114         case 0x31121106:
  115                 return ("VIA 8361 (KLE133) host to PCI bridge");
  116         case 0x31161106:
  117                 return ("VIA XM266 (PM266/KM266) host to PCI bridge");
  118         case 0x31231106:
  119                 return ("VIA 862x (CLE266) host to PCI bridge");
  120         case 0x31281106:
  121                 return ("VIA 8753 (P4X266) host to PCI bridge");
  122         case 0x31481106:
  123                 return ("VIA 8703 (P4M266x/P4N266) host to PCI bridge");
  124         case 0x31561106:
  125                 return ("VIA XN266 (Apollo Pro266) host to PCI bridge");
  126         case 0x31681106:
  127                 return ("VIA 8754 (PT800) host to PCI bridge");
  128         case 0x31891106:
  129                 return ("VIA 8377 (Apollo KT400/KT400A/KT600) host to PCI bridge");
  130         case 0x32051106:
  131                 return ("VIA 8235/8237 (Apollo KM400/KM400A) host to PCI bridge");
  132         case 0x32081106:
  133                 return ("VIA 8783 (PT890) host to PCI bridge");
  134         case 0x32581106:
  135                 return ("VIA PT880 host to PCI bridge");
  136         case 0xb1981106:
  137                 return ("VIA VT83xx/VT87xx/KTxxx/Px8xx host to PCI bridge");
  138         }
  139 
  140         return NULL;
  141 }
  142 
  143 static int
  144 agp_via_probe(device_t dev)
  145 {
  146         const char *desc;
  147 
  148         if (resource_disabled("agp", device_get_unit(dev)))
  149                 return (ENXIO);
  150         desc = agp_via_match(dev);
  151         if (desc) {
  152                 device_set_desc(dev, desc);
  153                 return BUS_PROBE_DEFAULT;
  154         }
  155 
  156         return ENXIO;
  157 }
  158 
  159 static int
  160 agp_via_attach(device_t dev)
  161 {
  162         struct agp_via_softc *sc = device_get_softc(dev);
  163         struct agp_gatt *gatt;
  164         int error;
  165         u_int32_t agpsel;
  166         u_int32_t capid;
  167 
  168         sc->regs = via_v2_regs;
  169 
  170         /* Look at the capability register to see if we handle AGP3 */
  171         capid = pci_read_config(dev, agp_find_caps(dev) + AGP_CAPID, 4);
  172         if (((capid >> 20) & 0x0f) >= 3) { 
  173                 agpsel = pci_read_config(dev, AGP_VIA_AGPSEL, 1);
  174                 if ((agpsel & (1 << 1)) == 0)
  175                         sc->regs = via_v3_regs;
  176         }
  177         
  178         error = agp_generic_attach(dev);
  179         if (error)
  180                 return error;
  181 
  182         sc->initial_aperture = AGP_GET_APERTURE(dev);
  183 
  184         for (;;) {
  185                 gatt = agp_alloc_gatt(dev);
  186                 if (gatt)
  187                         break;
  188 
  189                 /*
  190                  * Probably contigmalloc failure. Try reducing the
  191                  * aperture so that the gatt size reduces.
  192                  */
  193                 if (AGP_SET_APERTURE(dev, AGP_GET_APERTURE(dev) / 2)) {
  194                         agp_generic_detach(dev);
  195                         return ENOMEM;
  196                 }
  197         }
  198         sc->gatt = gatt;
  199 
  200         if (sc->regs == via_v2_regs) {
  201                 /* Install the gatt. */
  202                 pci_write_config(dev, sc->regs[REG_ATTBASE], gatt->ag_physical | 3, 4);
  203                 
  204                 /* Enable the aperture. */
  205                 pci_write_config(dev, sc->regs[REG_GARTCTRL], 0x0f, 4);
  206         } else {
  207                 u_int32_t gartctrl;
  208 
  209                 /* Install the gatt. */
  210                 pci_write_config(dev, sc->regs[REG_ATTBASE], gatt->ag_physical, 4);
  211                 
  212                 /* Enable the aperture. */
  213                 gartctrl = pci_read_config(dev, sc->regs[REG_GARTCTRL], 4);
  214                 pci_write_config(dev, sc->regs[REG_GARTCTRL], gartctrl | (3 << 7), 4);
  215         }
  216 
  217         device_printf(dev, "aperture size is %dM\n",
  218                 sc->initial_aperture / 1024 / 1024);
  219 
  220         return 0;
  221 }
  222 
  223 static int
  224 agp_via_detach(device_t dev)
  225 {
  226         struct agp_via_softc *sc = device_get_softc(dev);
  227 
  228         agp_free_cdev(dev);
  229 
  230         pci_write_config(dev, sc->regs[REG_GARTCTRL], 0, 4);
  231         pci_write_config(dev, sc->regs[REG_ATTBASE], 0, 4);
  232         AGP_SET_APERTURE(dev, sc->initial_aperture);
  233         agp_free_gatt(sc->gatt);
  234         agp_free_res(dev);
  235 
  236         return 0;
  237 }
  238 
  239 static u_int32_t
  240 agp_via_get_aperture(device_t dev)
  241 {
  242         struct agp_via_softc *sc = device_get_softc(dev);
  243         u_int32_t apsize;
  244 
  245         if (sc->regs == via_v2_regs) {
  246                 apsize = pci_read_config(dev, sc->regs[REG_APSIZE], 1);
  247 
  248                 /*
  249                  * The size is determined by the number of low bits of
  250                  * register APBASE which are forced to zero. The low 20 bits
  251                  * are always forced to zero and each zero bit in the apsize
  252                  * field just read forces the corresponding bit in the 27:20
  253                  * to be zero. We calculate the aperture size accordingly.
  254                  */
  255                 return (((apsize ^ 0xff) << 20) | ((1 << 20) - 1)) + 1;
  256         } else {
  257                 apsize = pci_read_config(dev, sc->regs[REG_APSIZE], 2) & 0xfff;
  258                 switch (apsize) {
  259                 case 0x800:
  260                         return 0x80000000;
  261                 case 0xc00:
  262                         return 0x40000000;
  263                 case 0xe00:
  264                         return 0x20000000;
  265                 case 0xf00:
  266                         return 0x10000000;
  267                 case 0xf20:
  268                         return 0x08000000;
  269                 case 0xf30:
  270                         return 0x04000000;
  271                 case 0xf38:
  272                         return 0x02000000;
  273                 case 0xf3c:
  274                         return 0x01000000;
  275                 case 0xf3e:
  276                         return 0x00800000;
  277                 case 0xf3f:
  278                         return 0x00400000;
  279                 default:
  280                         device_printf(dev, "Invalid aperture setting 0x%x\n",
  281                             pci_read_config(dev, sc->regs[REG_APSIZE], 2));
  282                         return 0;
  283                 }
  284         }
  285 }
  286 
  287 static int
  288 agp_via_set_aperture(device_t dev, u_int32_t aperture)
  289 {
  290         struct agp_via_softc *sc = device_get_softc(dev);
  291         u_int32_t apsize, key, val;
  292 
  293         if (sc->regs == via_v2_regs) {
  294                 /*
  295                  * Reverse the magic from get_aperture.
  296                  */
  297                 apsize = ((aperture - 1) >> 20) ^ 0xff;
  298 
  299                 /*
  300                  * Double check for sanity.
  301                  */
  302                 if ((((apsize ^ 0xff) << 20) | ((1 << 20) - 1)) + 1 != aperture)
  303                         return EINVAL;
  304 
  305                 pci_write_config(dev, sc->regs[REG_APSIZE], apsize, 1);
  306         } else {
  307                 switch (aperture) {
  308                 case 0x80000000:
  309                         key = 0x800;
  310                         break;
  311                 case 0x40000000:
  312                         key = 0xc00;
  313                         break;
  314                 case 0x20000000:
  315                         key = 0xe00;
  316                         break;
  317                 case 0x10000000:
  318                         key = 0xf00;
  319                         break;
  320                 case 0x08000000:
  321                         key = 0xf20;
  322                         break;
  323                 case 0x04000000:
  324                         key = 0xf30;
  325                         break;
  326                 case 0x02000000:
  327                         key = 0xf38;
  328                         break;
  329                 case 0x01000000:
  330                         key = 0xf3c;
  331                         break;
  332                 case 0x00800000:
  333                         key = 0xf3e;
  334                         break;
  335                 case 0x00400000:
  336                         key = 0xf3f;
  337                         break;
  338                 default:
  339                         device_printf(dev, "Invalid aperture size (%dMb)\n",
  340                             aperture / 1024 / 1024);
  341                         return EINVAL;
  342                 }
  343                 val = pci_read_config(dev, sc->regs[REG_APSIZE], 2);
  344                 pci_write_config(dev, sc->regs[REG_APSIZE], 
  345                     ((val & ~0xfff) | key), 2);
  346         }
  347         return 0;
  348 }
  349 
  350 static int
  351 agp_via_bind_page(device_t dev, vm_offset_t offset, vm_offset_t physical)
  352 {
  353         struct agp_via_softc *sc = device_get_softc(dev);
  354 
  355         if (offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT))
  356                 return EINVAL;
  357 
  358         sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = physical;
  359         return 0;
  360 }
  361 
  362 static int
  363 agp_via_unbind_page(device_t dev, vm_offset_t offset)
  364 {
  365         struct agp_via_softc *sc = device_get_softc(dev);
  366 
  367         if (offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT))
  368                 return EINVAL;
  369 
  370         sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0;
  371         return 0;
  372 }
  373 
  374 static void
  375 agp_via_flush_tlb(device_t dev)
  376 {
  377         struct agp_via_softc *sc = device_get_softc(dev);
  378         u_int32_t gartctrl;
  379 
  380         if (sc->regs == via_v2_regs) {
  381                 pci_write_config(dev, sc->regs[REG_GARTCTRL], 0x8f, 4);
  382                 pci_write_config(dev, sc->regs[REG_GARTCTRL], 0x0f, 4);
  383         } else {
  384                 gartctrl = pci_read_config(dev, sc->regs[REG_GARTCTRL], 4);
  385                 pci_write_config(dev, sc->regs[REG_GARTCTRL], gartctrl &
  386                     ~(1 << 7), 4);
  387                 pci_write_config(dev, sc->regs[REG_GARTCTRL], gartctrl, 4);
  388         }
  389         
  390 }
  391 
  392 static device_method_t agp_via_methods[] = {
  393         /* Device interface */
  394         DEVMETHOD(device_probe,         agp_via_probe),
  395         DEVMETHOD(device_attach,        agp_via_attach),
  396         DEVMETHOD(device_detach,        agp_via_detach),
  397         DEVMETHOD(device_shutdown,      bus_generic_shutdown),
  398         DEVMETHOD(device_suspend,       bus_generic_suspend),
  399         DEVMETHOD(device_resume,        bus_generic_resume),
  400 
  401         /* AGP interface */
  402         DEVMETHOD(agp_get_aperture,     agp_via_get_aperture),
  403         DEVMETHOD(agp_set_aperture,     agp_via_set_aperture),
  404         DEVMETHOD(agp_bind_page,        agp_via_bind_page),
  405         DEVMETHOD(agp_unbind_page,      agp_via_unbind_page),
  406         DEVMETHOD(agp_flush_tlb,        agp_via_flush_tlb),
  407         DEVMETHOD(agp_enable,           agp_generic_enable),
  408         DEVMETHOD(agp_alloc_memory,     agp_generic_alloc_memory),
  409         DEVMETHOD(agp_free_memory,      agp_generic_free_memory),
  410         DEVMETHOD(agp_bind_memory,      agp_generic_bind_memory),
  411         DEVMETHOD(agp_unbind_memory,    agp_generic_unbind_memory),
  412 
  413         { 0, 0 }
  414 };
  415 
  416 static driver_t agp_via_driver = {
  417         "agp",
  418         agp_via_methods,
  419         sizeof(struct agp_via_softc),
  420 };
  421 
  422 static devclass_t agp_devclass;
  423 
  424 DRIVER_MODULE(agp_via, hostb, agp_via_driver, agp_devclass, 0, 0);
  425 MODULE_DEPEND(agp_via, agp, 1, 1, 1);
  426 MODULE_DEPEND(agp_via, pci, 1, 1, 1);

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