FreeBSD/Linux Kernel Cross Reference
sys/dev/aha/aha.c
1 /*
2 * Generic register and struct definitions for the Adaptech 154x/164x
3 * SCSI host adapters. Product specific probe and attach routines can
4 * be found in:
5 * aha 1542A/1542B/1542C/1542CF/1542CP aha_isa.c
6 * aha 1640 aha_mca.c
7 */
8 /*-
9 * Copyright (c) 1998 M. Warner Losh.
10 * All Rights Reserved.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * Derived from bt.c written by:
34 *
35 * Copyright (c) 1998 Justin T. Gibbs.
36 * All rights reserved.
37 *
38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions
40 * are met:
41 * 1. Redistributions of source code must retain the above copyright
42 * notice, this list of conditions, and the following disclaimer,
43 * without modification, immediately at the beginning of the file.
44 * 2. The name of the author may not be used to endorse or promote products
45 * derived from this software without specific prior written permission.
46 *
47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
48 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
49 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
50 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
51 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
52 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
53 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
54 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
55 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
56 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
57 * SUCH DAMAGE.
58 */
59
60 #include <sys/cdefs.h>
61 __FBSDID("$FreeBSD: releng/11.1/sys/dev/aha/aha.c 315812 2017-03-23 06:40:20Z mav $");
62
63 #include <sys/param.h>
64 #include <sys/conf.h>
65 #include <sys/bus.h>
66 #include <sys/systm.h>
67 #include <sys/malloc.h>
68 #include <sys/kernel.h>
69 #include <sys/lock.h>
70 #include <sys/module.h>
71 #include <sys/mutex.h>
72 #include <sys/rman.h>
73
74 #include <machine/bus.h>
75
76 #include <cam/cam.h>
77 #include <cam/cam_ccb.h>
78 #include <cam/cam_sim.h>
79 #include <cam/cam_xpt_sim.h>
80 #include <cam/cam_debug.h>
81
82 #include <cam/scsi/scsi_message.h>
83
84 #include <dev/aha/ahareg.h>
85
86 #define PRVERB(x) do { if (bootverbose) device_printf x; } while (0)
87
88 /* Macro to determine that a rev is potentially a new valid one
89 * so that the driver doesn't keep breaking on new revs as it
90 * did for the CF and CP.
91 */
92 #define PROBABLY_NEW_BOARD(REV) (REV > 0x43 && REV < 0x56)
93
94 /* MailBox Management functions */
95 static __inline void ahanextinbox(struct aha_softc *aha);
96 static __inline void ahanextoutbox(struct aha_softc *aha);
97
98 #define aha_name(aha) device_get_nameunit(aha->dev)
99
100 static __inline void
101 ahanextinbox(struct aha_softc *aha)
102 {
103 if (aha->cur_inbox == aha->last_inbox)
104 aha->cur_inbox = aha->in_boxes;
105 else
106 aha->cur_inbox++;
107 }
108
109 static __inline void
110 ahanextoutbox(struct aha_softc *aha)
111 {
112 if (aha->cur_outbox == aha->last_outbox)
113 aha->cur_outbox = aha->out_boxes;
114 else
115 aha->cur_outbox++;
116 }
117
118 #define ahautoa24(u,s3) \
119 (s3)[0] = ((u) >> 16) & 0xff; \
120 (s3)[1] = ((u) >> 8) & 0xff; \
121 (s3)[2] = (u) & 0xff;
122
123 #define aha_a24tou(s3) \
124 (((s3)[0] << 16) | ((s3)[1] << 8) | (s3)[2])
125
126 /* CCB Management functions */
127 static __inline uint32_t ahaccbvtop(struct aha_softc *aha,
128 struct aha_ccb *accb);
129 static __inline struct aha_ccb* ahaccbptov(struct aha_softc *aha,
130 uint32_t ccb_addr);
131
132 static __inline uint32_t
133 ahaccbvtop(struct aha_softc *aha, struct aha_ccb *accb)
134 {
135 return (aha->aha_ccb_physbase
136 + (uint32_t)((caddr_t)accb - (caddr_t)aha->aha_ccb_array));
137 }
138 static __inline struct aha_ccb *
139 ahaccbptov(struct aha_softc *aha, uint32_t ccb_addr)
140 {
141 return (aha->aha_ccb_array +
142 + ((struct aha_ccb*)(uintptr_t)ccb_addr -
143 (struct aha_ccb*)(uintptr_t)aha->aha_ccb_physbase));
144 }
145
146 static struct aha_ccb* ahagetccb(struct aha_softc *aha);
147 static __inline void ahafreeccb(struct aha_softc *aha, struct aha_ccb *accb);
148 static void ahaallocccbs(struct aha_softc *aha);
149 static bus_dmamap_callback_t ahaexecuteccb;
150 static void ahadone(struct aha_softc *aha, struct aha_ccb *accb,
151 aha_mbi_comp_code_t comp_code);
152 static void aha_intr_locked(struct aha_softc *aha);
153
154 /* Host adapter command functions */
155 static int ahareset(struct aha_softc* aha, int hard_reset);
156
157 /* Initialization functions */
158 static int ahainitmboxes(struct aha_softc *aha);
159 static bus_dmamap_callback_t ahamapmboxes;
160 static bus_dmamap_callback_t ahamapccbs;
161 static bus_dmamap_callback_t ahamapsgs;
162
163 /* Transfer Negotiation Functions */
164 static void ahafetchtransinfo(struct aha_softc *aha,
165 struct ccb_trans_settings *cts);
166
167 /* CAM SIM entry points */
168 #define ccb_accb_ptr spriv_ptr0
169 #define ccb_aha_ptr spriv_ptr1
170 static void ahaaction(struct cam_sim *sim, union ccb *ccb);
171 static void ahapoll(struct cam_sim *sim);
172
173 /* Our timeout handler */
174 static void ahatimeout(void *arg);
175
176 /* Exported functions */
177 void
178 aha_alloc(struct aha_softc *aha)
179 {
180
181 SLIST_INIT(&aha->free_aha_ccbs);
182 LIST_INIT(&aha->pending_ccbs);
183 SLIST_INIT(&aha->sg_maps);
184 aha->ccb_sg_opcode = INITIATOR_SG_CCB_WRESID;
185 aha->ccb_ccb_opcode = INITIATOR_CCB_WRESID;
186 mtx_init(&aha->lock, "aha", NULL, MTX_DEF);
187 }
188
189 void
190 aha_free(struct aha_softc *aha)
191 {
192 switch (aha->init_level) {
193 default:
194 case 8:
195 {
196 struct sg_map_node *sg_map;
197
198 while ((sg_map = SLIST_FIRST(&aha->sg_maps))!= NULL) {
199 SLIST_REMOVE_HEAD(&aha->sg_maps, links);
200 bus_dmamap_unload(aha->sg_dmat, sg_map->sg_dmamap);
201 bus_dmamem_free(aha->sg_dmat, sg_map->sg_vaddr,
202 sg_map->sg_dmamap);
203 free(sg_map, M_DEVBUF);
204 }
205 bus_dma_tag_destroy(aha->sg_dmat);
206 }
207 case 7:
208 bus_dmamap_unload(aha->ccb_dmat, aha->ccb_dmamap);
209 case 6:
210 bus_dmamem_free(aha->ccb_dmat, aha->aha_ccb_array,
211 aha->ccb_dmamap);
212 case 5:
213 bus_dma_tag_destroy(aha->ccb_dmat);
214 case 4:
215 bus_dmamap_unload(aha->mailbox_dmat, aha->mailbox_dmamap);
216 case 3:
217 bus_dmamem_free(aha->mailbox_dmat, aha->in_boxes,
218 aha->mailbox_dmamap);
219 case 2:
220 bus_dma_tag_destroy(aha->buffer_dmat);
221 case 1:
222 bus_dma_tag_destroy(aha->mailbox_dmat);
223 case 0:
224 break;
225 }
226 mtx_destroy(&aha->lock);
227 }
228
229 /*
230 * Probe the adapter and verify that the card is an Adaptec.
231 */
232 int
233 aha_probe(struct aha_softc* aha)
234 {
235 u_int status;
236 u_int intstat;
237 int error;
238 board_id_data_t board_id;
239
240 /*
241 * See if the three I/O ports look reasonable.
242 * Touch the minimal number of registers in the
243 * failure case.
244 */
245 status = aha_inb(aha, STATUS_REG);
246 if ((status == 0) ||
247 (status & (DIAG_ACTIVE|CMD_REG_BUSY | STATUS_REG_RSVD)) != 0) {
248 PRVERB((aha->dev, "status reg test failed %x\n", status));
249 return (ENXIO);
250 }
251
252 intstat = aha_inb(aha, INTSTAT_REG);
253 if ((intstat & INTSTAT_REG_RSVD) != 0) {
254 PRVERB((aha->dev, "Failed Intstat Reg Test\n"));
255 return (ENXIO);
256 }
257
258 /*
259 * Looking good so far. Final test is to reset the
260 * adapter and fetch the board ID and ensure we aren't
261 * looking at a BusLogic.
262 */
263 if ((error = ahareset(aha, /*hard_reset*/TRUE)) != 0) {
264 PRVERB((aha->dev, "Failed Reset\n"));
265 return (ENXIO);
266 }
267
268 /*
269 * Get the board ID. We use this to see if we're dealing with
270 * a buslogic card or an aha card (or clone).
271 */
272 error = aha_cmd(aha, AOP_INQUIRE_BOARD_ID, NULL, /*parmlen*/0,
273 (uint8_t*)&board_id, sizeof(board_id), DEFAULT_CMD_TIMEOUT);
274 if (error != 0) {
275 PRVERB((aha->dev, "INQUIRE failed %x\n", error));
276 return (ENXIO);
277 }
278 aha->fw_major = board_id.firmware_rev_major;
279 aha->fw_minor = board_id.firmware_rev_minor;
280 aha->boardid = board_id.board_type;
281
282 /*
283 * The Buslogic cards have an id of either 0x41 or 0x42. So
284 * if those come up in the probe, we test the geometry register
285 * of the board. Adaptec boards that are this old will not have
286 * this register, and return 0xff, while buslogic cards will return
287 * something different.
288 *
289 * It appears that for reasons unknow, for the for the
290 * aha-1542B cards, we need to wait a little bit before trying
291 * to read the geometry register. I picked 10ms since we have
292 * reports that a for loop to 1000 did the trick, and this
293 * errs on the side of conservatism. Besides, no one will
294 * notice a 10mS delay here, even the 1542B card users :-)
295 *
296 * Some compatible cards return 0 here. Some cards also
297 * seem to return 0x7f.
298 *
299 * XXX I'm not sure how this will impact other cloned cards
300 *
301 * This really should be replaced with the esetup command, since
302 * that appears to be more reliable. This becomes more and more
303 * true over time as we discover more cards that don't read the
304 * geometry register consistently.
305 */
306 if (aha->boardid <= 0x42) {
307 /* Wait 10ms before reading */
308 DELAY(10000);
309 status = aha_inb(aha, GEOMETRY_REG);
310 if (status != 0xff && status != 0x00 && status != 0x7f) {
311 PRVERB((aha->dev, "Geometry Register test failed %#x\n",
312 status));
313 return (ENXIO);
314 }
315 }
316
317 return (0);
318 }
319
320 /*
321 * Pull the boards setup information and record it in our softc.
322 */
323 int
324 aha_fetch_adapter_info(struct aha_softc *aha)
325 {
326 setup_data_t setup_info;
327 config_data_t config_data;
328 uint8_t length_param;
329 int error;
330 struct aha_extbios extbios;
331
332 switch (aha->boardid) {
333 case BOARD_1540_16HEAD_BIOS:
334 snprintf(aha->model, sizeof(aha->model), "1540 16 head BIOS");
335 break;
336 case BOARD_1540_64HEAD_BIOS:
337 snprintf(aha->model, sizeof(aha->model), "1540 64 head BIOS");
338 break;
339 case BOARD_1542:
340 snprintf(aha->model, sizeof(aha->model), "1540/1542 64 head BIOS");
341 break;
342 case BOARD_1640:
343 snprintf(aha->model, sizeof(aha->model), "1640");
344 break;
345 case BOARD_1740:
346 snprintf(aha->model, sizeof(aha->model), "1740A/1742A/1744");
347 break;
348 case BOARD_1542C:
349 snprintf(aha->model, sizeof(aha->model), "1542C");
350 break;
351 case BOARD_1542CF:
352 snprintf(aha->model, sizeof(aha->model), "1542CF");
353 break;
354 case BOARD_1542CP:
355 snprintf(aha->model, sizeof(aha->model), "1542CP");
356 break;
357 default:
358 snprintf(aha->model, sizeof(aha->model), "Unknown");
359 break;
360 }
361 /*
362 * If we are a new type of 1542 board (anything newer than a 1542C)
363 * then disable the extended bios so that the
364 * mailbox interface is unlocked.
365 * This is also true for the 1542B Version 3.20. First Adaptec
366 * board that supports >1Gb drives.
367 * No need to check the extended bios flags as some of the
368 * extensions that cause us problems are not flagged in that byte.
369 */
370 if (PROBABLY_NEW_BOARD(aha->boardid) ||
371 (aha->boardid == 0x41
372 && aha->fw_major == 0x31 &&
373 aha->fw_minor >= 0x34)) {
374 error = aha_cmd(aha, AOP_RETURN_EXT_BIOS_INFO, NULL,
375 /*paramlen*/0, (u_char *)&extbios, sizeof(extbios),
376 DEFAULT_CMD_TIMEOUT);
377 if (error != 0) {
378 device_printf(aha->dev,
379 "AOP_RETURN_EXT_BIOS_INFO - Failed.");
380 return (error);
381 }
382 error = aha_cmd(aha, AOP_MBOX_IF_ENABLE, (uint8_t *)&extbios,
383 /*paramlen*/2, NULL, 0, DEFAULT_CMD_TIMEOUT);
384 if (error != 0) {
385 device_printf(aha->dev, "AOP_MBOX_IF_ENABLE - Failed.");
386 return (error);
387 }
388 }
389 if (aha->boardid < 0x41)
390 device_printf(aha->dev, "Warning: aha-1542A won't work.\n");
391
392 aha->max_sg = 17; /* Need >= 17 to do 64k I/O */
393 aha->diff_bus = 0;
394 aha->extended_lun = 0;
395 aha->extended_trans = 0;
396 aha->max_ccbs = 16;
397 /* Determine Sync/Wide/Disc settings */
398 length_param = sizeof(setup_info);
399 error = aha_cmd(aha, AOP_INQUIRE_SETUP_INFO, &length_param,
400 /*paramlen*/1, (uint8_t*)&setup_info, sizeof(setup_info),
401 DEFAULT_CMD_TIMEOUT);
402 if (error != 0) {
403 device_printf(aha->dev, "aha_fetch_adapter_info - Failed "
404 "Get Setup Info\n");
405 return (error);
406 }
407 if (setup_info.initiate_sync != 0) {
408 aha->sync_permitted = ALL_TARGETS;
409 }
410 aha->disc_permitted = ALL_TARGETS;
411
412 /* We need as many mailboxes as we can have ccbs */
413 aha->num_boxes = aha->max_ccbs;
414
415 /* Determine our SCSI ID */
416 error = aha_cmd(aha, AOP_INQUIRE_CONFIG, NULL, /*parmlen*/0,
417 (uint8_t*)&config_data, sizeof(config_data), DEFAULT_CMD_TIMEOUT);
418 if (error != 0) {
419 device_printf(aha->dev,
420 "aha_fetch_adapter_info - Failed Get Config\n");
421 return (error);
422 }
423 aha->scsi_id = config_data.scsi_id;
424 return (0);
425 }
426
427 /*
428 * Start the board, ready for normal operation
429 */
430 int
431 aha_init(struct aha_softc* aha)
432 {
433 /* Announce the Adapter */
434 device_printf(aha->dev, "AHA-%s FW Rev. %c.%c (ID=%x) ",
435 aha->model, aha->fw_major, aha->fw_minor, aha->boardid);
436
437 if (aha->diff_bus != 0)
438 printf("Diff ");
439
440 printf("SCSI Host Adapter, SCSI ID %d, %d CCBs\n", aha->scsi_id,
441 aha->max_ccbs);
442
443 /*
444 * Create our DMA tags. These tags define the kinds of device
445 * accessible memory allocations and memory mappings we will
446 * need to perform during normal operation.
447 *
448 * Unless we need to further restrict the allocation, we rely
449 * on the restrictions of the parent dmat, hence the common
450 * use of MAXADDR and MAXSIZE.
451 */
452
453 /* DMA tag for mapping buffers into device visible space. */
454 if (bus_dma_tag_create( /* parent */ aha->parent_dmat,
455 /* alignment */ 1,
456 /* boundary */ 0,
457 /* lowaddr */ BUS_SPACE_MAXADDR,
458 /* highaddr */ BUS_SPACE_MAXADDR,
459 /* filter */ NULL,
460 /* filterarg */ NULL,
461 /* maxsize */ DFLTPHYS,
462 /* nsegments */ AHA_NSEG,
463 /* maxsegsz */ BUS_SPACE_MAXSIZE_24BIT,
464 /* flags */ BUS_DMA_ALLOCNOW,
465 /* lockfunc */ busdma_lock_mutex,
466 /* lockarg */ &aha->lock,
467 &aha->buffer_dmat) != 0) {
468 goto error_exit;
469 }
470
471 aha->init_level++;
472 /* DMA tag for our mailboxes */
473 if (bus_dma_tag_create( /* parent */ aha->parent_dmat,
474 /* alignment */ 1,
475 /* boundary */ 0,
476 /* lowaddr */ BUS_SPACE_MAXADDR,
477 /* highaddr */ BUS_SPACE_MAXADDR,
478 /* filter */ NULL,
479 /* filterarg */ NULL,
480 /* maxsize */ aha->num_boxes *
481 (sizeof(aha_mbox_in_t) +
482 sizeof(aha_mbox_out_t)),
483 /* nsegments */ 1,
484 /* maxsegsz */ BUS_SPACE_MAXSIZE_24BIT,
485 /* flags */ 0,
486 /* lockfunc */ NULL,
487 /* lockarg */ NULL,
488 &aha->mailbox_dmat) != 0) {
489 goto error_exit;
490 }
491
492 aha->init_level++;
493
494 /* Allocation for our mailboxes */
495 if (bus_dmamem_alloc(aha->mailbox_dmat, (void **)&aha->out_boxes,
496 BUS_DMA_NOWAIT, &aha->mailbox_dmamap) != 0)
497 goto error_exit;
498
499 aha->init_level++;
500
501 /* And permanently map them */
502 bus_dmamap_load(aha->mailbox_dmat, aha->mailbox_dmamap,
503 aha->out_boxes, aha->num_boxes * (sizeof(aha_mbox_in_t) +
504 sizeof(aha_mbox_out_t)), ahamapmboxes, aha, /*flags*/0);
505
506 aha->init_level++;
507
508 aha->in_boxes = (aha_mbox_in_t *)&aha->out_boxes[aha->num_boxes];
509
510 ahainitmboxes(aha);
511
512 /* DMA tag for our ccb structures */
513 if (bus_dma_tag_create( /* parent */ aha->parent_dmat,
514 /* alignment */ 1,
515 /* boundary */ 0,
516 /* lowaddr */ BUS_SPACE_MAXADDR,
517 /* highaddr */ BUS_SPACE_MAXADDR,
518 /* filter */ NULL,
519 /* filterarg */ NULL,
520 /* maxsize */ aha->max_ccbs *
521 sizeof(struct aha_ccb),
522 /* nsegments */ 1,
523 /* maxsegsz */ BUS_SPACE_MAXSIZE_24BIT,
524 /* flags */ 0,
525 /* lockfunc */ NULL,
526 /* lockarg */ NULL,
527 &aha->ccb_dmat) != 0) {
528 goto error_exit;
529 }
530
531 aha->init_level++;
532
533 /* Allocation for our ccbs */
534 if (bus_dmamem_alloc(aha->ccb_dmat, (void **)&aha->aha_ccb_array,
535 BUS_DMA_NOWAIT, &aha->ccb_dmamap) != 0)
536 goto error_exit;
537
538 aha->init_level++;
539
540 /* And permanently map them */
541 bus_dmamap_load(aha->ccb_dmat, aha->ccb_dmamap, aha->aha_ccb_array,
542 aha->max_ccbs * sizeof(struct aha_ccb), ahamapccbs, aha, /*flags*/0);
543
544 aha->init_level++;
545
546 /* DMA tag for our S/G structures. We allocate in page sized chunks */
547 if (bus_dma_tag_create( /* parent */ aha->parent_dmat,
548 /* alignment */ 1,
549 /* boundary */ 0,
550 /* lowaddr */ BUS_SPACE_MAXADDR,
551 /* highaddr */ BUS_SPACE_MAXADDR,
552 /* filter */ NULL,
553 /* filterarg */ NULL,
554 /* maxsize */ PAGE_SIZE,
555 /* nsegments */ 1,
556 /* maxsegsz */ BUS_SPACE_MAXSIZE_24BIT,
557 /* flags */ 0,
558 /* lockfunc */ NULL,
559 /* lockarg */ NULL,
560 &aha->sg_dmat) != 0)
561 goto error_exit;
562
563 aha->init_level++;
564
565 /* Perform initial CCB allocation */
566 bzero(aha->aha_ccb_array, aha->max_ccbs * sizeof(struct aha_ccb));
567 ahaallocccbs(aha);
568
569 if (aha->num_ccbs == 0) {
570 device_printf(aha->dev,
571 "aha_init - Unable to allocate initial ccbs\n");
572 goto error_exit;
573 }
574
575 /*
576 * Note that we are going and return (to probe)
577 */
578 return (0);
579
580 error_exit:
581
582 return (ENXIO);
583 }
584
585 int
586 aha_attach(struct aha_softc *aha)
587 {
588 int tagged_dev_openings;
589 struct cam_devq *devq;
590
591 /*
592 * We don't do tagged queueing, since the aha cards don't
593 * support it.
594 */
595 tagged_dev_openings = 0;
596
597 /*
598 * Create the device queue for our SIM.
599 */
600 devq = cam_simq_alloc(aha->max_ccbs - 1);
601 if (devq == NULL)
602 return (ENOMEM);
603
604 /*
605 * Construct our SIM entry
606 */
607 aha->sim = cam_sim_alloc(ahaaction, ahapoll, "aha", aha,
608 device_get_unit(aha->dev), &aha->lock, 2, tagged_dev_openings,
609 devq);
610 if (aha->sim == NULL) {
611 cam_simq_free(devq);
612 return (ENOMEM);
613 }
614 mtx_lock(&aha->lock);
615 if (xpt_bus_register(aha->sim, aha->dev, 0) != CAM_SUCCESS) {
616 cam_sim_free(aha->sim, /*free_devq*/TRUE);
617 mtx_unlock(&aha->lock);
618 return (ENXIO);
619 }
620 if (xpt_create_path(&aha->path, /*periph*/NULL, cam_sim_path(aha->sim),
621 CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
622 xpt_bus_deregister(cam_sim_path(aha->sim));
623 cam_sim_free(aha->sim, /*free_devq*/TRUE);
624 mtx_unlock(&aha->lock);
625 return (ENXIO);
626 }
627 mtx_unlock(&aha->lock);
628
629 return (0);
630 }
631
632 static void
633 ahaallocccbs(struct aha_softc *aha)
634 {
635 struct aha_ccb *next_ccb;
636 struct sg_map_node *sg_map;
637 bus_addr_t physaddr;
638 aha_sg_t *segs;
639 int newcount;
640 int i;
641
642 next_ccb = &aha->aha_ccb_array[aha->num_ccbs];
643
644 sg_map = malloc(sizeof(*sg_map), M_DEVBUF, M_NOWAIT);
645
646 if (sg_map == NULL)
647 return;
648
649 /* Allocate S/G space for the next batch of CCBS */
650 if (bus_dmamem_alloc(aha->sg_dmat, (void **)&sg_map->sg_vaddr,
651 BUS_DMA_NOWAIT, &sg_map->sg_dmamap) != 0) {
652 free(sg_map, M_DEVBUF);
653 return;
654 }
655
656 SLIST_INSERT_HEAD(&aha->sg_maps, sg_map, links);
657
658 bus_dmamap_load(aha->sg_dmat, sg_map->sg_dmamap, sg_map->sg_vaddr,
659 PAGE_SIZE, ahamapsgs, aha, /*flags*/0);
660
661 segs = sg_map->sg_vaddr;
662 physaddr = sg_map->sg_physaddr;
663
664 newcount = (PAGE_SIZE / (AHA_NSEG * sizeof(aha_sg_t)));
665 for (i = 0; aha->num_ccbs < aha->max_ccbs && i < newcount; i++) {
666 int error;
667
668 next_ccb->sg_list = segs;
669 next_ccb->sg_list_phys = physaddr;
670 next_ccb->flags = ACCB_FREE;
671 callout_init_mtx(&next_ccb->timer, &aha->lock, 0);
672 error = bus_dmamap_create(aha->buffer_dmat, /*flags*/0,
673 &next_ccb->dmamap);
674 if (error != 0)
675 break;
676 SLIST_INSERT_HEAD(&aha->free_aha_ccbs, next_ccb, links);
677 segs += AHA_NSEG;
678 physaddr += (AHA_NSEG * sizeof(aha_sg_t));
679 next_ccb++;
680 aha->num_ccbs++;
681 }
682
683 /* Reserve a CCB for error recovery */
684 if (aha->recovery_accb == NULL) {
685 aha->recovery_accb = SLIST_FIRST(&aha->free_aha_ccbs);
686 SLIST_REMOVE_HEAD(&aha->free_aha_ccbs, links);
687 }
688 }
689
690 static __inline void
691 ahafreeccb(struct aha_softc *aha, struct aha_ccb *accb)
692 {
693
694 if (!dumping)
695 mtx_assert(&aha->lock, MA_OWNED);
696 if ((accb->flags & ACCB_ACTIVE) != 0)
697 LIST_REMOVE(&accb->ccb->ccb_h, sim_links.le);
698 if (aha->resource_shortage != 0
699 && (accb->ccb->ccb_h.status & CAM_RELEASE_SIMQ) == 0) {
700 accb->ccb->ccb_h.status |= CAM_RELEASE_SIMQ;
701 aha->resource_shortage = FALSE;
702 }
703 accb->flags = ACCB_FREE;
704 SLIST_INSERT_HEAD(&aha->free_aha_ccbs, accb, links);
705 aha->active_ccbs--;
706 }
707
708 static struct aha_ccb*
709 ahagetccb(struct aha_softc *aha)
710 {
711 struct aha_ccb* accb;
712
713 if (!dumping)
714 mtx_assert(&aha->lock, MA_OWNED);
715 if ((accb = SLIST_FIRST(&aha->free_aha_ccbs)) != NULL) {
716 SLIST_REMOVE_HEAD(&aha->free_aha_ccbs, links);
717 aha->active_ccbs++;
718 } else if (aha->num_ccbs < aha->max_ccbs) {
719 ahaallocccbs(aha);
720 accb = SLIST_FIRST(&aha->free_aha_ccbs);
721 if (accb == NULL)
722 device_printf(aha->dev, "Can't malloc ACCB\n");
723 else {
724 SLIST_REMOVE_HEAD(&aha->free_aha_ccbs, links);
725 aha->active_ccbs++;
726 }
727 }
728
729 return (accb);
730 }
731
732 static void
733 ahaaction(struct cam_sim *sim, union ccb *ccb)
734 {
735 struct aha_softc *aha;
736
737 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("ahaaction\n"));
738
739 aha = (struct aha_softc *)cam_sim_softc(sim);
740 mtx_assert(&aha->lock, MA_OWNED);
741
742 switch (ccb->ccb_h.func_code) {
743 /* Common cases first */
744 case XPT_SCSI_IO: /* Execute the requested I/O operation */
745 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */ {
746 struct aha_ccb *accb;
747 struct aha_hccb *hccb;
748
749 /*
750 * Get an accb to use.
751 */
752 if ((accb = ahagetccb(aha)) == NULL) {
753 aha->resource_shortage = TRUE;
754 xpt_freeze_simq(aha->sim, /*count*/1);
755 ccb->ccb_h.status = CAM_REQUEUE_REQ;
756 xpt_done(ccb);
757 return;
758 }
759 hccb = &accb->hccb;
760
761 /*
762 * So we can find the ACCB when an abort is requested
763 */
764 accb->ccb = ccb;
765 ccb->ccb_h.ccb_accb_ptr = accb;
766 ccb->ccb_h.ccb_aha_ptr = aha;
767
768 /*
769 * Put all the arguments for the xfer in the accb
770 */
771 hccb->target = ccb->ccb_h.target_id;
772 hccb->lun = ccb->ccb_h.target_lun;
773 hccb->ahastat = 0;
774 hccb->sdstat = 0;
775
776 if (ccb->ccb_h.func_code == XPT_SCSI_IO) {
777 struct ccb_scsiio *csio;
778 struct ccb_hdr *ccbh;
779 int error;
780
781 csio = &ccb->csio;
782 ccbh = &csio->ccb_h;
783 hccb->opcode = aha->ccb_ccb_opcode;
784 hccb->datain = (ccb->ccb_h.flags & CAM_DIR_IN) != 0;
785 hccb->dataout = (ccb->ccb_h.flags & CAM_DIR_OUT) != 0;
786 hccb->cmd_len = csio->cdb_len;
787 if (hccb->cmd_len > sizeof(hccb->scsi_cdb)) {
788 ccb->ccb_h.status = CAM_REQ_INVALID;
789 ahafreeccb(aha, accb);
790 xpt_done(ccb);
791 return;
792 }
793 hccb->sense_len = csio->sense_len;
794 if ((ccbh->flags & CAM_CDB_POINTER) != 0) {
795 if ((ccbh->flags & CAM_CDB_PHYS) == 0) {
796 bcopy(csio->cdb_io.cdb_ptr,
797 hccb->scsi_cdb, hccb->cmd_len);
798 } else {
799 /* I guess I could map it in... */
800 ccbh->status = CAM_REQ_INVALID;
801 ahafreeccb(aha, accb);
802 xpt_done(ccb);
803 return;
804 }
805 } else {
806 bcopy(csio->cdb_io.cdb_bytes,
807 hccb->scsi_cdb, hccb->cmd_len);
808 }
809 /*
810 * If we have any data to send with this command,
811 * map it into bus space.
812 */
813
814 error = bus_dmamap_load_ccb(
815 aha->buffer_dmat,
816 accb->dmamap,
817 ccb,
818 ahaexecuteccb,
819 accb,
820 /*flags*/0);
821 if (error == EINPROGRESS) {
822 /*
823 * So as to maintain ordering, freeze the
824 * controller queue until our mapping is
825 * returned.
826 */
827 xpt_freeze_simq(aha->sim, 1);
828 csio->ccb_h.status |= CAM_RELEASE_SIMQ;
829 }
830 } else {
831 hccb->opcode = INITIATOR_BUS_DEV_RESET;
832 /* No data transfer */
833 hccb->datain = TRUE;
834 hccb->dataout = TRUE;
835 hccb->cmd_len = 0;
836 hccb->sense_len = 0;
837 ahaexecuteccb(accb, NULL, 0, 0);
838 }
839 break;
840 }
841 case XPT_ABORT: /* Abort the specified CCB */
842 /* XXX Implement */
843 ccb->ccb_h.status = CAM_REQ_INVALID;
844 xpt_done(ccb);
845 break;
846 case XPT_SET_TRAN_SETTINGS:
847 /* XXX Implement */
848 ccb->ccb_h.status = CAM_PROVIDE_FAIL;
849 xpt_done(ccb);
850 break;
851 case XPT_GET_TRAN_SETTINGS:
852 /* Get default/user set transfer settings for the target */
853 {
854 struct ccb_trans_settings *cts = &ccb->cts;
855 u_int target_mask = 0x01 << ccb->ccb_h.target_id;
856 struct ccb_trans_settings_scsi *scsi =
857 &cts->proto_specific.scsi;
858 struct ccb_trans_settings_spi *spi =
859 &cts->xport_specific.spi;
860
861 cts->protocol = PROTO_SCSI;
862 cts->protocol_version = SCSI_REV_2;
863 cts->transport = XPORT_SPI;
864 cts->transport_version = 2;
865 if (cts->type == CTS_TYPE_USER_SETTINGS) {
866 spi->flags = 0;
867 if ((aha->disc_permitted & target_mask) != 0)
868 spi->flags |= CTS_SPI_FLAGS_DISC_ENB;
869 spi->bus_width = MSG_EXT_WDTR_BUS_8_BIT;
870 if ((aha->sync_permitted & target_mask) != 0) {
871 if (aha->boardid >= BOARD_1542CF)
872 spi->sync_period = 25;
873 else
874 spi->sync_period = 50;
875 } else {
876 spi->sync_period = 0;
877 }
878
879 if (spi->sync_period != 0)
880 spi->sync_offset = 15;
881
882 spi->valid = CTS_SPI_VALID_SYNC_RATE
883 | CTS_SPI_VALID_SYNC_OFFSET
884 | CTS_SPI_VALID_BUS_WIDTH
885 | CTS_SPI_VALID_DISC;
886 scsi->valid = CTS_SCSI_VALID_TQ;
887 } else {
888 ahafetchtransinfo(aha, cts);
889 }
890
891 ccb->ccb_h.status = CAM_REQ_CMP;
892 xpt_done(ccb);
893 break;
894 }
895 case XPT_CALC_GEOMETRY:
896 {
897 struct ccb_calc_geometry *ccg;
898 uint32_t size_mb;
899 uint32_t secs_per_cylinder;
900
901 ccg = &ccb->ccg;
902 size_mb = ccg->volume_size
903 / ((1024L * 1024L) / ccg->block_size);
904 if (size_mb >= 1024 && (aha->extended_trans != 0)) {
905 if (size_mb >= 2048) {
906 ccg->heads = 255;
907 ccg->secs_per_track = 63;
908 } else {
909 ccg->heads = 128;
910 ccg->secs_per_track = 32;
911 }
912 } else {
913 ccg->heads = 64;
914 ccg->secs_per_track = 32;
915 }
916 secs_per_cylinder = ccg->heads * ccg->secs_per_track;
917 ccg->cylinders = ccg->volume_size / secs_per_cylinder;
918 ccb->ccb_h.status = CAM_REQ_CMP;
919 xpt_done(ccb);
920 break;
921 }
922 case XPT_RESET_BUS: /* Reset the specified SCSI bus */
923 ahareset(aha, /*hardreset*/TRUE);
924 ccb->ccb_h.status = CAM_REQ_CMP;
925 xpt_done(ccb);
926 break;
927 case XPT_TERM_IO: /* Terminate the I/O process */
928 /* XXX Implement */
929 ccb->ccb_h.status = CAM_REQ_INVALID;
930 xpt_done(ccb);
931 break;
932 case XPT_PATH_INQ: /* Path routing inquiry */
933 {
934 struct ccb_pathinq *cpi = &ccb->cpi;
935
936 cpi->version_num = 1; /* XXX??? */
937 cpi->hba_inquiry = PI_SDTR_ABLE;
938 cpi->target_sprt = 0;
939 cpi->hba_misc = 0;
940 cpi->hba_eng_cnt = 0;
941 cpi->max_target = 7;
942 cpi->max_lun = 7;
943 cpi->initiator_id = aha->scsi_id;
944 cpi->bus_id = cam_sim_bus(sim);
945 cpi->base_transfer_speed = 3300;
946 strlcpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
947 strlcpy(cpi->hba_vid, "Adaptec", HBA_IDLEN);
948 strlcpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
949 cpi->unit_number = cam_sim_unit(sim);
950 cpi->transport = XPORT_SPI;
951 cpi->transport_version = 2;
952 cpi->protocol = PROTO_SCSI;
953 cpi->protocol_version = SCSI_REV_2;
954 cpi->ccb_h.status = CAM_REQ_CMP;
955 xpt_done(ccb);
956 break;
957 }
958 default:
959 ccb->ccb_h.status = CAM_REQ_INVALID;
960 xpt_done(ccb);
961 break;
962 }
963 }
964
965 static void
966 ahaexecuteccb(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
967 {
968 struct aha_ccb *accb;
969 union ccb *ccb;
970 struct aha_softc *aha;
971 uint32_t paddr;
972
973 accb = (struct aha_ccb *)arg;
974 ccb = accb->ccb;
975 aha = (struct aha_softc *)ccb->ccb_h.ccb_aha_ptr;
976
977 if (error != 0) {
978 if (error != EFBIG)
979 device_printf(aha->dev,
980 "Unexepected error 0x%x returned from "
981 "bus_dmamap_load\n", error);
982 if (ccb->ccb_h.status == CAM_REQ_INPROG) {
983 xpt_freeze_devq(ccb->ccb_h.path, /*count*/1);
984 ccb->ccb_h.status = CAM_REQ_TOO_BIG|CAM_DEV_QFRZN;
985 }
986 ahafreeccb(aha, accb);
987 xpt_done(ccb);
988 return;
989 }
990
991 if (nseg != 0) {
992 aha_sg_t *sg;
993 bus_dma_segment_t *end_seg;
994 bus_dmasync_op_t op;
995
996 end_seg = dm_segs + nseg;
997
998 /* Copy the segments into our SG list */
999 sg = accb->sg_list;
1000 while (dm_segs < end_seg) {
1001 ahautoa24(dm_segs->ds_len, sg->len);
1002 ahautoa24(dm_segs->ds_addr, sg->addr);
1003 sg++;
1004 dm_segs++;
1005 }
1006
1007 if (nseg > 1) {
1008 accb->hccb.opcode = aha->ccb_sg_opcode;
1009 ahautoa24((sizeof(aha_sg_t) * nseg),
1010 accb->hccb.data_len);
1011 ahautoa24(accb->sg_list_phys, accb->hccb.data_addr);
1012 } else {
1013 bcopy(accb->sg_list->len, accb->hccb.data_len, 3);
1014 bcopy(accb->sg_list->addr, accb->hccb.data_addr, 3);
1015 }
1016
1017 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
1018 op = BUS_DMASYNC_PREREAD;
1019 else
1020 op = BUS_DMASYNC_PREWRITE;
1021
1022 bus_dmamap_sync(aha->buffer_dmat, accb->dmamap, op);
1023
1024 } else {
1025 accb->hccb.opcode = INITIATOR_CCB;
1026 ahautoa24(0, accb->hccb.data_len);
1027 ahautoa24(0, accb->hccb.data_addr);
1028 }
1029
1030 /*
1031 * Last time we need to check if this CCB needs to
1032 * be aborted.
1033 */
1034 if (ccb->ccb_h.status != CAM_REQ_INPROG) {
1035 if (nseg != 0)
1036 bus_dmamap_unload(aha->buffer_dmat, accb->dmamap);
1037 ahafreeccb(aha, accb);
1038 xpt_done(ccb);
1039 return;
1040 }
1041
1042 accb->flags = ACCB_ACTIVE;
1043 ccb->ccb_h.status |= CAM_SIM_QUEUED;
1044 LIST_INSERT_HEAD(&aha->pending_ccbs, &ccb->ccb_h, sim_links.le);
1045
1046 callout_reset_sbt(&accb->timer, SBT_1MS * ccb->ccb_h.timeout, 0,
1047 ahatimeout, accb, 0);
1048
1049 /* Tell the adapter about this command */
1050 if (aha->cur_outbox->action_code != AMBO_FREE) {
1051 /*
1052 * We should never encounter a busy mailbox.
1053 * If we do, warn the user, and treat it as
1054 * a resource shortage. If the controller is
1055 * hung, one of the pending transactions will
1056 * timeout causing us to start recovery operations.
1057 */
1058 device_printf(aha->dev,
1059 "Encountered busy mailbox with %d out of %d "
1060 "commands active!!!", aha->active_ccbs, aha->max_ccbs);
1061 callout_stop(&accb->timer);
1062 if (nseg != 0)
1063 bus_dmamap_unload(aha->buffer_dmat, accb->dmamap);
1064 ahafreeccb(aha, accb);
1065 aha->resource_shortage = TRUE;
1066 xpt_freeze_simq(aha->sim, /*count*/1);
1067 ccb->ccb_h.status = CAM_REQUEUE_REQ;
1068 xpt_done(ccb);
1069 return;
1070 }
1071 paddr = ahaccbvtop(aha, accb);
1072 ahautoa24(paddr, aha->cur_outbox->ccb_addr);
1073 aha->cur_outbox->action_code = AMBO_START;
1074 aha_outb(aha, COMMAND_REG, AOP_START_MBOX);
1075
1076 ahanextoutbox(aha);
1077 }
1078
1079 void
1080 aha_intr(void *arg)
1081 {
1082 struct aha_softc *aha;
1083
1084 aha = arg;
1085 mtx_lock(&aha->lock);
1086 aha_intr_locked(aha);
1087 mtx_unlock(&aha->lock);
1088 }
1089
1090 void
1091 aha_intr_locked(struct aha_softc *aha)
1092 {
1093 u_int intstat;
1094 uint32_t paddr;
1095
1096 while (((intstat = aha_inb(aha, INTSTAT_REG)) & INTR_PENDING) != 0) {
1097 if ((intstat & CMD_COMPLETE) != 0) {
1098 aha->latched_status = aha_inb(aha, STATUS_REG);
1099 aha->command_cmp = TRUE;
1100 }
1101
1102 aha_outb(aha, CONTROL_REG, RESET_INTR);
1103
1104 if ((intstat & IMB_LOADED) != 0) {
1105 while (aha->cur_inbox->comp_code != AMBI_FREE) {
1106 paddr = aha_a24tou(aha->cur_inbox->ccb_addr);
1107 ahadone(aha, ahaccbptov(aha, paddr),
1108 aha->cur_inbox->comp_code);
1109 aha->cur_inbox->comp_code = AMBI_FREE;
1110 ahanextinbox(aha);
1111 }
1112 }
1113
1114 if ((intstat & SCSI_BUS_RESET) != 0) {
1115 ahareset(aha, /*hardreset*/FALSE);
1116 }
1117 }
1118 }
1119
1120 static void
1121 ahadone(struct aha_softc *aha, struct aha_ccb *accb, aha_mbi_comp_code_t comp_code)
1122 {
1123 union ccb *ccb;
1124 struct ccb_scsiio *csio;
1125
1126 ccb = accb->ccb;
1127 csio = &accb->ccb->csio;
1128
1129 if ((accb->flags & ACCB_ACTIVE) == 0) {
1130 device_printf(aha->dev,
1131 "ahadone - Attempt to free non-active ACCB %p\n",
1132 (void *)accb);
1133 return;
1134 }
1135
1136 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
1137 bus_dmasync_op_t op;
1138
1139 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
1140 op = BUS_DMASYNC_POSTREAD;
1141 else
1142 op = BUS_DMASYNC_POSTWRITE;
1143 bus_dmamap_sync(aha->buffer_dmat, accb->dmamap, op);
1144 bus_dmamap_unload(aha->buffer_dmat, accb->dmamap);
1145 }
1146
1147 if (accb == aha->recovery_accb) {
1148 /*
1149 * The recovery ACCB does not have a CCB associated
1150 * with it, so short circuit the normal error handling.
1151 * We now traverse our list of pending CCBs and process
1152 * any that were terminated by the recovery CCBs action.
1153 * We also reinstate timeouts for all remaining, pending,
1154 * CCBs.
1155 */
1156 struct cam_path *path;
1157 struct ccb_hdr *ccb_h;
1158 cam_status error;
1159
1160 /* Notify all clients that a BDR occurred */
1161 error = xpt_create_path(&path, /*periph*/NULL,
1162 cam_sim_path(aha->sim), accb->hccb.target,
1163 CAM_LUN_WILDCARD);
1164
1165 if (error == CAM_REQ_CMP) {
1166 xpt_async(AC_SENT_BDR, path, NULL);
1167 xpt_free_path(path);
1168 }
1169
1170 ccb_h = LIST_FIRST(&aha->pending_ccbs);
1171 while (ccb_h != NULL) {
1172 struct aha_ccb *pending_accb;
1173
1174 pending_accb = (struct aha_ccb *)ccb_h->ccb_accb_ptr;
1175 if (pending_accb->hccb.target == accb->hccb.target) {
1176 pending_accb->hccb.ahastat = AHASTAT_HA_BDR;
1177 ccb_h = LIST_NEXT(ccb_h, sim_links.le);
1178 ahadone(aha, pending_accb, AMBI_ERROR);
1179 } else {
1180 callout_reset_sbt(&pending_accb->timer,
1181 SBT_1MS * ccb_h->timeout, 0, ahatimeout,
1182 pending_accb, 0);
1183 ccb_h = LIST_NEXT(ccb_h, sim_links.le);
1184 }
1185 }
1186 device_printf(aha->dev, "No longer in timeout\n");
1187 return;
1188 }
1189
1190 callout_stop(&accb->timer);
1191
1192 switch (comp_code) {
1193 case AMBI_FREE:
1194 device_printf(aha->dev,
1195 "ahadone - CCB completed with free status!\n");
1196 break;
1197 case AMBI_NOT_FOUND:
1198 device_printf(aha->dev,
1199 "ahadone - CCB Abort failed to find CCB\n");
1200 break;
1201 case AMBI_ABORT:
1202 case AMBI_ERROR:
1203 /* An error occurred */
1204 if (accb->hccb.opcode < INITIATOR_CCB_WRESID)
1205 csio->resid = 0;
1206 else
1207 csio->resid = aha_a24tou(accb->hccb.data_len);
1208 switch(accb->hccb.ahastat) {
1209 case AHASTAT_DATARUN_ERROR:
1210 {
1211 if (csio->resid <= 0) {
1212 csio->ccb_h.status = CAM_DATA_RUN_ERR;
1213 break;
1214 }
1215 /* FALLTHROUGH */
1216 }
1217 case AHASTAT_NOERROR:
1218 csio->scsi_status = accb->hccb.sdstat;
1219 csio->ccb_h.status |= CAM_SCSI_STATUS_ERROR;
1220 switch(csio->scsi_status) {
1221 case SCSI_STATUS_CHECK_COND:
1222 case SCSI_STATUS_CMD_TERMINATED:
1223 csio->ccb_h.status |= CAM_AUTOSNS_VALID;
1224 /*
1225 * The aha writes the sense data at different
1226 * offsets based on the scsi cmd len
1227 */
1228 bcopy((caddr_t) &accb->hccb.scsi_cdb +
1229 accb->hccb.cmd_len,
1230 (caddr_t) &csio->sense_data,
1231 accb->hccb.sense_len);
1232 break;
1233 default:
1234 break;
1235 case SCSI_STATUS_OK:
1236 csio->ccb_h.status = CAM_REQ_CMP;
1237 break;
1238 }
1239 break;
1240 case AHASTAT_SELTIMEOUT:
1241 csio->ccb_h.status = CAM_SEL_TIMEOUT;
1242 break;
1243 case AHASTAT_UNEXPECTED_BUSFREE:
1244 csio->ccb_h.status = CAM_UNEXP_BUSFREE;
1245 break;
1246 case AHASTAT_INVALID_PHASE:
1247 csio->ccb_h.status = CAM_SEQUENCE_FAIL;
1248 break;
1249 case AHASTAT_INVALID_ACTION_CODE:
1250 panic("%s: Inavlid Action code", aha_name(aha));
1251 break;
1252 case AHASTAT_INVALID_OPCODE:
1253 if (accb->hccb.opcode < INITIATOR_CCB_WRESID)
1254 panic("%s: Invalid CCB Opcode %x hccb = %p",
1255 aha_name(aha), accb->hccb.opcode,
1256 &accb->hccb);
1257 device_printf(aha->dev,
1258 "AHA-1540A compensation failed\n");
1259 xpt_freeze_devq(ccb->ccb_h.path, /*count*/1);
1260 csio->ccb_h.status = CAM_REQUEUE_REQ;
1261 break;
1262 case AHASTAT_LINKED_CCB_LUN_MISMATCH:
1263 /* We don't even support linked commands... */
1264 panic("%s: Linked CCB Lun Mismatch", aha_name(aha));
1265 break;
1266 case AHASTAT_INVALID_CCB_OR_SG_PARAM:
1267 panic("%s: Invalid CCB or SG list", aha_name(aha));
1268 break;
1269 case AHASTAT_HA_SCSI_BUS_RESET:
1270 if ((csio->ccb_h.status & CAM_STATUS_MASK)
1271 != CAM_CMD_TIMEOUT)
1272 csio->ccb_h.status = CAM_SCSI_BUS_RESET;
1273 break;
1274 case AHASTAT_HA_BDR:
1275 if ((accb->flags & ACCB_DEVICE_RESET) == 0)
1276 csio->ccb_h.status = CAM_BDR_SENT;
1277 else
1278 csio->ccb_h.status = CAM_CMD_TIMEOUT;
1279 break;
1280 }
1281 if (csio->ccb_h.status != CAM_REQ_CMP) {
1282 xpt_freeze_devq(csio->ccb_h.path, /*count*/1);
1283 csio->ccb_h.status |= CAM_DEV_QFRZN;
1284 }
1285 if ((accb->flags & ACCB_RELEASE_SIMQ) != 0)
1286 ccb->ccb_h.status |= CAM_RELEASE_SIMQ;
1287 ahafreeccb(aha, accb);
1288 xpt_done(ccb);
1289 break;
1290 case AMBI_OK:
1291 /* All completed without incident */
1292 /* XXX DO WE NEED TO COPY SENSE BYTES HERE???? XXX */
1293 /* I don't think so since it works???? */
1294 ccb->ccb_h.status |= CAM_REQ_CMP;
1295 if ((accb->flags & ACCB_RELEASE_SIMQ) != 0)
1296 ccb->ccb_h.status |= CAM_RELEASE_SIMQ;
1297 ahafreeccb(aha, accb);
1298 xpt_done(ccb);
1299 break;
1300 }
1301 }
1302
1303 static int
1304 ahareset(struct aha_softc* aha, int hard_reset)
1305 {
1306 struct ccb_hdr *ccb_h;
1307 u_int status;
1308 u_int timeout;
1309 uint8_t reset_type;
1310
1311 if (hard_reset != 0)
1312 reset_type = HARD_RESET;
1313 else
1314 reset_type = SOFT_RESET;
1315 aha_outb(aha, CONTROL_REG, reset_type);
1316
1317 /* Wait 5sec. for Diagnostic start */
1318 timeout = 5 * 10000;
1319 while (--timeout) {
1320 status = aha_inb(aha, STATUS_REG);
1321 if ((status & DIAG_ACTIVE) != 0)
1322 break;
1323 DELAY(100);
1324 }
1325 if (timeout == 0) {
1326 PRVERB((aha->dev, "ahareset - Diagnostic Active failed to "
1327 "assert. status = %#x\n", status));
1328 return (ETIMEDOUT);
1329 }
1330
1331 /* Wait 10sec. for Diagnostic end */
1332 timeout = 10 * 10000;
1333 while (--timeout) {
1334 status = aha_inb(aha, STATUS_REG);
1335 if ((status & DIAG_ACTIVE) == 0)
1336 break;
1337 DELAY(100);
1338 }
1339 if (timeout == 0) {
1340 panic("%s: ahareset - Diagnostic Active failed to drop. "
1341 "status = 0x%x\n", aha_name(aha), status);
1342 return (ETIMEDOUT);
1343 }
1344
1345 /* Wait for the host adapter to become ready or report a failure */
1346 timeout = 10000;
1347 while (--timeout) {
1348 status = aha_inb(aha, STATUS_REG);
1349 if ((status & (DIAG_FAIL|HA_READY|DATAIN_REG_READY)) != 0)
1350 break;
1351 DELAY(100);
1352 }
1353 if (timeout == 0) {
1354 device_printf(aha->dev, "ahareset - Host adapter failed to "
1355 "come ready. status = 0x%x\n", status);
1356 return (ETIMEDOUT);
1357 }
1358
1359 /* If the diagnostics failed, tell the user */
1360 if ((status & DIAG_FAIL) != 0
1361 || (status & HA_READY) == 0) {
1362 device_printf(aha->dev, "ahareset - Adapter failed diag\n");
1363
1364 if ((status & DATAIN_REG_READY) != 0)
1365 device_printf(aha->dev, "ahareset - Host Adapter "
1366 "Error code = 0x%x\n", aha_inb(aha, DATAIN_REG));
1367 return (ENXIO);
1368 }
1369
1370 /* If we've attached to the XPT, tell it about the event */
1371 if (aha->path != NULL)
1372 xpt_async(AC_BUS_RESET, aha->path, NULL);
1373
1374 /*
1375 * Perform completion processing for all outstanding CCBs.
1376 */
1377 while ((ccb_h = LIST_FIRST(&aha->pending_ccbs)) != NULL) {
1378 struct aha_ccb *pending_accb;
1379
1380 pending_accb = (struct aha_ccb *)ccb_h->ccb_accb_ptr;
1381 pending_accb->hccb.ahastat = AHASTAT_HA_SCSI_BUS_RESET;
1382 ahadone(aha, pending_accb, AMBI_ERROR);
1383 }
1384
1385 /* If we've allocated mailboxes, initialize them */
1386 /* Must be done after we've aborted our queue, or aha_cmd fails */
1387 if (aha->init_level > 4)
1388 ahainitmboxes(aha);
1389
1390 return (0);
1391 }
1392
1393 /*
1394 * Send a command to the adapter.
1395 */
1396 int
1397 aha_cmd(struct aha_softc *aha, aha_op_t opcode, uint8_t *params,
1398 u_int param_len, uint8_t *reply_data, u_int reply_len,
1399 u_int cmd_timeout)
1400 {
1401 u_int timeout;
1402 u_int status;
1403 u_int saved_status;
1404 u_int intstat;
1405 u_int reply_buf_size;
1406 int cmd_complete;
1407 int error;
1408
1409 /* No data returned to start */
1410 reply_buf_size = reply_len;
1411 reply_len = 0;
1412 intstat = 0;
1413 cmd_complete = 0;
1414 saved_status = 0;
1415 error = 0;
1416
1417 /*
1418 * All commands except for the "start mailbox" and the "enable
1419 * outgoing mailbox read interrupt" commands cannot be issued
1420 * while there are pending transactions. Freeze our SIMQ
1421 * and wait for all completions to occur if necessary.
1422 */
1423 timeout = 10000;
1424 while (LIST_FIRST(&aha->pending_ccbs) != NULL && --timeout) {
1425 /* Fire the interrupt handler in case interrupts are blocked */
1426 aha_intr(aha);
1427 DELAY(10);
1428 }
1429
1430 if (timeout == 0) {
1431 device_printf(aha->dev,
1432 "aha_cmd: Timeout waiting for adapter idle\n");
1433 return (ETIMEDOUT);
1434 }
1435 aha->command_cmp = 0;
1436 /*
1437 * Wait up to 10 sec. for the adapter to become
1438 * ready to accept commands.
1439 */
1440 timeout = 100000;
1441 while (--timeout) {
1442 status = aha_inb(aha, STATUS_REG);
1443 if ((status & HA_READY) != 0 && (status & CMD_REG_BUSY) == 0)
1444 break;
1445 /*
1446 * Throw away any pending data which may be
1447 * left over from earlier commands that we
1448 * timedout on.
1449 */
1450 if ((status & DATAIN_REG_READY) != 0)
1451 (void)aha_inb(aha, DATAIN_REG);
1452 DELAY(100);
1453 }
1454 if (timeout == 0) {
1455 device_printf(aha->dev, "aha_cmd: Timeout waiting for adapter"
1456 " ready, status = 0x%x\n", status);
1457 return (ETIMEDOUT);
1458 }
1459
1460 /*
1461 * Send the opcode followed by any necessary parameter bytes.
1462 */
1463 aha_outb(aha, COMMAND_REG, opcode);
1464
1465 /*
1466 * Wait for up to 1sec to get the parameter list sent
1467 */
1468 timeout = 10000;
1469 while (param_len && --timeout) {
1470 DELAY(100);
1471 status = aha_inb(aha, STATUS_REG);
1472 intstat = aha_inb(aha, INTSTAT_REG);
1473
1474 if ((intstat & (INTR_PENDING|CMD_COMPLETE))
1475 == (INTR_PENDING|CMD_COMPLETE)) {
1476 saved_status = status;
1477 cmd_complete = 1;
1478 break;
1479 }
1480
1481 if (aha->command_cmp != 0) {
1482 saved_status = aha->latched_status;
1483 cmd_complete = 1;
1484 break;
1485 }
1486 if ((status & DATAIN_REG_READY) != 0)
1487 break;
1488 if ((status & CMD_REG_BUSY) == 0) {
1489 aha_outb(aha, COMMAND_REG, *params++);
1490 param_len--;
1491 timeout = 10000;
1492 }
1493 }
1494 if (timeout == 0) {
1495 device_printf(aha->dev, "aha_cmd: Timeout sending parameters, "
1496 "status = 0x%x\n", status);
1497 error = ETIMEDOUT;
1498 }
1499
1500 /*
1501 * For all other commands, we wait for any output data
1502 * and the final comand completion interrupt.
1503 */
1504 while (cmd_complete == 0 && --cmd_timeout) {
1505
1506 status = aha_inb(aha, STATUS_REG);
1507 intstat = aha_inb(aha, INTSTAT_REG);
1508
1509 if (aha->command_cmp != 0) {
1510 cmd_complete = 1;
1511 saved_status = aha->latched_status;
1512 } else if ((intstat & (INTR_PENDING|CMD_COMPLETE))
1513 == (INTR_PENDING|CMD_COMPLETE)) {
1514 /*
1515 * Our poll (in case interrupts are blocked)
1516 * saw the CMD_COMPLETE interrupt.
1517 */
1518 cmd_complete = 1;
1519 saved_status = status;
1520 }
1521 if ((status & DATAIN_REG_READY) != 0) {
1522 uint8_t data;
1523
1524 data = aha_inb(aha, DATAIN_REG);
1525 if (reply_len < reply_buf_size) {
1526 *reply_data++ = data;
1527 } else {
1528 device_printf(aha->dev,
1529 "aha_cmd - Discarded reply data "
1530 "byte for opcode 0x%x\n", opcode);
1531 }
1532 /*
1533 * Reset timeout to ensure at least a second
1534 * between response bytes.
1535 */
1536 cmd_timeout = MAX(cmd_timeout, 10000);
1537 reply_len++;
1538 }
1539 DELAY(100);
1540 }
1541 if (cmd_timeout == 0) {
1542 device_printf(aha->dev, "aha_cmd: Timeout: status = 0x%x, "
1543 "intstat = 0x%x, reply_len = %d\n", status, intstat,
1544 reply_len);
1545 return (ETIMEDOUT);
1546 }
1547
1548 /*
1549 * Clear any pending interrupts. Block interrupts so our
1550 * interrupt handler is not re-entered.
1551 */
1552 aha_intr(aha);
1553
1554 if (error != 0)
1555 return (error);
1556
1557 /*
1558 * If the command was rejected by the controller, tell the caller.
1559 */
1560 if ((saved_status & CMD_INVALID) != 0) {
1561 PRVERB((aha->dev, "Invalid Command 0x%x\n", opcode));
1562 /*
1563 * Some early adapters may not recover properly from
1564 * an invalid command. If it appears that the controller
1565 * has wedged (i.e. status was not cleared by our interrupt
1566 * reset above), perform a soft reset.
1567 */
1568 DELAY(1000);
1569 status = aha_inb(aha, STATUS_REG);
1570 if ((status & (CMD_INVALID|STATUS_REG_RSVD|DATAIN_REG_READY|
1571 CMD_REG_BUSY|DIAG_FAIL|DIAG_ACTIVE)) != 0
1572 || (status & (HA_READY|INIT_REQUIRED))
1573 != (HA_READY|INIT_REQUIRED))
1574 ahareset(aha, /*hard_reset*/FALSE);
1575 return (EINVAL);
1576 }
1577
1578 if (param_len > 0) {
1579 /* The controller did not accept the full argument list */
1580 PRVERB((aha->dev, "Controller did not accept full argument "
1581 "list (%d > 0)\n", param_len));
1582 return (E2BIG);
1583 }
1584
1585 if (reply_len != reply_buf_size) {
1586 /* Too much or too little data received */
1587 PRVERB((aha->dev, "data received mismatch (%d != %d)\n",
1588 reply_len, reply_buf_size));
1589 return (EMSGSIZE);
1590 }
1591
1592 /* We were successful */
1593 return (0);
1594 }
1595
1596 static int
1597 ahainitmboxes(struct aha_softc *aha)
1598 {
1599 int error;
1600 init_24b_mbox_params_t init_mbox;
1601
1602 bzero(aha->in_boxes, sizeof(aha_mbox_in_t) * aha->num_boxes);
1603 bzero(aha->out_boxes, sizeof(aha_mbox_out_t) * aha->num_boxes);
1604 aha->cur_inbox = aha->in_boxes;
1605 aha->last_inbox = aha->in_boxes + aha->num_boxes - 1;
1606 aha->cur_outbox = aha->out_boxes;
1607 aha->last_outbox = aha->out_boxes + aha->num_boxes - 1;
1608
1609 /* Tell the adapter about them */
1610 init_mbox.num_mboxes = aha->num_boxes;
1611 ahautoa24(aha->mailbox_physbase, init_mbox.base_addr);
1612 error = aha_cmd(aha, AOP_INITIALIZE_MBOX, (uint8_t *)&init_mbox,
1613 /*parmlen*/sizeof(init_mbox), /*reply_buf*/NULL,
1614 /*reply_len*/0, DEFAULT_CMD_TIMEOUT);
1615
1616 if (error != 0)
1617 printf("ahainitmboxes: Initialization command failed\n");
1618 return (error);
1619 }
1620
1621 /*
1622 * Update the XPT's idea of the negotiated transfer
1623 * parameters for a particular target.
1624 */
1625 static void
1626 ahafetchtransinfo(struct aha_softc *aha, struct ccb_trans_settings* cts)
1627 {
1628 setup_data_t setup_info;
1629 u_int target;
1630 u_int targ_offset;
1631 u_int sync_period;
1632 int error;
1633 uint8_t param;
1634 targ_syncinfo_t sync_info;
1635 struct ccb_trans_settings_spi *spi = &cts->xport_specific.spi;
1636
1637 target = cts->ccb_h.target_id;
1638 targ_offset = (target & 0x7);
1639
1640 /*
1641 * Inquire Setup Information. This command retreives
1642 * the sync info for older models.
1643 */
1644 param = sizeof(setup_info);
1645 error = aha_cmd(aha, AOP_INQUIRE_SETUP_INFO, ¶m, /*paramlen*/1,
1646 (uint8_t*)&setup_info, sizeof(setup_info), DEFAULT_CMD_TIMEOUT);
1647
1648 if (error != 0) {
1649 device_printf(aha->dev,
1650 "ahafetchtransinfo - Inquire Setup Info Failed %d\n",
1651 error);
1652 return;
1653 }
1654
1655 sync_info = setup_info.syncinfo[targ_offset];
1656
1657 if (sync_info.sync == 0)
1658 spi->sync_offset = 0;
1659 else
1660 spi->sync_offset = sync_info.offset;
1661
1662 spi->bus_width = MSG_EXT_WDTR_BUS_8_BIT;
1663
1664 if (aha->boardid >= BOARD_1542CF)
1665 sync_period = 1000;
1666 else
1667 sync_period = 2000;
1668 sync_period += 500 * sync_info.period;
1669
1670 /* Convert ns value to standard SCSI sync rate */
1671 if (spi->sync_offset != 0)
1672 spi->sync_period = scsi_calc_syncparam(sync_period);
1673 else
1674 spi->sync_period = 0;
1675
1676 spi->valid = CTS_SPI_VALID_SYNC_RATE
1677 | CTS_SPI_VALID_SYNC_OFFSET
1678 | CTS_SPI_VALID_BUS_WIDTH;
1679 xpt_async(AC_TRANSFER_NEG, cts->ccb_h.path, cts);
1680 }
1681
1682 static void
1683 ahamapmboxes(void *arg, bus_dma_segment_t *segs, int nseg, int error)
1684 {
1685 struct aha_softc* aha;
1686
1687 aha = (struct aha_softc*)arg;
1688 aha->mailbox_physbase = segs->ds_addr;
1689 }
1690
1691 static void
1692 ahamapccbs(void *arg, bus_dma_segment_t *segs, int nseg, int error)
1693 {
1694 struct aha_softc* aha;
1695
1696 aha = (struct aha_softc*)arg;
1697 aha->aha_ccb_physbase = segs->ds_addr;
1698 }
1699
1700 static void
1701 ahamapsgs(void *arg, bus_dma_segment_t *segs, int nseg, int error)
1702 {
1703
1704 struct aha_softc* aha;
1705
1706 aha = (struct aha_softc*)arg;
1707 SLIST_FIRST(&aha->sg_maps)->sg_physaddr = segs->ds_addr;
1708 }
1709
1710 static void
1711 ahapoll(struct cam_sim *sim)
1712 {
1713 aha_intr_locked(cam_sim_softc(sim));
1714 }
1715
1716 static void
1717 ahatimeout(void *arg)
1718 {
1719 struct aha_ccb *accb;
1720 union ccb *ccb;
1721 struct aha_softc *aha;
1722 uint32_t paddr;
1723 struct ccb_hdr *ccb_h;
1724
1725 accb = (struct aha_ccb *)arg;
1726 ccb = accb->ccb;
1727 aha = (struct aha_softc *)ccb->ccb_h.ccb_aha_ptr;
1728 mtx_assert(&aha->lock, MA_OWNED);
1729 xpt_print_path(ccb->ccb_h.path);
1730 printf("CCB %p - timed out\n", (void *)accb);
1731
1732 if ((accb->flags & ACCB_ACTIVE) == 0) {
1733 xpt_print_path(ccb->ccb_h.path);
1734 printf("CCB %p - timed out CCB already completed\n",
1735 (void *)accb);
1736 return;
1737 }
1738
1739 /*
1740 * In order to simplify the recovery process, we ask the XPT
1741 * layer to halt the queue of new transactions and we traverse
1742 * the list of pending CCBs and remove their timeouts. This
1743 * means that the driver attempts to clear only one error
1744 * condition at a time. In general, timeouts that occur
1745 * close together are related anyway, so there is no benefit
1746 * in attempting to handle errors in parallel. Timeouts will
1747 * be reinstated when the recovery process ends.
1748 */
1749 if ((accb->flags & ACCB_DEVICE_RESET) == 0) {
1750 if ((accb->flags & ACCB_RELEASE_SIMQ) == 0) {
1751 xpt_freeze_simq(aha->sim, /*count*/1);
1752 accb->flags |= ACCB_RELEASE_SIMQ;
1753 }
1754
1755 ccb_h = LIST_FIRST(&aha->pending_ccbs);
1756 while (ccb_h != NULL) {
1757 struct aha_ccb *pending_accb;
1758
1759 pending_accb = (struct aha_ccb *)ccb_h->ccb_accb_ptr;
1760 callout_stop(&pending_accb->timer);
1761 ccb_h = LIST_NEXT(ccb_h, sim_links.le);
1762 }
1763 }
1764
1765 if ((accb->flags & ACCB_DEVICE_RESET) != 0
1766 || aha->cur_outbox->action_code != AMBO_FREE) {
1767 /*
1768 * Try a full host adapter/SCSI bus reset.
1769 * We do this only if we have already attempted
1770 * to clear the condition with a BDR, or we cannot
1771 * attempt a BDR for lack of mailbox resources.
1772 */
1773 ccb->ccb_h.status = CAM_CMD_TIMEOUT;
1774 ahareset(aha, /*hardreset*/TRUE);
1775 device_printf(aha->dev, "No longer in timeout\n");
1776 } else {
1777 /*
1778 * Send a Bus Device Reset message:
1779 * The target that is holding up the bus may not
1780 * be the same as the one that triggered this timeout
1781 * (different commands have different timeout lengths),
1782 * but we have no way of determining this from our
1783 * timeout handler. Our strategy here is to queue a
1784 * BDR message to the target of the timed out command.
1785 * If this fails, we'll get another timeout 2 seconds
1786 * later which will attempt a bus reset.
1787 */
1788 accb->flags |= ACCB_DEVICE_RESET;
1789 callout_reset(&accb->timer, 2 * hz, ahatimeout, accb);
1790 aha->recovery_accb->hccb.opcode = INITIATOR_BUS_DEV_RESET;
1791
1792 /* No Data Transfer */
1793 aha->recovery_accb->hccb.datain = TRUE;
1794 aha->recovery_accb->hccb.dataout = TRUE;
1795 aha->recovery_accb->hccb.ahastat = 0;
1796 aha->recovery_accb->hccb.sdstat = 0;
1797 aha->recovery_accb->hccb.target = ccb->ccb_h.target_id;
1798
1799 /* Tell the adapter about this command */
1800 paddr = ahaccbvtop(aha, aha->recovery_accb);
1801 ahautoa24(paddr, aha->cur_outbox->ccb_addr);
1802 aha->cur_outbox->action_code = AMBO_START;
1803 aha_outb(aha, COMMAND_REG, AOP_START_MBOX);
1804 ahanextoutbox(aha);
1805 }
1806 }
1807
1808 int
1809 aha_detach(struct aha_softc *aha)
1810 {
1811 mtx_lock(&aha->lock);
1812 xpt_async(AC_LOST_DEVICE, aha->path, NULL);
1813 xpt_free_path(aha->path);
1814 xpt_bus_deregister(cam_sim_path(aha->sim));
1815 cam_sim_free(aha->sim, /*free_devq*/TRUE);
1816 mtx_unlock(&aha->lock);
1817 /* XXX: Drain all timers? */
1818 return (0);
1819 }
1820 MODULE_DEPEND(aha, cam, 1, 1, 1);
Cache object: cb6960a0abdb387bbee1543e961de519
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