FreeBSD/Linux Kernel Cross Reference
sys/dev/aha/aha.c
1 /*
2 * Generic register and struct definitions for the Adaptech 154x/164x
3 * SCSI host adapters. Product specific probe and attach routines can
4 * be found in:
5 * aha 1540/1542B/1542C/1542CF/1542CP aha_isa.c
6 *
7 * Copyright (c) 1998 M. Warner Losh.
8 * All Rights Reserved.
9 *
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions, and the following disclaimer,
16 * without modification, immediately at the beginning of the file.
17 * 2. The name of the author may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 *
32 * Derived from bt.c written by:
33 *
34 * Copyright (c) 1998 Justin T. Gibbs.
35 * All rights reserved.
36 *
37 * Redistribution and use in source and binary forms, with or without
38 * modification, are permitted provided that the following conditions
39 * are met:
40 * 1. Redistributions of source code must retain the above copyright
41 * notice, this list of conditions, and the following disclaimer,
42 * without modification, immediately at the beginning of the file.
43 * 2. The name of the author may not be used to endorse or promote products
44 * derived from this software without specific prior written permission.
45 *
46 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
47 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
48 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
49 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
50 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
51 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
52 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
53 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
54 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
55 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
56 * SUCH DAMAGE.
57 *
58 * $FreeBSD: releng/5.0/sys/dev/aha/aha.c 104713 2002-10-09 09:30:57Z peter $
59 */
60
61 #include <sys/param.h>
62 #include <sys/systm.h>
63 #include <sys/malloc.h>
64 #include <sys/kernel.h>
65
66 #include <machine/bus_pio.h>
67 #include <machine/bus.h>
68
69 #include <cam/cam.h>
70 #include <cam/cam_ccb.h>
71 #include <cam/cam_sim.h>
72 #include <cam/cam_xpt_sim.h>
73 #include <cam/cam_debug.h>
74
75 #include <cam/scsi/scsi_message.h>
76
77 #include <dev/aha/ahareg.h>
78
79 #define PRVERB(x) if (bootverbose) printf x
80
81 /* Macro to determine that a rev is potentially a new valid one
82 * so that the driver doesn't keep breaking on new revs as it
83 * did for the CF and CP.
84 */
85 #define PROBABLY_NEW_BOARD(REV) (REV > 0x43 && REV < 0x56)
86
87 #ifndef MAX
88 #define MAX(a, b) ((a) > (b) ? (a) : (b))
89 #endif
90
91 /* MailBox Management functions */
92 static __inline void ahanextinbox(struct aha_softc *aha);
93 static __inline void ahanextoutbox(struct aha_softc *aha);
94
95 static __inline void
96 ahanextinbox(struct aha_softc *aha)
97 {
98 if (aha->cur_inbox == aha->last_inbox)
99 aha->cur_inbox = aha->in_boxes;
100 else
101 aha->cur_inbox++;
102 }
103
104 static __inline void
105 ahanextoutbox(struct aha_softc *aha)
106 {
107 if (aha->cur_outbox == aha->last_outbox)
108 aha->cur_outbox = aha->out_boxes;
109 else
110 aha->cur_outbox++;
111 }
112
113 #define ahautoa24(u,s3) \
114 (s3)[0] = ((u) >> 16) & 0xff; \
115 (s3)[1] = ((u) >> 8) & 0xff; \
116 (s3)[2] = (u) & 0xff;
117
118 #define aha_a24tou(s3) \
119 (((s3)[0] << 16) | ((s3)[1] << 8) | (s3)[2])
120
121 /* CCB Mangement functions */
122 static __inline u_int32_t ahaccbvtop(struct aha_softc *aha,
123 struct aha_ccb *accb);
124 static __inline struct aha_ccb* ahaccbptov(struct aha_softc *aha,
125 u_int32_t ccb_addr);
126
127 static __inline u_int32_t
128 ahaccbvtop(struct aha_softc *aha, struct aha_ccb *accb)
129 {
130 return (aha->aha_ccb_physbase
131 + (u_int32_t)((caddr_t)accb - (caddr_t)aha->aha_ccb_array));
132 }
133 static __inline struct aha_ccb *
134 ahaccbptov(struct aha_softc *aha, u_int32_t ccb_addr)
135 {
136 return (aha->aha_ccb_array +
137 + ((struct aha_ccb*)(uintptr_t)ccb_addr -
138 (struct aha_ccb*)(uintptr_t)aha->aha_ccb_physbase));
139 }
140
141 static struct aha_ccb* ahagetccb(struct aha_softc *aha);
142 static __inline void ahafreeccb(struct aha_softc *aha, struct aha_ccb *accb);
143 static void ahaallocccbs(struct aha_softc *aha);
144 static bus_dmamap_callback_t ahaexecuteccb;
145 static void ahadone(struct aha_softc *aha, struct aha_ccb *accb,
146 aha_mbi_comp_code_t comp_code);
147
148 /* Host adapter command functions */
149 static int ahareset(struct aha_softc* aha, int hard_reset);
150
151 /* Initialization functions */
152 static int ahainitmboxes(struct aha_softc *aha);
153 static bus_dmamap_callback_t ahamapmboxes;
154 static bus_dmamap_callback_t ahamapccbs;
155 static bus_dmamap_callback_t ahamapsgs;
156
157 /* Transfer Negotiation Functions */
158 static void ahafetchtransinfo(struct aha_softc *aha,
159 struct ccb_trans_settings *cts);
160
161 /* CAM SIM entry points */
162 #define ccb_accb_ptr spriv_ptr0
163 #define ccb_aha_ptr spriv_ptr1
164 static void ahaaction(struct cam_sim *sim, union ccb *ccb);
165 static void ahapoll(struct cam_sim *sim);
166
167 /* Our timeout handler */
168 static timeout_t ahatimeout;
169
170 u_long aha_unit = 0;
171
172 /*
173 * Do our own re-probe protection until a configuration
174 * manager can do it for us. This ensures that we don't
175 * reprobe a card already found by the EISA or PCI probes.
176 */
177 static struct aha_isa_port aha_isa_ports[] =
178 {
179 { 0x130, 4 },
180 { 0x134, 5 },
181 { 0x230, 2 },
182 { 0x234, 3 },
183 { 0x330, 0 },
184 { 0x334, 1 }
185 };
186
187 /*
188 * I/O ports listed in the order enumerated by the
189 * card for certain op codes.
190 */
191 static u_int16_t aha_board_ports[] =
192 {
193 0x330,
194 0x334,
195 0x230,
196 0x234,
197 0x130,
198 0x134
199 };
200
201 /* Exported functions */
202 struct aha_softc *
203 aha_alloc(int unit, bus_space_tag_t tag, bus_space_handle_t bsh)
204 {
205 struct aha_softc *aha;
206
207 aha = malloc(sizeof(struct aha_softc), M_DEVBUF, M_NOWAIT | M_ZERO);
208 if (!aha) {
209 printf("aha%d: cannot malloc!\n", unit);
210 return NULL;
211 }
212 SLIST_INIT(&aha->free_aha_ccbs);
213 LIST_INIT(&aha->pending_ccbs);
214 SLIST_INIT(&aha->sg_maps);
215 aha->unit = unit;
216 aha->tag = tag;
217 aha->bsh = bsh;
218 aha->ccb_sg_opcode = INITIATOR_SG_CCB_WRESID;
219 aha->ccb_ccb_opcode = INITIATOR_CCB_WRESID;
220 return (aha);
221 }
222
223 void
224 aha_free(struct aha_softc *aha)
225 {
226 switch (aha->init_level) {
227 default:
228 case 8:
229 {
230 struct sg_map_node *sg_map;
231
232 while ((sg_map = SLIST_FIRST(&aha->sg_maps))!= NULL) {
233 SLIST_REMOVE_HEAD(&aha->sg_maps, links);
234 bus_dmamap_unload(aha->sg_dmat,
235 sg_map->sg_dmamap);
236 bus_dmamem_free(aha->sg_dmat, sg_map->sg_vaddr,
237 sg_map->sg_dmamap);
238 free(sg_map, M_DEVBUF);
239 }
240 bus_dma_tag_destroy(aha->sg_dmat);
241 }
242 case 7:
243 bus_dmamap_unload(aha->ccb_dmat, aha->ccb_dmamap);
244 case 6:
245 bus_dmamap_destroy(aha->ccb_dmat, aha->ccb_dmamap);
246 bus_dmamem_free(aha->ccb_dmat, aha->aha_ccb_array,
247 aha->ccb_dmamap);
248 case 5:
249 bus_dma_tag_destroy(aha->ccb_dmat);
250 case 4:
251 bus_dmamap_unload(aha->mailbox_dmat, aha->mailbox_dmamap);
252 case 3:
253 bus_dmamem_free(aha->mailbox_dmat, aha->in_boxes,
254 aha->mailbox_dmamap);
255 bus_dmamap_destroy(aha->mailbox_dmat, aha->mailbox_dmamap);
256 case 2:
257 bus_dma_tag_destroy(aha->buffer_dmat);
258 case 1:
259 bus_dma_tag_destroy(aha->mailbox_dmat);
260 case 0:
261 break;
262 }
263 free(aha, M_DEVBUF);
264 }
265
266 /*
267 * Probe the adapter and verify that the card is an Adaptec.
268 */
269 int
270 aha_probe(struct aha_softc* aha)
271 {
272 u_int status;
273 u_int intstat;
274 int error;
275 board_id_data_t board_id;
276
277 /*
278 * See if the three I/O ports look reasonable.
279 * Touch the minimal number of registers in the
280 * failure case.
281 */
282 status = aha_inb(aha, STATUS_REG);
283 if ((status == 0)
284 || (status & (DIAG_ACTIVE|CMD_REG_BUSY|
285 STATUS_REG_RSVD)) != 0) {
286 PRVERB(("%s: status reg test failed %x\n", aha_name(aha),
287 status));
288 return (ENXIO);
289 }
290
291 intstat = aha_inb(aha, INTSTAT_REG);
292 if ((intstat & INTSTAT_REG_RSVD) != 0) {
293 PRVERB(("%s: Failed Intstat Reg Test\n", aha_name(aha)));
294 return (ENXIO);
295 }
296
297 /*
298 * Looking good so far. Final test is to reset the
299 * adapter and fetch the board ID and ensure we aren't
300 * looking at a BusLogic.
301 */
302 if ((error = ahareset(aha, /*hard_reset*/TRUE)) != 0) {
303 PRVERB(("%s: Failed Reset\n", aha_name(aha)));
304 return (ENXIO);
305 }
306
307 /*
308 * Get the board ID. We use this to see if we're dealing with
309 * a buslogic card or a aha card (or clone).
310 */
311 error = aha_cmd(aha, AOP_INQUIRE_BOARD_ID, NULL, /*parmlen*/0,
312 (u_int8_t*)&board_id, sizeof(board_id),
313 DEFAULT_CMD_TIMEOUT);
314 if (error != 0) {
315 PRVERB(("%s: INQUIRE failed %x\n", aha_name(aha), error));
316 return (ENXIO);
317 }
318 aha->fw_major = board_id.firmware_rev_major;
319 aha->fw_minor = board_id.firmware_rev_minor;
320 aha->boardid = board_id.board_type;
321
322 /*
323 * The Buslogic cards have an id of either 0x41 or 0x42. So
324 * if those come up in the probe, we test the geometry register
325 * of the board. Adaptec boards that are this old will not have
326 * this register, and return 0xff, while buslogic cards will return
327 * something different.
328 *
329 * It appears that for reasons unknow, for the for the
330 * aha-1542B cards, we need to wait a little bit before trying
331 * to read the geometry register. I picked 10ms since we have
332 * reports that a for loop to 1000 did the trick, and this
333 * errs on the side of conservatism. Besides, no one will
334 * notice a 10mS delay here, even the 1542B card users :-)
335 *
336 * Some compatible cards return 0 here. Some cards also
337 * seem to return 0x7f.
338 *
339 * XXX I'm not sure how this will impact other cloned cards
340 *
341 * This really should be replaced with the esetup command, since
342 * that appears to be more reliable. This becomes more and more
343 * true over time as we discover more cards that don't read the
344 * geometry register consistantly.
345 */
346 if (aha->boardid <= 0x42) {
347 /* Wait 10ms before reading */
348 DELAY(10000);
349 status = aha_inb(aha, GEOMETRY_REG);
350 if (status != 0xff && status != 0x00 && status != 0x7f) {
351 PRVERB(("%s: Geometry Register test failed 0x%x\n",
352 aha_name(aha), status));
353 return (ENXIO);
354 }
355 }
356
357 return (0);
358 }
359
360 /*
361 * Pull the boards setup information and record it in our softc.
362 */
363 int
364 aha_fetch_adapter_info(struct aha_softc *aha)
365 {
366 setup_data_t setup_info;
367 config_data_t config_data;
368 u_int8_t length_param;
369 int error;
370 struct aha_extbios extbios;
371
372 switch (aha->boardid) {
373 case BOARD_1540_16HEAD_BIOS:
374 snprintf(aha->model, sizeof(aha->model), "1540 16 head BIOS");
375 break;
376 case BOARD_1540_64HEAD_BIOS:
377 snprintf(aha->model, sizeof(aha->model), "1540 64 head BIOS");
378 break;
379 case BOARD_1542:
380 snprintf(aha->model, sizeof(aha->model), "1540/1542 64 head BIOS");
381 break;
382 case BOARD_1640:
383 snprintf(aha->model, sizeof(aha->model), "1640");
384 break;
385 case BOARD_1740:
386 snprintf(aha->model, sizeof(aha->model), "1740A/1742A/1744");
387 break;
388 case BOARD_1542C:
389 snprintf(aha->model, sizeof(aha->model), "1542C");
390 break;
391 case BOARD_1542CF:
392 snprintf(aha->model, sizeof(aha->model), "1542CF");
393 break;
394 case BOARD_1542CP:
395 snprintf(aha->model, sizeof(aha->model), "1542CP");
396 break;
397 default:
398 snprintf(aha->model, sizeof(aha->model), "Unknown");
399 break;
400 }
401 /*
402 * If we are a new type of 1542 board (anything newer than a 1542C)
403 * then disable the extended bios so that the
404 * mailbox interface is unlocked.
405 * This is also true for the 1542B Version 3.20. First Adaptec
406 * board that supports >1Gb drives.
407 * No need to check the extended bios flags as some of the
408 * extensions that cause us problems are not flagged in that byte.
409 */
410 if (PROBABLY_NEW_BOARD(aha->boardid) ||
411 (aha->boardid == 0x41
412 && aha->fw_major == 0x31 &&
413 aha->fw_minor >= 0x34)) {
414 error = aha_cmd(aha, AOP_RETURN_EXT_BIOS_INFO, NULL,
415 /*paramlen*/0, (u_char *)&extbios, sizeof(extbios),
416 DEFAULT_CMD_TIMEOUT);
417 error = aha_cmd(aha, AOP_MBOX_IF_ENABLE, (u_int8_t *)&extbios,
418 /*paramlen*/2, NULL, 0, DEFAULT_CMD_TIMEOUT);
419 }
420 if (aha->boardid < 0x41)
421 printf("%s: Warning: aha-1542A won't likely work.\n",
422 aha_name(aha));
423
424 aha->max_sg = 17; /* Need >= 17 to do 64k I/O */
425 aha->diff_bus = 0;
426 aha->extended_lun = 0;
427 aha->extended_trans = 0;
428 aha->max_ccbs = 16;
429 /* Determine Sync/Wide/Disc settings */
430 length_param = sizeof(setup_info);
431 error = aha_cmd(aha, AOP_INQUIRE_SETUP_INFO, &length_param,
432 /*paramlen*/1, (u_int8_t*)&setup_info,
433 sizeof(setup_info), DEFAULT_CMD_TIMEOUT);
434 if (error != 0) {
435 printf("%s: aha_fetch_adapter_info - Failed "
436 "Get Setup Info\n", aha_name(aha));
437 return (error);
438 }
439 if (setup_info.initiate_sync != 0) {
440 aha->sync_permitted = ALL_TARGETS;
441 }
442 aha->disc_permitted = ALL_TARGETS;
443
444 /* We need as many mailboxes as we can have ccbs */
445 aha->num_boxes = aha->max_ccbs;
446
447 /* Determine our SCSI ID */
448
449 error = aha_cmd(aha, AOP_INQUIRE_CONFIG, NULL, /*parmlen*/0,
450 (u_int8_t*)&config_data, sizeof(config_data),
451 DEFAULT_CMD_TIMEOUT);
452 if (error != 0) {
453 printf("%s: aha_fetch_adapter_info - Failed Get Config\n",
454 aha_name(aha));
455 return (error);
456 }
457 aha->scsi_id = config_data.scsi_id;
458 return (0);
459 }
460
461 /*
462 * Start the board, ready for normal operation
463 */
464 int
465 aha_init(struct aha_softc* aha)
466 {
467 /* Announce the Adapter */
468 printf("%s: AHA-%s FW Rev. %c.%c (ID=%x) ", aha_name(aha),
469 aha->model, aha->fw_major, aha->fw_minor, aha->boardid);
470
471 if (aha->diff_bus != 0)
472 printf("Diff ");
473
474 printf("SCSI Host Adapter, SCSI ID %d, %d CCBs\n", aha->scsi_id,
475 aha->max_ccbs);
476
477 /*
478 * Create our DMA tags. These tags define the kinds of device
479 * accessible memory allocations and memory mappings we will
480 * need to perform during normal operation.
481 *
482 * Unless we need to further restrict the allocation, we rely
483 * on the restrictions of the parent dmat, hence the common
484 * use of MAXADDR and MAXSIZE.
485 */
486
487 /* DMA tag for mapping buffers into device visible space. */
488 if (bus_dma_tag_create(aha->parent_dmat, /*alignment*/1, /*boundary*/0,
489 /*lowaddr*/BUS_SPACE_MAXADDR,
490 /*highaddr*/BUS_SPACE_MAXADDR,
491 /*filter*/NULL, /*filterarg*/NULL,
492 /*maxsize*/MAXBSIZE, /*nsegments*/AHA_NSEG,
493 /*maxsegsz*/BUS_SPACE_MAXSIZE_24BIT,
494 /*flags*/BUS_DMA_ALLOCNOW,
495 &aha->buffer_dmat) != 0) {
496 goto error_exit;
497 }
498
499 aha->init_level++;
500 /* DMA tag for our mailboxes */
501 if (bus_dma_tag_create(aha->parent_dmat, /*alignment*/1, /*boundary*/0,
502 /*lowaddr*/BUS_SPACE_MAXADDR,
503 /*highaddr*/BUS_SPACE_MAXADDR,
504 /*filter*/NULL, /*filterarg*/NULL,
505 aha->num_boxes * (sizeof(aha_mbox_in_t)
506 + sizeof(aha_mbox_out_t)),
507 /*nsegments*/1,
508 /*maxsegsz*/BUS_SPACE_MAXSIZE_24BIT,
509 /*flags*/0, &aha->mailbox_dmat) != 0) {
510 goto error_exit;
511 }
512
513 aha->init_level++;
514
515 /* Allocation for our mailboxes */
516 if (bus_dmamem_alloc(aha->mailbox_dmat, (void **)&aha->out_boxes,
517 BUS_DMA_NOWAIT, &aha->mailbox_dmamap) != 0) {
518 goto error_exit;
519 }
520
521 aha->init_level++;
522
523 /* And permanently map them */
524 bus_dmamap_load(aha->mailbox_dmat, aha->mailbox_dmamap,
525 aha->out_boxes,
526 aha->num_boxes * (sizeof(aha_mbox_in_t)
527 + sizeof(aha_mbox_out_t)),
528 ahamapmboxes, aha, /*flags*/0);
529
530 aha->init_level++;
531
532 aha->in_boxes = (aha_mbox_in_t *)&aha->out_boxes[aha->num_boxes];
533
534 ahainitmboxes(aha);
535
536 /* DMA tag for our ccb structures */
537 if (bus_dma_tag_create(aha->parent_dmat, /*alignment*/1, /*boundary*/0,
538 /*lowaddr*/BUS_SPACE_MAXADDR,
539 /*highaddr*/BUS_SPACE_MAXADDR,
540 /*filter*/NULL, /*filterarg*/NULL,
541 aha->max_ccbs * sizeof(struct aha_ccb),
542 /*nsegments*/1,
543 /*maxsegsz*/BUS_SPACE_MAXSIZE_24BIT,
544 /*flags*/0, &aha->ccb_dmat) != 0) {
545 goto error_exit;
546 }
547
548 aha->init_level++;
549
550 /* Allocation for our ccbs */
551 if (bus_dmamem_alloc(aha->ccb_dmat, (void **)&aha->aha_ccb_array,
552 BUS_DMA_NOWAIT, &aha->ccb_dmamap) != 0) {
553 goto error_exit;
554 }
555
556 aha->init_level++;
557
558 /* And permanently map them */
559 bus_dmamap_load(aha->ccb_dmat, aha->ccb_dmamap,
560 aha->aha_ccb_array,
561 aha->max_ccbs * sizeof(struct aha_ccb),
562 ahamapccbs, aha, /*flags*/0);
563
564 aha->init_level++;
565
566 /* DMA tag for our S/G structures. We allocate in page sized chunks */
567 if (bus_dma_tag_create(aha->parent_dmat, /*alignment*/1, /*boundary*/0,
568 /*lowaddr*/BUS_SPACE_MAXADDR,
569 /*highaddr*/BUS_SPACE_MAXADDR,
570 /*filter*/NULL, /*filterarg*/NULL,
571 PAGE_SIZE, /*nsegments*/1,
572 /*maxsegsz*/BUS_SPACE_MAXSIZE_24BIT,
573 /*flags*/0, &aha->sg_dmat) != 0) {
574 goto error_exit;
575 }
576
577 aha->init_level++;
578
579 /* Perform initial CCB allocation */
580 bzero(aha->aha_ccb_array, aha->max_ccbs * sizeof(struct aha_ccb));
581 ahaallocccbs(aha);
582
583 if (aha->num_ccbs == 0) {
584 printf("%s: aha_init - Unable to allocate initial ccbs\n",
585 aha_name(aha));
586 goto error_exit;
587 }
588
589 /*
590 * Note that we are going and return (to probe)
591 */
592 return 0;
593
594 error_exit:
595
596 return (ENXIO);
597 }
598
599 int
600 aha_attach(struct aha_softc *aha)
601 {
602 int tagged_dev_openings;
603 struct cam_devq *devq;
604
605 /*
606 * We don't do tagged queueing, since the aha cards don't
607 * support it.
608 */
609 tagged_dev_openings = 0;
610
611 /*
612 * Create the device queue for our SIM.
613 */
614 devq = cam_simq_alloc(aha->max_ccbs - 1);
615 if (devq == NULL)
616 return (ENOMEM);
617
618 /*
619 * Construct our SIM entry
620 */
621 aha->sim = cam_sim_alloc(ahaaction, ahapoll, "aha", aha, aha->unit,
622 2, tagged_dev_openings, devq);
623 if (aha->sim == NULL) {
624 cam_simq_free(devq);
625 return (ENOMEM);
626 }
627
628 if (xpt_bus_register(aha->sim, 0) != CAM_SUCCESS) {
629 cam_sim_free(aha->sim, /*free_devq*/TRUE);
630 return (ENXIO);
631 }
632
633 if (xpt_create_path(&aha->path, /*periph*/NULL,
634 cam_sim_path(aha->sim), CAM_TARGET_WILDCARD,
635 CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
636 xpt_bus_deregister(cam_sim_path(aha->sim));
637 cam_sim_free(aha->sim, /*free_devq*/TRUE);
638 return (ENXIO);
639 }
640
641 return (0);
642 }
643
644 char *
645 aha_name(struct aha_softc *aha)
646 {
647 static char name[10];
648
649 snprintf(name, sizeof(name), "aha%d", aha->unit);
650 return (name);
651 }
652
653 void
654 aha_find_probe_range(int ioport, int *port_index, int *max_port_index)
655 {
656 if (ioport > 0) {
657 int i;
658
659 for (i = 0;i < AHA_NUM_ISAPORTS; i++)
660 if (ioport <= aha_isa_ports[i].addr)
661 break;
662 if ((i >= AHA_NUM_ISAPORTS)
663 || (ioport != aha_isa_ports[i].addr)) {
664 printf("\n"
665 "aha_isa_probe: Invalid baseport of 0x%x specified.\n"
666 "aha_isa_probe: Nearest valid baseport is 0x%x.\n"
667 "aha_isa_probe: Failing probe.\n",
668 ioport,
669 (i < AHA_NUM_ISAPORTS)
670 ? aha_isa_ports[i].addr
671 : aha_isa_ports[AHA_NUM_ISAPORTS - 1].addr);
672 *port_index = *max_port_index = -1;
673 return;
674 }
675 *port_index = *max_port_index = aha_isa_ports[i].bio;
676 } else {
677 *port_index = 0;
678 *max_port_index = AHA_NUM_ISAPORTS - 1;
679 }
680 }
681
682 int
683 aha_iop_from_bio(isa_compat_io_t bio_index)
684 {
685 if (bio_index >= 0 && bio_index < AHA_NUM_ISAPORTS)
686 return (aha_board_ports[bio_index]);
687 return (-1);
688 }
689
690 static void
691 ahaallocccbs(struct aha_softc *aha)
692 {
693 struct aha_ccb *next_ccb;
694 struct sg_map_node *sg_map;
695 bus_addr_t physaddr;
696 aha_sg_t *segs;
697 int newcount;
698 int i;
699
700 next_ccb = &aha->aha_ccb_array[aha->num_ccbs];
701
702 sg_map = malloc(sizeof(*sg_map), M_DEVBUF, M_NOWAIT);
703
704 if (sg_map == NULL)
705 return;
706
707 /* Allocate S/G space for the next batch of CCBS */
708 if (bus_dmamem_alloc(aha->sg_dmat, (void **)&sg_map->sg_vaddr,
709 BUS_DMA_NOWAIT, &sg_map->sg_dmamap) != 0) {
710 free(sg_map, M_DEVBUF);
711 return;
712 }
713
714 SLIST_INSERT_HEAD(&aha->sg_maps, sg_map, links);
715
716 bus_dmamap_load(aha->sg_dmat, sg_map->sg_dmamap, sg_map->sg_vaddr,
717 PAGE_SIZE, ahamapsgs, aha, /*flags*/0);
718
719 segs = sg_map->sg_vaddr;
720 physaddr = sg_map->sg_physaddr;
721
722 newcount = (PAGE_SIZE / (AHA_NSEG * sizeof(aha_sg_t)));
723 for (i = 0; aha->num_ccbs < aha->max_ccbs && i < newcount; i++) {
724 int error;
725
726 next_ccb->sg_list = segs;
727 next_ccb->sg_list_phys = physaddr;
728 next_ccb->flags = ACCB_FREE;
729 error = bus_dmamap_create(aha->buffer_dmat, /*flags*/0,
730 &next_ccb->dmamap);
731 if (error != 0)
732 break;
733 SLIST_INSERT_HEAD(&aha->free_aha_ccbs, next_ccb, links);
734 segs += AHA_NSEG;
735 physaddr += (AHA_NSEG * sizeof(aha_sg_t));
736 next_ccb++;
737 aha->num_ccbs++;
738 }
739
740 /* Reserve a CCB for error recovery */
741 if (aha->recovery_accb == NULL) {
742 aha->recovery_accb = SLIST_FIRST(&aha->free_aha_ccbs);
743 SLIST_REMOVE_HEAD(&aha->free_aha_ccbs, links);
744 }
745 }
746
747 static __inline void
748 ahafreeccb(struct aha_softc *aha, struct aha_ccb *accb)
749 {
750 int s;
751
752 s = splcam();
753 if ((accb->flags & ACCB_ACTIVE) != 0)
754 LIST_REMOVE(&accb->ccb->ccb_h, sim_links.le);
755 if (aha->resource_shortage != 0
756 && (accb->ccb->ccb_h.status & CAM_RELEASE_SIMQ) == 0) {
757 accb->ccb->ccb_h.status |= CAM_RELEASE_SIMQ;
758 aha->resource_shortage = FALSE;
759 }
760 accb->flags = ACCB_FREE;
761 SLIST_INSERT_HEAD(&aha->free_aha_ccbs, accb, links);
762 aha->active_ccbs--;
763 splx(s);
764 }
765
766 static struct aha_ccb*
767 ahagetccb(struct aha_softc *aha)
768 {
769 struct aha_ccb* accb;
770 int s;
771
772 s = splcam();
773 if ((accb = SLIST_FIRST(&aha->free_aha_ccbs)) != NULL) {
774 SLIST_REMOVE_HEAD(&aha->free_aha_ccbs, links);
775 aha->active_ccbs++;
776 } else if (aha->num_ccbs < aha->max_ccbs) {
777 ahaallocccbs(aha);
778 accb = SLIST_FIRST(&aha->free_aha_ccbs);
779 if (accb == NULL)
780 printf("%s: Can't malloc ACCB\n", aha_name(aha));
781 else {
782 SLIST_REMOVE_HEAD(&aha->free_aha_ccbs, links);
783 aha->active_ccbs++;
784 }
785 }
786 splx(s);
787
788 return (accb);
789 }
790
791 static void
792 ahaaction(struct cam_sim *sim, union ccb *ccb)
793 {
794 struct aha_softc *aha;
795
796 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("ahaaction\n"));
797
798 aha = (struct aha_softc *)cam_sim_softc(sim);
799
800 switch (ccb->ccb_h.func_code) {
801 /* Common cases first */
802 case XPT_SCSI_IO: /* Execute the requested I/O operation */
803 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */
804 {
805 struct aha_ccb *accb;
806 struct aha_hccb *hccb;
807
808 /*
809 * get a accb to use.
810 */
811 if ((accb = ahagetccb(aha)) == NULL) {
812 int s;
813
814 s = splcam();
815 aha->resource_shortage = TRUE;
816 splx(s);
817 xpt_freeze_simq(aha->sim, /*count*/1);
818 ccb->ccb_h.status = CAM_REQUEUE_REQ;
819 xpt_done(ccb);
820 return;
821 }
822
823 hccb = &accb->hccb;
824
825 /*
826 * So we can find the ACCB when an abort is requested
827 */
828 accb->ccb = ccb;
829 ccb->ccb_h.ccb_accb_ptr = accb;
830 ccb->ccb_h.ccb_aha_ptr = aha;
831
832 /*
833 * Put all the arguments for the xfer in the accb
834 */
835 hccb->target = ccb->ccb_h.target_id;
836 hccb->lun = ccb->ccb_h.target_lun;
837 hccb->ahastat = 0;
838 hccb->sdstat = 0;
839
840 if (ccb->ccb_h.func_code == XPT_SCSI_IO) {
841 struct ccb_scsiio *csio;
842 struct ccb_hdr *ccbh;
843
844 csio = &ccb->csio;
845 ccbh = &csio->ccb_h;
846 hccb->opcode = aha->ccb_ccb_opcode;
847 hccb->datain = (ccb->ccb_h.flags & CAM_DIR_IN) != 0;
848 hccb->dataout = (ccb->ccb_h.flags & CAM_DIR_OUT) != 0;
849 hccb->cmd_len = csio->cdb_len;
850 if (hccb->cmd_len > sizeof(hccb->scsi_cdb)) {
851 ccb->ccb_h.status = CAM_REQ_INVALID;
852 ahafreeccb(aha, accb);
853 xpt_done(ccb);
854 return;
855 }
856 hccb->sense_len = csio->sense_len;
857 if ((ccbh->flags & CAM_CDB_POINTER) != 0) {
858 if ((ccbh->flags & CAM_CDB_PHYS) == 0) {
859 bcopy(csio->cdb_io.cdb_ptr,
860 hccb->scsi_cdb, hccb->cmd_len);
861 } else {
862 /* I guess I could map it in... */
863 ccbh->status = CAM_REQ_INVALID;
864 ahafreeccb(aha, accb);
865 xpt_done(ccb);
866 return;
867 }
868 } else {
869 bcopy(csio->cdb_io.cdb_bytes,
870 hccb->scsi_cdb, hccb->cmd_len);
871 }
872 /*
873 * If we have any data to send with this command,
874 * map it into bus space.
875 */
876 /* Only use S/G if there is a transfer */
877 if ((ccbh->flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
878 if ((ccbh->flags & CAM_SCATTER_VALID) == 0) {
879 /*
880 * We've been given a pointer
881 * to a single buffer.
882 */
883 if ((ccbh->flags & CAM_DATA_PHYS)==0) {
884 int s;
885 int error;
886
887 s = splsoftvm();
888 error = bus_dmamap_load(
889 aha->buffer_dmat,
890 accb->dmamap,
891 csio->data_ptr,
892 csio->dxfer_len,
893 ahaexecuteccb,
894 accb,
895 /*flags*/0);
896 if (error == EINPROGRESS) {
897 /*
898 * So as to maintain
899 * ordering, freeze the
900 * controller queue
901 * until our mapping is
902 * returned.
903 */
904 xpt_freeze_simq(aha->sim,
905 1);
906 csio->ccb_h.status |=
907 CAM_RELEASE_SIMQ;
908 }
909 splx(s);
910 } else {
911 struct bus_dma_segment seg;
912
913 /* Pointer to physical buffer */
914 seg.ds_addr =
915 (bus_addr_t)csio->data_ptr;
916 seg.ds_len = csio->dxfer_len;
917 ahaexecuteccb(accb, &seg, 1, 0);
918 }
919 } else {
920 struct bus_dma_segment *segs;
921
922 if ((ccbh->flags & CAM_DATA_PHYS) != 0)
923 panic("ahaaction - Physical "
924 "segment pointers "
925 "unsupported");
926
927 if ((ccbh->flags&CAM_SG_LIST_PHYS)==0)
928 panic("ahaaction - Virtual "
929 "segment addresses "
930 "unsupported");
931
932 /* Just use the segments provided */
933 segs = (struct bus_dma_segment *)
934 csio->data_ptr;
935 ahaexecuteccb(accb, segs,
936 csio->sglist_cnt, 0);
937 }
938 } else {
939 ahaexecuteccb(accb, NULL, 0, 0);
940 }
941 } else {
942 hccb->opcode = INITIATOR_BUS_DEV_RESET;
943 /* No data transfer */
944 hccb->datain = TRUE;
945 hccb->dataout = TRUE;
946 hccb->cmd_len = 0;
947 hccb->sense_len = 0;
948 ahaexecuteccb(accb, NULL, 0, 0);
949 }
950 break;
951 }
952 case XPT_EN_LUN: /* Enable LUN as a target */
953 case XPT_TARGET_IO: /* Execute target I/O request */
954 case XPT_ACCEPT_TARGET_IO: /* Accept Host Target Mode CDB */
955 case XPT_CONT_TARGET_IO: /* Continue Host Target I/O Connection*/
956 case XPT_ABORT: /* Abort the specified CCB */
957 /* XXX Implement */
958 ccb->ccb_h.status = CAM_REQ_INVALID;
959 xpt_done(ccb);
960 break;
961 case XPT_SET_TRAN_SETTINGS:
962 {
963 /* XXX Implement */
964 ccb->ccb_h.status = CAM_PROVIDE_FAIL;
965 xpt_done(ccb);
966 break;
967 }
968 case XPT_GET_TRAN_SETTINGS:
969 /* Get default/user set transfer settings for the target */
970 {
971 struct ccb_trans_settings *cts;
972 u_int target_mask;
973
974 cts = &ccb->cts;
975 target_mask = 0x01 << ccb->ccb_h.target_id;
976 if ((cts->flags & CCB_TRANS_USER_SETTINGS) != 0) {
977 cts->flags = 0;
978 if ((aha->disc_permitted & target_mask) != 0)
979 cts->flags |= CCB_TRANS_DISC_ENB;
980 cts->bus_width = MSG_EXT_WDTR_BUS_8_BIT;
981 if ((aha->sync_permitted & target_mask) != 0) {
982 if (aha->boardid >= BOARD_1542CF)
983 cts->sync_period = 25;
984 else
985 cts->sync_period = 50;
986 } else
987 cts->sync_period = 0;
988
989 if (cts->sync_period != 0)
990 cts->sync_offset = 15;
991
992 cts->valid = CCB_TRANS_SYNC_RATE_VALID
993 | CCB_TRANS_SYNC_OFFSET_VALID
994 | CCB_TRANS_BUS_WIDTH_VALID
995 | CCB_TRANS_DISC_VALID
996 | CCB_TRANS_TQ_VALID;
997 } else {
998 ahafetchtransinfo(aha, cts);
999 }
1000
1001 ccb->ccb_h.status = CAM_REQ_CMP;
1002 xpt_done(ccb);
1003 break;
1004 }
1005 case XPT_CALC_GEOMETRY:
1006 {
1007 struct ccb_calc_geometry *ccg;
1008 u_int32_t size_mb;
1009 u_int32_t secs_per_cylinder;
1010
1011 ccg = &ccb->ccg;
1012 size_mb = ccg->volume_size
1013 / ((1024L * 1024L) / ccg->block_size);
1014
1015 if (size_mb >= 1024 && (aha->extended_trans != 0)) {
1016 if (size_mb >= 2048) {
1017 ccg->heads = 255;
1018 ccg->secs_per_track = 63;
1019 } else {
1020 ccg->heads = 128;
1021 ccg->secs_per_track = 32;
1022 }
1023 } else {
1024 ccg->heads = 64;
1025 ccg->secs_per_track = 32;
1026 }
1027 secs_per_cylinder = ccg->heads * ccg->secs_per_track;
1028 ccg->cylinders = ccg->volume_size / secs_per_cylinder;
1029 ccb->ccb_h.status = CAM_REQ_CMP;
1030 xpt_done(ccb);
1031 break;
1032 }
1033 case XPT_RESET_BUS: /* Reset the specified SCSI bus */
1034 {
1035 ahareset(aha, /*hardreset*/TRUE);
1036 ccb->ccb_h.status = CAM_REQ_CMP;
1037 xpt_done(ccb);
1038 break;
1039 }
1040 case XPT_TERM_IO: /* Terminate the I/O process */
1041 /* XXX Implement */
1042 ccb->ccb_h.status = CAM_REQ_INVALID;
1043 xpt_done(ccb);
1044 break;
1045 case XPT_PATH_INQ: /* Path routing inquiry */
1046 {
1047 struct ccb_pathinq *cpi = &ccb->cpi;
1048
1049 cpi->version_num = 1; /* XXX??? */
1050 cpi->hba_inquiry = PI_SDTR_ABLE;
1051 cpi->target_sprt = 0;
1052 cpi->hba_misc = 0;
1053 cpi->hba_eng_cnt = 0;
1054 cpi->max_target = 7;
1055 cpi->max_lun = 7;
1056 cpi->initiator_id = aha->scsi_id;
1057 cpi->bus_id = cam_sim_bus(sim);
1058 cpi->base_transfer_speed = 3300;
1059 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
1060 strncpy(cpi->hba_vid, "Adaptec", HBA_IDLEN);
1061 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
1062 cpi->unit_number = cam_sim_unit(sim);
1063 cpi->ccb_h.status = CAM_REQ_CMP;
1064 xpt_done(ccb);
1065 break;
1066 }
1067 default:
1068 ccb->ccb_h.status = CAM_REQ_INVALID;
1069 xpt_done(ccb);
1070 break;
1071 }
1072 }
1073
1074 static void
1075 ahaexecuteccb(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
1076 {
1077 struct aha_ccb *accb;
1078 union ccb *ccb;
1079 struct aha_softc *aha;
1080 int s;
1081 u_int32_t paddr;
1082
1083 accb = (struct aha_ccb *)arg;
1084 ccb = accb->ccb;
1085 aha = (struct aha_softc *)ccb->ccb_h.ccb_aha_ptr;
1086
1087 if (error != 0) {
1088 if (error != EFBIG)
1089 printf("%s: Unexepected error 0x%x returned from "
1090 "bus_dmamap_load\n", aha_name(aha), error);
1091 if (ccb->ccb_h.status == CAM_REQ_INPROG) {
1092 xpt_freeze_devq(ccb->ccb_h.path, /*count*/1);
1093 ccb->ccb_h.status = CAM_REQ_TOO_BIG|CAM_DEV_QFRZN;
1094 }
1095 ahafreeccb(aha, accb);
1096 xpt_done(ccb);
1097 return;
1098 }
1099
1100 if (nseg != 0) {
1101 aha_sg_t *sg;
1102 bus_dma_segment_t *end_seg;
1103 bus_dmasync_op_t op;
1104
1105 end_seg = dm_segs + nseg;
1106
1107 /* Copy the segments into our SG list */
1108 sg = accb->sg_list;
1109 while (dm_segs < end_seg) {
1110 ahautoa24(dm_segs->ds_len, sg->len);
1111 ahautoa24(dm_segs->ds_addr, sg->addr);
1112 sg++;
1113 dm_segs++;
1114 }
1115
1116 if (nseg > 1) {
1117 accb->hccb.opcode = aha->ccb_sg_opcode;
1118 ahautoa24((sizeof(aha_sg_t) * nseg),
1119 accb->hccb.data_len);
1120 ahautoa24(accb->sg_list_phys, accb->hccb.data_addr);
1121 } else {
1122 bcopy(accb->sg_list->len, accb->hccb.data_len, 3);
1123 bcopy(accb->sg_list->addr, accb->hccb.data_addr, 3);
1124 }
1125
1126 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
1127 op = BUS_DMASYNC_PREREAD;
1128 else
1129 op = BUS_DMASYNC_PREWRITE;
1130
1131 bus_dmamap_sync(aha->buffer_dmat, accb->dmamap, op);
1132
1133 } else {
1134 accb->hccb.opcode = INITIATOR_CCB;
1135 ahautoa24(0, accb->hccb.data_len);
1136 ahautoa24(0, accb->hccb.data_addr);
1137 }
1138
1139 s = splcam();
1140
1141 /*
1142 * Last time we need to check if this CCB needs to
1143 * be aborted.
1144 */
1145 if (ccb->ccb_h.status != CAM_REQ_INPROG) {
1146 if (nseg != 0)
1147 bus_dmamap_unload(aha->buffer_dmat, accb->dmamap);
1148 ahafreeccb(aha, accb);
1149 xpt_done(ccb);
1150 splx(s);
1151 return;
1152 }
1153
1154 accb->flags = ACCB_ACTIVE;
1155 ccb->ccb_h.status |= CAM_SIM_QUEUED;
1156 LIST_INSERT_HEAD(&aha->pending_ccbs, &ccb->ccb_h, sim_links.le);
1157
1158 ccb->ccb_h.timeout_ch =
1159 timeout(ahatimeout, (caddr_t)accb,
1160 (ccb->ccb_h.timeout * hz) / 1000);
1161
1162 /* Tell the adapter about this command */
1163 if (aha->cur_outbox->action_code != AMBO_FREE) {
1164 /*
1165 * We should never encounter a busy mailbox.
1166 * If we do, warn the user, and treat it as
1167 * a resource shortage. If the controller is
1168 * hung, one of the pending transactions will
1169 * timeout causing us to start recovery operations.
1170 */
1171 printf("%s: Encountered busy mailbox with %d out of %d "
1172 "commands active!!!", aha_name(aha), aha->active_ccbs,
1173 aha->max_ccbs);
1174 untimeout(ahatimeout, accb, ccb->ccb_h.timeout_ch);
1175 if (nseg != 0)
1176 bus_dmamap_unload(aha->buffer_dmat, accb->dmamap);
1177 ahafreeccb(aha, accb);
1178 aha->resource_shortage = TRUE;
1179 xpt_freeze_simq(aha->sim, /*count*/1);
1180 ccb->ccb_h.status = CAM_REQUEUE_REQ;
1181 xpt_done(ccb);
1182 return;
1183 }
1184 paddr = ahaccbvtop(aha, accb);
1185 ahautoa24(paddr, aha->cur_outbox->ccb_addr);
1186 aha->cur_outbox->action_code = AMBO_START;
1187 aha_outb(aha, COMMAND_REG, AOP_START_MBOX);
1188
1189 ahanextoutbox(aha);
1190 splx(s);
1191 }
1192
1193 void
1194 aha_intr(void *arg)
1195 {
1196 struct aha_softc *aha;
1197 u_int intstat;
1198
1199 aha = (struct aha_softc *)arg;
1200 while (((intstat = aha_inb(aha, INTSTAT_REG)) & INTR_PENDING) != 0) {
1201 if ((intstat & CMD_COMPLETE) != 0) {
1202 aha->latched_status = aha_inb(aha, STATUS_REG);
1203 aha->command_cmp = TRUE;
1204 }
1205
1206 aha_outb(aha, CONTROL_REG, RESET_INTR);
1207
1208 if ((intstat & IMB_LOADED) != 0) {
1209 while (aha->cur_inbox->comp_code != AMBI_FREE) {
1210 u_int32_t paddr;
1211 paddr = aha_a24tou(aha->cur_inbox->ccb_addr);
1212 ahadone(aha,
1213 ahaccbptov(aha, paddr),
1214 aha->cur_inbox->comp_code);
1215 aha->cur_inbox->comp_code = AMBI_FREE;
1216 ahanextinbox(aha);
1217 }
1218 }
1219
1220 if ((intstat & SCSI_BUS_RESET) != 0) {
1221 ahareset(aha, /*hardreset*/FALSE);
1222 }
1223 }
1224 }
1225
1226 static void
1227 ahadone(struct aha_softc *aha, struct aha_ccb *accb, aha_mbi_comp_code_t comp_code)
1228 {
1229 union ccb *ccb;
1230 struct ccb_scsiio *csio;
1231
1232 ccb = accb->ccb;
1233 csio = &accb->ccb->csio;
1234
1235 if ((accb->flags & ACCB_ACTIVE) == 0) {
1236 printf("%s: ahadone - Attempt to free non-active ACCB %p\n",
1237 aha_name(aha), (void *)accb);
1238 return;
1239 }
1240
1241 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
1242 bus_dmasync_op_t op;
1243
1244 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
1245 op = BUS_DMASYNC_POSTREAD;
1246 else
1247 op = BUS_DMASYNC_POSTWRITE;
1248 bus_dmamap_sync(aha->buffer_dmat, accb->dmamap, op);
1249 bus_dmamap_unload(aha->buffer_dmat, accb->dmamap);
1250 }
1251
1252 if (accb == aha->recovery_accb) {
1253 /*
1254 * The recovery ACCB does not have a CCB associated
1255 * with it, so short circuit the normal error handling.
1256 * We now traverse our list of pending CCBs and process
1257 * any that were terminated by the recovery CCBs action.
1258 * We also reinstate timeouts for all remaining, pending,
1259 * CCBs.
1260 */
1261 struct cam_path *path;
1262 struct ccb_hdr *ccb_h;
1263 cam_status error;
1264
1265 /* Notify all clients that a BDR occured */
1266 error = xpt_create_path(&path, /*periph*/NULL,
1267 cam_sim_path(aha->sim),
1268 accb->hccb.target,
1269 CAM_LUN_WILDCARD);
1270
1271 if (error == CAM_REQ_CMP)
1272 xpt_async(AC_SENT_BDR, path, NULL);
1273
1274 ccb_h = LIST_FIRST(&aha->pending_ccbs);
1275 while (ccb_h != NULL) {
1276 struct aha_ccb *pending_accb;
1277
1278 pending_accb = (struct aha_ccb *)ccb_h->ccb_accb_ptr;
1279 if (pending_accb->hccb.target == accb->hccb.target) {
1280 pending_accb->hccb.ahastat = AHASTAT_HA_BDR;
1281 ccb_h = LIST_NEXT(ccb_h, sim_links.le);
1282 ahadone(aha, pending_accb, AMBI_ERROR);
1283 } else {
1284 ccb_h->timeout_ch =
1285 timeout(ahatimeout, (caddr_t)pending_accb,
1286 (ccb_h->timeout * hz) / 1000);
1287 ccb_h = LIST_NEXT(ccb_h, sim_links.le);
1288 }
1289 }
1290 printf("%s: No longer in timeout\n", aha_name(aha));
1291 return;
1292 }
1293
1294 untimeout(ahatimeout, accb, ccb->ccb_h.timeout_ch);
1295
1296 switch (comp_code) {
1297 case AMBI_FREE:
1298 printf("%s: ahadone - CCB completed with free status!\n",
1299 aha_name(aha));
1300 break;
1301 case AMBI_NOT_FOUND:
1302 printf("%s: ahadone - CCB Abort failed to find CCB\n",
1303 aha_name(aha));
1304 break;
1305 case AMBI_ABORT:
1306 case AMBI_ERROR:
1307 /* An error occured */
1308 if (accb->hccb.opcode < INITIATOR_CCB_WRESID)
1309 csio->resid = 0;
1310 else
1311 csio->resid = aha_a24tou(accb->hccb.data_len);
1312 switch(accb->hccb.ahastat) {
1313 case AHASTAT_DATARUN_ERROR:
1314 {
1315 if (csio->resid <= 0) {
1316 csio->ccb_h.status = CAM_DATA_RUN_ERR;
1317 break;
1318 }
1319 /* FALLTHROUGH */
1320 }
1321 case AHASTAT_NOERROR:
1322 csio->scsi_status = accb->hccb.sdstat;
1323 csio->ccb_h.status |= CAM_SCSI_STATUS_ERROR;
1324 switch(csio->scsi_status) {
1325 case SCSI_STATUS_CHECK_COND:
1326 case SCSI_STATUS_CMD_TERMINATED:
1327 csio->ccb_h.status |= CAM_AUTOSNS_VALID;
1328 /*
1329 * The aha writes the sense data at different
1330 * offsets based on the scsi cmd len
1331 */
1332 bcopy((caddr_t) &accb->hccb.scsi_cdb +
1333 accb->hccb.cmd_len,
1334 (caddr_t) &csio->sense_data,
1335 accb->hccb.sense_len);
1336 break;
1337 default:
1338 break;
1339 case SCSI_STATUS_OK:
1340 csio->ccb_h.status = CAM_REQ_CMP;
1341 break;
1342 }
1343 break;
1344 case AHASTAT_SELTIMEOUT:
1345 csio->ccb_h.status = CAM_SEL_TIMEOUT;
1346 break;
1347 case AHASTAT_UNEXPECTED_BUSFREE:
1348 csio->ccb_h.status = CAM_UNEXP_BUSFREE;
1349 break;
1350 case AHASTAT_INVALID_PHASE:
1351 csio->ccb_h.status = CAM_SEQUENCE_FAIL;
1352 break;
1353 case AHASTAT_INVALID_ACTION_CODE:
1354 panic("%s: Inavlid Action code", aha_name(aha));
1355 break;
1356 case AHASTAT_INVALID_OPCODE:
1357 if (accb->hccb.opcode < INITIATOR_CCB_WRESID)
1358 panic("%s: Invalid CCB Opcode %x hccb = %p",
1359 aha_name(aha), accb->hccb.opcode,
1360 &accb->hccb);
1361 printf("%s: AHA-1540A detected, compensating\n",
1362 aha_name(aha));
1363 aha->ccb_sg_opcode = INITIATOR_SG_CCB;
1364 aha->ccb_ccb_opcode = INITIATOR_CCB;
1365 xpt_freeze_devq(ccb->ccb_h.path, /*count*/1);
1366 csio->ccb_h.status = CAM_REQUEUE_REQ;
1367 break;
1368 case AHASTAT_LINKED_CCB_LUN_MISMATCH:
1369 /* We don't even support linked commands... */
1370 panic("%s: Linked CCB Lun Mismatch", aha_name(aha));
1371 break;
1372 case AHASTAT_INVALID_CCB_OR_SG_PARAM:
1373 panic("%s: Invalid CCB or SG list", aha_name(aha));
1374 break;
1375 case AHASTAT_HA_SCSI_BUS_RESET:
1376 if ((csio->ccb_h.status & CAM_STATUS_MASK)
1377 != CAM_CMD_TIMEOUT)
1378 csio->ccb_h.status = CAM_SCSI_BUS_RESET;
1379 break;
1380 case AHASTAT_HA_BDR:
1381 if ((accb->flags & ACCB_DEVICE_RESET) == 0)
1382 csio->ccb_h.status = CAM_BDR_SENT;
1383 else
1384 csio->ccb_h.status = CAM_CMD_TIMEOUT;
1385 break;
1386 }
1387 if (csio->ccb_h.status != CAM_REQ_CMP) {
1388 xpt_freeze_devq(csio->ccb_h.path, /*count*/1);
1389 csio->ccb_h.status |= CAM_DEV_QFRZN;
1390 }
1391 if ((accb->flags & ACCB_RELEASE_SIMQ) != 0)
1392 ccb->ccb_h.status |= CAM_RELEASE_SIMQ;
1393 ahafreeccb(aha, accb);
1394 xpt_done(ccb);
1395 break;
1396 case AMBI_OK:
1397 /* All completed without incident */
1398 /* XXX DO WE NEED TO COPY SENSE BYTES HERE???? XXX */
1399 /* I don't think so since it works???? */
1400 ccb->ccb_h.status |= CAM_REQ_CMP;
1401 if ((accb->flags & ACCB_RELEASE_SIMQ) != 0)
1402 ccb->ccb_h.status |= CAM_RELEASE_SIMQ;
1403 ahafreeccb(aha, accb);
1404 xpt_done(ccb);
1405 break;
1406 }
1407 }
1408
1409 static int
1410 ahareset(struct aha_softc* aha, int hard_reset)
1411 {
1412 struct ccb_hdr *ccb_h;
1413 u_int status;
1414 u_int timeout;
1415 u_int8_t reset_type;
1416
1417 if (hard_reset != 0)
1418 reset_type = HARD_RESET;
1419 else
1420 reset_type = SOFT_RESET;
1421 aha_outb(aha, CONTROL_REG, reset_type);
1422
1423 /* Wait 5sec. for Diagnostic start */
1424 timeout = 5 * 10000;
1425 while (--timeout) {
1426 status = aha_inb(aha, STATUS_REG);
1427 if ((status & DIAG_ACTIVE) != 0)
1428 break;
1429 DELAY(100);
1430 }
1431 if (timeout == 0) {
1432 PRVERB(("%s: ahareset - Diagnostic Active failed to "
1433 "assert. status = 0x%x\n", aha_name(aha),
1434 status));
1435 return (ETIMEDOUT);
1436 }
1437
1438 /* Wait 10sec. for Diagnostic end */
1439 timeout = 10 * 10000;
1440 while (--timeout) {
1441 status = aha_inb(aha, STATUS_REG);
1442 if ((status & DIAG_ACTIVE) == 0)
1443 break;
1444 DELAY(100);
1445 }
1446 if (timeout == 0) {
1447 panic("%s: ahareset - Diagnostic Active failed to drop. "
1448 "status = 0x%x\n", aha_name(aha), status);
1449 return (ETIMEDOUT);
1450 }
1451
1452 /* Wait for the host adapter to become ready or report a failure */
1453 timeout = 10000;
1454 while (--timeout) {
1455 status = aha_inb(aha, STATUS_REG);
1456 if ((status & (DIAG_FAIL|HA_READY|DATAIN_REG_READY)) != 0)
1457 break;
1458 DELAY(100);
1459 }
1460 if (timeout == 0) {
1461 printf("%s: ahareset - Host adapter failed to come ready. "
1462 "status = 0x%x\n", aha_name(aha), status);
1463 return (ETIMEDOUT);
1464 }
1465
1466 /* If the diagnostics failed, tell the user */
1467 if ((status & DIAG_FAIL) != 0
1468 || (status & HA_READY) == 0) {
1469 printf("%s: ahareset - Adapter failed diagnostics\n",
1470 aha_name(aha));
1471
1472 if ((status & DATAIN_REG_READY) != 0)
1473 printf("%s: ahareset - Host Adapter Error "
1474 "code = 0x%x\n", aha_name(aha),
1475 aha_inb(aha, DATAIN_REG));
1476 return (ENXIO);
1477 }
1478
1479 /* If we've allocated mailboxes, initialize them */
1480 if (aha->init_level > 4)
1481 ahainitmboxes(aha);
1482
1483 /* If we've attached to the XPT, tell it about the event */
1484 if (aha->path != NULL)
1485 xpt_async(AC_BUS_RESET, aha->path, NULL);
1486
1487 /*
1488 * Perform completion processing for all outstanding CCBs.
1489 */
1490 while ((ccb_h = LIST_FIRST(&aha->pending_ccbs)) != NULL) {
1491 struct aha_ccb *pending_accb;
1492
1493 pending_accb = (struct aha_ccb *)ccb_h->ccb_accb_ptr;
1494 pending_accb->hccb.ahastat = AHASTAT_HA_SCSI_BUS_RESET;
1495 ahadone(aha, pending_accb, AMBI_ERROR);
1496 }
1497
1498 return (0);
1499 }
1500
1501 /*
1502 * Send a command to the adapter.
1503 */
1504 int
1505 aha_cmd(struct aha_softc *aha, aha_op_t opcode, u_int8_t *params,
1506 u_int param_len, u_int8_t *reply_data, u_int reply_len,
1507 u_int cmd_timeout)
1508 {
1509 u_int timeout;
1510 u_int status;
1511 u_int saved_status;
1512 u_int intstat;
1513 u_int reply_buf_size;
1514 int s;
1515 int cmd_complete;
1516 int error;
1517
1518 /* No data returned to start */
1519 reply_buf_size = reply_len;
1520 reply_len = 0;
1521 intstat = 0;
1522 cmd_complete = 0;
1523 saved_status = 0;
1524 error = 0;
1525
1526 /*
1527 * All commands except for the "start mailbox" and the "enable
1528 * outgoing mailbox read interrupt" commands cannot be issued
1529 * while there are pending transactions. Freeze our SIMQ
1530 * and wait for all completions to occur if necessary.
1531 */
1532 timeout = 100000;
1533 s = splcam();
1534 while (LIST_FIRST(&aha->pending_ccbs) != NULL && --timeout) {
1535 /* Fire the interrupt handler in case interrupts are blocked */
1536 aha_intr(aha);
1537 splx(s);
1538 DELAY(100);
1539 s = splcam();
1540 }
1541 splx(s);
1542
1543 if (timeout == 0) {
1544 printf("%s: aha_cmd: Timeout waiting for adapter idle\n",
1545 aha_name(aha));
1546 return (ETIMEDOUT);
1547 }
1548 aha->command_cmp = 0;
1549 /*
1550 * Wait up to 10 sec. for the adapter to become
1551 * ready to accept commands.
1552 */
1553 timeout = 100000;
1554 while (--timeout) {
1555
1556 status = aha_inb(aha, STATUS_REG);
1557 if ((status & HA_READY) != 0
1558 && (status & CMD_REG_BUSY) == 0)
1559 break;
1560 /*
1561 * Throw away any pending data which may be
1562 * left over from earlier commands that we
1563 * timedout on.
1564 */
1565 if ((status & DATAIN_REG_READY) != 0)
1566 (void)aha_inb(aha, DATAIN_REG);
1567 DELAY(100);
1568 }
1569 if (timeout == 0) {
1570 printf("%s: aha_cmd: Timeout waiting for adapter ready, "
1571 "status = 0x%x\n", aha_name(aha), status);
1572 return (ETIMEDOUT);
1573 }
1574
1575 /*
1576 * Send the opcode followed by any necessary parameter bytes.
1577 */
1578 aha_outb(aha, COMMAND_REG, opcode);
1579
1580 /*
1581 * Wait for up to 1sec to get the parameter list sent
1582 */
1583 timeout = 10000;
1584 while (param_len && --timeout) {
1585 DELAY(100);
1586 s = splcam();
1587 status = aha_inb(aha, STATUS_REG);
1588 intstat = aha_inb(aha, INTSTAT_REG);
1589 splx(s);
1590
1591 if ((intstat & (INTR_PENDING|CMD_COMPLETE))
1592 == (INTR_PENDING|CMD_COMPLETE)) {
1593 saved_status = status;
1594 cmd_complete = 1;
1595 break;
1596 }
1597
1598 if (aha->command_cmp != 0) {
1599 saved_status = aha->latched_status;
1600 cmd_complete = 1;
1601 break;
1602 }
1603 if ((status & DATAIN_REG_READY) != 0)
1604 break;
1605 if ((status & CMD_REG_BUSY) == 0) {
1606 aha_outb(aha, COMMAND_REG, *params++);
1607 param_len--;
1608 timeout = 10000;
1609 }
1610 }
1611 if (timeout == 0) {
1612 printf("%s: aha_cmd: Timeout sending parameters, "
1613 "status = 0x%x\n", aha_name(aha), status);
1614 error = ETIMEDOUT;
1615 }
1616
1617 /*
1618 * For all other commands, we wait for any output data
1619 * and the final comand completion interrupt.
1620 */
1621 while (cmd_complete == 0 && --cmd_timeout) {
1622
1623 s = splcam();
1624 status = aha_inb(aha, STATUS_REG);
1625 intstat = aha_inb(aha, INTSTAT_REG);
1626 splx(s);
1627
1628 if (aha->command_cmp != 0) {
1629 cmd_complete = 1;
1630 saved_status = aha->latched_status;
1631 } else if ((intstat & (INTR_PENDING|CMD_COMPLETE))
1632 == (INTR_PENDING|CMD_COMPLETE)) {
1633 /*
1634 * Our poll (in case interrupts are blocked)
1635 * saw the CMD_COMPLETE interrupt.
1636 */
1637 cmd_complete = 1;
1638 saved_status = status;
1639 }
1640 if ((status & DATAIN_REG_READY) != 0) {
1641 u_int8_t data;
1642
1643 data = aha_inb(aha, DATAIN_REG);
1644 if (reply_len < reply_buf_size) {
1645 *reply_data++ = data;
1646 } else {
1647 printf("%s: aha_cmd - Discarded reply data "
1648 "byte for opcode 0x%x\n", aha_name(aha),
1649 opcode);
1650 }
1651 /*
1652 * Reset timeout to ensure at least a second
1653 * between response bytes.
1654 */
1655 cmd_timeout = MAX(cmd_timeout, 10000);
1656 reply_len++;
1657 }
1658 DELAY(100);
1659 }
1660 if (cmd_timeout == 0) {
1661 printf("%s: aha_cmd: Timeout waiting for reply data and "
1662 "command complete.\n%s: status = 0x%x, intstat = 0x%x, "
1663 "reply_len = %d\n", aha_name(aha), aha_name(aha), status,
1664 intstat, reply_len);
1665 return (ETIMEDOUT);
1666 }
1667
1668 /*
1669 * Clear any pending interrupts. Block interrupts so our
1670 * interrupt handler is not re-entered.
1671 */
1672 s = splcam();
1673 aha_intr(aha);
1674 splx(s);
1675
1676 if (error != 0)
1677 return (error);
1678
1679 /*
1680 * If the command was rejected by the controller, tell the caller.
1681 */
1682 if ((saved_status & CMD_INVALID) != 0) {
1683 PRVERB(("%s: Invalid Command 0x%x\n", aha_name(aha), opcode));
1684 /*
1685 * Some early adapters may not recover properly from
1686 * an invalid command. If it appears that the controller
1687 * has wedged (i.e. status was not cleared by our interrupt
1688 * reset above), perform a soft reset.
1689 */
1690 DELAY(1000);
1691 status = aha_inb(aha, STATUS_REG);
1692 if ((status & (CMD_INVALID|STATUS_REG_RSVD|DATAIN_REG_READY|
1693 CMD_REG_BUSY|DIAG_FAIL|DIAG_ACTIVE)) != 0
1694 || (status & (HA_READY|INIT_REQUIRED))
1695 != (HA_READY|INIT_REQUIRED)) {
1696 ahareset(aha, /*hard_reset*/FALSE);
1697 }
1698 return (EINVAL);
1699 }
1700
1701 if (param_len > 0) {
1702 /* The controller did not accept the full argument list */
1703 PRVERB(("%s: Controller did not accept full argument list "
1704 "(%d > 0)\n",
1705 aha_name(aha), param_len));
1706 return (E2BIG);
1707 }
1708
1709 if (reply_len != reply_buf_size) {
1710 /* Too much or too little data received */
1711 PRVERB(("%s: Too much or too little data received (%d != %d)\n",
1712 aha_name(aha), reply_len, reply_buf_size));
1713 return (EMSGSIZE);
1714 }
1715
1716 /* We were successful */
1717 return (0);
1718 }
1719
1720 static int
1721 ahainitmboxes(struct aha_softc *aha)
1722 {
1723 int error;
1724 init_24b_mbox_params_t init_mbox;
1725
1726 bzero(aha->in_boxes, sizeof(aha_mbox_in_t) * aha->num_boxes);
1727 bzero(aha->out_boxes, sizeof(aha_mbox_out_t) * aha->num_boxes);
1728 aha->cur_inbox = aha->in_boxes;
1729 aha->last_inbox = aha->in_boxes + aha->num_boxes - 1;
1730 aha->cur_outbox = aha->out_boxes;
1731 aha->last_outbox = aha->out_boxes + aha->num_boxes - 1;
1732
1733 /* Tell the adapter about them */
1734 init_mbox.num_mboxes = aha->num_boxes;
1735 ahautoa24(aha->mailbox_physbase, init_mbox.base_addr);
1736 error = aha_cmd(aha, AOP_INITIALIZE_MBOX, (u_int8_t *)&init_mbox,
1737 /*parmlen*/sizeof(init_mbox), /*reply_buf*/NULL,
1738 /*reply_len*/0, DEFAULT_CMD_TIMEOUT);
1739
1740 if (error != 0)
1741 printf("ahainitmboxes: Initialization command failed\n");
1742 return (error);
1743 }
1744
1745 /*
1746 * Update the XPT's idea of the negotiated transfer
1747 * parameters for a particular target.
1748 */
1749 static void
1750 ahafetchtransinfo(struct aha_softc *aha, struct ccb_trans_settings* cts)
1751 {
1752 setup_data_t setup_info;
1753 u_int target;
1754 u_int targ_offset;
1755 u_int sync_period;
1756 int error;
1757 u_int8_t param;
1758 targ_syncinfo_t sync_info;
1759
1760 target = cts->ccb_h.target_id;
1761 targ_offset = (target & 0x7);
1762
1763 /*
1764 * Inquire Setup Information. This command retreives
1765 * the sync info for older models.
1766 */
1767 param = sizeof(setup_info);
1768 error = aha_cmd(aha, AOP_INQUIRE_SETUP_INFO, ¶m, /*paramlen*/1,
1769 (u_int8_t*)&setup_info, sizeof(setup_info),
1770 DEFAULT_CMD_TIMEOUT);
1771
1772 if (error != 0) {
1773 printf("%s: ahafetchtransinfo - Inquire Setup Info Failed %d\n",
1774 aha_name(aha), error);
1775 return;
1776 }
1777
1778 sync_info = setup_info.syncinfo[targ_offset];
1779
1780 if (sync_info.sync == 0)
1781 cts->sync_offset = 0;
1782 else
1783 cts->sync_offset = sync_info.offset;
1784
1785 cts->bus_width = MSG_EXT_WDTR_BUS_8_BIT;
1786
1787 if (aha->boardid >= BOARD_1542CF)
1788 sync_period = 1000;
1789 else
1790 sync_period = 2000;
1791 sync_period += 500 * sync_info.period;
1792
1793 /* Convert ns value to standard SCSI sync rate */
1794 if (cts->sync_offset != 0)
1795 cts->sync_period = scsi_calc_syncparam(sync_period);
1796 else
1797 cts->sync_period = 0;
1798
1799 cts->valid = CCB_TRANS_SYNC_RATE_VALID
1800 | CCB_TRANS_SYNC_OFFSET_VALID
1801 | CCB_TRANS_BUS_WIDTH_VALID;
1802 xpt_async(AC_TRANSFER_NEG, cts->ccb_h.path, cts);
1803 }
1804
1805 static void
1806 ahamapmboxes(void *arg, bus_dma_segment_t *segs, int nseg, int error)
1807 {
1808 struct aha_softc* aha;
1809
1810 aha = (struct aha_softc*)arg;
1811 aha->mailbox_physbase = segs->ds_addr;
1812 }
1813
1814 static void
1815 ahamapccbs(void *arg, bus_dma_segment_t *segs, int nseg, int error)
1816 {
1817 struct aha_softc* aha;
1818
1819 aha = (struct aha_softc*)arg;
1820 aha->aha_ccb_physbase = segs->ds_addr;
1821 }
1822
1823 static void
1824 ahamapsgs(void *arg, bus_dma_segment_t *segs, int nseg, int error)
1825 {
1826
1827 struct aha_softc* aha;
1828
1829 aha = (struct aha_softc*)arg;
1830 SLIST_FIRST(&aha->sg_maps)->sg_physaddr = segs->ds_addr;
1831 }
1832
1833 static void
1834 ahapoll(struct cam_sim *sim)
1835 {
1836 aha_intr(cam_sim_softc(sim));
1837 }
1838
1839 static void
1840 ahatimeout(void *arg)
1841 {
1842 struct aha_ccb *accb;
1843 union ccb *ccb;
1844 struct aha_softc *aha;
1845 int s;
1846 u_int32_t paddr;
1847
1848 accb = (struct aha_ccb *)arg;
1849 ccb = accb->ccb;
1850 aha = (struct aha_softc *)ccb->ccb_h.ccb_aha_ptr;
1851 xpt_print_path(ccb->ccb_h.path);
1852 printf("CCB %p - timed out\n", (void *)accb);
1853
1854 s = splcam();
1855
1856 if ((accb->flags & ACCB_ACTIVE) == 0) {
1857 xpt_print_path(ccb->ccb_h.path);
1858 printf("CCB %p - timed out CCB already completed\n",
1859 (void *)accb);
1860 splx(s);
1861 return;
1862 }
1863
1864 /*
1865 * In order to simplify the recovery process, we ask the XPT
1866 * layer to halt the queue of new transactions and we traverse
1867 * the list of pending CCBs and remove their timeouts. This
1868 * means that the driver attempts to clear only one error
1869 * condition at a time. In general, timeouts that occur
1870 * close together are related anyway, so there is no benefit
1871 * in attempting to handle errors in parrallel. Timeouts will
1872 * be reinstated when the recovery process ends.
1873 */
1874 if ((accb->flags & ACCB_DEVICE_RESET) == 0) {
1875 struct ccb_hdr *ccb_h;
1876
1877 if ((accb->flags & ACCB_RELEASE_SIMQ) == 0) {
1878 xpt_freeze_simq(aha->sim, /*count*/1);
1879 accb->flags |= ACCB_RELEASE_SIMQ;
1880 }
1881
1882 ccb_h = LIST_FIRST(&aha->pending_ccbs);
1883 while (ccb_h != NULL) {
1884 struct aha_ccb *pending_accb;
1885
1886 pending_accb = (struct aha_ccb *)ccb_h->ccb_accb_ptr;
1887 untimeout(ahatimeout, pending_accb, ccb_h->timeout_ch);
1888 ccb_h = LIST_NEXT(ccb_h, sim_links.le);
1889 }
1890 }
1891
1892 if ((accb->flags & ACCB_DEVICE_RESET) != 0
1893 || aha->cur_outbox->action_code != AMBO_FREE) {
1894 /*
1895 * Try a full host adapter/SCSI bus reset.
1896 * We do this only if we have already attempted
1897 * to clear the condition with a BDR, or we cannot
1898 * attempt a BDR for lack of mailbox resources.
1899 */
1900 ccb->ccb_h.status = CAM_CMD_TIMEOUT;
1901 ahareset(aha, /*hardreset*/TRUE);
1902 printf("%s: No longer in timeout\n", aha_name(aha));
1903 } else {
1904 /*
1905 * Send a Bus Device Reset message:
1906 * The target that is holding up the bus may not
1907 * be the same as the one that triggered this timeout
1908 * (different commands have different timeout lengths),
1909 * but we have no way of determining this from our
1910 * timeout handler. Our strategy here is to queue a
1911 * BDR message to the target of the timed out command.
1912 * If this fails, we'll get another timeout 2 seconds
1913 * later which will attempt a bus reset.
1914 */
1915 accb->flags |= ACCB_DEVICE_RESET;
1916 ccb->ccb_h.timeout_ch = timeout(ahatimeout, (caddr_t)accb, 2 * hz);
1917 aha->recovery_accb->hccb.opcode = INITIATOR_BUS_DEV_RESET;
1918
1919 /* No Data Transfer */
1920 aha->recovery_accb->hccb.datain = TRUE;
1921 aha->recovery_accb->hccb.dataout = TRUE;
1922 aha->recovery_accb->hccb.ahastat = 0;
1923 aha->recovery_accb->hccb.sdstat = 0;
1924 aha->recovery_accb->hccb.target = ccb->ccb_h.target_id;
1925
1926 /* Tell the adapter about this command */
1927 paddr = ahaccbvtop(aha, aha->recovery_accb);
1928 ahautoa24(paddr, aha->cur_outbox->ccb_addr);
1929 aha->cur_outbox->action_code = AMBO_START;
1930 aha_outb(aha, COMMAND_REG, AOP_START_MBOX);
1931 ahanextoutbox(aha);
1932 }
1933
1934 splx(s);
1935 }
1936
1937 int
1938 aha_detach(struct aha_softc *aha)
1939 {
1940 xpt_async(AC_LOST_DEVICE, aha->path, NULL);
1941 xpt_free_path(aha->path);
1942 xpt_bus_deregister(cam_sim_path(aha->sim));
1943 cam_sim_free(aha->sim, /*free_devq*/TRUE);
1944 return (0);
1945 }
Cache object: 561b72913066b607c79b5b5969ed2543
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