Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/dev/ahci/ahci_pci.c
Version:
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1 /*- 2 * Copyright (c) 2009-2012 Alexander Motin <mav@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include <sys/param.h> 31 #include <sys/module.h> 32 #include <sys/systm.h> 33 #include <sys/kernel.h> 34 #include <sys/bus.h> 35 #include <sys/conf.h> 36 #include <sys/endian.h> 37 #include <sys/malloc.h> 38 #include <sys/lock.h> 39 #include <sys/mutex.h> 40 #include <machine/stdarg.h> 41 #include <machine/resource.h> 42 #include <machine/bus.h> 43 #include <sys/rman.h> 44 #include <dev/pci/pcivar.h> 45 #include <dev/pci/pcireg.h> 46 #include "ahci.h" 47 48 static int force_ahci = 1; 49 TUNABLE_INT("hw.ahci.force", &force_ahci); 50 51 static const struct { 52 uint32_t id; 53 uint8_t rev; 54 const char *name; 55 int quirks; 56 } ahci_ids[] = { 57 {0x43801002, 0x00, "AMD SB600", 58 AHCI_Q_NOMSI | AHCI_Q_ATI_PMP_BUG | AHCI_Q_MAXIO_64K}, 59 {0x43901002, 0x00, "AMD SB7x0/SB8x0/SB9x0", 60 AHCI_Q_ATI_PMP_BUG | AHCI_Q_1MSI}, 61 {0x43911002, 0x00, "AMD SB7x0/SB8x0/SB9x0", 62 AHCI_Q_ATI_PMP_BUG | AHCI_Q_1MSI}, 63 {0x43921002, 0x00, "AMD SB7x0/SB8x0/SB9x0", 64 AHCI_Q_ATI_PMP_BUG | AHCI_Q_1MSI}, 65 {0x43931002, 0x00, "AMD SB7x0/SB8x0/SB9x0", 66 AHCI_Q_ATI_PMP_BUG | AHCI_Q_1MSI}, 67 {0x43941002, 0x00, "AMD SB7x0/SB8x0/SB9x0", 68 AHCI_Q_ATI_PMP_BUG | AHCI_Q_1MSI}, 69 /* Not sure SB8x0/SB9x0 needs this quirk. Be conservative though */ 70 {0x43951002, 0x00, "AMD SB8x0/SB9x0", AHCI_Q_ATI_PMP_BUG}, 71 {0x43b61022, 0x00, "AMD X399", 0}, 72 {0x43b51022, 0x00, "AMD 300 Series", 0}, /* X370 */ 73 {0x43b71022, 0x00, "AMD 300 Series", 0}, /* B350 */ 74 {0x78001022, 0x00, "AMD Hudson-2", 0}, 75 {0x78011022, 0x00, "AMD Hudson-2", 0}, 76 {0x78021022, 0x00, "AMD Hudson-2", 0}, 77 {0x78031022, 0x00, "AMD Hudson-2", 0}, 78 {0x78041022, 0x00, "AMD Hudson-2", 0}, 79 {0x79001022, 0x00, "AMD KERNCZ", 0}, 80 {0x79011022, 0x00, "AMD KERNCZ", 0}, 81 {0x79021022, 0x00, "AMD KERNCZ", 0}, 82 {0x79031022, 0x00, "AMD KERNCZ", 0}, 83 {0x79041022, 0x00, "AMD KERNCZ", 0}, 84 {0x06011b21, 0x00, "ASMedia ASM1060", AHCI_Q_NOCCS|AHCI_Q_NOAUX}, 85 {0x06021b21, 0x00, "ASMedia ASM1060", AHCI_Q_NOCCS|AHCI_Q_NOAUX}, 86 {0x06111b21, 0x00, "ASMedia ASM1061", AHCI_Q_NOCCS|AHCI_Q_NOAUX}, 87 {0x06121b21, 0x00, "ASMedia ASM1062", AHCI_Q_NOCCS|AHCI_Q_NOAUX}, 88 {0x06201b21, 0x00, "ASMedia ASM106x", AHCI_Q_NOCCS|AHCI_Q_NOAUX}, 89 {0x06211b21, 0x00, "ASMedia ASM106x", AHCI_Q_NOCCS|AHCI_Q_NOAUX}, 90 {0x06221b21, 0x00, "ASMedia ASM106x", AHCI_Q_NOCCS|AHCI_Q_NOAUX}, 91 {0x06241b21, 0x00, "ASMedia ASM106x", AHCI_Q_NOCCS|AHCI_Q_NOAUX}, 92 {0x06251b21, 0x00, "ASMedia ASM106x", AHCI_Q_NOCCS|AHCI_Q_NOAUX}, 93 {0x79011d94, 0x00, "Hygon KERNCZ", 0}, 94 {0x26528086, 0x00, "Intel ICH6", AHCI_Q_NOFORCE}, 95 {0x26538086, 0x00, "Intel ICH6M", AHCI_Q_NOFORCE}, 96 {0x26818086, 0x00, "Intel ESB2", 0}, 97 {0x26828086, 0x00, "Intel ESB2", 0}, 98 {0x26838086, 0x00, "Intel ESB2", 0}, 99 {0x27c18086, 0x00, "Intel ICH7", 0}, 100 {0x27c38086, 0x00, "Intel ICH7", 0}, 101 {0x27c58086, 0x00, "Intel ICH7M", 0}, 102 {0x27c68086, 0x00, "Intel ICH7M", 0}, 103 {0x28218086, 0x00, "Intel ICH8", 0}, 104 {0x28228086, 0x00, "Intel ICH8+ (RAID)", 0}, 105 {0x28248086, 0x00, "Intel ICH8", 0}, 106 {0x28298086, 0x00, "Intel ICH8M", 0}, 107 {0x282a8086, 0x00, "Intel ICH8M+ (RAID)", 0}, 108 {0x29228086, 0x00, "Intel ICH9", 0}, 109 {0x29238086, 0x00, "Intel ICH9", 0}, 110 {0x29248086, 0x00, "Intel ICH9", 0}, 111 {0x29258086, 0x00, "Intel ICH9", 0}, 112 {0x29278086, 0x00, "Intel ICH9", 0}, 113 {0x29298086, 0x00, "Intel ICH9M", 0}, 114 {0x292a8086, 0x00, "Intel ICH9M", 0}, 115 {0x292b8086, 0x00, "Intel ICH9M", 0}, 116 {0x292c8086, 0x00, "Intel ICH9M", 0}, 117 {0x292f8086, 0x00, "Intel ICH9M", 0}, 118 {0x294d8086, 0x00, "Intel ICH9", 0}, 119 {0x294e8086, 0x00, "Intel ICH9M", 0}, 120 {0x3a058086, 0x00, "Intel ICH10 (RAID)", 0}, 121 {0x3a228086, 0x00, "Intel ICH10", 0}, 122 {0x3a258086, 0x00, "Intel ICH10 (RAID)", 0}, 123 {0x3b228086, 0x00, "Intel Ibex Peak", 0}, 124 {0x3b238086, 0x00, "Intel Ibex Peak", 0}, 125 {0x3b258086, 0x00, "Intel Ibex Peak (RAID)", 0}, 126 {0x3b298086, 0x00, "Intel Ibex Peak-M", 0}, 127 {0x3b2c8086, 0x00, "Intel Ibex Peak-M (RAID)", 0}, 128 {0x3b2f8086, 0x00, "Intel Ibex Peak-M", 0}, 129 {0x19b08086, 0x00, "Intel Denverton", 0}, 130 {0x19b18086, 0x00, "Intel Denverton", 0}, 131 {0x19b28086, 0x00, "Intel Denverton", 0}, 132 {0x19b38086, 0x00, "Intel Denverton", 0}, 133 {0x19b48086, 0x00, "Intel Denverton", 0}, 134 {0x19b58086, 0x00, "Intel Denverton", 0}, 135 {0x19b68086, 0x00, "Intel Denverton", 0}, 136 {0x19b78086, 0x00, "Intel Denverton", 0}, 137 {0x19be8086, 0x00, "Intel Denverton", 0}, 138 {0x19bf8086, 0x00, "Intel Denverton", 0}, 139 {0x19c08086, 0x00, "Intel Denverton", 0}, 140 {0x19c18086, 0x00, "Intel Denverton", 0}, 141 {0x19c28086, 0x00, "Intel Denverton", 0}, 142 {0x19c38086, 0x00, "Intel Denverton", 0}, 143 {0x19c48086, 0x00, "Intel Denverton", 0}, 144 {0x19c58086, 0x00, "Intel Denverton", 0}, 145 {0x19c68086, 0x00, "Intel Denverton", 0}, 146 {0x19c78086, 0x00, "Intel Denverton", 0}, 147 {0x19ce8086, 0x00, "Intel Denverton", 0}, 148 {0x19cf8086, 0x00, "Intel Denverton", 0}, 149 {0x1c028086, 0x00, "Intel Cougar Point", 0}, 150 {0x1c038086, 0x00, "Intel Cougar Point", 0}, 151 {0x1c048086, 0x00, "Intel Cougar Point (RAID)", 0}, 152 {0x1c058086, 0x00, "Intel Cougar Point (RAID)", 0}, 153 {0x1c068086, 0x00, "Intel Cougar Point (RAID)", 0}, 154 {0x1d028086, 0x00, "Intel Patsburg", 0}, 155 {0x1d048086, 0x00, "Intel Patsburg", 0}, 156 {0x1d068086, 0x00, "Intel Patsburg", 0}, 157 {0x28268086, 0x00, "Intel Patsburg+ (RAID)", 0}, 158 {0x1e028086, 0x00, "Intel Panther Point", 0}, 159 {0x1e038086, 0x00, "Intel Panther Point", 0}, 160 {0x1e048086, 0x00, "Intel Panther Point (RAID)", 0}, 161 {0x1e058086, 0x00, "Intel Panther Point (RAID)", 0}, 162 {0x1e068086, 0x00, "Intel Panther Point (RAID)", 0}, 163 {0x1e078086, 0x00, "Intel Panther Point (RAID)", 0}, 164 {0x1e0e8086, 0x00, "Intel Panther Point (RAID)", 0}, 165 {0x1e0f8086, 0x00, "Intel Panther Point (RAID)", 0}, 166 {0x1f228086, 0x00, "Intel Avoton", 0}, 167 {0x1f238086, 0x00, "Intel Avoton", 0}, 168 {0x1f248086, 0x00, "Intel Avoton (RAID)", 0}, 169 {0x1f258086, 0x00, "Intel Avoton (RAID)", 0}, 170 {0x1f268086, 0x00, "Intel Avoton (RAID)", 0}, 171 {0x1f278086, 0x00, "Intel Avoton (RAID)", 0}, 172 {0x1f2e8086, 0x00, "Intel Avoton (RAID)", 0}, 173 {0x1f2f8086, 0x00, "Intel Avoton (RAID)", 0}, 174 {0x1f328086, 0x00, "Intel Avoton", 0}, 175 {0x1f338086, 0x00, "Intel Avoton", 0}, 176 {0x1f348086, 0x00, "Intel Avoton (RAID)", 0}, 177 {0x1f358086, 0x00, "Intel Avoton (RAID)", 0}, 178 {0x1f368086, 0x00, "Intel Avoton (RAID)", 0}, 179 {0x1f378086, 0x00, "Intel Avoton (RAID)", 0}, 180 {0x1f3e8086, 0x00, "Intel Avoton (RAID)", 0}, 181 {0x1f3f8086, 0x00, "Intel Avoton (RAID)", 0}, 182 {0x23a38086, 0x00, "Intel Coleto Creek", 0}, 183 {0x8c028086, 0x00, "Intel Lynx Point", 0}, 184 {0x8c038086, 0x00, "Intel Lynx Point", 0}, 185 {0x8c048086, 0x00, "Intel Lynx Point (RAID)", 0}, 186 {0x8c058086, 0x00, "Intel Lynx Point (RAID)", 0}, 187 {0x8c068086, 0x00, "Intel Lynx Point (RAID)", 0}, 188 {0x8c078086, 0x00, "Intel Lynx Point (RAID)", 0}, 189 {0x8c0e8086, 0x00, "Intel Lynx Point (RAID)", 0}, 190 {0x8c0f8086, 0x00, "Intel Lynx Point (RAID)", 0}, 191 {0x8c828086, 0x00, "Intel Wildcat Point", 0}, 192 {0x8c838086, 0x00, "Intel Wildcat Point", 0}, 193 {0x8c848086, 0x00, "Intel Wildcat Point (RAID)", 0}, 194 {0x8c858086, 0x00, "Intel Wildcat Point (RAID)", 0}, 195 {0x8c868086, 0x00, "Intel Wildcat Point (RAID)", 0}, 196 {0x8c878086, 0x00, "Intel Wildcat Point (RAID)", 0}, 197 {0x8c8e8086, 0x00, "Intel Wildcat Point (RAID)", 0}, 198 {0x8c8f8086, 0x00, "Intel Wildcat Point (RAID)", 0}, 199 {0x8d028086, 0x00, "Intel Wellsburg", 0}, 200 {0x8d048086, 0x00, "Intel Wellsburg (RAID)", 0}, 201 {0x8d068086, 0x00, "Intel Wellsburg (RAID)", 0}, 202 {0x8d628086, 0x00, "Intel Wellsburg", 0}, 203 {0x8d648086, 0x00, "Intel Wellsburg (RAID)", 0}, 204 {0x8d668086, 0x00, "Intel Wellsburg (RAID)", 0}, 205 {0x8d6e8086, 0x00, "Intel Wellsburg (RAID)", 0}, 206 {0x28238086, 0x00, "Intel Wellsburg+ (RAID)", 0}, 207 {0x28278086, 0x00, "Intel Wellsburg+ (RAID)", 0}, 208 {0x9c028086, 0x00, "Intel Lynx Point-LP", 0}, 209 {0x9c038086, 0x00, "Intel Lynx Point-LP", 0}, 210 {0x9c048086, 0x00, "Intel Lynx Point-LP (RAID)", 0}, 211 {0x9c058086, 0x00, "Intel Lynx Point-LP (RAID)", 0}, 212 {0x9c068086, 0x00, "Intel Lynx Point-LP (RAID)", 0}, 213 {0x9c078086, 0x00, "Intel Lynx Point-LP (RAID)", 0}, 214 {0x9c0e8086, 0x00, "Intel Lynx Point-LP (RAID)", 0}, 215 {0x9c0f8086, 0x00, "Intel Lynx Point-LP (RAID)", 0}, 216 {0x9c838086, 0x00, "Intel Wildcat Point-LP", 0}, 217 {0x9c858086, 0x00, "Intel Wildcat Point-LP (RAID)", 0}, 218 {0x9c878086, 0x00, "Intel Wildcat Point-LP (RAID)", 0}, 219 {0x9c8f8086, 0x00, "Intel Wildcat Point-LP (RAID)", 0}, 220 {0x9d038086, 0x00, "Intel Sunrise Point-LP", 0}, 221 {0x9d058086, 0x00, "Intel Sunrise Point-LP (RAID)", 0}, 222 {0x9d078086, 0x00, "Intel Sunrise Point-LP (RAID)", 0}, 223 {0xa1028086, 0x00, "Intel Sunrise Point", 0}, 224 {0xa1038086, 0x00, "Intel Sunrise Point", 0}, 225 {0xa1058086, 0x00, "Intel Sunrise Point (RAID)", 0}, 226 {0xa1068086, 0x00, "Intel Sunrise Point (RAID)", 0}, 227 {0xa1078086, 0x00, "Intel Sunrise Point (RAID)", 0}, 228 {0xa10f8086, 0x00, "Intel Sunrise Point (RAID)", 0}, 229 {0xa1828086, 0x00, "Intel Lewisburg", 0}, 230 {0xa1868086, 0x00, "Intel Lewisburg (RAID)", 0}, 231 {0xa1d28086, 0x00, "Intel Lewisburg", 0}, 232 {0xa1d68086, 0x00, "Intel Lewisburg (RAID)", 0}, 233 {0xa2028086, 0x00, "Intel Lewisburg", 0}, 234 {0xa2068086, 0x00, "Intel Lewisburg (RAID)", 0}, 235 {0xa2528086, 0x00, "Intel Lewisburg", 0}, 236 {0xa2568086, 0x00, "Intel Lewisburg (RAID)", 0}, 237 {0xa2828086, 0x00, "Intel Union Point", 0}, 238 {0xa2868086, 0x00, "Intel Union Point (RAID)", 0}, 239 {0xa28e8086, 0x00, "Intel Union Point (RAID)", 0}, 240 {0xa3528086, 0x00, "Intel Cannon Lake", 0}, 241 {0xa3538086, 0x00, "Intel Cannon Lake", 0}, 242 {0x23238086, 0x00, "Intel DH89xxCC", 0}, 243 {0x2360197b, 0x00, "JMicron JMB360", 0}, 244 {0x2361197b, 0x00, "JMicron JMB361", AHCI_Q_NOFORCE | AHCI_Q_1CH}, 245 {0x2362197b, 0x00, "JMicron JMB362", 0}, 246 {0x2363197b, 0x00, "JMicron JMB363", AHCI_Q_NOFORCE}, 247 {0x2365197b, 0x00, "JMicron JMB365", AHCI_Q_NOFORCE}, 248 {0x2366197b, 0x00, "JMicron JMB366", AHCI_Q_NOFORCE}, 249 {0x2368197b, 0x00, "JMicron JMB368", AHCI_Q_NOFORCE}, 250 {0x0585197b, 0x00, "JMicron JMB58x", 0}, 251 {0x611111ab, 0x00, "Marvell 88SE6111", AHCI_Q_NOFORCE | AHCI_Q_NOPMP | 252 AHCI_Q_1CH | AHCI_Q_EDGEIS}, 253 {0x612111ab, 0x00, "Marvell 88SE6121", AHCI_Q_NOFORCE | AHCI_Q_NOPMP | 254 AHCI_Q_2CH | AHCI_Q_EDGEIS | AHCI_Q_NONCQ | AHCI_Q_NOCOUNT}, 255 {0x614111ab, 0x00, "Marvell 88SE6141", AHCI_Q_NOFORCE | AHCI_Q_NOPMP | 256 AHCI_Q_4CH | AHCI_Q_EDGEIS | AHCI_Q_NONCQ | AHCI_Q_NOCOUNT}, 257 {0x614511ab, 0x00, "Marvell 88SE6145", AHCI_Q_NOFORCE | AHCI_Q_NOPMP | 258 AHCI_Q_4CH | AHCI_Q_EDGEIS | AHCI_Q_NONCQ | AHCI_Q_NOCOUNT}, 259 {0x91201b4b, 0x00, "Marvell 88SE912x", AHCI_Q_EDGEIS}, 260 {0x91231b4b, 0x11, "Marvell 88SE912x", AHCI_Q_ALTSIG}, 261 {0x91231b4b, 0x00, "Marvell 88SE912x", AHCI_Q_EDGEIS|AHCI_Q_SATA2}, 262 {0x91251b4b, 0x00, "Marvell 88SE9125", 0}, 263 {0x91281b4b, 0x00, "Marvell 88SE9128", AHCI_Q_ALTSIG}, 264 {0x91301b4b, 0x00, "Marvell 88SE9130", AHCI_Q_ALTSIG}, 265 {0x91721b4b, 0x00, "Marvell 88SE9172", 0}, 266 {0x91821b4b, 0x00, "Marvell 88SE9182", 0}, 267 {0x91831b4b, 0x00, "Marvell 88SS9183", 0}, 268 {0x91a01b4b, 0x00, "Marvell 88SE91Ax", 0}, 269 {0x92151b4b, 0x00, "Marvell 88SE9215", 0}, 270 {0x92201b4b, 0x00, "Marvell 88SE9220", AHCI_Q_ALTSIG}, 271 {0x92301b4b, 0x00, "Marvell 88SE9230", AHCI_Q_ALTSIG}, 272 {0x92351b4b, 0x00, "Marvell 88SE9235", 0}, 273 {0x06201103, 0x00, "HighPoint RocketRAID 620", 0}, 274 {0x06201b4b, 0x00, "HighPoint RocketRAID 620", 0}, 275 {0x06221103, 0x00, "HighPoint RocketRAID 622", 0}, 276 {0x06221b4b, 0x00, "HighPoint RocketRAID 622", 0}, 277 {0x06401103, 0x00, "HighPoint RocketRAID 640", 0}, 278 {0x06401b4b, 0x00, "HighPoint RocketRAID 640", 0}, 279 {0x06441103, 0x00, "HighPoint RocketRAID 644", 0}, 280 {0x06441b4b, 0x00, "HighPoint RocketRAID 644", 0}, 281 {0x06411103, 0x00, "HighPoint RocketRAID 640L", 0}, 282 {0x06421103, 0x00, "HighPoint RocketRAID 642L", 0}, 283 {0x06451103, 0x00, "HighPoint RocketRAID 644L", 0}, 284 {0x044c10de, 0x00, "NVIDIA MCP65", AHCI_Q_NOAA}, 285 {0x044d10de, 0x00, "NVIDIA MCP65", AHCI_Q_NOAA}, 286 {0x044e10de, 0x00, "NVIDIA MCP65", AHCI_Q_NOAA}, 287 {0x044f10de, 0x00, "NVIDIA MCP65", AHCI_Q_NOAA}, 288 {0x045c10de, 0x00, "NVIDIA MCP65", AHCI_Q_NOAA}, 289 {0x045d10de, 0x00, "NVIDIA MCP65", AHCI_Q_NOAA}, 290 {0x045e10de, 0x00, "NVIDIA MCP65", AHCI_Q_NOAA}, 291 {0x045f10de, 0x00, "NVIDIA MCP65", AHCI_Q_NOAA}, 292 {0x055010de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 293 {0x055110de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 294 {0x055210de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 295 {0x055310de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 296 {0x055410de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 297 {0x055510de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 298 {0x055610de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 299 {0x055710de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 300 {0x055810de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 301 {0x055910de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 302 {0x055A10de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 303 {0x055B10de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 304 {0x058410de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 305 {0x07f010de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 306 {0x07f110de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 307 {0x07f210de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 308 {0x07f310de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 309 {0x07f410de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 310 {0x07f510de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 311 {0x07f610de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 312 {0x07f710de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 313 {0x07f810de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 314 {0x07f910de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 315 {0x07fa10de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 316 {0x07fb10de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 317 {0x0ad010de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 318 {0x0ad110de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 319 {0x0ad210de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 320 {0x0ad310de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 321 {0x0ad410de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 322 {0x0ad510de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 323 {0x0ad610de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 324 {0x0ad710de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 325 {0x0ad810de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 326 {0x0ad910de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 327 {0x0ada10de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 328 {0x0adb10de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 329 {0x0ab410de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 330 {0x0ab510de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 331 {0x0ab610de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 332 {0x0ab710de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 333 {0x0ab810de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 334 {0x0ab910de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 335 {0x0aba10de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 336 {0x0abb10de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 337 {0x0abc10de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 338 {0x0abd10de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 339 {0x0abe10de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 340 {0x0abf10de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 341 {0x0d8410de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 342 {0x0d8510de, 0x00, "NVIDIA MCP89", AHCI_Q_NOFORCE|AHCI_Q_NOAA}, 343 {0x0d8610de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 344 {0x0d8710de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 345 {0x0d8810de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 346 {0x0d8910de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 347 {0x0d8a10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 348 {0x0d8b10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 349 {0x0d8c10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 350 {0x0d8d10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 351 {0x0d8e10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 352 {0x0d8f10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 353 {0x3781105a, 0x00, "Promise TX8660", 0}, 354 {0x33491106, 0x00, "VIA VT8251", AHCI_Q_NOPMP|AHCI_Q_NONCQ}, 355 {0x62871106, 0x00, "VIA VT8251", AHCI_Q_NOPMP|AHCI_Q_NONCQ}, 356 {0x11841039, 0x00, "SiS 966", 0}, 357 {0x11851039, 0x00, "SiS 968", 0}, 358 {0x01861039, 0x00, "SiS 968", 0}, 359 {0xa01c177d, 0x00, "ThunderX", AHCI_Q_ABAR0|AHCI_Q_1MSI}, 360 {0x00311c36, 0x00, "Annapurna", AHCI_Q_FORCE_PI|AHCI_Q_RESTORE_CAP|AHCI_Q_NOMSIX}, 361 {0x00000000, 0x00, NULL, 0} 362 }; 363 364 static int 365 ahci_pci_ctlr_reset(device_t dev) 366 { 367 368 if (pci_read_config(dev, PCIR_DEVVENDOR, 4) == 0x28298086 && 369 (pci_read_config(dev, 0x92, 1) & 0xfe) == 0x04) 370 pci_write_config(dev, 0x92, 0x01, 1); 371 return ahci_ctlr_reset(dev); 372 } 373 374 static int 375 ahci_probe(device_t dev) 376 { 377 char buf[64]; 378 int i, valid = 0; 379 uint32_t devid = pci_get_devid(dev); 380 uint8_t revid = pci_get_revid(dev); 381 382 /* 383 * Ensure it is not a PCI bridge (some vendors use 384 * the same PID and VID in PCI bridge and AHCI cards). 385 */ 386 if (pci_get_class(dev) == PCIC_BRIDGE) 387 return (ENXIO); 388 389 /* Is this a possible AHCI candidate? */ 390 if (pci_get_class(dev) == PCIC_STORAGE && 391 pci_get_subclass(dev) == PCIS_STORAGE_SATA && 392 pci_get_progif(dev) == PCIP_STORAGE_SATA_AHCI_1_0) 393 valid = 1; 394 else if (pci_get_class(dev) == PCIC_STORAGE && 395 pci_get_subclass(dev) == PCIS_STORAGE_RAID) 396 valid = 2; 397 /* Is this a known AHCI chip? */ 398 for (i = 0; ahci_ids[i].id != 0; i++) { 399 if (ahci_ids[i].id == devid && 400 ahci_ids[i].rev <= revid && 401 (valid || (force_ahci == 1 && 402 !(ahci_ids[i].quirks & AHCI_Q_NOFORCE)))) { 403 /* Do not attach JMicrons with single PCI function. */ 404 if (pci_get_vendor(dev) == 0x197b && 405 (ahci_ids[i].quirks & AHCI_Q_NOFORCE) && 406 (pci_read_config(dev, 0xdf, 1) & 0x40) == 0) 407 return (ENXIO); 408 snprintf(buf, sizeof(buf), "%s AHCI SATA controller", 409 ahci_ids[i].name); 410 device_set_desc_copy(dev, buf); 411 return (BUS_PROBE_DEFAULT); 412 } 413 } 414 if (valid != 1) 415 return (ENXIO); 416 device_set_desc_copy(dev, "AHCI SATA controller"); 417 return (BUS_PROBE_DEFAULT); 418 } 419 420 static int 421 ahci_ata_probe(device_t dev) 422 { 423 char buf[64]; 424 int i; 425 uint32_t devid = pci_get_devid(dev); 426 uint8_t revid = pci_get_revid(dev); 427 428 if ((intptr_t)device_get_ivars(dev) >= 0) 429 return (ENXIO); 430 /* Is this a known AHCI chip? */ 431 for (i = 0; ahci_ids[i].id != 0; i++) { 432 if (ahci_ids[i].id == devid && 433 ahci_ids[i].rev <= revid) { 434 snprintf(buf, sizeof(buf), "%s AHCI SATA controller", 435 ahci_ids[i].name); 436 device_set_desc_copy(dev, buf); 437 return (BUS_PROBE_DEFAULT); 438 } 439 } 440 device_set_desc_copy(dev, "AHCI SATA controller"); 441 return (BUS_PROBE_DEFAULT); 442 } 443 444 static int 445 ahci_pci_read_msix_bars(device_t dev, uint8_t *table_bar, uint8_t *pba_bar) 446 { 447 int cap_offset = 0, ret; 448 uint32_t val; 449 450 if ((table_bar == NULL) || (pba_bar == NULL)) 451 return (EINVAL); 452 453 ret = pci_find_cap(dev, PCIY_MSIX, &cap_offset); 454 if (ret != 0) 455 return (EINVAL); 456 457 val = pci_read_config(dev, cap_offset + PCIR_MSIX_TABLE, 4); 458 *table_bar = PCIR_BAR(val & PCIM_MSIX_BIR_MASK); 459 460 val = pci_read_config(dev, cap_offset + PCIR_MSIX_PBA, 4); 461 *pba_bar = PCIR_BAR(val & PCIM_MSIX_BIR_MASK); 462 463 return (0); 464 } 465 466 static int 467 ahci_pci_attach(device_t dev) 468 { 469 struct ahci_controller *ctlr = device_get_softc(dev); 470 int error, i; 471 uint32_t devid = pci_get_devid(dev); 472 uint8_t revid = pci_get_revid(dev); 473 int msi_count, msix_count; 474 uint8_t table_bar = 0, pba_bar = 0; 475 476 msi_count = pci_msi_count(dev); 477 msix_count = pci_msix_count(dev); 478 479 i = 0; 480 while (ahci_ids[i].id != 0 && 481 (ahci_ids[i].id != devid || 482 ahci_ids[i].rev > revid)) 483 i++; 484 ctlr->quirks = ahci_ids[i].quirks; 485 /* Limit speed for my onboard JMicron external port. 486 * It is not eSATA really, limit to SATA 1 */ 487 if (pci_get_devid(dev) == 0x2363197b && 488 pci_get_subvendor(dev) == 0x1043 && 489 pci_get_subdevice(dev) == 0x81e4) 490 ctlr->quirks |= AHCI_Q_SATA1_UNIT0; 491 resource_int_value(device_get_name(dev), device_get_unit(dev), 492 "quirks", &ctlr->quirks); 493 ctlr->vendorid = pci_get_vendor(dev); 494 ctlr->deviceid = pci_get_device(dev); 495 ctlr->subvendorid = pci_get_subvendor(dev); 496 ctlr->subdeviceid = pci_get_subdevice(dev); 497 498 /* Default AHCI Base Address is BAR(5), Cavium uses BAR(0) */ 499 if (ctlr->quirks & AHCI_Q_ABAR0) 500 ctlr->r_rid = PCIR_BAR(0); 501 else 502 ctlr->r_rid = PCIR_BAR(5); 503 if (!(ctlr->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 504 &ctlr->r_rid, RF_ACTIVE))) 505 return ENXIO; 506 507 if (ctlr->quirks & AHCI_Q_NOMSIX) 508 msix_count = 0; 509 510 /* Read MSI-x BAR IDs if supported */ 511 if (msix_count > 0) { 512 error = ahci_pci_read_msix_bars(dev, &table_bar, &pba_bar); 513 if (error == 0) { 514 ctlr->r_msix_tab_rid = table_bar; 515 ctlr->r_msix_pba_rid = pba_bar; 516 } else { 517 /* Failed to read BARs, disable MSI-x */ 518 msix_count = 0; 519 } 520 } 521 522 /* Allocate resources for MSI-x table and PBA */ 523 if (msix_count > 0) { 524 /* 525 * Allocate new MSI-x table only if not 526 * allocated before. 527 */ 528 ctlr->r_msix_table = NULL; 529 if (ctlr->r_msix_tab_rid != ctlr->r_rid) { 530 /* Separate BAR for MSI-x */ 531 ctlr->r_msix_table = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 532 &ctlr->r_msix_tab_rid, RF_ACTIVE); 533 if (ctlr->r_msix_table == NULL) { 534 ahci_free_mem(dev); 535 return (ENXIO); 536 } 537 } 538 539 /* 540 * Allocate new PBA table only if not 541 * allocated before. 542 */ 543 ctlr->r_msix_pba = NULL; 544 if ((ctlr->r_msix_pba_rid != ctlr->r_msix_tab_rid) && 545 (ctlr->r_msix_pba_rid != ctlr->r_rid)) { 546 /* Separate BAR for PBA */ 547 ctlr->r_msix_pba = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 548 &ctlr->r_msix_pba_rid, RF_ACTIVE); 549 if (ctlr->r_msix_pba == NULL) { 550 ahci_free_mem(dev); 551 return (ENXIO); 552 } 553 } 554 } 555 556 pci_enable_busmaster(dev); 557 /* Reset controller */ 558 if ((error = ahci_pci_ctlr_reset(dev)) != 0) { 559 ahci_free_mem(dev); 560 return (error); 561 } 562 563 /* Setup interrupts. */ 564 565 /* Setup MSI register parameters */ 566 /* Process hints. */ 567 if (ctlr->quirks & AHCI_Q_NOMSI) 568 ctlr->msi = 0; 569 else if (ctlr->quirks & AHCI_Q_1MSI) 570 ctlr->msi = 1; 571 else 572 ctlr->msi = 2; 573 resource_int_value(device_get_name(dev), 574 device_get_unit(dev), "msi", &ctlr->msi); 575 ctlr->numirqs = 1; 576 if (msi_count == 0 && msix_count == 0) 577 ctlr->msi = 0; 578 if (ctlr->msi < 0) 579 ctlr->msi = 0; 580 else if (ctlr->msi == 1) { 581 msi_count = min(1, msi_count); 582 msix_count = min(1, msix_count); 583 } else if (ctlr->msi > 1) 584 ctlr->msi = 2; 585 586 /* Allocate MSI/MSI-x if needed/present. */ 587 if (ctlr->msi > 0) { 588 error = ENXIO; 589 590 /* Try to allocate MSI-x first */ 591 if (msix_count > 0) { 592 error = pci_alloc_msix(dev, &msix_count); 593 if (error == 0) 594 ctlr->numirqs = msix_count; 595 } 596 597 /* 598 * Try to allocate MSI if msi_count is greater than 0 599 * and if MSI-x allocation failed. 600 */ 601 if ((error != 0) && (msi_count > 0)) { 602 error = pci_alloc_msi(dev, &msi_count); 603 if (error == 0) 604 ctlr->numirqs = msi_count; 605 } 606 607 /* Both MSI and MSI-x allocations failed */ 608 if (error != 0) { 609 ctlr->msi = 0; 610 device_printf(dev, "Failed to allocate MSI/MSI-x, " 611 "falling back to INTx\n"); 612 } 613 } 614 615 error = ahci_attach(dev); 616 if (error != 0) { 617 if (ctlr->msi > 0) 618 pci_release_msi(dev); 619 ahci_free_mem(dev); 620 } 621 return error; 622 } 623 624 static int 625 ahci_pci_detach(device_t dev) 626 { 627 628 ahci_detach(dev); 629 pci_release_msi(dev); 630 return (0); 631 } 632 633 static int 634 ahci_pci_suspend(device_t dev) 635 { 636 struct ahci_controller *ctlr = device_get_softc(dev); 637 638 bus_generic_suspend(dev); 639 /* Disable interupts, so the state change(s) doesn't trigger */ 640 ATA_OUTL(ctlr->r_mem, AHCI_GHC, 641 ATA_INL(ctlr->r_mem, AHCI_GHC) & (~AHCI_GHC_IE)); 642 return 0; 643 } 644 645 static int 646 ahci_pci_resume(device_t dev) 647 { 648 int res; 649 650 if ((res = ahci_pci_ctlr_reset(dev)) != 0) 651 return (res); 652 ahci_ctlr_setup(dev); 653 return (bus_generic_resume(dev)); 654 } 655 656 static device_method_t ahci_methods[] = { 657 DEVMETHOD(device_probe, ahci_probe), 658 DEVMETHOD(device_attach, ahci_pci_attach), 659 DEVMETHOD(device_detach, ahci_pci_detach), 660 DEVMETHOD(device_suspend, ahci_pci_suspend), 661 DEVMETHOD(device_resume, ahci_pci_resume), 662 DEVMETHOD(bus_print_child, ahci_print_child), 663 DEVMETHOD(bus_alloc_resource, ahci_alloc_resource), 664 DEVMETHOD(bus_release_resource, ahci_release_resource), 665 DEVMETHOD(bus_setup_intr, ahci_setup_intr), 666 DEVMETHOD(bus_teardown_intr,ahci_teardown_intr), 667 DEVMETHOD(bus_child_location_str, ahci_child_location_str), 668 DEVMETHOD(bus_get_dma_tag, ahci_get_dma_tag), 669 DEVMETHOD_END 670 }; 671 static driver_t ahci_driver = { 672 "ahci", 673 ahci_methods, 674 sizeof(struct ahci_controller) 675 }; 676 DRIVER_MODULE(ahci, pci, ahci_driver, ahci_devclass, NULL, NULL); 677 static device_method_t ahci_ata_methods[] = { 678 DEVMETHOD(device_probe, ahci_ata_probe), 679 DEVMETHOD(device_attach, ahci_pci_attach), 680 DEVMETHOD(device_detach, ahci_pci_detach), 681 DEVMETHOD(device_suspend, ahci_pci_suspend), 682 DEVMETHOD(device_resume, ahci_pci_resume), 683 DEVMETHOD(bus_print_child, ahci_print_child), 684 DEVMETHOD(bus_alloc_resource, ahci_alloc_resource), 685 DEVMETHOD(bus_release_resource, ahci_release_resource), 686 DEVMETHOD(bus_setup_intr, ahci_setup_intr), 687 DEVMETHOD(bus_teardown_intr,ahci_teardown_intr), 688 DEVMETHOD(bus_child_location_str, ahci_child_location_str), 689 DEVMETHOD_END 690 }; 691 static driver_t ahci_ata_driver = { 692 "ahci", 693 ahci_ata_methods, 694 sizeof(struct ahci_controller) 695 }; 696 DRIVER_MODULE(ahci, atapci, ahci_ata_driver, ahci_devclass, NULL, NULL);
Cache object: 95e54b8ceaac09f8424ec55b5179fd14
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