The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/aic/aicvar.h

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 1999 Luoqi Chen.
    5  * All rights reserved.
    6  *
    7  * Redistribution and use in source and binary forms, with or without
    8  * modification, are permitted provided that the following conditions
    9  * are met:
   10  * 1. Redistributions of source code must retain the above copyright
   11  *    notice, this list of conditions and the following disclaimer.
   12  * 2. Redistributions in binary form must reproduce the above copyright
   13  *    notice, this list of conditions and the following disclaimer in the
   14  *    documentation and/or other materials provided with the distribution.
   15  *
   16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   26  * SUCH DAMAGE.
   27  *
   28  * $FreeBSD: releng/12.0/sys/dev/aic/aicvar.h 326255 2017-11-27 14:52:40Z pfg $
   29  */
   30 
   31 struct aic_transinfo {
   32         u_int8_t period;
   33         u_int8_t offset;
   34 };
   35 
   36 struct aic_tinfo {
   37         u_int16_t lubusy;
   38         u_int8_t flags;
   39         u_int8_t scsirate;
   40         struct aic_transinfo current;
   41         struct aic_transinfo goal;
   42         struct aic_transinfo user;
   43 };
   44 
   45 #define TINFO_DISC_ENB          0x01
   46 #define TINFO_TAG_ENB           0x02
   47 #define TINFO_SDTR_NEGO         0x04
   48 #define TINFO_SDTR_SENT         0x08
   49 
   50 struct aic_scb {
   51         union ccb       *ccb;
   52         SLIST_ENTRY(aic_scb) link;
   53         struct callout  timer;
   54         u_int8_t        flags;
   55         u_int8_t        tag;
   56         u_int8_t        target;
   57         u_int8_t        lun;
   58         u_int8_t        status;
   59         u_int8_t        cmd_len;
   60         u_int8_t        *cmd_ptr;
   61         u_int32_t       data_len;
   62         u_int8_t        *data_ptr;
   63 };
   64 
   65 #define ccb_scb_ptr     spriv_ptr0
   66 #define ccb_aic_ptr     spriv_ptr1
   67 
   68 #define SCB_ACTIVE              0x01
   69 #define SCB_DISCONNECTED        0x02
   70 #define SCB_DEVICE_RESET        0x04
   71 #define SCB_SENSE               0x08
   72 
   73 enum { AIC6260, AIC6360, AIC6370, GM82C700 };
   74 
   75 struct aic_softc {
   76         device_t                dev;
   77         struct mtx              lock;
   78         struct resource         *res;
   79         bus_dma_tag_t           dmat;
   80 
   81         struct cam_sim          *sim;
   82         struct cam_path         *path;
   83         TAILQ_HEAD(,ccb_hdr)    pending_ccbs, nexus_ccbs;
   84         SLIST_HEAD(,aic_scb)    free_scbs;
   85         struct aic_scb          *nexus;
   86 
   87         u_int32_t               flags;
   88         u_int8_t                initiator;
   89         u_int8_t                state;
   90         u_int8_t                target;
   91         u_int8_t                lun;
   92         u_int8_t                prev_phase;
   93 
   94         u_int8_t                msg_outq;
   95         u_int8_t                msg_sent;
   96         int                     msg_len;
   97         char                    msg_buf[8];
   98 
   99         struct aic_tinfo        tinfo[8];
  100         struct aic_scb          scbs[256];
  101 
  102         int                     min_period;
  103         int                     max_period;
  104         int                     chip_type;
  105 };
  106 
  107 #define AIC_DISC_ENABLE         0x01
  108 #define AIC_DMA_ENABLE          0x02
  109 #define AIC_PARITY_ENABLE       0x04
  110 #define AIC_DWIO_ENABLE         0x08
  111 #define AIC_RESOURCE_SHORTAGE   0x10
  112 #define AIC_DROP_MSGIN          0x20
  113 #define AIC_BUSFREE_OK          0x40
  114 #define AIC_FAST_ENABLE         0x80
  115 
  116 #define AIC_IDLE                0x00
  117 #define AIC_SELECTING           0x01
  118 #define AIC_RESELECTED          0x02
  119 #define AIC_RECONNECTING        0x03
  120 #define AIC_HASNEXUS            0x04
  121 
  122 #define AIC_MSG_IDENTIFY        0x01
  123 #define AIC_MSG_TAG_Q           0x02
  124 #define AIC_MSG_SDTR            0x04
  125 #define AIC_MSG_WDTR            0x08
  126 #define AIC_MSG_MSGBUF          0x80
  127 
  128 #define AIC_SYNC_PERIOD         (200 / 4)
  129 #define AIC_FAST_SYNC_PERIOD    (100 / 4)
  130 #define AIC_MIN_SYNC_PERIOD     112
  131 #define AIC_SYNC_OFFSET         8
  132 
  133 #define aic_inb(aic, port) \
  134         bus_read_1((aic)->res, (port))
  135 
  136 #define aic_outb(aic, port, value) \
  137         bus_write_1((aic)->res, (port), (value))
  138 
  139 #define aic_insb(aic, port, addr, count) \
  140         bus_read_multi_1((aic)->res, (port), (addr), (count))
  141 
  142 #define aic_outsb(aic, port, addr, count) \
  143         bus_write_multi_1((aic)->res, (port), (addr), (count))
  144 
  145 #define aic_insw(aic, port, addr, count) \
  146         bus_read_multi_2((aic)->res, (port), (u_int16_t *)(addr), (count))
  147 
  148 #define aic_outsw(aic, port, addr, count) \
  149         bus_write_multi_2((aic)->res, (port), (u_int16_t *)(addr), (count))
  150 
  151 #define aic_insl(aic, port, addr, count) \
  152         bus_read_multi_4((aic)->res, (port), (u_int32_t *)(addr), (count))
  153 
  154 #define aic_outsl(aic, port, addr, count) \
  155         bus_write_multi_4((aic)->res, (port), (u_int32_t *)(addr), (count))
  156 
  157 extern int aic_probe(struct aic_softc *);
  158 extern int aic_attach(struct aic_softc *);
  159 extern int aic_detach(struct aic_softc *);
  160 extern void aic_intr(void *);

Cache object: ea7a2e38a167f8c523e25d6314757600


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