1 /*-
2 * Instruction formats for the sequencer program downloaded to
3 * Aic7xxx SCSI host adapters
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 *
7 * Copyright (c) 1997, 1998, 2000 Justin T. Gibbs.
8 * All rights reserved.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions, and the following disclaimer,
15 * without modification.
16 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
17 * substantially similar to the "NO WARRANTY" disclaimer below
18 * ("Disclaimer") and any redistribution must be conditioned upon
19 * including a substantially similar Disclaimer requirement for further
20 * binary redistribution.
21 * 3. Neither the names of the above-listed copyright holders nor the names
22 * of any contributors may be used to endorse or promote products derived
23 * from this software without specific prior written permission.
24 *
25 * Alternatively, this software may be distributed under the terms of the
26 * GNU General Public License ("GPL") version 2 as published by the Free
27 * Software Foundation.
28 *
29 * NO WARRANTY
30 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
31 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
32 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
33 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
34 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
35 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
36 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
37 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
38 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
39 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
40 * POSSIBILITY OF SUCH DAMAGES.
41 *
42 * $Id: //depot/aic7xxx/aic7xxx/aicasm/aicasm_insformat.h#11 $
43 *
44 * $FreeBSD$
45 */
46
47 struct ins_format1 {
48 #if BYTE_ORDER == LITTLE_ENDIAN
49 uint32_t immediate : 8,
50 source : 9,
51 destination : 9,
52 ret : 1,
53 opcode : 4,
54 parity : 1;
55 #else
56 uint32_t parity : 1,
57 opcode : 4,
58 ret : 1,
59 destination : 9,
60 source : 9,
61 immediate : 8;
62 #endif
63 };
64
65 struct ins_format2 {
66 #if BYTE_ORDER == LITTLE_ENDIAN
67 uint32_t shift_control : 8,
68 source : 9,
69 destination : 9,
70 ret : 1,
71 opcode : 4,
72 parity : 1;
73 #else
74 uint32_t parity : 1,
75 opcode : 4,
76 ret : 1,
77 destination : 9,
78 source : 9,
79 shift_control : 8;
80 #endif
81 };
82
83 struct ins_format3 {
84 #if BYTE_ORDER == LITTLE_ENDIAN
85 uint32_t immediate : 8,
86 source : 9,
87 address : 10,
88 opcode : 4,
89 parity : 1;
90 #else
91 uint32_t parity : 1,
92 opcode : 4,
93 address : 10,
94 source : 9,
95 immediate : 8;
96 #endif
97 };
98
99 union ins_formats {
100 struct ins_format1 format1;
101 struct ins_format2 format2;
102 struct ins_format3 format3;
103 uint8_t bytes[4];
104 uint32_t integer;
105 };
106 struct instruction {
107 union ins_formats format;
108 u_int srcline;
109 struct symbol *patch_label;
110 STAILQ_ENTRY(instruction) links;
111 };
112
113 #define AIC_OP_OR 0x0
114 #define AIC_OP_AND 0x1
115 #define AIC_OP_XOR 0x2
116 #define AIC_OP_ADD 0x3
117 #define AIC_OP_ADC 0x4
118 #define AIC_OP_ROL 0x5
119 #define AIC_OP_BMOV 0x6
120
121 #define AIC_OP_JMP 0x8
122 #define AIC_OP_JC 0x9
123 #define AIC_OP_JNC 0xa
124 #define AIC_OP_CALL 0xb
125 #define AIC_OP_JNE 0xc
126 #define AIC_OP_JNZ 0xd
127 #define AIC_OP_JE 0xe
128 #define AIC_OP_JZ 0xf
129
130 /* Pseudo Ops */
131 #define AIC_OP_SHL 0x10
132 #define AIC_OP_SHR 0x20
133 #define AIC_OP_ROR 0x30
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