1 /*-
2 * Copyright (c) 2015,2016 Annapurna Labs Ltd. and affiliates
3 * All rights reserved.
4 *
5 * Developed by Semihalf.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * $FreeBSD$
29 */
30
31 #ifndef __AL_ETH_H__
32 #define __AL_ETH_H__
33
34 #include "al_init_eth_lm.h"
35 #include "al_hal_eth.h"
36 #include "al_hal_udma_iofic.h"
37 #include "al_hal_udma_debug.h"
38 #include "al_serdes.h"
39
40 enum board_t {
41 ALPINE_INTEGRATED = 0,
42 ALPINE_NIC = 1,
43 ALPINE_FPGA_NIC = 2,
44 };
45
46 #define AL_ETH_MAX_HW_QUEUES 4
47 #define AL_ETH_NUM_QUEUES 4
48 #define AL_ETH_MAX_MSIX_VEC (1 + 2 * AL_ETH_MAX_HW_QUEUES)
49
50 #define AL_ETH_DEFAULT_TX_SW_DESCS (512)
51 #define AL_ETH_DEFAULT_TX_HW_DESCS (512)
52 #define AL_ETH_DEFAULT_RX_DESCS (512)
53
54 #if ((AL_ETH_DEFAULT_TX_SW_DESCS / 4) < (AL_ETH_PKT_MAX_BUFS + 2))
55 #define AL_ETH_TX_WAKEUP_THRESH (AL_ETH_DEFAULT_TX_SW_DESCS / 4)
56 #else
57 #define AL_ETH_TX_WAKEUP_THRESH (AL_ETH_PKT_MAX_BUFS + 2)
58 #endif
59
60 #define NET_IP_ALIGN 2
61 #define AL_ETH_DEFAULT_SMALL_PACKET_LEN (128 - NET_IP_ALIGN)
62 #define AL_ETH_HEADER_COPY_SIZE (128 - NET_IP_ALIGN)
63
64 #define AL_ETH_DEFAULT_MAX_RX_BUFF_ALLOC_SIZE 9216
65 /*
66 * Minimum the buffer size to 600 to avoid situation the mtu will be changed
67 * from too little buffer to very big one and then the number of buffer per
68 * packet could reach the maximum AL_ETH_PKT_MAX_BUFS
69 */
70 #define AL_ETH_DEFAULT_MIN_RX_BUFF_ALLOC_SIZE 600
71 #define AL_ETH_DEFAULT_FORCE_1000_BASEX FALSE
72
73 #define AL_ETH_DEFAULT_LINK_POLL_INTERVAL 100
74 #define AL_ETH_FIRST_LINK_POLL_INTERVAL 1
75
76 #define AL_ETH_NAME_MAX_LEN 20
77 #define AL_ETH_IRQNAME_SIZE 40
78
79 #define AL_ETH_DEFAULT_MDIO_FREQ_KHZ 2500
80 #define AL_ETH_MDIO_FREQ_1000_KHZ 1000
81
82 struct al_eth_irq {
83 driver_filter_t *handler;
84 void *data;
85 unsigned int vector;
86 uint8_t requested;
87 char name[AL_ETH_IRQNAME_SIZE];
88 struct resource *res;
89 void *cookie;
90 };
91
92 struct al_eth_tx_buffer {
93 struct mbuf *m;
94 struct al_eth_pkt hal_pkt;
95 bus_dmamap_t dma_map;
96 unsigned int tx_descs;
97 };
98
99 struct al_eth_rx_buffer {
100 struct mbuf *m;
101 unsigned int data_size;
102 bus_dmamap_t dma_map;
103 struct al_buf al_buf;
104 };
105
106 struct al_eth_ring {
107 device_t dev;
108 struct al_eth_adapter *adapter;
109 /* Used to get rx packets from hal */
110 struct al_eth_pkt hal_pkt;
111 /* Udma queue handler */
112 struct al_udma_q *dma_q;
113 uint32_t ring_id;
114 uint16_t next_to_use;
115 uint16_t next_to_clean;
116 /* The offset of the interrupt unmask register */
117 uint32_t *unmask_reg_offset;
118 /*
119 * The value to write to the above register to
120 * unmask the interrupt of this ring
121 */
122 uint32_t unmask_val;
123 struct al_eth_meta_data hal_meta;
124 /* Contex of tx packet */
125 struct al_eth_tx_buffer *tx_buffer_info;
126 /* Contex of rx packet */
127 struct al_eth_rx_buffer *rx_buffer_info;
128 /* Number of tx/rx_buffer_info's entries */
129 int sw_count;
130 /* Number of hw descriptors */
131 int hw_count;
132 /* Size (in bytes) of hw descriptors */
133 size_t descs_size;
134 /* Size (in bytes) of hw completion descriptors, used for rx */
135 size_t cdescs_size;
136 struct ifnet *netdev;
137 struct al_udma_q_params q_params;
138 struct buf_ring *br;
139 struct mtx br_mtx;
140 struct task enqueue_task;
141 struct taskqueue *enqueue_tq;
142 volatile uint32_t enqueue_is_running;
143 struct task cmpl_task;
144 struct taskqueue *cmpl_tq;
145 volatile uint32_t cmpl_is_running;
146 uint32_t lro_enabled;
147 struct lro_ctrl lro;
148 bus_dma_tag_t dma_buf_tag;
149 volatile uint32_t stall;
150 };
151
152 #define AL_ETH_TX_RING_IDX_NEXT(tx_ring, idx) (((idx) + 1) & (AL_ETH_DEFAULT_TX_SW_DESCS - 1))
153
154 #define AL_ETH_RX_RING_IDX_NEXT(rx_ring, idx) (((idx) + 1) & (AL_ETH_DEFAULT_RX_DESCS - 1))
155 #define AL_ETH_RX_RING_IDX_ADD(rx_ring, idx, n) (((idx) + (n)) & (AL_ETH_DEFAULT_RX_DESCS - 1))
156
157 /* flow control configuration */
158 #define AL_ETH_FLOW_CTRL_RX_FIFO_TH_HIGH 0x160
159 #define AL_ETH_FLOW_CTRL_RX_FIFO_TH_LOW 0x90
160 #define AL_ETH_FLOW_CTRL_QUANTA 0xffff
161 #define AL_ETH_FLOW_CTRL_QUANTA_TH 0x8000
162
163 #define AL_ETH_FLOW_CTRL_AUTONEG 1
164 #define AL_ETH_FLOW_CTRL_RX_PAUSE 2
165 #define AL_ETH_FLOW_CTRL_TX_PAUSE 4
166
167 /* link configuration for 1G port */
168 struct al_eth_link_config {
169 int old_link;
170 /* Describes what we actually have. */
171 int active_duplex;
172 int active_speed;
173
174 /* current flow control status */
175 uint8_t flow_ctrl_active;
176 /* supported configuration (can be changed from ethtool) */
177 uint8_t flow_ctrl_supported;
178
179 /* the following are not relevant to RGMII */
180 boolean_t force_1000_base_x;
181 boolean_t autoneg;
182 };
183
184 /* SFP detection event */
185 enum al_eth_sfp_detect_evt {
186 /* No change (no connect, disconnect, or new SFP module */
187 AL_ETH_SFP_DETECT_EVT_NO_CHANGE,
188 /* SFP module connected */
189 AL_ETH_SFP_DETECT_EVT_CONNECTED,
190 /* SFP module disconnected */
191 AL_ETH_SFP_DETECT_EVT_DISCONNECTED,
192 /* SFP module replaced */
193 AL_ETH_SFP_DETECT_EVT_CHANGED,
194 };
195
196 /* SFP detection status */
197 struct al_eth_sfp_detect_stat {
198 /* Status is valid (i.e. rest of fields are valid) */
199 boolean_t valid;
200 boolean_t connected;
201 uint8_t sfp_10g;
202 uint8_t sfp_1g;
203 uint8_t sfp_cable_tech;
204 boolean_t lt_en;
205 boolean_t an_en;
206 enum al_eth_mac_mode mac_mode;
207 };
208
209 struct al_eth_retimer_params {
210 boolean_t exist;
211 uint8_t bus_id;
212 uint8_t i2c_addr;
213 enum al_eth_retimer_channel channel;
214 };
215
216 struct msix_entry {
217 int entry;
218 int vector;
219 };
220
221 /* board specific private data structure */
222 struct al_eth_adapter {
223 enum board_t board_type;
224 device_t miibus;
225 struct mii_data *mii;
226 uint16_t dev_id;
227 uint8_t rev_id;
228
229 device_t dev;
230 struct ifnet *netdev;
231 struct ifmedia media;
232 struct resource *udma_res;
233 struct resource *mac_res;
234 struct resource *ec_res;
235 int if_flags;
236 struct callout wd_callout;
237 struct mtx wd_mtx;
238 struct callout stats_callout;
239 struct mtx stats_mtx;
240
241 /* this is for intx mode */
242 void *irq_cookie;
243 struct resource *irq_res;
244
245 /*
246 * Some features need tri-state capability,
247 * thus the additional *_CAPABLE flags.
248 */
249 uint32_t flags;
250 #define AL_ETH_FLAG_MSIX_CAPABLE (uint32_t)(1 << 1)
251 #define AL_ETH_FLAG_MSIX_ENABLED (uint32_t)(1 << 2)
252 #define AL_ETH_FLAG_IN_NETPOLL (uint32_t)(1 << 3)
253 #define AL_ETH_FLAG_MQ_CAPABLE (uint32_t)(1 << 4)
254 #define AL_ETH_FLAG_SRIOV_CAPABLE (uint32_t)(1 << 5)
255 #define AL_ETH_FLAG_SRIOV_ENABLED (uint32_t)(1 << 6)
256 #define AL_ETH_FLAG_RESET_REQUESTED (uint32_t)(1 << 7)
257
258 struct al_hal_eth_adapter hal_adapter;
259
260 /*
261 * Rx packets that shorter that this len will be copied to the mbuf
262 */
263 unsigned int small_copy_len;
264
265 /* Maximum size for rx buffer */
266 unsigned int max_rx_buff_alloc_size;
267 uint32_t rx_mbuf_sz;
268
269 /* Tx fast path data */
270 int num_tx_queues;
271
272 /* Rx fast path data */
273 int num_rx_queues;
274
275 /* TX */
276 struct al_eth_ring tx_ring[AL_ETH_NUM_QUEUES];
277
278 /* RX */
279 struct al_eth_ring rx_ring[AL_ETH_NUM_QUEUES];
280
281 enum al_iofic_mode int_mode;
282
283 #define AL_ETH_MGMT_IRQ_IDX 0
284 #define AL_ETH_RXQ_IRQ_IDX(adapter, q) (1 + (q))
285 #define AL_ETH_TXQ_IRQ_IDX(adapter, q) (1 + (adapter)->num_rx_queues + (q))
286 struct al_eth_irq irq_tbl[AL_ETH_MAX_MSIX_VEC];
287 struct msix_entry *msix_entries;
288 int msix_vecs;
289 int irq_vecs;
290
291 unsigned int tx_usecs, rx_usecs; /* interrupt coalescing */
292
293 unsigned int tx_ring_count;
294 unsigned int tx_descs_count;
295 unsigned int rx_ring_count;
296 unsigned int rx_descs_count;
297
298 /* RSS */
299 uint32_t toeplitz_hash_key[AL_ETH_RX_HASH_KEY_NUM];
300 #define AL_ETH_RX_RSS_TABLE_SIZE AL_ETH_RX_THASH_TABLE_SIZE
301 uint8_t rss_ind_tbl[AL_ETH_RX_RSS_TABLE_SIZE];
302
303 uint32_t msg_enable;
304 struct al_eth_mac_stats mac_stats;
305
306 enum al_eth_mac_mode mac_mode;
307 boolean_t mac_mode_set; /* Relevant only when 'auto_speed' is set */
308 uint8_t mac_addr[ETHER_ADDR_LEN];
309 /* mdio and phy*/
310 boolean_t phy_exist;
311 struct mii_bus *mdio_bus;
312 struct phy_device *phydev;
313 uint8_t phy_addr;
314 struct al_eth_link_config link_config;
315
316 /* HAL layer data */
317 int id_number;
318 char name[AL_ETH_NAME_MAX_LEN];
319 void *internal_pcie_base; /* use for ALPINE_NIC devices */
320 void *udma_base;
321 void *ec_base;
322 void *mac_base;
323
324 struct al_eth_flow_control_params flow_ctrl_params;
325
326 struct al_eth_adapter_params eth_hal_params;
327
328 struct task link_status_task;
329 uint32_t link_poll_interval; /* task interval in mSec */
330
331 boolean_t serdes_init;
332 struct al_serdes_grp_obj serdes_obj;
333 uint8_t serdes_grp;
334 uint8_t serdes_lane;
335
336 boolean_t an_en; /* run kr auto-negotiation */
337 boolean_t lt_en; /* run kr link-training */
338
339 boolean_t sfp_detection_needed; /* true if need to run sfp detection */
340 boolean_t auto_speed; /* true if allowed to change SerDes speed configuration */
341 uint8_t i2c_adapter_id; /* identifier for the i2c adapter to use to access SFP+ module */
342 enum al_eth_ref_clk_freq ref_clk_freq; /* reference clock frequency */
343 unsigned int mdio_freq; /* MDIO frequency [Khz] */
344
345 boolean_t up;
346
347 boolean_t last_link;
348 boolean_t last_establish_failed;
349 struct al_eth_lm_context lm_context;
350 boolean_t use_lm;
351
352 boolean_t dont_override_serdes; /* avoid overriding serdes parameters
353 to preset static values */
354 struct mtx serdes_config_lock;
355 struct mtx if_rx_lock;
356
357 uint32_t wol;
358
359 struct al_eth_retimer_params retimer;
360
361 bool phy_fixup_needed;
362
363 enum al_eth_lm_max_speed max_speed;
364 };
365
366 #endif /* !(AL_ETH_H) */
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