Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/dev/alc/if_alcvar.h
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1 /*- 2 * Copyright (c) 2009, Pyun YongHyeon <yongari@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice unmodified, this list of conditions, and the following 10 * disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $FreeBSD: releng/8.4/sys/dev/alc/if_alcvar.h 218868 2011-02-20 01:08:49Z yongari $ 28 */ 29 30 #ifndef _IF_ALCVAR_H 31 #define _IF_ALCVAR_H 32 33 #define ALC_TX_RING_CNT 256 34 #define ALC_TX_RING_ALIGN sizeof(struct tx_desc) 35 #define ALC_RX_RING_CNT 256 36 #define ALC_RX_RING_ALIGN sizeof(struct rx_desc) 37 #define ALC_RX_BUF_ALIGN 4 38 #define ALC_RR_RING_CNT ALC_RX_RING_CNT 39 #define ALC_RR_RING_ALIGN sizeof(struct rx_rdesc) 40 #define ALC_CMB_ALIGN 8 41 #define ALC_SMB_ALIGN 8 42 43 #define ALC_TSO_MAXSEGSIZE 4096 44 #define ALC_TSO_MAXSIZE (65535 + sizeof(struct ether_vlan_header)) 45 #define ALC_MAXTXSEGS 32 46 47 #define ALC_ADDR_LO(x) ((uint64_t) (x) & 0xFFFFFFFF) 48 #define ALC_ADDR_HI(x) ((uint64_t) (x) >> 32) 49 50 #define ALC_DESC_INC(x, y) ((x) = ((x) + 1) % (y)) 51 52 /* Water mark to kick reclaiming Tx buffers. */ 53 #define ALC_TX_DESC_HIWAT ((ALC_TX_RING_CNT * 6) / 10) 54 55 #define ALC_MSI_MESSAGES 1 56 #define ALC_MSIX_MESSAGES 1 57 58 #define ALC_TX_RING_SZ \ 59 (sizeof(struct tx_desc) * ALC_TX_RING_CNT) 60 #define ALC_RX_RING_SZ \ 61 (sizeof(struct rx_desc) * ALC_RX_RING_CNT) 62 #define ALC_RR_RING_SZ \ 63 (sizeof(struct rx_rdesc) * ALC_RR_RING_CNT) 64 #define ALC_CMB_SZ (sizeof(struct cmb)) 65 #define ALC_SMB_SZ (sizeof(struct smb)) 66 67 #define ALC_PROC_MIN 16 68 #define ALC_PROC_MAX (ALC_RX_RING_CNT - 1) 69 #define ALC_PROC_DEFAULT (ALC_RX_RING_CNT / 4) 70 71 /* 72 * The number of bits reserved for MSS in AR813x/AR815x controllers 73 * are 13 bits. This limits the maximum interface MTU size in TSO 74 * case(8191 + sizeof(struct ip) + sizeof(struct tcphdr)) as upper 75 * stack should not generate TCP segments with MSS greater than the 76 * limit. Also Atheros says that maximum MTU for TSO is 6KB. 77 */ 78 #define ALC_TSO_MTU (6 * 1024) 79 80 struct alc_rxdesc { 81 struct mbuf *rx_m; 82 bus_dmamap_t rx_dmamap; 83 struct rx_desc *rx_desc; 84 }; 85 86 struct alc_txdesc { 87 struct mbuf *tx_m; 88 bus_dmamap_t tx_dmamap; 89 }; 90 91 struct alc_ring_data { 92 struct tx_desc *alc_tx_ring; 93 bus_addr_t alc_tx_ring_paddr; 94 struct rx_desc *alc_rx_ring; 95 bus_addr_t alc_rx_ring_paddr; 96 struct rx_rdesc *alc_rr_ring; 97 bus_addr_t alc_rr_ring_paddr; 98 struct cmb *alc_cmb; 99 bus_addr_t alc_cmb_paddr; 100 struct smb *alc_smb; 101 bus_addr_t alc_smb_paddr; 102 }; 103 104 struct alc_chain_data { 105 bus_dma_tag_t alc_parent_tag; 106 bus_dma_tag_t alc_buffer_tag; 107 bus_dma_tag_t alc_tx_tag; 108 struct alc_txdesc alc_txdesc[ALC_TX_RING_CNT]; 109 bus_dma_tag_t alc_rx_tag; 110 struct alc_rxdesc alc_rxdesc[ALC_RX_RING_CNT]; 111 bus_dma_tag_t alc_tx_ring_tag; 112 bus_dmamap_t alc_tx_ring_map; 113 bus_dma_tag_t alc_rx_ring_tag; 114 bus_dmamap_t alc_rx_ring_map; 115 bus_dma_tag_t alc_rr_ring_tag; 116 bus_dmamap_t alc_rr_ring_map; 117 bus_dmamap_t alc_rx_sparemap; 118 bus_dma_tag_t alc_cmb_tag; 119 bus_dmamap_t alc_cmb_map; 120 bus_dma_tag_t alc_smb_tag; 121 bus_dmamap_t alc_smb_map; 122 123 int alc_tx_prod; 124 int alc_tx_cons; 125 int alc_tx_cnt; 126 int alc_rx_cons; 127 int alc_rr_cons; 128 int alc_rxlen; 129 130 struct mbuf *alc_rxhead; 131 struct mbuf *alc_rxtail; 132 struct mbuf *alc_rxprev_tail; 133 }; 134 135 struct alc_hw_stats { 136 /* Rx stats. */ 137 uint32_t rx_frames; 138 uint32_t rx_bcast_frames; 139 uint32_t rx_mcast_frames; 140 uint32_t rx_pause_frames; 141 uint32_t rx_control_frames; 142 uint32_t rx_crcerrs; 143 uint32_t rx_lenerrs; 144 uint64_t rx_bytes; 145 uint32_t rx_runts; 146 uint32_t rx_fragments; 147 uint32_t rx_pkts_64; 148 uint32_t rx_pkts_65_127; 149 uint32_t rx_pkts_128_255; 150 uint32_t rx_pkts_256_511; 151 uint32_t rx_pkts_512_1023; 152 uint32_t rx_pkts_1024_1518; 153 uint32_t rx_pkts_1519_max; 154 uint32_t rx_pkts_truncated; 155 uint32_t rx_fifo_oflows; 156 uint32_t rx_rrs_errs; 157 uint32_t rx_alignerrs; 158 uint64_t rx_bcast_bytes; 159 uint64_t rx_mcast_bytes; 160 uint32_t rx_pkts_filtered; 161 /* Tx stats. */ 162 uint32_t tx_frames; 163 uint32_t tx_bcast_frames; 164 uint32_t tx_mcast_frames; 165 uint32_t tx_pause_frames; 166 uint32_t tx_excess_defer; 167 uint32_t tx_control_frames; 168 uint32_t tx_deferred; 169 uint64_t tx_bytes; 170 uint32_t tx_pkts_64; 171 uint32_t tx_pkts_65_127; 172 uint32_t tx_pkts_128_255; 173 uint32_t tx_pkts_256_511; 174 uint32_t tx_pkts_512_1023; 175 uint32_t tx_pkts_1024_1518; 176 uint32_t tx_pkts_1519_max; 177 uint32_t tx_single_colls; 178 uint32_t tx_multi_colls; 179 uint32_t tx_late_colls; 180 uint32_t tx_excess_colls; 181 uint32_t tx_abort; 182 uint32_t tx_underrun; 183 uint32_t tx_desc_underrun; 184 uint32_t tx_lenerrs; 185 uint32_t tx_pkts_truncated; 186 uint64_t tx_bcast_bytes; 187 uint64_t tx_mcast_bytes; 188 }; 189 190 struct alc_ident { 191 uint16_t vendorid; 192 uint16_t deviceid; 193 uint32_t max_framelen; 194 const char *name; 195 }; 196 197 /* 198 * Software state per device. 199 */ 200 struct alc_softc { 201 struct ifnet *alc_ifp; 202 device_t alc_dev; 203 device_t alc_miibus; 204 struct resource *alc_res[1]; 205 struct resource_spec *alc_res_spec; 206 struct resource *alc_irq[ALC_MSI_MESSAGES]; 207 struct resource_spec *alc_irq_spec; 208 void *alc_intrhand[ALC_MSI_MESSAGES]; 209 struct alc_ident *alc_ident; 210 int alc_rev; 211 int alc_chip_rev; 212 int alc_phyaddr; 213 uint8_t alc_eaddr[ETHER_ADDR_LEN]; 214 uint32_t alc_dma_rd_burst; 215 uint32_t alc_dma_wr_burst; 216 uint32_t alc_rcb; 217 int alc_expcap; 218 int alc_pmcap; 219 int alc_flags; 220 #define ALC_FLAG_PCIE 0x0001 221 #define ALC_FLAG_PCIX 0x0002 222 #define ALC_FLAG_MSI 0x0004 223 #define ALC_FLAG_MSIX 0x0008 224 #define ALC_FLAG_PM 0x0010 225 #define ALC_FLAG_FASTETHER 0x0020 226 #define ALC_FLAG_JUMBO 0x0040 227 #define ALC_FLAG_ASPM_MON 0x0080 228 #define ALC_FLAG_CMB_BUG 0x0100 229 #define ALC_FLAG_SMB_BUG 0x0200 230 #define ALC_FLAG_L0S 0x0400 231 #define ALC_FLAG_L1S 0x0800 232 #define ALC_FLAG_APS 0x1000 233 #define ALC_FLAG_LINK 0x8000 234 235 struct callout alc_tick_ch; 236 struct alc_hw_stats alc_stats; 237 struct alc_chain_data alc_cdata; 238 struct alc_ring_data alc_rdata; 239 int alc_if_flags; 240 int alc_watchdog_timer; 241 int alc_process_limit; 242 volatile int alc_morework; 243 int alc_int_rx_mod; 244 int alc_int_tx_mod; 245 int alc_buf_size; 246 247 struct task alc_int_task; 248 struct taskqueue *alc_tq; 249 struct mtx alc_mtx; 250 }; 251 252 /* Register access macros. */ 253 #define CSR_WRITE_4(_sc, reg, val) \ 254 bus_write_4((_sc)->alc_res[0], (reg), (val)) 255 #define CSR_WRITE_2(_sc, reg, val) \ 256 bus_write_2((_sc)->alc_res[0], (reg), (val)) 257 #define CSR_WRITE_1(_sc, reg, val) \ 258 bus_write_1((_sc)->alc_res[0], (reg), (val)) 259 #define CSR_READ_2(_sc, reg) \ 260 bus_read_2((_sc)->alc_res[0], (reg)) 261 #define CSR_READ_4(_sc, reg) \ 262 bus_read_4((_sc)->alc_res[0], (reg)) 263 264 #define ALC_RXCHAIN_RESET(_sc) \ 265 do { \ 266 (_sc)->alc_cdata.alc_rxhead = NULL; \ 267 (_sc)->alc_cdata.alc_rxtail = NULL; \ 268 (_sc)->alc_cdata.alc_rxprev_tail = NULL; \ 269 (_sc)->alc_cdata.alc_rxlen = 0; \ 270 } while (0) 271 272 #define ALC_LOCK(_sc) mtx_lock(&(_sc)->alc_mtx) 273 #define ALC_UNLOCK(_sc) mtx_unlock(&(_sc)->alc_mtx) 274 #define ALC_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->alc_mtx, MA_OWNED) 275 276 #define ALC_TX_TIMEOUT 5 277 #define ALC_RESET_TIMEOUT 100 278 #define ALC_TIMEOUT 1000 279 #define ALC_PHY_TIMEOUT 1000 280 281 #endif /* _IF_ALCVAR_H */
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