The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/amd_ecc_inject/ecc_inject.c

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    1 /*-
    2  * Copyright (c) 2017 Andriy Gapon
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  *
   14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   24  * SUCH DAMAGE.
   25  *
   26  * $FreeBSD$
   27  */
   28 
   29 #include <sys/param.h>
   30 #include <sys/systm.h>
   31 #include <sys/bus.h>
   32 #include <sys/kernel.h>
   33 #include <sys/conf.h>
   34 #include <sys/malloc.h>
   35 #include <sys/module.h>
   36 #include <sys/sysctl.h>
   37 #include <sys/types.h>
   38 
   39 #include <dev/pci/pcivar.h>
   40 
   41 #include <vm/vm.h>
   42 #include <vm/vm_extern.h>
   43 #include <vm/vm_kern.h>
   44 
   45 #include <machine/cputypes.h>
   46 #include <machine/md_var.h>
   47 
   48 /*
   49  * See BKDG for AMD Family 15h Models 00h-0Fh Processors
   50  * (publication 42301 Rev 3.08 - March 12, 2012):
   51  * - 2.13.3.1 DRAM Error Injection
   52  * - D18F3xB8 NB Array Address
   53  * - D18F3xBC NB Array Data Port
   54  * - D18F3xBC_x8 DRAM ECC
   55  */
   56 #define NB_MCA_CFG              0x44
   57 #define         DRAM_ECC_EN     (1 << 22)
   58 #define NB_MCA_EXTCFG           0x180
   59 #define         ECC_SYMB_SZ     (1 << 25)
   60 #define NB_ARRAY_ADDR           0xb8
   61 #define         DRAM_ECC_SEL    (0x8 << 28)
   62 #define         QUADRANT_SHIFT  1
   63 #define         QUADRANT_MASK   0x3
   64 #define NB_ARRAY_PORT           0xbc
   65 #define         INJ_WORD_SHIFT  20
   66 #define         INJ_WORD_MASK   0x1ff
   67 #define         DRAM_ERR_EN     (1 << 18)
   68 #define         DRAM_WR_REQ     (1 << 17)
   69 #define         DRAM_RD_REQ     (1 << 16)
   70 #define         INJ_VECTOR_MASK 0xffff
   71 
   72 static void ecc_ei_inject(int);
   73 
   74 static device_t nbdev;
   75 static int delay_ms = 0;
   76 static int quadrant = 0;        /* 0 - 3 */
   77 static int word_mask = 0x001;   /* 9 bits: 8 + 1 for ECC */
   78 static int bit_mask = 0x0001;   /* 16 bits */
   79 
   80 static int
   81 sysctl_int_with_max(SYSCTL_HANDLER_ARGS)
   82 {
   83         u_int value;
   84         int error;
   85 
   86         value = *(u_int *)arg1;
   87         error = sysctl_handle_int(oidp, &value, 0, req);
   88         if (error || req->newptr == NULL)
   89                 return (error);
   90         if (value > arg2)
   91                 return (EINVAL);
   92         *(u_int *)arg1 = value;
   93         return (0);
   94 }
   95 
   96 static int
   97 sysctl_nonzero_int_with_max(SYSCTL_HANDLER_ARGS)
   98 {
   99         u_int value;
  100         int error;
  101 
  102         value = *(u_int *)arg1;
  103         error = sysctl_int_with_max(oidp, &value, arg2, req);
  104         if (error || req->newptr == NULL)
  105                 return (error);
  106         if (value == 0)
  107                 return (EINVAL);
  108         *(u_int *)arg1 = value;
  109         return (0);
  110 }
  111 
  112 static int
  113 sysctl_proc_inject(SYSCTL_HANDLER_ARGS)
  114 {
  115         int error;
  116         int i;
  117 
  118         i = 0;
  119         error = sysctl_handle_int(oidp, &i, 0, req);
  120         if (error)
  121                 return (error);
  122         if (i != 0)
  123                 ecc_ei_inject(i);
  124         return (0);
  125 }
  126 
  127 static SYSCTL_NODE(_hw, OID_AUTO, error_injection,
  128     CTLFLAG_RD | CTLFLAG_MPSAFE, NULL,
  129     "Hardware error injection");
  130 static SYSCTL_NODE(_hw_error_injection, OID_AUTO, dram_ecc,
  131     CTLFLAG_RD | CTLFLAG_MPSAFE, NULL,
  132     "DRAM ECC error injection");
  133 SYSCTL_UINT(_hw_error_injection_dram_ecc, OID_AUTO, delay,
  134     CTLTYPE_UINT | CTLFLAG_RW, &delay_ms, 0,
  135     "Delay in milliseconds between error injections");
  136 SYSCTL_PROC(_hw_error_injection_dram_ecc, OID_AUTO, quadrant,
  137     CTLTYPE_UINT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, &quadrant, QUADRANT_MASK,
  138     sysctl_int_with_max, "IU",
  139     "Index of 16-byte quadrant within 64-byte line where errors "
  140     "should be injected");
  141 SYSCTL_PROC(_hw_error_injection_dram_ecc, OID_AUTO, word_mask,
  142     CTLTYPE_UINT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, &word_mask, INJ_WORD_MASK,
  143     sysctl_nonzero_int_with_max, "IU",
  144     "9-bit mask of words where errors should be injected (8 data + 1 ECC)");
  145 SYSCTL_PROC(_hw_error_injection_dram_ecc, OID_AUTO, bit_mask,
  146     CTLTYPE_UINT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, &bit_mask, INJ_VECTOR_MASK,
  147     sysctl_nonzero_int_with_max, "IU",
  148     "16-bit mask of bits within each selected word where errors "
  149     "should be injected");
  150 SYSCTL_PROC(_hw_error_injection_dram_ecc, OID_AUTO, inject,
  151     CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, NULL, 0, sysctl_proc_inject, "I",
  152     "Inject a number of errors according to configured parameters");
  153 
  154 static void
  155 ecc_ei_inject_one(void *arg, size_t size)
  156 {
  157         volatile uint64_t *memory = arg;
  158         uint32_t val;
  159         int i;
  160 
  161         val = DRAM_ECC_SEL | (quadrant << QUADRANT_SHIFT);
  162         pci_write_config(nbdev, NB_ARRAY_ADDR, val, 4);
  163 
  164         val = (word_mask << INJ_WORD_SHIFT) | DRAM_WR_REQ | bit_mask;
  165         pci_write_config(nbdev, NB_ARRAY_PORT, val, 4);
  166 
  167         for (i = 0; i < size / sizeof(uint64_t); i++) {
  168                 memory[i] = 0;
  169                 val = pci_read_config(nbdev, NB_ARRAY_PORT, 4);
  170                 if ((val & DRAM_WR_REQ) == 0)
  171                         break;
  172         }
  173         for (i = 0; i < size / sizeof(uint64_t); i++)
  174                 memory[0] = memory[i];
  175 }
  176 
  177 static void
  178 ecc_ei_inject(int count)
  179 {
  180         void *memory;
  181         int injected;
  182 
  183         KASSERT((quadrant & ~QUADRANT_MASK) == 0,
  184             ("quadrant value is outside of range: %u", quadrant));
  185         KASSERT(word_mask != 0 && (word_mask & ~INJ_WORD_MASK) == 0,
  186             ("word mask value is outside of range: 0x%x", word_mask));
  187         KASSERT(bit_mask != 0 && (bit_mask & ~INJ_VECTOR_MASK) == 0,
  188             ("bit mask value is outside of range: 0x%x", bit_mask));
  189 
  190         memory = kmem_alloc_attr(PAGE_SIZE, M_WAITOK, 0, ~0,
  191             VM_MEMATTR_UNCACHEABLE);
  192 
  193         for (injected = 0; injected < count; injected++) {
  194                 ecc_ei_inject_one(memory, PAGE_SIZE);
  195                 if (delay_ms != 0 && injected != count - 1)
  196                         pause_sbt("ecc_ei_inject", delay_ms * SBT_1MS, 0, 0);
  197         }
  198 
  199         kmem_free(memory, PAGE_SIZE);
  200 }
  201 
  202 static int
  203 ecc_ei_load(void)
  204 {
  205         uint32_t val;
  206 
  207         if ((cpu_vendor_id != CPU_VENDOR_AMD || CPUID_TO_FAMILY(cpu_id) < 0x10) &&
  208             cpu_vendor_id != CPU_VENDOR_HYGON) {
  209                 printf("DRAM ECC error injection is not supported\n");
  210                 return (ENXIO);
  211         }
  212         nbdev = pci_find_bsf(0, 24, 3);
  213         if (nbdev == NULL) {
  214                 printf("Couldn't find NB PCI device\n");
  215                 return (ENXIO);
  216         }
  217         val = pci_read_config(nbdev, NB_MCA_CFG, 4);
  218         if ((val & DRAM_ECC_EN) == 0) {
  219                 printf("DRAM ECC is not supported or disabled\n");
  220                 return (ENXIO);
  221         }
  222         printf("DRAM ECC error injection support loaded\n");
  223         return (0);
  224 }
  225 
  226 static int
  227 tsc_modevent(module_t mod __unused, int type, void *data __unused)
  228 {
  229         int error;
  230 
  231         error = 0;
  232         switch (type) {
  233         case MOD_LOAD:
  234                 error = ecc_ei_load();
  235                 break;
  236         case MOD_UNLOAD:
  237         case MOD_SHUTDOWN:
  238                 break;
  239         default:
  240                 error = EOPNOTSUPP;
  241         }
  242         return (error);
  243 }
  244 
  245 DEV_MODULE(tsc, tsc_modevent, NULL);

Cache object: d18cc83a3019b64750d371bb2103b389


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