Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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sys/dev/an/if_an.c
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1 /*- 2 * SPDX-License-Identifier: BSD-4-Clause 3 * 4 * Copyright (c) 1997, 1998, 1999 5 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Bill Paul. 18 * 4. Neither the name of the author nor the names of any co-contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 32 * THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 /* 35 * Aironet 4500/4800 802.11 PCMCIA/ISA/PCI driver for FreeBSD. 36 * 37 * Written by Bill Paul <wpaul@ctr.columbia.edu> 38 * Electrical Engineering Department 39 * Columbia University, New York City 40 */ 41 42 #include <sys/cdefs.h> 43 __FBSDID("$FreeBSD: releng/12.0/sys/dev/an/if_an.c 331797 2018-03-30 18:50:13Z brooks $"); 44 45 /* 46 * The Aironet 4500/4800 series cards come in PCMCIA, ISA and PCI form. 47 * This driver supports all three device types (PCI devices are supported 48 * through an extra PCI shim: /sys/dev/an/if_an_pci.c). ISA devices can be 49 * supported either using hard-coded IO port/IRQ settings or via Plug 50 * and Play. The 4500 series devices support 1Mbps and 2Mbps data rates. 51 * The 4800 devices support 1, 2, 5.5 and 11Mbps rates. 52 * 53 * Like the WaveLAN/IEEE cards, the Aironet NICs are all essentially 54 * PCMCIA devices. The ISA and PCI cards are a combination of a PCMCIA 55 * device and a PCMCIA to ISA or PCMCIA to PCI adapter card. There are 56 * a couple of important differences though: 57 * 58 * - Lucent ISA card looks to the host like a PCMCIA controller with 59 * a PCMCIA WaveLAN card inserted. This means that even desktop 60 * machines need to be configured with PCMCIA support in order to 61 * use WaveLAN/IEEE ISA cards. The Aironet cards on the other hand 62 * actually look like normal ISA and PCI devices to the host, so 63 * no PCMCIA controller support is needed 64 * 65 * The latter point results in a small gotcha. The Aironet PCMCIA 66 * cards can be configured for one of two operating modes depending 67 * on how the Vpp1 and Vpp2 programming voltages are set when the 68 * card is activated. In order to put the card in proper PCMCIA 69 * operation (where the CIS table is visible and the interface is 70 * programmed for PCMCIA operation), both Vpp1 and Vpp2 have to be 71 * set to 5 volts. FreeBSD by default doesn't set the Vpp voltages, 72 * which leaves the card in ISA/PCI mode, which prevents it from 73 * being activated as an PCMCIA device. 74 * 75 * Note that some PCMCIA controller software packages for Windows NT 76 * fail to set the voltages as well. 77 * 78 * The Aironet devices can operate in both station mode and access point 79 * mode. Typically, when programmed for station mode, the card can be set 80 * to automatically perform encapsulation/decapsulation of Ethernet II 81 * and 802.3 frames within 802.11 frames so that the host doesn't have 82 * to do it itself. This driver doesn't program the card that way: the 83 * driver handles all of the encapsulation/decapsulation itself. 84 */ 85 86 #include "opt_inet.h" 87 88 #ifdef INET 89 #define ANCACHE /* enable signal strength cache */ 90 #endif 91 92 #include <sys/param.h> 93 #include <sys/ctype.h> 94 #include <sys/systm.h> 95 #include <sys/sockio.h> 96 #include <sys/mbuf.h> 97 #include <sys/priv.h> 98 #include <sys/proc.h> 99 #include <sys/kernel.h> 100 #include <sys/socket.h> 101 #ifdef ANCACHE 102 #include <sys/syslog.h> 103 #endif 104 #include <sys/sysctl.h> 105 106 #include <sys/module.h> 107 #include <sys/bus.h> 108 #include <machine/bus.h> 109 #include <sys/rman.h> 110 #include <sys/lock.h> 111 #include <sys/mutex.h> 112 #include <machine/resource.h> 113 #include <sys/malloc.h> 114 115 #include <net/if.h> 116 #include <net/if_var.h> 117 #include <net/if_arp.h> 118 #include <net/if_dl.h> 119 #include <net/ethernet.h> 120 #include <net/if_types.h> 121 #include <net/if_media.h> 122 123 #include <net80211/ieee80211_var.h> 124 #include <net80211/ieee80211_ioctl.h> 125 126 #ifdef INET 127 #include <netinet/in.h> 128 #include <netinet/in_systm.h> 129 #include <netinet/in_var.h> 130 #include <netinet/ip.h> 131 #endif 132 133 #include <net/bpf.h> 134 135 #include <machine/md_var.h> 136 137 #include <dev/an/if_aironet_ieee.h> 138 #include <dev/an/if_anreg.h> 139 140 /* These are global because we need them in sys/pci/if_an_p.c. */ 141 static void an_reset(struct an_softc *); 142 static int an_init_mpi350_desc(struct an_softc *); 143 static int an_ioctl(struct ifnet *, u_long, caddr_t); 144 static void an_init(void *); 145 static void an_init_locked(struct an_softc *); 146 static int an_init_tx_ring(struct an_softc *); 147 static void an_start(struct ifnet *); 148 static void an_start_locked(struct ifnet *); 149 static void an_watchdog(struct an_softc *); 150 static void an_rxeof(struct an_softc *); 151 static void an_txeof(struct an_softc *, int); 152 153 static void an_promisc(struct an_softc *, int); 154 static int an_cmd(struct an_softc *, int, int); 155 static int an_cmd_struct(struct an_softc *, struct an_command *, 156 struct an_reply *); 157 static int an_read_record(struct an_softc *, struct an_ltv_gen *); 158 static int an_write_record(struct an_softc *, struct an_ltv_gen *); 159 static int an_read_data(struct an_softc *, int, int, caddr_t, int); 160 static int an_write_data(struct an_softc *, int, int, caddr_t, int); 161 static int an_seek(struct an_softc *, int, int, int); 162 static int an_alloc_nicmem(struct an_softc *, int, int *); 163 static int an_dma_malloc(struct an_softc *, bus_size_t, struct an_dma_alloc *, 164 int); 165 static void an_dma_free(struct an_softc *, struct an_dma_alloc *); 166 static void an_dma_malloc_cb(void *, bus_dma_segment_t *, int, int); 167 static void an_stats_update(void *); 168 static void an_setdef(struct an_softc *, struct an_req *); 169 #ifdef ANCACHE 170 static void an_cache_store(struct an_softc *, struct ether_header *, 171 struct mbuf *, u_int8_t, u_int8_t); 172 #endif 173 174 /* function definitions for use with the Cisco's Linux configuration 175 utilities 176 */ 177 178 static int readrids(struct ifnet*, struct aironet_ioctl*); 179 static int writerids(struct ifnet*, struct aironet_ioctl*); 180 static int flashcard(struct ifnet*, struct aironet_ioctl*); 181 182 static int cmdreset(struct ifnet *); 183 static int setflashmode(struct ifnet *); 184 static int flashgchar(struct ifnet *,int,int); 185 static int flashpchar(struct ifnet *,int,int); 186 static int flashputbuf(struct ifnet *); 187 static int flashrestart(struct ifnet *); 188 static int WaitBusy(struct ifnet *, int); 189 static int unstickbusy(struct ifnet *); 190 191 static void an_dump_record (struct an_softc *,struct an_ltv_gen *, 192 char *); 193 194 static int an_media_change (struct ifnet *); 195 static void an_media_status (struct ifnet *, struct ifmediareq *); 196 197 static int an_dump = 0; 198 static int an_cache_mode = 0; 199 200 #define DBM 0 201 #define PERCENT 1 202 #define RAW 2 203 204 static char an_conf[256]; 205 static char an_conf_cache[256]; 206 207 /* sysctl vars */ 208 209 static SYSCTL_NODE(_hw, OID_AUTO, an, CTLFLAG_RD, 0, 210 "Wireless driver parameters"); 211 212 /* XXX violate ethernet/netgraph callback hooks */ 213 extern void (*ng_ether_attach_p)(struct ifnet *ifp); 214 extern void (*ng_ether_detach_p)(struct ifnet *ifp); 215 216 static int 217 sysctl_an_dump(SYSCTL_HANDLER_ARGS) 218 { 219 int error, r, last; 220 char *s = an_conf; 221 222 last = an_dump; 223 224 switch (an_dump) { 225 case 0: 226 strcpy(an_conf, "off"); 227 break; 228 case 1: 229 strcpy(an_conf, "type"); 230 break; 231 case 2: 232 strcpy(an_conf, "dump"); 233 break; 234 default: 235 snprintf(an_conf, 5, "%x", an_dump); 236 break; 237 } 238 239 error = sysctl_handle_string(oidp, an_conf, sizeof(an_conf), req); 240 241 if (strncmp(an_conf,"off", 3) == 0) { 242 an_dump = 0; 243 } 244 if (strncmp(an_conf,"dump", 4) == 0) { 245 an_dump = 1; 246 } 247 if (strncmp(an_conf,"type", 4) == 0) { 248 an_dump = 2; 249 } 250 if (*s == 'f') { 251 r = 0; 252 for (;;s++) { 253 if ((*s >= '') && (*s <= '9')) { 254 r = r * 16 + (*s - ''); 255 } else if ((*s >= 'a') && (*s <= 'f')) { 256 r = r * 16 + (*s - 'a' + 10); 257 } else { 258 break; 259 } 260 } 261 an_dump = r; 262 } 263 if (an_dump != last) 264 printf("Sysctl changed for Aironet driver\n"); 265 266 return error; 267 } 268 269 SYSCTL_PROC(_hw_an, OID_AUTO, an_dump, CTLTYPE_STRING | CTLFLAG_RW, 270 0, sizeof(an_conf), sysctl_an_dump, "A", ""); 271 272 static int 273 sysctl_an_cache_mode(SYSCTL_HANDLER_ARGS) 274 { 275 int error; 276 277 switch (an_cache_mode) { 278 case 1: 279 strcpy(an_conf_cache, "per"); 280 break; 281 case 2: 282 strcpy(an_conf_cache, "raw"); 283 break; 284 default: 285 strcpy(an_conf_cache, "dbm"); 286 break; 287 } 288 289 error = sysctl_handle_string(oidp, an_conf_cache, 290 sizeof(an_conf_cache), req); 291 292 if (strncmp(an_conf_cache,"dbm", 3) == 0) { 293 an_cache_mode = 0; 294 } 295 if (strncmp(an_conf_cache,"per", 3) == 0) { 296 an_cache_mode = 1; 297 } 298 if (strncmp(an_conf_cache,"raw", 3) == 0) { 299 an_cache_mode = 2; 300 } 301 302 return error; 303 } 304 305 SYSCTL_PROC(_hw_an, OID_AUTO, an_cache_mode, CTLTYPE_STRING | CTLFLAG_RW, 306 0, sizeof(an_conf_cache), sysctl_an_cache_mode, "A", ""); 307 308 /* 309 * We probe for an Aironet 4500/4800 card by attempting to 310 * read the default SSID list. On reset, the first entry in 311 * the SSID list will contain the name "tsunami." If we don't 312 * find this, then there's no card present. 313 */ 314 int 315 an_probe(device_t dev) 316 { 317 struct an_softc *sc = device_get_softc(dev); 318 struct an_ltv_ssidlist_new ssid; 319 int error; 320 321 bzero((char *)&ssid, sizeof(ssid)); 322 323 error = an_alloc_port(dev, 0, AN_IOSIZ); 324 if (error != 0) 325 return (0); 326 327 /* can't do autoprobing */ 328 if (rman_get_start(sc->port_res) == -1) 329 return(0); 330 331 /* 332 * We need to fake up a softc structure long enough 333 * to be able to issue commands and call some of the 334 * other routines. 335 */ 336 ssid.an_len = sizeof(ssid); 337 ssid.an_type = AN_RID_SSIDLIST; 338 339 /* Make sure interrupts are disabled. */ 340 sc->mpi350 = 0; 341 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0); 342 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), 0xFFFF); 343 344 sc->an_dev = dev; 345 mtx_init(&sc->an_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, 346 MTX_DEF); 347 AN_LOCK(sc); 348 an_reset(sc); 349 350 if (an_cmd(sc, AN_CMD_READCFG, 0)) { 351 AN_UNLOCK(sc); 352 goto fail; 353 } 354 355 if (an_read_record(sc, (struct an_ltv_gen *)&ssid)) { 356 AN_UNLOCK(sc); 357 goto fail; 358 } 359 360 /* See if the ssid matches what we expect ... but doesn't have to */ 361 if (strcmp(ssid.an_entry[0].an_ssid, AN_DEF_SSID)) { 362 AN_UNLOCK(sc); 363 goto fail; 364 } 365 366 AN_UNLOCK(sc); 367 return(AN_IOSIZ); 368 fail: 369 mtx_destroy(&sc->an_mtx); 370 return(0); 371 } 372 373 /* 374 * Allocate a port resource with the given resource id. 375 */ 376 int 377 an_alloc_port(device_t dev, int rid, int size) 378 { 379 struct an_softc *sc = device_get_softc(dev); 380 struct resource *res; 381 382 res = bus_alloc_resource_anywhere(dev, SYS_RES_IOPORT, &rid, 383 size, RF_ACTIVE); 384 if (res) { 385 sc->port_rid = rid; 386 sc->port_res = res; 387 return (0); 388 } else { 389 return (ENOENT); 390 } 391 } 392 393 /* 394 * Allocate a memory resource with the given resource id. 395 */ 396 int an_alloc_memory(device_t dev, int rid, int size) 397 { 398 struct an_softc *sc = device_get_softc(dev); 399 struct resource *res; 400 401 res = bus_alloc_resource_anywhere(dev, SYS_RES_MEMORY, &rid, 402 size, RF_ACTIVE); 403 if (res) { 404 sc->mem_rid = rid; 405 sc->mem_res = res; 406 sc->mem_used = size; 407 return (0); 408 } else { 409 return (ENOENT); 410 } 411 } 412 413 /* 414 * Allocate a auxiliary memory resource with the given resource id. 415 */ 416 int an_alloc_aux_memory(device_t dev, int rid, int size) 417 { 418 struct an_softc *sc = device_get_softc(dev); 419 struct resource *res; 420 421 res = bus_alloc_resource_anywhere(dev, SYS_RES_MEMORY, &rid, 422 size, RF_ACTIVE); 423 if (res) { 424 sc->mem_aux_rid = rid; 425 sc->mem_aux_res = res; 426 sc->mem_aux_used = size; 427 return (0); 428 } else { 429 return (ENOENT); 430 } 431 } 432 433 /* 434 * Allocate an irq resource with the given resource id. 435 */ 436 int 437 an_alloc_irq(device_t dev, int rid, int flags) 438 { 439 struct an_softc *sc = device_get_softc(dev); 440 struct resource *res; 441 442 res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 443 (RF_ACTIVE | flags)); 444 if (res) { 445 sc->irq_rid = rid; 446 sc->irq_res = res; 447 return (0); 448 } else { 449 return (ENOENT); 450 } 451 } 452 453 static void 454 an_dma_malloc_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error) 455 { 456 bus_addr_t *paddr = (bus_addr_t*) arg; 457 *paddr = segs->ds_addr; 458 } 459 460 /* 461 * Alloc DMA memory and set the pointer to it 462 */ 463 static int 464 an_dma_malloc(struct an_softc *sc, bus_size_t size, struct an_dma_alloc *dma, 465 int mapflags) 466 { 467 int r; 468 469 r = bus_dmamem_alloc(sc->an_dtag, (void**) &dma->an_dma_vaddr, 470 BUS_DMA_NOWAIT, &dma->an_dma_map); 471 if (r != 0) 472 goto fail_1; 473 474 r = bus_dmamap_load(sc->an_dtag, dma->an_dma_map, dma->an_dma_vaddr, 475 size, 476 an_dma_malloc_cb, 477 &dma->an_dma_paddr, 478 mapflags | BUS_DMA_NOWAIT); 479 if (r != 0) 480 goto fail_2; 481 482 dma->an_dma_size = size; 483 return (0); 484 485 fail_2: 486 bus_dmamap_unload(sc->an_dtag, dma->an_dma_map); 487 fail_1: 488 bus_dmamem_free(sc->an_dtag, dma->an_dma_vaddr, dma->an_dma_map); 489 return (r); 490 } 491 492 static void 493 an_dma_free(struct an_softc *sc, struct an_dma_alloc *dma) 494 { 495 bus_dmamap_unload(sc->an_dtag, dma->an_dma_map); 496 bus_dmamem_free(sc->an_dtag, dma->an_dma_vaddr, dma->an_dma_map); 497 dma->an_dma_vaddr = 0; 498 } 499 500 /* 501 * Release all resources 502 */ 503 void 504 an_release_resources(device_t dev) 505 { 506 struct an_softc *sc = device_get_softc(dev); 507 int i; 508 509 if (sc->port_res) { 510 bus_release_resource(dev, SYS_RES_IOPORT, 511 sc->port_rid, sc->port_res); 512 sc->port_res = 0; 513 } 514 if (sc->mem_res) { 515 bus_release_resource(dev, SYS_RES_MEMORY, 516 sc->mem_rid, sc->mem_res); 517 sc->mem_res = 0; 518 } 519 if (sc->mem_aux_res) { 520 bus_release_resource(dev, SYS_RES_MEMORY, 521 sc->mem_aux_rid, sc->mem_aux_res); 522 sc->mem_aux_res = 0; 523 } 524 if (sc->irq_res) { 525 bus_release_resource(dev, SYS_RES_IRQ, 526 sc->irq_rid, sc->irq_res); 527 sc->irq_res = 0; 528 } 529 if (sc->an_rid_buffer.an_dma_paddr) { 530 an_dma_free(sc, &sc->an_rid_buffer); 531 } 532 for (i = 0; i < AN_MAX_RX_DESC; i++) 533 if (sc->an_rx_buffer[i].an_dma_paddr) { 534 an_dma_free(sc, &sc->an_rx_buffer[i]); 535 } 536 for (i = 0; i < AN_MAX_TX_DESC; i++) 537 if (sc->an_tx_buffer[i].an_dma_paddr) { 538 an_dma_free(sc, &sc->an_tx_buffer[i]); 539 } 540 if (sc->an_dtag) { 541 bus_dma_tag_destroy(sc->an_dtag); 542 } 543 544 } 545 546 int 547 an_init_mpi350_desc(struct an_softc *sc) 548 { 549 struct an_command cmd_struct; 550 struct an_reply reply; 551 struct an_card_rid_desc an_rid_desc; 552 struct an_card_rx_desc an_rx_desc; 553 struct an_card_tx_desc an_tx_desc; 554 int i, desc; 555 556 AN_LOCK_ASSERT(sc); 557 if(!sc->an_rid_buffer.an_dma_paddr) 558 an_dma_malloc(sc, AN_RID_BUFFER_SIZE, 559 &sc->an_rid_buffer, 0); 560 for (i = 0; i < AN_MAX_RX_DESC; i++) 561 if(!sc->an_rx_buffer[i].an_dma_paddr) 562 an_dma_malloc(sc, AN_RX_BUFFER_SIZE, 563 &sc->an_rx_buffer[i], 0); 564 for (i = 0; i < AN_MAX_TX_DESC; i++) 565 if(!sc->an_tx_buffer[i].an_dma_paddr) 566 an_dma_malloc(sc, AN_TX_BUFFER_SIZE, 567 &sc->an_tx_buffer[i], 0); 568 569 /* 570 * Allocate RX descriptor 571 */ 572 bzero(&reply,sizeof(reply)); 573 cmd_struct.an_cmd = AN_CMD_ALLOC_DESC; 574 cmd_struct.an_parm0 = AN_DESCRIPTOR_RX; 575 cmd_struct.an_parm1 = AN_RX_DESC_OFFSET; 576 cmd_struct.an_parm2 = AN_MAX_RX_DESC; 577 if (an_cmd_struct(sc, &cmd_struct, &reply)) { 578 if_printf(sc->an_ifp, "failed to allocate RX descriptor\n"); 579 return(EIO); 580 } 581 582 for (desc = 0; desc < AN_MAX_RX_DESC; desc++) { 583 bzero(&an_rx_desc, sizeof(an_rx_desc)); 584 an_rx_desc.an_valid = 1; 585 an_rx_desc.an_len = AN_RX_BUFFER_SIZE; 586 an_rx_desc.an_done = 0; 587 an_rx_desc.an_phys = sc->an_rx_buffer[desc].an_dma_paddr; 588 589 for (i = 0; i < sizeof(an_rx_desc) / 4; i++) 590 CSR_MEM_AUX_WRITE_4(sc, AN_RX_DESC_OFFSET 591 + (desc * sizeof(an_rx_desc)) 592 + (i * 4), 593 ((u_int32_t *)(void *)&an_rx_desc)[i]); 594 } 595 596 /* 597 * Allocate TX descriptor 598 */ 599 600 bzero(&reply,sizeof(reply)); 601 cmd_struct.an_cmd = AN_CMD_ALLOC_DESC; 602 cmd_struct.an_parm0 = AN_DESCRIPTOR_TX; 603 cmd_struct.an_parm1 = AN_TX_DESC_OFFSET; 604 cmd_struct.an_parm2 = AN_MAX_TX_DESC; 605 if (an_cmd_struct(sc, &cmd_struct, &reply)) { 606 if_printf(sc->an_ifp, "failed to allocate TX descriptor\n"); 607 return(EIO); 608 } 609 610 for (desc = 0; desc < AN_MAX_TX_DESC; desc++) { 611 bzero(&an_tx_desc, sizeof(an_tx_desc)); 612 an_tx_desc.an_offset = 0; 613 an_tx_desc.an_eoc = 0; 614 an_tx_desc.an_valid = 0; 615 an_tx_desc.an_len = 0; 616 an_tx_desc.an_phys = sc->an_tx_buffer[desc].an_dma_paddr; 617 618 for (i = 0; i < sizeof(an_tx_desc) / 4; i++) 619 CSR_MEM_AUX_WRITE_4(sc, AN_TX_DESC_OFFSET 620 + (desc * sizeof(an_tx_desc)) 621 + (i * 4), 622 ((u_int32_t *)(void *)&an_tx_desc)[i]); 623 } 624 625 /* 626 * Allocate RID descriptor 627 */ 628 629 bzero(&reply,sizeof(reply)); 630 cmd_struct.an_cmd = AN_CMD_ALLOC_DESC; 631 cmd_struct.an_parm0 = AN_DESCRIPTOR_HOSTRW; 632 cmd_struct.an_parm1 = AN_HOST_DESC_OFFSET; 633 cmd_struct.an_parm2 = 1; 634 if (an_cmd_struct(sc, &cmd_struct, &reply)) { 635 if_printf(sc->an_ifp, "failed to allocate host descriptor\n"); 636 return(EIO); 637 } 638 639 bzero(&an_rid_desc, sizeof(an_rid_desc)); 640 an_rid_desc.an_valid = 1; 641 an_rid_desc.an_len = AN_RID_BUFFER_SIZE; 642 an_rid_desc.an_rid = 0; 643 an_rid_desc.an_phys = sc->an_rid_buffer.an_dma_paddr; 644 645 for (i = 0; i < sizeof(an_rid_desc) / 4; i++) 646 CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4, 647 ((u_int32_t *)(void *)&an_rid_desc)[i]); 648 649 return(0); 650 } 651 652 int 653 an_attach(struct an_softc *sc, int flags) 654 { 655 struct ifnet *ifp; 656 int error = EIO; 657 int i, nrate, mword; 658 u_int8_t r; 659 660 ifp = sc->an_ifp = if_alloc(IFT_ETHER); 661 if (ifp == NULL) { 662 device_printf(sc->an_dev, "can not if_alloc()\n"); 663 goto fail; 664 } 665 ifp->if_softc = sc; 666 if_initname(ifp, device_get_name(sc->an_dev), 667 device_get_unit(sc->an_dev)); 668 669 sc->an_gone = 0; 670 sc->an_associated = 0; 671 sc->an_monitor = 0; 672 sc->an_was_monitor = 0; 673 sc->an_flash_buffer = NULL; 674 675 /* Reset the NIC. */ 676 AN_LOCK(sc); 677 an_reset(sc); 678 if (sc->mpi350) { 679 error = an_init_mpi350_desc(sc); 680 if (error) 681 goto fail; 682 } 683 684 /* Load factory config */ 685 if (an_cmd(sc, AN_CMD_READCFG, 0)) { 686 device_printf(sc->an_dev, "failed to load config data\n"); 687 goto fail; 688 } 689 690 /* Read the current configuration */ 691 sc->an_config.an_type = AN_RID_GENCONFIG; 692 sc->an_config.an_len = sizeof(struct an_ltv_genconfig); 693 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_config)) { 694 device_printf(sc->an_dev, "read record failed\n"); 695 goto fail; 696 } 697 698 /* Read the card capabilities */ 699 sc->an_caps.an_type = AN_RID_CAPABILITIES; 700 sc->an_caps.an_len = sizeof(struct an_ltv_caps); 701 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_caps)) { 702 device_printf(sc->an_dev, "read record failed\n"); 703 goto fail; 704 } 705 706 /* Read ssid list */ 707 sc->an_ssidlist.an_type = AN_RID_SSIDLIST; 708 sc->an_ssidlist.an_len = sizeof(struct an_ltv_ssidlist_new); 709 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_ssidlist)) { 710 device_printf(sc->an_dev, "read record failed\n"); 711 goto fail; 712 } 713 714 /* Read AP list */ 715 sc->an_aplist.an_type = AN_RID_APLIST; 716 sc->an_aplist.an_len = sizeof(struct an_ltv_aplist); 717 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_aplist)) { 718 device_printf(sc->an_dev, "read record failed\n"); 719 goto fail; 720 } 721 722 #ifdef ANCACHE 723 /* Read the RSSI <-> dBm map */ 724 sc->an_have_rssimap = 0; 725 if (sc->an_caps.an_softcaps & 8) { 726 sc->an_rssimap.an_type = AN_RID_RSSI_MAP; 727 sc->an_rssimap.an_len = sizeof(struct an_ltv_rssi_map); 728 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_rssimap)) { 729 device_printf(sc->an_dev, 730 "unable to get RSSI <-> dBM map\n"); 731 } else { 732 device_printf(sc->an_dev, "got RSSI <-> dBM map\n"); 733 sc->an_have_rssimap = 1; 734 } 735 } else { 736 device_printf(sc->an_dev, "no RSSI <-> dBM map\n"); 737 } 738 #endif 739 AN_UNLOCK(sc); 740 741 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 742 ifp->if_ioctl = an_ioctl; 743 ifp->if_start = an_start; 744 ifp->if_init = an_init; 745 ifp->if_baudrate = 10000000; 746 IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen); 747 ifp->if_snd.ifq_drv_maxlen = ifqmaxlen; 748 IFQ_SET_READY(&ifp->if_snd); 749 750 bzero(sc->an_config.an_nodename, sizeof(sc->an_config.an_nodename)); 751 bcopy(AN_DEFAULT_NODENAME, sc->an_config.an_nodename, 752 sizeof(AN_DEFAULT_NODENAME) - 1); 753 754 bzero(sc->an_ssidlist.an_entry[0].an_ssid, 755 sizeof(sc->an_ssidlist.an_entry[0].an_ssid)); 756 bcopy(AN_DEFAULT_NETNAME, sc->an_ssidlist.an_entry[0].an_ssid, 757 sizeof(AN_DEFAULT_NETNAME) - 1); 758 sc->an_ssidlist.an_entry[0].an_len = strlen(AN_DEFAULT_NETNAME); 759 760 sc->an_config.an_opmode = 761 AN_OPMODE_INFRASTRUCTURE_STATION; 762 763 sc->an_tx_rate = 0; 764 bzero((char *)&sc->an_stats, sizeof(sc->an_stats)); 765 766 nrate = 8; 767 768 ifmedia_init(&sc->an_ifmedia, 0, an_media_change, an_media_status); 769 if_printf(ifp, "supported rates: "); 770 #define ADD(s, o) ifmedia_add(&sc->an_ifmedia, \ 771 IFM_MAKEWORD(IFM_IEEE80211, (s), (o), 0), 0, NULL) 772 ADD(IFM_AUTO, 0); 773 ADD(IFM_AUTO, IFM_IEEE80211_ADHOC); 774 for (i = 0; i < nrate; i++) { 775 r = sc->an_caps.an_rates[i]; 776 mword = ieee80211_rate2media(NULL, r, IEEE80211_MODE_AUTO); 777 if (mword == 0) 778 continue; 779 printf("%s%d%sMbps", (i != 0 ? " " : ""), 780 (r & IEEE80211_RATE_VAL) / 2, ((r & 0x1) != 0 ? ".5" : "")); 781 ADD(mword, 0); 782 ADD(mword, IFM_IEEE80211_ADHOC); 783 } 784 printf("\n"); 785 ifmedia_set(&sc->an_ifmedia, IFM_MAKEWORD(IFM_IEEE80211, 786 IFM_AUTO, 0, 0)); 787 #undef ADD 788 789 /* 790 * Call MI attach routine. 791 */ 792 793 ether_ifattach(ifp, sc->an_caps.an_oemaddr); 794 callout_init_mtx(&sc->an_stat_ch, &sc->an_mtx, 0); 795 796 return(0); 797 fail: 798 AN_UNLOCK(sc); 799 mtx_destroy(&sc->an_mtx); 800 if (ifp != NULL) 801 if_free(ifp); 802 return(error); 803 } 804 805 int 806 an_detach(device_t dev) 807 { 808 struct an_softc *sc = device_get_softc(dev); 809 struct ifnet *ifp = sc->an_ifp; 810 811 if (sc->an_gone) { 812 device_printf(dev,"already unloaded\n"); 813 return(0); 814 } 815 AN_LOCK(sc); 816 an_stop(sc); 817 sc->an_gone = 1; 818 ifmedia_removeall(&sc->an_ifmedia); 819 ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 820 AN_UNLOCK(sc); 821 ether_ifdetach(ifp); 822 bus_teardown_intr(dev, sc->irq_res, sc->irq_handle); 823 callout_drain(&sc->an_stat_ch); 824 if_free(ifp); 825 an_release_resources(dev); 826 mtx_destroy(&sc->an_mtx); 827 return (0); 828 } 829 830 static void 831 an_rxeof(struct an_softc *sc) 832 { 833 struct ifnet *ifp; 834 struct ether_header *eh; 835 struct ieee80211_frame *ih; 836 struct an_rxframe rx_frame; 837 struct an_rxframe_802_3 rx_frame_802_3; 838 struct mbuf *m; 839 int len, id, error = 0, i, count = 0; 840 int ieee80211_header_len; 841 u_char *bpf_buf; 842 u_short fc1; 843 struct an_card_rx_desc an_rx_desc; 844 u_int8_t *buf; 845 846 AN_LOCK_ASSERT(sc); 847 848 ifp = sc->an_ifp; 849 850 if (!sc->mpi350) { 851 id = CSR_READ_2(sc, AN_RX_FID); 852 853 if (sc->an_monitor && (ifp->if_flags & IFF_PROMISC)) { 854 /* read raw 802.11 packet */ 855 bpf_buf = sc->buf_802_11; 856 857 /* read header */ 858 if (an_read_data(sc, id, 0x0, (caddr_t)&rx_frame, 859 sizeof(rx_frame))) { 860 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 861 return; 862 } 863 864 /* 865 * skip beacon by default since this increases the 866 * system load a lot 867 */ 868 869 if (!(sc->an_monitor & AN_MONITOR_INCLUDE_BEACON) && 870 (rx_frame.an_frame_ctl & 871 IEEE80211_FC0_SUBTYPE_BEACON)) { 872 return; 873 } 874 875 if (sc->an_monitor & AN_MONITOR_AIRONET_HEADER) { 876 len = rx_frame.an_rx_payload_len 877 + sizeof(rx_frame); 878 /* Check for insane frame length */ 879 if (len > sizeof(sc->buf_802_11)) { 880 if_printf(ifp, "oversized packet " 881 "received (%d, %d)\n", 882 len, MCLBYTES); 883 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 884 return; 885 } 886 887 bcopy((char *)&rx_frame, 888 bpf_buf, sizeof(rx_frame)); 889 890 error = an_read_data(sc, id, sizeof(rx_frame), 891 (caddr_t)bpf_buf+sizeof(rx_frame), 892 rx_frame.an_rx_payload_len); 893 } else { 894 fc1=rx_frame.an_frame_ctl >> 8; 895 ieee80211_header_len = 896 sizeof(struct ieee80211_frame); 897 if ((fc1 & IEEE80211_FC1_DIR_TODS) && 898 (fc1 & IEEE80211_FC1_DIR_FROMDS)) { 899 ieee80211_header_len += ETHER_ADDR_LEN; 900 } 901 902 len = rx_frame.an_rx_payload_len 903 + ieee80211_header_len; 904 /* Check for insane frame length */ 905 if (len > sizeof(sc->buf_802_11)) { 906 if_printf(ifp, "oversized packet " 907 "received (%d, %d)\n", 908 len, MCLBYTES); 909 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 910 return; 911 } 912 913 ih = (struct ieee80211_frame *)bpf_buf; 914 915 bcopy((char *)&rx_frame.an_frame_ctl, 916 (char *)ih, ieee80211_header_len); 917 918 error = an_read_data(sc, id, sizeof(rx_frame) + 919 rx_frame.an_gaplen, 920 (caddr_t)ih +ieee80211_header_len, 921 rx_frame.an_rx_payload_len); 922 } 923 /* dump raw 802.11 packet to bpf and skip ip stack */ 924 BPF_TAP(ifp, bpf_buf, len); 925 } else { 926 MGETHDR(m, M_NOWAIT, MT_DATA); 927 if (m == NULL) { 928 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 929 return; 930 } 931 if (!(MCLGET(m, M_NOWAIT))) { 932 m_freem(m); 933 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 934 return; 935 } 936 m->m_pkthdr.rcvif = ifp; 937 /* Read Ethernet encapsulated packet */ 938 939 #ifdef ANCACHE 940 /* Read NIC frame header */ 941 if (an_read_data(sc, id, 0, (caddr_t)&rx_frame, 942 sizeof(rx_frame))) { 943 m_freem(m); 944 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 945 return; 946 } 947 #endif 948 /* Read in the 802_3 frame header */ 949 if (an_read_data(sc, id, 0x34, 950 (caddr_t)&rx_frame_802_3, 951 sizeof(rx_frame_802_3))) { 952 m_freem(m); 953 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 954 return; 955 } 956 if (rx_frame_802_3.an_rx_802_3_status != 0) { 957 m_freem(m); 958 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 959 return; 960 } 961 /* Check for insane frame length */ 962 len = rx_frame_802_3.an_rx_802_3_payload_len; 963 if (len > sizeof(sc->buf_802_11)) { 964 m_freem(m); 965 if_printf(ifp, "oversized packet " 966 "received (%d, %d)\n", 967 len, MCLBYTES); 968 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 969 return; 970 } 971 m->m_pkthdr.len = m->m_len = 972 rx_frame_802_3.an_rx_802_3_payload_len + 12; 973 974 eh = mtod(m, struct ether_header *); 975 976 bcopy((char *)&rx_frame_802_3.an_rx_dst_addr, 977 (char *)&eh->ether_dhost, ETHER_ADDR_LEN); 978 bcopy((char *)&rx_frame_802_3.an_rx_src_addr, 979 (char *)&eh->ether_shost, ETHER_ADDR_LEN); 980 981 /* in mbuf header type is just before payload */ 982 error = an_read_data(sc, id, 0x44, 983 (caddr_t)&(eh->ether_type), 984 rx_frame_802_3.an_rx_802_3_payload_len); 985 986 if (error) { 987 m_freem(m); 988 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 989 return; 990 } 991 if_inc_counter(ifp, IFCOUNTER_IPACKETS, 1); 992 993 /* Receive packet. */ 994 #ifdef ANCACHE 995 an_cache_store(sc, eh, m, 996 rx_frame.an_rx_signal_strength, 997 rx_frame.an_rsvd0); 998 #endif 999 AN_UNLOCK(sc); 1000 (*ifp->if_input)(ifp, m); 1001 AN_LOCK(sc); 1002 } 1003 1004 } else { /* MPI-350 */ 1005 for (count = 0; count < AN_MAX_RX_DESC; count++){ 1006 for (i = 0; i < sizeof(an_rx_desc) / 4; i++) 1007 ((u_int32_t *)(void *)&an_rx_desc)[i] 1008 = CSR_MEM_AUX_READ_4(sc, 1009 AN_RX_DESC_OFFSET 1010 + (count * sizeof(an_rx_desc)) 1011 + (i * 4)); 1012 1013 if (an_rx_desc.an_done && !an_rx_desc.an_valid) { 1014 buf = sc->an_rx_buffer[count].an_dma_vaddr; 1015 1016 MGETHDR(m, M_NOWAIT, MT_DATA); 1017 if (m == NULL) { 1018 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 1019 return; 1020 } 1021 if (!(MCLGET(m, M_NOWAIT))) { 1022 m_freem(m); 1023 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 1024 return; 1025 } 1026 m->m_pkthdr.rcvif = ifp; 1027 /* Read Ethernet encapsulated packet */ 1028 1029 /* 1030 * No ANCACHE support since we just get back 1031 * an Ethernet packet no 802.11 info 1032 */ 1033 #if 0 1034 #ifdef ANCACHE 1035 /* Read NIC frame header */ 1036 bcopy(buf, (caddr_t)&rx_frame, 1037 sizeof(rx_frame)); 1038 #endif 1039 #endif 1040 /* Check for insane frame length */ 1041 len = an_rx_desc.an_len + 12; 1042 if (len > MCLBYTES) { 1043 m_freem(m); 1044 if_printf(ifp, "oversized packet " 1045 "received (%d, %d)\n", 1046 len, MCLBYTES); 1047 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 1048 return; 1049 } 1050 1051 m->m_pkthdr.len = m->m_len = 1052 an_rx_desc.an_len + 12; 1053 1054 eh = mtod(m, struct ether_header *); 1055 1056 bcopy(buf, (char *)eh, 1057 m->m_pkthdr.len); 1058 1059 if_inc_counter(ifp, IFCOUNTER_IPACKETS, 1); 1060 1061 /* Receive packet. */ 1062 #if 0 1063 #ifdef ANCACHE 1064 an_cache_store(sc, eh, m, 1065 rx_frame.an_rx_signal_strength, 1066 rx_frame.an_rsvd0); 1067 #endif 1068 #endif 1069 AN_UNLOCK(sc); 1070 (*ifp->if_input)(ifp, m); 1071 AN_LOCK(sc); 1072 1073 an_rx_desc.an_valid = 1; 1074 an_rx_desc.an_len = AN_RX_BUFFER_SIZE; 1075 an_rx_desc.an_done = 0; 1076 an_rx_desc.an_phys = 1077 sc->an_rx_buffer[count].an_dma_paddr; 1078 1079 for (i = 0; i < sizeof(an_rx_desc) / 4; i++) 1080 CSR_MEM_AUX_WRITE_4(sc, 1081 AN_RX_DESC_OFFSET 1082 + (count * sizeof(an_rx_desc)) 1083 + (i * 4), 1084 ((u_int32_t *)(void *)&an_rx_desc)[i]); 1085 1086 } else { 1087 if_printf(ifp, "Didn't get valid RX packet " 1088 "%x %x %d\n", 1089 an_rx_desc.an_done, 1090 an_rx_desc.an_valid, an_rx_desc.an_len); 1091 } 1092 } 1093 } 1094 } 1095 1096 static void 1097 an_txeof(struct an_softc *sc, int status) 1098 { 1099 struct ifnet *ifp; 1100 int id, i; 1101 1102 AN_LOCK_ASSERT(sc); 1103 ifp = sc->an_ifp; 1104 1105 sc->an_timer = 0; 1106 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1107 1108 if (!sc->mpi350) { 1109 id = CSR_READ_2(sc, AN_TX_CMP_FID(sc->mpi350)); 1110 1111 if (status & AN_EV_TX_EXC) { 1112 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 1113 } else 1114 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1); 1115 1116 for (i = 0; i < AN_TX_RING_CNT; i++) { 1117 if (id == sc->an_rdata.an_tx_ring[i]) { 1118 sc->an_rdata.an_tx_ring[i] = 0; 1119 break; 1120 } 1121 } 1122 1123 AN_INC(sc->an_rdata.an_tx_cons, AN_TX_RING_CNT); 1124 } else { /* MPI 350 */ 1125 id = CSR_READ_2(sc, AN_TX_CMP_FID(sc->mpi350)); 1126 if (!sc->an_rdata.an_tx_empty){ 1127 if (status & AN_EV_TX_EXC) { 1128 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 1129 } else 1130 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1); 1131 AN_INC(sc->an_rdata.an_tx_cons, AN_MAX_TX_DESC); 1132 if (sc->an_rdata.an_tx_prod == 1133 sc->an_rdata.an_tx_cons) 1134 sc->an_rdata.an_tx_empty = 1; 1135 } 1136 } 1137 1138 return; 1139 } 1140 1141 /* 1142 * We abuse the stats updater to check the current NIC status. This 1143 * is important because we don't want to allow transmissions until 1144 * the NIC has synchronized to the current cell (either as the master 1145 * in an ad-hoc group, or as a station connected to an access point). 1146 * 1147 * Note that this function will be called via callout(9) with a lock held. 1148 */ 1149 static void 1150 an_stats_update(void *xsc) 1151 { 1152 struct an_softc *sc; 1153 struct ifnet *ifp; 1154 1155 sc = xsc; 1156 AN_LOCK_ASSERT(sc); 1157 ifp = sc->an_ifp; 1158 if (sc->an_timer > 0 && --sc->an_timer == 0) 1159 an_watchdog(sc); 1160 1161 sc->an_status.an_type = AN_RID_STATUS; 1162 sc->an_status.an_len = sizeof(struct an_ltv_status); 1163 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_status)) 1164 return; 1165 1166 if (sc->an_status.an_opmode & AN_STATUS_OPMODE_IN_SYNC) 1167 sc->an_associated = 1; 1168 else 1169 sc->an_associated = 0; 1170 1171 /* Don't do this while we're transmitting */ 1172 if (ifp->if_drv_flags & IFF_DRV_OACTIVE) { 1173 callout_reset(&sc->an_stat_ch, hz, an_stats_update, sc); 1174 return; 1175 } 1176 1177 sc->an_stats.an_len = sizeof(struct an_ltv_stats); 1178 sc->an_stats.an_type = AN_RID_32BITS_CUM; 1179 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_stats.an_len)) 1180 return; 1181 1182 callout_reset(&sc->an_stat_ch, hz, an_stats_update, sc); 1183 1184 return; 1185 } 1186 1187 void 1188 an_intr(void *xsc) 1189 { 1190 struct an_softc *sc; 1191 struct ifnet *ifp; 1192 u_int16_t status; 1193 1194 sc = (struct an_softc*)xsc; 1195 1196 AN_LOCK(sc); 1197 1198 if (sc->an_gone) { 1199 AN_UNLOCK(sc); 1200 return; 1201 } 1202 1203 ifp = sc->an_ifp; 1204 1205 /* Disable interrupts. */ 1206 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0); 1207 1208 status = CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350)); 1209 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), ~AN_INTRS(sc->mpi350)); 1210 1211 if (status & AN_EV_MIC) { 1212 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_MIC); 1213 } 1214 1215 if (status & AN_EV_LINKSTAT) { 1216 if (CSR_READ_2(sc, AN_LINKSTAT(sc->mpi350)) 1217 == AN_LINKSTAT_ASSOCIATED) 1218 sc->an_associated = 1; 1219 else 1220 sc->an_associated = 0; 1221 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_LINKSTAT); 1222 } 1223 1224 if (status & AN_EV_RX) { 1225 an_rxeof(sc); 1226 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_RX); 1227 } 1228 1229 if (sc->mpi350 && status & AN_EV_TX_CPY) { 1230 an_txeof(sc, status); 1231 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_TX_CPY); 1232 } 1233 1234 if (status & AN_EV_TX) { 1235 an_txeof(sc, status); 1236 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_TX); 1237 } 1238 1239 if (status & AN_EV_TX_EXC) { 1240 an_txeof(sc, status); 1241 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_TX_EXC); 1242 } 1243 1244 if (status & AN_EV_ALLOC) 1245 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_ALLOC); 1246 1247 /* Re-enable interrupts. */ 1248 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), AN_INTRS(sc->mpi350)); 1249 1250 if ((ifp->if_flags & IFF_UP) && !IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 1251 an_start_locked(ifp); 1252 1253 AN_UNLOCK(sc); 1254 1255 return; 1256 } 1257 1258 1259 static int 1260 an_cmd_struct(struct an_softc *sc, struct an_command *cmd, 1261 struct an_reply *reply) 1262 { 1263 int i; 1264 1265 AN_LOCK_ASSERT(sc); 1266 for (i = 0; i != AN_TIMEOUT; i++) { 1267 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY) { 1268 DELAY(1000); 1269 } else 1270 break; 1271 } 1272 1273 if( i == AN_TIMEOUT) { 1274 printf("BUSY\n"); 1275 return(ETIMEDOUT); 1276 } 1277 1278 CSR_WRITE_2(sc, AN_PARAM0(sc->mpi350), cmd->an_parm0); 1279 CSR_WRITE_2(sc, AN_PARAM1(sc->mpi350), cmd->an_parm1); 1280 CSR_WRITE_2(sc, AN_PARAM2(sc->mpi350), cmd->an_parm2); 1281 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), cmd->an_cmd); 1282 1283 for (i = 0; i < AN_TIMEOUT; i++) { 1284 if (CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350)) & AN_EV_CMD) 1285 break; 1286 DELAY(1000); 1287 } 1288 1289 reply->an_resp0 = CSR_READ_2(sc, AN_RESP0(sc->mpi350)); 1290 reply->an_resp1 = CSR_READ_2(sc, AN_RESP1(sc->mpi350)); 1291 reply->an_resp2 = CSR_READ_2(sc, AN_RESP2(sc->mpi350)); 1292 reply->an_status = CSR_READ_2(sc, AN_STATUS(sc->mpi350)); 1293 1294 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY) 1295 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), 1296 AN_EV_CLR_STUCK_BUSY); 1297 1298 /* Ack the command */ 1299 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CMD); 1300 1301 if (i == AN_TIMEOUT) 1302 return(ETIMEDOUT); 1303 1304 return(0); 1305 } 1306 1307 static int 1308 an_cmd(struct an_softc *sc, int cmd, int val) 1309 { 1310 int i, s = 0; 1311 1312 AN_LOCK_ASSERT(sc); 1313 CSR_WRITE_2(sc, AN_PARAM0(sc->mpi350), val); 1314 CSR_WRITE_2(sc, AN_PARAM1(sc->mpi350), 0); 1315 CSR_WRITE_2(sc, AN_PARAM2(sc->mpi350), 0); 1316 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), cmd); 1317 1318 for (i = 0; i < AN_TIMEOUT; i++) { 1319 if (CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350)) & AN_EV_CMD) 1320 break; 1321 else { 1322 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) == cmd) 1323 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), cmd); 1324 } 1325 } 1326 1327 for (i = 0; i < AN_TIMEOUT; i++) { 1328 CSR_READ_2(sc, AN_RESP0(sc->mpi350)); 1329 CSR_READ_2(sc, AN_RESP1(sc->mpi350)); 1330 CSR_READ_2(sc, AN_RESP2(sc->mpi350)); 1331 s = CSR_READ_2(sc, AN_STATUS(sc->mpi350)); 1332 if ((s & AN_STAT_CMD_CODE) == (cmd & AN_STAT_CMD_CODE)) 1333 break; 1334 } 1335 1336 /* Ack the command */ 1337 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CMD); 1338 1339 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY) 1340 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CLR_STUCK_BUSY); 1341 1342 if (i == AN_TIMEOUT) 1343 return(ETIMEDOUT); 1344 1345 return(0); 1346 } 1347 1348 /* 1349 * This reset sequence may look a little strange, but this is the 1350 * most reliable method I've found to really kick the NIC in the 1351 * head and force it to reboot correctly. 1352 */ 1353 static void 1354 an_reset(struct an_softc *sc) 1355 { 1356 if (sc->an_gone) 1357 return; 1358 1359 AN_LOCK_ASSERT(sc); 1360 an_cmd(sc, AN_CMD_ENABLE, 0); 1361 an_cmd(sc, AN_CMD_FW_RESTART, 0); 1362 an_cmd(sc, AN_CMD_NOOP2, 0); 1363 1364 if (an_cmd(sc, AN_CMD_FORCE_SYNCLOSS, 0) == ETIMEDOUT) 1365 device_printf(sc->an_dev, "reset failed\n"); 1366 1367 an_cmd(sc, AN_CMD_DISABLE, 0); 1368 1369 return; 1370 } 1371 1372 /* 1373 * Read an LTV record from the NIC. 1374 */ 1375 static int 1376 an_read_record(struct an_softc *sc, struct an_ltv_gen *ltv) 1377 { 1378 struct an_ltv_gen *an_ltv; 1379 struct an_card_rid_desc an_rid_desc; 1380 struct an_command cmd; 1381 struct an_reply reply; 1382 struct ifnet *ifp; 1383 u_int16_t *ptr; 1384 u_int8_t *ptr2; 1385 int i, len; 1386 1387 AN_LOCK_ASSERT(sc); 1388 if (ltv->an_len < 4 || ltv->an_type == 0) 1389 return(EINVAL); 1390 1391 ifp = sc->an_ifp; 1392 if (!sc->mpi350){ 1393 /* Tell the NIC to enter record read mode. */ 1394 if (an_cmd(sc, AN_CMD_ACCESS|AN_ACCESS_READ, ltv->an_type)) { 1395 if_printf(ifp, "RID access failed\n"); 1396 return(EIO); 1397 } 1398 1399 /* Seek to the record. */ 1400 if (an_seek(sc, ltv->an_type, 0, AN_BAP1)) { 1401 if_printf(ifp, "seek to record failed\n"); 1402 return(EIO); 1403 } 1404 1405 /* 1406 * Read the length and record type and make sure they 1407 * match what we expect (this verifies that we have enough 1408 * room to hold all of the returned data). 1409 * Length includes type but not length. 1410 */ 1411 len = CSR_READ_2(sc, AN_DATA1); 1412 if (len > (ltv->an_len - 2)) { 1413 if_printf(ifp, "record length mismatch -- expected %d, " 1414 "got %d for Rid %x\n", 1415 ltv->an_len - 2, len, ltv->an_type); 1416 len = ltv->an_len - 2; 1417 } else { 1418 ltv->an_len = len + 2; 1419 } 1420 1421 /* Now read the data. */ 1422 len -= 2; /* skip the type */ 1423 ptr = <v->an_val; 1424 for (i = len; i > 1; i -= 2) 1425 *ptr++ = CSR_READ_2(sc, AN_DATA1); 1426 if (i) { 1427 ptr2 = (u_int8_t *)ptr; 1428 *ptr2 = CSR_READ_1(sc, AN_DATA1); 1429 } 1430 } else { /* MPI-350 */ 1431 if (!sc->an_rid_buffer.an_dma_vaddr) 1432 return(EIO); 1433 an_rid_desc.an_valid = 1; 1434 an_rid_desc.an_len = AN_RID_BUFFER_SIZE; 1435 an_rid_desc.an_rid = 0; 1436 an_rid_desc.an_phys = sc->an_rid_buffer.an_dma_paddr; 1437 bzero(sc->an_rid_buffer.an_dma_vaddr, AN_RID_BUFFER_SIZE); 1438 1439 bzero(&cmd, sizeof(cmd)); 1440 bzero(&reply, sizeof(reply)); 1441 cmd.an_cmd = AN_CMD_ACCESS|AN_ACCESS_READ; 1442 cmd.an_parm0 = ltv->an_type; 1443 1444 for (i = 0; i < sizeof(an_rid_desc) / 4; i++) 1445 CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4, 1446 ((u_int32_t *)(void *)&an_rid_desc)[i]); 1447 1448 if (an_cmd_struct(sc, &cmd, &reply) 1449 || reply.an_status & AN_CMD_QUAL_MASK) { 1450 if_printf(ifp, "failed to read RID %x %x %x %x %x, %d\n", 1451 ltv->an_type, 1452 reply.an_status, 1453 reply.an_resp0, 1454 reply.an_resp1, 1455 reply.an_resp2, 1456 i); 1457 return(EIO); 1458 } 1459 1460 an_ltv = (struct an_ltv_gen *)sc->an_rid_buffer.an_dma_vaddr; 1461 if (an_ltv->an_len + 2 < an_rid_desc.an_len) { 1462 an_rid_desc.an_len = an_ltv->an_len; 1463 } 1464 1465 len = an_rid_desc.an_len; 1466 if (len > (ltv->an_len - 2)) { 1467 if_printf(ifp, "record length mismatch -- expected %d, " 1468 "got %d for Rid %x\n", 1469 ltv->an_len - 2, len, ltv->an_type); 1470 len = ltv->an_len - 2; 1471 } else { 1472 ltv->an_len = len + 2; 1473 } 1474 bcopy(&an_ltv->an_type, 1475 <v->an_val, 1476 len); 1477 } 1478 1479 if (an_dump) 1480 an_dump_record(sc, ltv, "Read"); 1481 1482 return(0); 1483 } 1484 1485 /* 1486 * Same as read, except we inject data instead of reading it. 1487 */ 1488 static int 1489 an_write_record(struct an_softc *sc, struct an_ltv_gen *ltv) 1490 { 1491 struct an_card_rid_desc an_rid_desc; 1492 struct an_command cmd; 1493 struct an_reply reply; 1494 u_int16_t *ptr; 1495 u_int8_t *ptr2; 1496 int i, len; 1497 1498 AN_LOCK_ASSERT(sc); 1499 if (an_dump) 1500 an_dump_record(sc, ltv, "Write"); 1501 1502 if (!sc->mpi350){ 1503 if (an_cmd(sc, AN_CMD_ACCESS|AN_ACCESS_READ, ltv->an_type)) 1504 return(EIO); 1505 1506 if (an_seek(sc, ltv->an_type, 0, AN_BAP1)) 1507 return(EIO); 1508 1509 /* 1510 * Length includes type but not length. 1511 */ 1512 len = ltv->an_len - 2; 1513 CSR_WRITE_2(sc, AN_DATA1, len); 1514 1515 len -= 2; /* skip the type */ 1516 ptr = <v->an_val; 1517 for (i = len; i > 1; i -= 2) 1518 CSR_WRITE_2(sc, AN_DATA1, *ptr++); 1519 if (i) { 1520 ptr2 = (u_int8_t *)ptr; 1521 CSR_WRITE_1(sc, AN_DATA0, *ptr2); 1522 } 1523 1524 if (an_cmd(sc, AN_CMD_ACCESS|AN_ACCESS_WRITE, ltv->an_type)) 1525 return(EIO); 1526 } else { 1527 /* MPI-350 */ 1528 1529 for (i = 0; i != AN_TIMEOUT; i++) { 1530 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) 1531 & AN_CMD_BUSY) { 1532 DELAY(10); 1533 } else 1534 break; 1535 } 1536 if (i == AN_TIMEOUT) { 1537 printf("BUSY\n"); 1538 } 1539 1540 an_rid_desc.an_valid = 1; 1541 an_rid_desc.an_len = ltv->an_len - 2; 1542 an_rid_desc.an_rid = ltv->an_type; 1543 an_rid_desc.an_phys = sc->an_rid_buffer.an_dma_paddr; 1544 1545 bcopy(<v->an_type, sc->an_rid_buffer.an_dma_vaddr, 1546 an_rid_desc.an_len); 1547 1548 bzero(&cmd,sizeof(cmd)); 1549 bzero(&reply,sizeof(reply)); 1550 cmd.an_cmd = AN_CMD_ACCESS|AN_ACCESS_WRITE; 1551 cmd.an_parm0 = ltv->an_type; 1552 1553 for (i = 0; i < sizeof(an_rid_desc) / 4; i++) 1554 CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4, 1555 ((u_int32_t *)(void *)&an_rid_desc)[i]); 1556 1557 DELAY(100000); 1558 1559 if ((i = an_cmd_struct(sc, &cmd, &reply))) { 1560 if_printf(sc->an_ifp, 1561 "failed to write RID 1 %x %x %x %x %x, %d\n", 1562 ltv->an_type, 1563 reply.an_status, 1564 reply.an_resp0, 1565 reply.an_resp1, 1566 reply.an_resp2, 1567 i); 1568 return(EIO); 1569 } 1570 1571 1572 if (reply.an_status & AN_CMD_QUAL_MASK) { 1573 if_printf(sc->an_ifp, 1574 "failed to write RID 2 %x %x %x %x %x, %d\n", 1575 ltv->an_type, 1576 reply.an_status, 1577 reply.an_resp0, 1578 reply.an_resp1, 1579 reply.an_resp2, 1580 i); 1581 return(EIO); 1582 } 1583 DELAY(100000); 1584 } 1585 1586 return(0); 1587 } 1588 1589 static void 1590 an_dump_record(struct an_softc *sc, struct an_ltv_gen *ltv, char *string) 1591 { 1592 u_int8_t *ptr2; 1593 int len; 1594 int i; 1595 int count = 0; 1596 char buf[17], temp; 1597 1598 len = ltv->an_len - 4; 1599 if_printf(sc->an_ifp, "RID %4x, Length %4d, Mode %s\n", 1600 ltv->an_type, ltv->an_len - 4, string); 1601 1602 if (an_dump == 1 || (an_dump == ltv->an_type)) { 1603 if_printf(sc->an_ifp, "\t"); 1604 bzero(buf,sizeof(buf)); 1605 1606 ptr2 = (u_int8_t *)<v->an_val; 1607 for (i = len; i > 0; i--) { 1608 printf("%02x ", *ptr2); 1609 1610 temp = *ptr2++; 1611 if (isprint(temp)) 1612 buf[count] = temp; 1613 else 1614 buf[count] = '.'; 1615 if (++count == 16) { 1616 count = 0; 1617 printf("%s\n",buf); 1618 if_printf(sc->an_ifp, "\t"); 1619 bzero(buf,sizeof(buf)); 1620 } 1621 } 1622 for (; count != 16; count++) { 1623 printf(" "); 1624 } 1625 printf(" %s\n",buf); 1626 } 1627 } 1628 1629 static int 1630 an_seek(struct an_softc *sc, int id, int off, int chan) 1631 { 1632 int i; 1633 int selreg, offreg; 1634 1635 switch (chan) { 1636 case AN_BAP0: 1637 selreg = AN_SEL0; 1638 offreg = AN_OFF0; 1639 break; 1640 case AN_BAP1: 1641 selreg = AN_SEL1; 1642 offreg = AN_OFF1; 1643 break; 1644 default: 1645 if_printf(sc->an_ifp, "invalid data path: %x\n", chan); 1646 return(EIO); 1647 } 1648 1649 CSR_WRITE_2(sc, selreg, id); 1650 CSR_WRITE_2(sc, offreg, off); 1651 1652 for (i = 0; i < AN_TIMEOUT; i++) { 1653 if (!(CSR_READ_2(sc, offreg) & (AN_OFF_BUSY|AN_OFF_ERR))) 1654 break; 1655 } 1656 1657 if (i == AN_TIMEOUT) 1658 return(ETIMEDOUT); 1659 1660 return(0); 1661 } 1662 1663 static int 1664 an_read_data(struct an_softc *sc, int id, int off, caddr_t buf, int len) 1665 { 1666 int i; 1667 u_int16_t *ptr; 1668 u_int8_t *ptr2; 1669 1670 if (off != -1) { 1671 if (an_seek(sc, id, off, AN_BAP1)) 1672 return(EIO); 1673 } 1674 1675 ptr = (u_int16_t *)buf; 1676 for (i = len; i > 1; i -= 2) 1677 *ptr++ = CSR_READ_2(sc, AN_DATA1); 1678 if (i) { 1679 ptr2 = (u_int8_t *)ptr; 1680 *ptr2 = CSR_READ_1(sc, AN_DATA1); 1681 } 1682 1683 return(0); 1684 } 1685 1686 static int 1687 an_write_data(struct an_softc *sc, int id, int off, caddr_t buf, int len) 1688 { 1689 int i; 1690 u_int16_t *ptr; 1691 u_int8_t *ptr2; 1692 1693 if (off != -1) { 1694 if (an_seek(sc, id, off, AN_BAP0)) 1695 return(EIO); 1696 } 1697 1698 ptr = (u_int16_t *)buf; 1699 for (i = len; i > 1; i -= 2) 1700 CSR_WRITE_2(sc, AN_DATA0, *ptr++); 1701 if (i) { 1702 ptr2 = (u_int8_t *)ptr; 1703 CSR_WRITE_1(sc, AN_DATA0, *ptr2); 1704 } 1705 1706 return(0); 1707 } 1708 1709 /* 1710 * Allocate a region of memory inside the NIC and zero 1711 * it out. 1712 */ 1713 static int 1714 an_alloc_nicmem(struct an_softc *sc, int len, int *id) 1715 { 1716 int i; 1717 1718 if (an_cmd(sc, AN_CMD_ALLOC_MEM, len)) { 1719 if_printf(sc->an_ifp, "failed to allocate %d bytes on NIC\n", 1720 len); 1721 return(ENOMEM); 1722 } 1723 1724 for (i = 0; i < AN_TIMEOUT; i++) { 1725 if (CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350)) & AN_EV_ALLOC) 1726 break; 1727 } 1728 1729 if (i == AN_TIMEOUT) 1730 return(ETIMEDOUT); 1731 1732 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_ALLOC); 1733 *id = CSR_READ_2(sc, AN_ALLOC_FID); 1734 1735 if (an_seek(sc, *id, 0, AN_BAP0)) 1736 return(EIO); 1737 1738 for (i = 0; i < len / 2; i++) 1739 CSR_WRITE_2(sc, AN_DATA0, 0); 1740 1741 return(0); 1742 } 1743 1744 static void 1745 an_setdef(struct an_softc *sc, struct an_req *areq) 1746 { 1747 struct ifnet *ifp; 1748 struct an_ltv_genconfig *cfg; 1749 struct an_ltv_ssidlist_new *ssid; 1750 struct an_ltv_aplist *ap; 1751 struct an_ltv_gen *sp; 1752 1753 ifp = sc->an_ifp; 1754 1755 AN_LOCK_ASSERT(sc); 1756 switch (areq->an_type) { 1757 case AN_RID_GENCONFIG: 1758 cfg = (struct an_ltv_genconfig *)areq; 1759 1760 bcopy((char *)&cfg->an_macaddr, IF_LLADDR(sc->an_ifp), 1761 ETHER_ADDR_LEN); 1762 1763 bcopy((char *)cfg, (char *)&sc->an_config, 1764 sizeof(struct an_ltv_genconfig)); 1765 break; 1766 case AN_RID_SSIDLIST: 1767 ssid = (struct an_ltv_ssidlist_new *)areq; 1768 bcopy((char *)ssid, (char *)&sc->an_ssidlist, 1769 sizeof(struct an_ltv_ssidlist_new)); 1770 break; 1771 case AN_RID_APLIST: 1772 ap = (struct an_ltv_aplist *)areq; 1773 bcopy((char *)ap, (char *)&sc->an_aplist, 1774 sizeof(struct an_ltv_aplist)); 1775 break; 1776 case AN_RID_TX_SPEED: 1777 sp = (struct an_ltv_gen *)areq; 1778 sc->an_tx_rate = sp->an_val; 1779 1780 /* Read the current configuration */ 1781 sc->an_config.an_type = AN_RID_GENCONFIG; 1782 sc->an_config.an_len = sizeof(struct an_ltv_genconfig); 1783 an_read_record(sc, (struct an_ltv_gen *)&sc->an_config); 1784 cfg = &sc->an_config; 1785 1786 /* clear other rates and set the only one we want */ 1787 bzero(cfg->an_rates, sizeof(cfg->an_rates)); 1788 cfg->an_rates[0] = sc->an_tx_rate; 1789 1790 /* Save the new rate */ 1791 sc->an_config.an_type = AN_RID_GENCONFIG; 1792 sc->an_config.an_len = sizeof(struct an_ltv_genconfig); 1793 break; 1794 case AN_RID_WEP_TEMP: 1795 /* Cache the temp keys */ 1796 bcopy(areq, 1797 &sc->an_temp_keys[((struct an_ltv_key *)areq)->kindex], 1798 sizeof(struct an_ltv_key)); 1799 case AN_RID_WEP_PERM: 1800 case AN_RID_LEAPUSERNAME: 1801 case AN_RID_LEAPPASSWORD: 1802 an_init_locked(sc); 1803 1804 /* Disable the MAC. */ 1805 an_cmd(sc, AN_CMD_DISABLE, 0); 1806 1807 /* Write the key */ 1808 an_write_record(sc, (struct an_ltv_gen *)areq); 1809 1810 /* Turn the MAC back on. */ 1811 an_cmd(sc, AN_CMD_ENABLE, 0); 1812 1813 break; 1814 case AN_RID_MONITOR_MODE: 1815 cfg = (struct an_ltv_genconfig *)areq; 1816 bpfdetach(ifp); 1817 if (ng_ether_detach_p != NULL) 1818 (*ng_ether_detach_p) (ifp); 1819 sc->an_monitor = cfg->an_len; 1820 1821 if (sc->an_monitor & AN_MONITOR) { 1822 if (sc->an_monitor & AN_MONITOR_AIRONET_HEADER) { 1823 bpfattach(ifp, DLT_AIRONET_HEADER, 1824 sizeof(struct ether_header)); 1825 } else { 1826 bpfattach(ifp, DLT_IEEE802_11, 1827 sizeof(struct ether_header)); 1828 } 1829 } else { 1830 bpfattach(ifp, DLT_EN10MB, 1831 sizeof(struct ether_header)); 1832 if (ng_ether_attach_p != NULL) 1833 (*ng_ether_attach_p) (ifp); 1834 } 1835 break; 1836 default: 1837 if_printf(ifp, "unknown RID: %x\n", areq->an_type); 1838 return; 1839 } 1840 1841 1842 /* Reinitialize the card. */ 1843 if (ifp->if_flags) 1844 an_init_locked(sc); 1845 1846 return; 1847 } 1848 1849 /* 1850 * Derived from Linux driver to enable promiscious mode. 1851 */ 1852 1853 static void 1854 an_promisc(struct an_softc *sc, int promisc) 1855 { 1856 AN_LOCK_ASSERT(sc); 1857 if (sc->an_was_monitor) { 1858 an_reset(sc); 1859 if (sc->mpi350) 1860 an_init_mpi350_desc(sc); 1861 } 1862 if (sc->an_monitor || sc->an_was_monitor) 1863 an_init_locked(sc); 1864 1865 sc->an_was_monitor = sc->an_monitor; 1866 an_cmd(sc, AN_CMD_SET_MODE, promisc ? 0xffff : 0); 1867 1868 return; 1869 } 1870 1871 static int 1872 an_ioctl(struct ifnet *ifp, u_long command, caddr_t data) 1873 { 1874 int error = 0; 1875 int len; 1876 int i, max; 1877 struct an_softc *sc; 1878 struct ifreq *ifr; 1879 struct thread *td = curthread; 1880 struct ieee80211req *ireq; 1881 struct ieee80211_channel ch; 1882 u_int8_t tmpstr[IEEE80211_NWID_LEN*2]; 1883 u_int8_t *tmpptr; 1884 struct an_ltv_genconfig *config; 1885 struct an_ltv_key *key; 1886 struct an_ltv_status *status; 1887 struct an_ltv_ssidlist_new *ssids; 1888 int mode; 1889 struct aironet_ioctl l_ioctl; 1890 1891 sc = ifp->if_softc; 1892 ifr = (struct ifreq *)data; 1893 ireq = (struct ieee80211req *)data; 1894 1895 config = (struct an_ltv_genconfig *)&sc->areq; 1896 key = (struct an_ltv_key *)&sc->areq; 1897 status = (struct an_ltv_status *)&sc->areq; 1898 ssids = (struct an_ltv_ssidlist_new *)&sc->areq; 1899 1900 if (sc->an_gone) { 1901 error = ENODEV; 1902 goto out; 1903 } 1904 1905 switch (command) { 1906 case SIOCSIFFLAGS: 1907 AN_LOCK(sc); 1908 if (ifp->if_flags & IFF_UP) { 1909 if (ifp->if_drv_flags & IFF_DRV_RUNNING && 1910 ifp->if_flags & IFF_PROMISC && 1911 !(sc->an_if_flags & IFF_PROMISC)) { 1912 an_promisc(sc, 1); 1913 } else if (ifp->if_drv_flags & IFF_DRV_RUNNING && 1914 !(ifp->if_flags & IFF_PROMISC) && 1915 sc->an_if_flags & IFF_PROMISC) { 1916 an_promisc(sc, 0); 1917 } else 1918 an_init_locked(sc); 1919 } else { 1920 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1921 an_stop(sc); 1922 } 1923 sc->an_if_flags = ifp->if_flags; 1924 AN_UNLOCK(sc); 1925 error = 0; 1926 break; 1927 case SIOCSIFMEDIA: 1928 case SIOCGIFMEDIA: 1929 error = ifmedia_ioctl(ifp, ifr, &sc->an_ifmedia, command); 1930 break; 1931 case SIOCADDMULTI: 1932 case SIOCDELMULTI: 1933 /* The Aironet has no multicast filter. */ 1934 error = 0; 1935 break; 1936 case SIOCGAIRONET: 1937 error = copyin(ifr_data_get_ptr(ifr), &sc->areq, 1938 sizeof(sc->areq)); 1939 if (error != 0) 1940 break; 1941 AN_LOCK(sc); 1942 #ifdef ANCACHE 1943 if (sc->areq.an_type == AN_RID_ZERO_CACHE) { 1944 error = priv_check(td, PRIV_DRIVER); 1945 if (error) 1946 break; 1947 sc->an_sigitems = sc->an_nextitem = 0; 1948 break; 1949 } else if (sc->areq.an_type == AN_RID_READ_CACHE) { 1950 char *pt = (char *)&sc->areq.an_val; 1951 bcopy((char *)&sc->an_sigitems, (char *)pt, 1952 sizeof(int)); 1953 pt += sizeof(int); 1954 sc->areq.an_len = sizeof(int) / 2; 1955 bcopy((char *)&sc->an_sigcache, (char *)pt, 1956 sizeof(struct an_sigcache) * sc->an_sigitems); 1957 sc->areq.an_len += ((sizeof(struct an_sigcache) * 1958 sc->an_sigitems) / 2) + 1; 1959 } else 1960 #endif 1961 if (an_read_record(sc, (struct an_ltv_gen *)&sc->areq)) { 1962 AN_UNLOCK(sc); 1963 error = EINVAL; 1964 break; 1965 } 1966 AN_UNLOCK(sc); 1967 error = copyout(&sc->areq, ifr_data_get_ptr(ifr), 1968 sizeof(sc->areq)); 1969 break; 1970 case SIOCSAIRONET: 1971 if ((error = priv_check(td, PRIV_DRIVER))) 1972 goto out; 1973 AN_LOCK(sc); 1974 error = copyin(ifr_data_get_ptr(ifr), &sc->areq, 1975 sizeof(sc->areq)); 1976 if (error != 0) 1977 break; 1978 an_setdef(sc, &sc->areq); 1979 AN_UNLOCK(sc); 1980 break; 1981 case SIOCGPRIVATE_0: /* used by Cisco client utility */ 1982 if ((error = priv_check(td, PRIV_DRIVER))) 1983 goto out; 1984 error = copyin(ifr_data_get_ptr(ifr), &l_ioctl, 1985 sizeof(l_ioctl)); 1986 if (error) 1987 goto out; 1988 mode = l_ioctl.command; 1989 1990 AN_LOCK(sc); 1991 if (mode >= AIROGCAP && mode <= AIROGSTATSD32) { 1992 error = readrids(ifp, &l_ioctl); 1993 } else if (mode >= AIROPCAP && mode <= AIROPLEAPUSR) { 1994 error = writerids(ifp, &l_ioctl); 1995 } else if (mode >= AIROFLSHRST && mode <= AIRORESTART) { 1996 error = flashcard(ifp, &l_ioctl); 1997 } else { 1998 error =-1; 1999 } 2000 AN_UNLOCK(sc); 2001 if (!error) { 2002 /* copy out the updated command info */ 2003 error = copyout(&l_ioctl, ifr_data_get_ptr(ifr), 2004 sizeof(l_ioctl)); 2005 } 2006 break; 2007 case SIOCGPRIVATE_1: /* used by Cisco client utility */ 2008 if ((error = priv_check(td, PRIV_DRIVER))) 2009 goto out; 2010 error = copyin(ifr_data_get_ptr(ifr), &l_ioctl, 2011 sizeof(l_ioctl)); 2012 if (error) 2013 goto out; 2014 l_ioctl.command = 0; 2015 error = AIROMAGIC; 2016 (void) copyout(&error, l_ioctl.data, sizeof(error)); 2017 error = 0; 2018 break; 2019 case SIOCG80211: 2020 sc->areq.an_len = sizeof(sc->areq); 2021 /* was that a good idea DJA we are doing a short-cut */ 2022 switch (ireq->i_type) { 2023 case IEEE80211_IOC_SSID: 2024 AN_LOCK(sc); 2025 if (ireq->i_val == -1) { 2026 sc->areq.an_type = AN_RID_STATUS; 2027 if (an_read_record(sc, 2028 (struct an_ltv_gen *)&sc->areq)) { 2029 error = EINVAL; 2030 AN_UNLOCK(sc); 2031 break; 2032 } 2033 len = status->an_ssidlen; 2034 tmpptr = status->an_ssid; 2035 } else if (ireq->i_val >= 0) { 2036 sc->areq.an_type = AN_RID_SSIDLIST; 2037 if (an_read_record(sc, 2038 (struct an_ltv_gen *)&sc->areq)) { 2039 error = EINVAL; 2040 AN_UNLOCK(sc); 2041 break; 2042 } 2043 max = (sc->areq.an_len - 4) 2044 / sizeof(struct an_ltv_ssid_entry); 2045 if ( max > MAX_SSIDS ) { 2046 printf("To many SSIDs only using " 2047 "%d of %d\n", 2048 MAX_SSIDS, max); 2049 max = MAX_SSIDS; 2050 } 2051 if (ireq->i_val > max) { 2052 error = EINVAL; 2053 AN_UNLOCK(sc); 2054 break; 2055 } else { 2056 len = ssids->an_entry[ireq->i_val].an_len; 2057 tmpptr = ssids->an_entry[ireq->i_val].an_ssid; 2058 } 2059 } else { 2060 error = EINVAL; 2061 AN_UNLOCK(sc); 2062 break; 2063 } 2064 if (len > IEEE80211_NWID_LEN) { 2065 error = EINVAL; 2066 AN_UNLOCK(sc); 2067 break; 2068 } 2069 AN_UNLOCK(sc); 2070 ireq->i_len = len; 2071 bzero(tmpstr, IEEE80211_NWID_LEN); 2072 bcopy(tmpptr, tmpstr, len); 2073 error = copyout(tmpstr, ireq->i_data, 2074 IEEE80211_NWID_LEN); 2075 break; 2076 case IEEE80211_IOC_NUMSSIDS: 2077 AN_LOCK(sc); 2078 sc->areq.an_len = sizeof(sc->areq); 2079 sc->areq.an_type = AN_RID_SSIDLIST; 2080 if (an_read_record(sc, 2081 (struct an_ltv_gen *)&sc->areq)) { 2082 AN_UNLOCK(sc); 2083 error = EINVAL; 2084 break; 2085 } 2086 max = (sc->areq.an_len - 4) 2087 / sizeof(struct an_ltv_ssid_entry); 2088 AN_UNLOCK(sc); 2089 if ( max > MAX_SSIDS ) { 2090 printf("To many SSIDs only using " 2091 "%d of %d\n", 2092 MAX_SSIDS, max); 2093 max = MAX_SSIDS; 2094 } 2095 ireq->i_val = max; 2096 break; 2097 case IEEE80211_IOC_WEP: 2098 AN_LOCK(sc); 2099 sc->areq.an_type = AN_RID_ACTUALCFG; 2100 if (an_read_record(sc, 2101 (struct an_ltv_gen *)&sc->areq)) { 2102 error = EINVAL; 2103 AN_UNLOCK(sc); 2104 break; 2105 } 2106 AN_UNLOCK(sc); 2107 if (config->an_authtype & AN_AUTHTYPE_PRIVACY_IN_USE) { 2108 if (config->an_authtype & 2109 AN_AUTHTYPE_ALLOW_UNENCRYPTED) 2110 ireq->i_val = IEEE80211_WEP_MIXED; 2111 else 2112 ireq->i_val = IEEE80211_WEP_ON; 2113 } else { 2114 ireq->i_val = IEEE80211_WEP_OFF; 2115 } 2116 break; 2117 case IEEE80211_IOC_WEPKEY: 2118 /* 2119 * XXX: I'm not entierly convinced this is 2120 * correct, but it's what is implemented in 2121 * ancontrol so it will have to do until we get 2122 * access to actual Cisco code. 2123 */ 2124 if (ireq->i_val < 0 || ireq->i_val > 8) { 2125 error = EINVAL; 2126 break; 2127 } 2128 len = 0; 2129 if (ireq->i_val < 5) { 2130 AN_LOCK(sc); 2131 sc->areq.an_type = AN_RID_WEP_TEMP; 2132 for (i = 0; i < 5; i++) { 2133 if (an_read_record(sc, 2134 (struct an_ltv_gen *)&sc->areq)) { 2135 error = EINVAL; 2136 break; 2137 } 2138 if (key->kindex == 0xffff) 2139 break; 2140 if (key->kindex == ireq->i_val) 2141 len = key->klen; 2142 /* Required to get next entry */ 2143 sc->areq.an_type = AN_RID_WEP_PERM; 2144 } 2145 AN_UNLOCK(sc); 2146 if (error != 0) { 2147 break; 2148 } 2149 } 2150 /* We aren't allowed to read the value of the 2151 * key from the card so we just output zeros 2152 * like we would if we could read the card, but 2153 * denied the user access. 2154 */ 2155 bzero(tmpstr, len); 2156 ireq->i_len = len; 2157 error = copyout(tmpstr, ireq->i_data, len); 2158 break; 2159 case IEEE80211_IOC_NUMWEPKEYS: 2160 ireq->i_val = 9; /* include home key */ 2161 break; 2162 case IEEE80211_IOC_WEPTXKEY: 2163 /* 2164 * For some strange reason, you have to read all 2165 * keys before you can read the txkey. 2166 */ 2167 AN_LOCK(sc); 2168 sc->areq.an_type = AN_RID_WEP_TEMP; 2169 for (i = 0; i < 5; i++) { 2170 if (an_read_record(sc, 2171 (struct an_ltv_gen *) &sc->areq)) { 2172 error = EINVAL; 2173 break; 2174 } 2175 if (key->kindex == 0xffff) { 2176 break; 2177 } 2178 /* Required to get next entry */ 2179 sc->areq.an_type = AN_RID_WEP_PERM; 2180 } 2181 if (error != 0) { 2182 AN_UNLOCK(sc); 2183 break; 2184 } 2185 2186 sc->areq.an_type = AN_RID_WEP_PERM; 2187 key->kindex = 0xffff; 2188 if (an_read_record(sc, 2189 (struct an_ltv_gen *)&sc->areq)) { 2190 error = EINVAL; 2191 AN_UNLOCK(sc); 2192 break; 2193 } 2194 ireq->i_val = key->mac[0]; 2195 /* 2196 * Check for home mode. Map home mode into 2197 * 5th key since that is how it is stored on 2198 * the card 2199 */ 2200 sc->areq.an_len = sizeof(struct an_ltv_genconfig); 2201 sc->areq.an_type = AN_RID_GENCONFIG; 2202 if (an_read_record(sc, 2203 (struct an_ltv_gen *)&sc->areq)) { 2204 error = EINVAL; 2205 AN_UNLOCK(sc); 2206 break; 2207 } 2208 if (config->an_home_product & AN_HOME_NETWORK) 2209 ireq->i_val = 4; 2210 AN_UNLOCK(sc); 2211 break; 2212 case IEEE80211_IOC_AUTHMODE: 2213 AN_LOCK(sc); 2214 sc->areq.an_type = AN_RID_ACTUALCFG; 2215 if (an_read_record(sc, 2216 (struct an_ltv_gen *)&sc->areq)) { 2217 error = EINVAL; 2218 AN_UNLOCK(sc); 2219 break; 2220 } 2221 AN_UNLOCK(sc); 2222 if ((config->an_authtype & AN_AUTHTYPE_MASK) == 2223 AN_AUTHTYPE_NONE) { 2224 ireq->i_val = IEEE80211_AUTH_NONE; 2225 } else if ((config->an_authtype & AN_AUTHTYPE_MASK) == 2226 AN_AUTHTYPE_OPEN) { 2227 ireq->i_val = IEEE80211_AUTH_OPEN; 2228 } else if ((config->an_authtype & AN_AUTHTYPE_MASK) == 2229 AN_AUTHTYPE_SHAREDKEY) { 2230 ireq->i_val = IEEE80211_AUTH_SHARED; 2231 } else 2232 error = EINVAL; 2233 break; 2234 case IEEE80211_IOC_STATIONNAME: 2235 AN_LOCK(sc); 2236 sc->areq.an_type = AN_RID_ACTUALCFG; 2237 if (an_read_record(sc, 2238 (struct an_ltv_gen *)&sc->areq)) { 2239 error = EINVAL; 2240 AN_UNLOCK(sc); 2241 break; 2242 } 2243 AN_UNLOCK(sc); 2244 ireq->i_len = sizeof(config->an_nodename); 2245 tmpptr = config->an_nodename; 2246 bzero(tmpstr, IEEE80211_NWID_LEN); 2247 bcopy(tmpptr, tmpstr, ireq->i_len); 2248 error = copyout(tmpstr, ireq->i_data, 2249 IEEE80211_NWID_LEN); 2250 break; 2251 case IEEE80211_IOC_CHANNEL: 2252 AN_LOCK(sc); 2253 sc->areq.an_type = AN_RID_STATUS; 2254 if (an_read_record(sc, 2255 (struct an_ltv_gen *)&sc->areq)) { 2256 error = EINVAL; 2257 AN_UNLOCK(sc); 2258 break; 2259 } 2260 AN_UNLOCK(sc); 2261 ireq->i_val = status->an_cur_channel; 2262 break; 2263 case IEEE80211_IOC_CURCHAN: 2264 AN_LOCK(sc); 2265 sc->areq.an_type = AN_RID_STATUS; 2266 if (an_read_record(sc, 2267 (struct an_ltv_gen *)&sc->areq)) { 2268 error = EINVAL; 2269 AN_UNLOCK(sc); 2270 break; 2271 } 2272 AN_UNLOCK(sc); 2273 bzero(&ch, sizeof(ch)); 2274 ch.ic_freq = ieee80211_ieee2mhz(status->an_cur_channel, 2275 IEEE80211_CHAN_B); 2276 ch.ic_flags = IEEE80211_CHAN_B; 2277 ch.ic_ieee = status->an_cur_channel; 2278 error = copyout(&ch, ireq->i_data, sizeof(ch)); 2279 break; 2280 case IEEE80211_IOC_POWERSAVE: 2281 AN_LOCK(sc); 2282 sc->areq.an_type = AN_RID_ACTUALCFG; 2283 if (an_read_record(sc, 2284 (struct an_ltv_gen *)&sc->areq)) { 2285 error = EINVAL; 2286 AN_UNLOCK(sc); 2287 break; 2288 } 2289 AN_UNLOCK(sc); 2290 if (config->an_psave_mode == AN_PSAVE_NONE) { 2291 ireq->i_val = IEEE80211_POWERSAVE_OFF; 2292 } else if (config->an_psave_mode == AN_PSAVE_CAM) { 2293 ireq->i_val = IEEE80211_POWERSAVE_CAM; 2294 } else if (config->an_psave_mode == AN_PSAVE_PSP) { 2295 ireq->i_val = IEEE80211_POWERSAVE_PSP; 2296 } else if (config->an_psave_mode == AN_PSAVE_PSP_CAM) { 2297 ireq->i_val = IEEE80211_POWERSAVE_PSP_CAM; 2298 } else 2299 error = EINVAL; 2300 break; 2301 case IEEE80211_IOC_POWERSAVESLEEP: 2302 AN_LOCK(sc); 2303 sc->areq.an_type = AN_RID_ACTUALCFG; 2304 if (an_read_record(sc, 2305 (struct an_ltv_gen *)&sc->areq)) { 2306 error = EINVAL; 2307 AN_UNLOCK(sc); 2308 break; 2309 } 2310 AN_UNLOCK(sc); 2311 ireq->i_val = config->an_listen_interval; 2312 break; 2313 } 2314 break; 2315 case SIOCS80211: 2316 if ((error = priv_check(td, PRIV_NET80211_MANAGE))) 2317 goto out; 2318 AN_LOCK(sc); 2319 sc->areq.an_len = sizeof(sc->areq); 2320 /* 2321 * We need a config structure for everything but the WEP 2322 * key management and SSIDs so we get it now so avoid 2323 * duplicating this code every time. 2324 */ 2325 if (ireq->i_type != IEEE80211_IOC_SSID && 2326 ireq->i_type != IEEE80211_IOC_WEPKEY && 2327 ireq->i_type != IEEE80211_IOC_WEPTXKEY) { 2328 sc->areq.an_type = AN_RID_GENCONFIG; 2329 if (an_read_record(sc, 2330 (struct an_ltv_gen *)&sc->areq)) { 2331 error = EINVAL; 2332 AN_UNLOCK(sc); 2333 break; 2334 } 2335 } 2336 switch (ireq->i_type) { 2337 case IEEE80211_IOC_SSID: 2338 sc->areq.an_len = sizeof(sc->areq); 2339 sc->areq.an_type = AN_RID_SSIDLIST; 2340 if (an_read_record(sc, 2341 (struct an_ltv_gen *)&sc->areq)) { 2342 error = EINVAL; 2343 AN_UNLOCK(sc); 2344 break; 2345 } 2346 if (ireq->i_len > IEEE80211_NWID_LEN) { 2347 error = EINVAL; 2348 AN_UNLOCK(sc); 2349 break; 2350 } 2351 max = (sc->areq.an_len - 4) 2352 / sizeof(struct an_ltv_ssid_entry); 2353 if ( max > MAX_SSIDS ) { 2354 printf("To many SSIDs only using " 2355 "%d of %d\n", 2356 MAX_SSIDS, max); 2357 max = MAX_SSIDS; 2358 } 2359 if (ireq->i_val > max) { 2360 error = EINVAL; 2361 AN_UNLOCK(sc); 2362 break; 2363 } else { 2364 error = copyin(ireq->i_data, 2365 ssids->an_entry[ireq->i_val].an_ssid, 2366 ireq->i_len); 2367 ssids->an_entry[ireq->i_val].an_len 2368 = ireq->i_len; 2369 sc->areq.an_len = sizeof(sc->areq); 2370 sc->areq.an_type = AN_RID_SSIDLIST; 2371 an_setdef(sc, &sc->areq); 2372 AN_UNLOCK(sc); 2373 break; 2374 } 2375 break; 2376 case IEEE80211_IOC_WEP: 2377 switch (ireq->i_val) { 2378 case IEEE80211_WEP_OFF: 2379 config->an_authtype &= 2380 ~(AN_AUTHTYPE_PRIVACY_IN_USE | 2381 AN_AUTHTYPE_ALLOW_UNENCRYPTED); 2382 break; 2383 case IEEE80211_WEP_ON: 2384 config->an_authtype |= 2385 AN_AUTHTYPE_PRIVACY_IN_USE; 2386 config->an_authtype &= 2387 ~AN_AUTHTYPE_ALLOW_UNENCRYPTED; 2388 break; 2389 case IEEE80211_WEP_MIXED: 2390 config->an_authtype |= 2391 AN_AUTHTYPE_PRIVACY_IN_USE | 2392 AN_AUTHTYPE_ALLOW_UNENCRYPTED; 2393 break; 2394 default: 2395 error = EINVAL; 2396 break; 2397 } 2398 if (error != EINVAL) 2399 an_setdef(sc, &sc->areq); 2400 AN_UNLOCK(sc); 2401 break; 2402 case IEEE80211_IOC_WEPKEY: 2403 if (ireq->i_val < 0 || ireq->i_val > 8 || 2404 ireq->i_len > 13) { 2405 error = EINVAL; 2406 AN_UNLOCK(sc); 2407 break; 2408 } 2409 error = copyin(ireq->i_data, tmpstr, 13); 2410 if (error != 0) { 2411 AN_UNLOCK(sc); 2412 break; 2413 } 2414 /* 2415 * Map the 9th key into the home mode 2416 * since that is how it is stored on 2417 * the card 2418 */ 2419 bzero(&sc->areq, sizeof(struct an_ltv_key)); 2420 sc->areq.an_len = sizeof(struct an_ltv_key); 2421 key->mac[0] = 1; /* The others are 0. */ 2422 if (ireq->i_val < 4) { 2423 sc->areq.an_type = AN_RID_WEP_TEMP; 2424 key->kindex = ireq->i_val; 2425 } else { 2426 sc->areq.an_type = AN_RID_WEP_PERM; 2427 key->kindex = ireq->i_val - 4; 2428 } 2429 key->klen = ireq->i_len; 2430 bcopy(tmpstr, key->key, key->klen); 2431 an_setdef(sc, &sc->areq); 2432 AN_UNLOCK(sc); 2433 break; 2434 case IEEE80211_IOC_WEPTXKEY: 2435 if (ireq->i_val < 0 || ireq->i_val > 4) { 2436 error = EINVAL; 2437 AN_UNLOCK(sc); 2438 break; 2439 } 2440 2441 /* 2442 * Map the 5th key into the home mode 2443 * since that is how it is stored on 2444 * the card 2445 */ 2446 sc->areq.an_len = sizeof(struct an_ltv_genconfig); 2447 sc->areq.an_type = AN_RID_ACTUALCFG; 2448 if (an_read_record(sc, 2449 (struct an_ltv_gen *)&sc->areq)) { 2450 error = EINVAL; 2451 AN_UNLOCK(sc); 2452 break; 2453 } 2454 if (ireq->i_val == 4) { 2455 config->an_home_product |= AN_HOME_NETWORK; 2456 ireq->i_val = 0; 2457 } else { 2458 config->an_home_product &= ~AN_HOME_NETWORK; 2459 } 2460 2461 sc->an_config.an_home_product 2462 = config->an_home_product; 2463 2464 /* update configuration */ 2465 an_init_locked(sc); 2466 2467 bzero(&sc->areq, sizeof(struct an_ltv_key)); 2468 sc->areq.an_len = sizeof(struct an_ltv_key); 2469 sc->areq.an_type = AN_RID_WEP_PERM; 2470 key->kindex = 0xffff; 2471 key->mac[0] = ireq->i_val; 2472 an_setdef(sc, &sc->areq); 2473 AN_UNLOCK(sc); 2474 break; 2475 case IEEE80211_IOC_AUTHMODE: 2476 switch (ireq->i_val) { 2477 case IEEE80211_AUTH_NONE: 2478 config->an_authtype = AN_AUTHTYPE_NONE | 2479 (config->an_authtype & ~AN_AUTHTYPE_MASK); 2480 break; 2481 case IEEE80211_AUTH_OPEN: 2482 config->an_authtype = AN_AUTHTYPE_OPEN | 2483 (config->an_authtype & ~AN_AUTHTYPE_MASK); 2484 break; 2485 case IEEE80211_AUTH_SHARED: 2486 config->an_authtype = AN_AUTHTYPE_SHAREDKEY | 2487 (config->an_authtype & ~AN_AUTHTYPE_MASK); 2488 break; 2489 default: 2490 error = EINVAL; 2491 } 2492 if (error != EINVAL) { 2493 an_setdef(sc, &sc->areq); 2494 } 2495 AN_UNLOCK(sc); 2496 break; 2497 case IEEE80211_IOC_STATIONNAME: 2498 if (ireq->i_len > 16) { 2499 error = EINVAL; 2500 AN_UNLOCK(sc); 2501 break; 2502 } 2503 bzero(config->an_nodename, 16); 2504 error = copyin(ireq->i_data, 2505 config->an_nodename, ireq->i_len); 2506 an_setdef(sc, &sc->areq); 2507 AN_UNLOCK(sc); 2508 break; 2509 case IEEE80211_IOC_CHANNEL: 2510 /* 2511 * The actual range is 1-14, but if you set it 2512 * to 0 you get the default so we let that work 2513 * too. 2514 */ 2515 if (ireq->i_val < 0 || ireq->i_val >14) { 2516 error = EINVAL; 2517 AN_UNLOCK(sc); 2518 break; 2519 } 2520 config->an_ds_channel = ireq->i_val; 2521 an_setdef(sc, &sc->areq); 2522 AN_UNLOCK(sc); 2523 break; 2524 case IEEE80211_IOC_POWERSAVE: 2525 switch (ireq->i_val) { 2526 case IEEE80211_POWERSAVE_OFF: 2527 config->an_psave_mode = AN_PSAVE_NONE; 2528 break; 2529 case IEEE80211_POWERSAVE_CAM: 2530 config->an_psave_mode = AN_PSAVE_CAM; 2531 break; 2532 case IEEE80211_POWERSAVE_PSP: 2533 config->an_psave_mode = AN_PSAVE_PSP; 2534 break; 2535 case IEEE80211_POWERSAVE_PSP_CAM: 2536 config->an_psave_mode = AN_PSAVE_PSP_CAM; 2537 break; 2538 default: 2539 error = EINVAL; 2540 break; 2541 } 2542 an_setdef(sc, &sc->areq); 2543 AN_UNLOCK(sc); 2544 break; 2545 case IEEE80211_IOC_POWERSAVESLEEP: 2546 config->an_listen_interval = ireq->i_val; 2547 an_setdef(sc, &sc->areq); 2548 AN_UNLOCK(sc); 2549 break; 2550 default: 2551 AN_UNLOCK(sc); 2552 break; 2553 } 2554 2555 /* 2556 if (!error) { 2557 AN_LOCK(sc); 2558 an_setdef(sc, &sc->areq); 2559 AN_UNLOCK(sc); 2560 } 2561 */ 2562 break; 2563 default: 2564 error = ether_ioctl(ifp, command, data); 2565 break; 2566 } 2567 out: 2568 2569 return(error != 0); 2570 } 2571 2572 static int 2573 an_init_tx_ring(struct an_softc *sc) 2574 { 2575 int i; 2576 int id; 2577 2578 if (sc->an_gone) 2579 return (0); 2580 2581 if (!sc->mpi350) { 2582 for (i = 0; i < AN_TX_RING_CNT; i++) { 2583 if (an_alloc_nicmem(sc, 1518 + 2584 0x44, &id)) 2585 return(ENOMEM); 2586 sc->an_rdata.an_tx_fids[i] = id; 2587 sc->an_rdata.an_tx_ring[i] = 0; 2588 } 2589 } 2590 2591 sc->an_rdata.an_tx_prod = 0; 2592 sc->an_rdata.an_tx_cons = 0; 2593 sc->an_rdata.an_tx_empty = 1; 2594 2595 return(0); 2596 } 2597 2598 static void 2599 an_init(void *xsc) 2600 { 2601 struct an_softc *sc = xsc; 2602 2603 AN_LOCK(sc); 2604 an_init_locked(sc); 2605 AN_UNLOCK(sc); 2606 } 2607 2608 static void 2609 an_init_locked(struct an_softc *sc) 2610 { 2611 struct ifnet *ifp; 2612 2613 AN_LOCK_ASSERT(sc); 2614 ifp = sc->an_ifp; 2615 if (sc->an_gone) 2616 return; 2617 2618 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 2619 an_stop(sc); 2620 2621 sc->an_associated = 0; 2622 2623 /* Allocate the TX buffers */ 2624 if (an_init_tx_ring(sc)) { 2625 an_reset(sc); 2626 if (sc->mpi350) 2627 an_init_mpi350_desc(sc); 2628 if (an_init_tx_ring(sc)) { 2629 if_printf(ifp, "tx buffer allocation failed\n"); 2630 return; 2631 } 2632 } 2633 2634 /* Set our MAC address. */ 2635 bcopy((char *)IF_LLADDR(sc->an_ifp), 2636 (char *)&sc->an_config.an_macaddr, ETHER_ADDR_LEN); 2637 2638 if (ifp->if_flags & IFF_BROADCAST) 2639 sc->an_config.an_rxmode = AN_RXMODE_BC_ADDR; 2640 else 2641 sc->an_config.an_rxmode = AN_RXMODE_ADDR; 2642 2643 if (ifp->if_flags & IFF_MULTICAST) 2644 sc->an_config.an_rxmode = AN_RXMODE_BC_MC_ADDR; 2645 2646 if (ifp->if_flags & IFF_PROMISC) { 2647 if (sc->an_monitor & AN_MONITOR) { 2648 if (sc->an_monitor & AN_MONITOR_ANY_BSS) { 2649 sc->an_config.an_rxmode |= 2650 AN_RXMODE_80211_MONITOR_ANYBSS | 2651 AN_RXMODE_NO_8023_HEADER; 2652 } else { 2653 sc->an_config.an_rxmode |= 2654 AN_RXMODE_80211_MONITOR_CURBSS | 2655 AN_RXMODE_NO_8023_HEADER; 2656 } 2657 } 2658 } 2659 2660 #ifdef ANCACHE 2661 if (sc->an_have_rssimap) 2662 sc->an_config.an_rxmode |= AN_RXMODE_NORMALIZED_RSSI; 2663 #endif 2664 2665 /* Set the ssid list */ 2666 sc->an_ssidlist.an_type = AN_RID_SSIDLIST; 2667 sc->an_ssidlist.an_len = sizeof(struct an_ltv_ssidlist_new); 2668 if (an_write_record(sc, (struct an_ltv_gen *)&sc->an_ssidlist)) { 2669 if_printf(ifp, "failed to set ssid list\n"); 2670 return; 2671 } 2672 2673 /* Set the AP list */ 2674 sc->an_aplist.an_type = AN_RID_APLIST; 2675 sc->an_aplist.an_len = sizeof(struct an_ltv_aplist); 2676 if (an_write_record(sc, (struct an_ltv_gen *)&sc->an_aplist)) { 2677 if_printf(ifp, "failed to set AP list\n"); 2678 return; 2679 } 2680 2681 /* Set the configuration in the NIC */ 2682 sc->an_config.an_len = sizeof(struct an_ltv_genconfig); 2683 sc->an_config.an_type = AN_RID_GENCONFIG; 2684 if (an_write_record(sc, (struct an_ltv_gen *)&sc->an_config)) { 2685 if_printf(ifp, "failed to set configuration\n"); 2686 return; 2687 } 2688 2689 /* Enable the MAC */ 2690 if (an_cmd(sc, AN_CMD_ENABLE, 0)) { 2691 if_printf(ifp, "failed to enable MAC\n"); 2692 return; 2693 } 2694 2695 if (ifp->if_flags & IFF_PROMISC) 2696 an_cmd(sc, AN_CMD_SET_MODE, 0xffff); 2697 2698 /* enable interrupts */ 2699 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), AN_INTRS(sc->mpi350)); 2700 2701 ifp->if_drv_flags |= IFF_DRV_RUNNING; 2702 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 2703 2704 callout_reset(&sc->an_stat_ch, hz, an_stats_update, sc); 2705 2706 return; 2707 } 2708 2709 static void 2710 an_start(struct ifnet *ifp) 2711 { 2712 struct an_softc *sc; 2713 2714 sc = ifp->if_softc; 2715 AN_LOCK(sc); 2716 an_start_locked(ifp); 2717 AN_UNLOCK(sc); 2718 } 2719 2720 static void 2721 an_start_locked(struct ifnet *ifp) 2722 { 2723 struct an_softc *sc; 2724 struct mbuf *m0 = NULL; 2725 struct an_txframe_802_3 tx_frame_802_3; 2726 struct ether_header *eh; 2727 int id, idx, i; 2728 unsigned char txcontrol; 2729 struct an_card_tx_desc an_tx_desc; 2730 u_int8_t *buf; 2731 2732 sc = ifp->if_softc; 2733 2734 AN_LOCK_ASSERT(sc); 2735 if (sc->an_gone) 2736 return; 2737 2738 if (ifp->if_drv_flags & IFF_DRV_OACTIVE) 2739 return; 2740 2741 if (!sc->an_associated) 2742 return; 2743 2744 /* We can't send in monitor mode so toss any attempts. */ 2745 if (sc->an_monitor && (ifp->if_flags & IFF_PROMISC)) { 2746 for (;;) { 2747 IFQ_DRV_DEQUEUE(&ifp->if_snd, m0); 2748 if (m0 == NULL) 2749 break; 2750 m_freem(m0); 2751 } 2752 return; 2753 } 2754 2755 idx = sc->an_rdata.an_tx_prod; 2756 2757 if (!sc->mpi350) { 2758 bzero((char *)&tx_frame_802_3, sizeof(tx_frame_802_3)); 2759 2760 while (sc->an_rdata.an_tx_ring[idx] == 0) { 2761 IFQ_DRV_DEQUEUE(&ifp->if_snd, m0); 2762 if (m0 == NULL) 2763 break; 2764 2765 id = sc->an_rdata.an_tx_fids[idx]; 2766 eh = mtod(m0, struct ether_header *); 2767 2768 bcopy((char *)&eh->ether_dhost, 2769 (char *)&tx_frame_802_3.an_tx_dst_addr, 2770 ETHER_ADDR_LEN); 2771 bcopy((char *)&eh->ether_shost, 2772 (char *)&tx_frame_802_3.an_tx_src_addr, 2773 ETHER_ADDR_LEN); 2774 2775 /* minus src/dest mac & type */ 2776 tx_frame_802_3.an_tx_802_3_payload_len = 2777 m0->m_pkthdr.len - 12; 2778 2779 m_copydata(m0, sizeof(struct ether_header) - 2 , 2780 tx_frame_802_3.an_tx_802_3_payload_len, 2781 (caddr_t)&sc->an_txbuf); 2782 2783 txcontrol = AN_TXCTL_8023 | AN_TXCTL_HW(sc->mpi350); 2784 /* write the txcontrol only */ 2785 an_write_data(sc, id, 0x08, (caddr_t)&txcontrol, 2786 sizeof(txcontrol)); 2787 2788 /* 802_3 header */ 2789 an_write_data(sc, id, 0x34, (caddr_t)&tx_frame_802_3, 2790 sizeof(struct an_txframe_802_3)); 2791 2792 /* in mbuf header type is just before payload */ 2793 an_write_data(sc, id, 0x44, (caddr_t)&sc->an_txbuf, 2794 tx_frame_802_3.an_tx_802_3_payload_len); 2795 2796 /* 2797 * If there's a BPF listner, bounce a copy of 2798 * this frame to him. 2799 */ 2800 BPF_MTAP(ifp, m0); 2801 2802 m_freem(m0); 2803 m0 = NULL; 2804 2805 sc->an_rdata.an_tx_ring[idx] = id; 2806 if (an_cmd(sc, AN_CMD_TX, id)) 2807 if_printf(ifp, "xmit failed\n"); 2808 2809 AN_INC(idx, AN_TX_RING_CNT); 2810 2811 /* 2812 * Set a timeout in case the chip goes out to lunch. 2813 */ 2814 sc->an_timer = 5; 2815 } 2816 } else { /* MPI-350 */ 2817 /* Disable interrupts. */ 2818 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0); 2819 2820 while (sc->an_rdata.an_tx_empty || 2821 idx != sc->an_rdata.an_tx_cons) { 2822 IFQ_DRV_DEQUEUE(&ifp->if_snd, m0); 2823 if (m0 == NULL) { 2824 break; 2825 } 2826 buf = sc->an_tx_buffer[idx].an_dma_vaddr; 2827 2828 eh = mtod(m0, struct ether_header *); 2829 2830 /* DJA optimize this to limit bcopy */ 2831 bcopy((char *)&eh->ether_dhost, 2832 (char *)&tx_frame_802_3.an_tx_dst_addr, 2833 ETHER_ADDR_LEN); 2834 bcopy((char *)&eh->ether_shost, 2835 (char *)&tx_frame_802_3.an_tx_src_addr, 2836 ETHER_ADDR_LEN); 2837 2838 /* minus src/dest mac & type */ 2839 tx_frame_802_3.an_tx_802_3_payload_len = 2840 m0->m_pkthdr.len - 12; 2841 2842 m_copydata(m0, sizeof(struct ether_header) - 2 , 2843 tx_frame_802_3.an_tx_802_3_payload_len, 2844 (caddr_t)&sc->an_txbuf); 2845 2846 txcontrol = AN_TXCTL_8023 | AN_TXCTL_HW(sc->mpi350); 2847 /* write the txcontrol only */ 2848 bcopy((caddr_t)&txcontrol, &buf[0x08], 2849 sizeof(txcontrol)); 2850 2851 /* 802_3 header */ 2852 bcopy((caddr_t)&tx_frame_802_3, &buf[0x34], 2853 sizeof(struct an_txframe_802_3)); 2854 2855 /* in mbuf header type is just before payload */ 2856 bcopy((caddr_t)&sc->an_txbuf, &buf[0x44], 2857 tx_frame_802_3.an_tx_802_3_payload_len); 2858 2859 2860 bzero(&an_tx_desc, sizeof(an_tx_desc)); 2861 an_tx_desc.an_offset = 0; 2862 an_tx_desc.an_eoc = 1; 2863 an_tx_desc.an_valid = 1; 2864 an_tx_desc.an_len = 0x44 + 2865 tx_frame_802_3.an_tx_802_3_payload_len; 2866 an_tx_desc.an_phys 2867 = sc->an_tx_buffer[idx].an_dma_paddr; 2868 for (i = sizeof(an_tx_desc) / 4 - 1; i >= 0; i--) { 2869 CSR_MEM_AUX_WRITE_4(sc, AN_TX_DESC_OFFSET 2870 /* zero for now */ 2871 + (0 * sizeof(an_tx_desc)) 2872 + (i * 4), 2873 ((u_int32_t *)(void *)&an_tx_desc)[i]); 2874 } 2875 2876 /* 2877 * If there's a BPF listner, bounce a copy of 2878 * this frame to him. 2879 */ 2880 BPF_MTAP(ifp, m0); 2881 2882 m_freem(m0); 2883 m0 = NULL; 2884 AN_INC(idx, AN_MAX_TX_DESC); 2885 sc->an_rdata.an_tx_empty = 0; 2886 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_ALLOC); 2887 2888 /* 2889 * Set a timeout in case the chip goes out to lunch. 2890 */ 2891 sc->an_timer = 5; 2892 } 2893 2894 /* Re-enable interrupts. */ 2895 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), AN_INTRS(sc->mpi350)); 2896 } 2897 2898 if (m0 != NULL) 2899 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 2900 2901 sc->an_rdata.an_tx_prod = idx; 2902 2903 return; 2904 } 2905 2906 void 2907 an_stop(struct an_softc *sc) 2908 { 2909 struct ifnet *ifp; 2910 int i; 2911 2912 AN_LOCK_ASSERT(sc); 2913 2914 if (sc->an_gone) 2915 return; 2916 2917 ifp = sc->an_ifp; 2918 2919 an_cmd(sc, AN_CMD_FORCE_SYNCLOSS, 0); 2920 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0); 2921 an_cmd(sc, AN_CMD_DISABLE, 0); 2922 2923 for (i = 0; i < AN_TX_RING_CNT; i++) 2924 an_cmd(sc, AN_CMD_DEALLOC_MEM, sc->an_rdata.an_tx_fids[i]); 2925 2926 callout_stop(&sc->an_stat_ch); 2927 2928 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING|IFF_DRV_OACTIVE); 2929 2930 if (sc->an_flash_buffer) { 2931 free(sc->an_flash_buffer, M_DEVBUF); 2932 sc->an_flash_buffer = NULL; 2933 } 2934 } 2935 2936 static void 2937 an_watchdog(struct an_softc *sc) 2938 { 2939 struct ifnet *ifp; 2940 2941 AN_LOCK_ASSERT(sc); 2942 2943 if (sc->an_gone) 2944 return; 2945 2946 ifp = sc->an_ifp; 2947 if_printf(ifp, "device timeout\n"); 2948 2949 an_reset(sc); 2950 if (sc->mpi350) 2951 an_init_mpi350_desc(sc); 2952 an_init_locked(sc); 2953 2954 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 2955 } 2956 2957 int 2958 an_shutdown(device_t dev) 2959 { 2960 struct an_softc *sc; 2961 2962 sc = device_get_softc(dev); 2963 AN_LOCK(sc); 2964 an_stop(sc); 2965 sc->an_gone = 1; 2966 AN_UNLOCK(sc); 2967 2968 return (0); 2969 } 2970 2971 void 2972 an_resume(device_t dev) 2973 { 2974 struct an_softc *sc; 2975 struct ifnet *ifp; 2976 int i; 2977 2978 sc = device_get_softc(dev); 2979 AN_LOCK(sc); 2980 ifp = sc->an_ifp; 2981 2982 sc->an_gone = 0; 2983 an_reset(sc); 2984 if (sc->mpi350) 2985 an_init_mpi350_desc(sc); 2986 an_init_locked(sc); 2987 2988 /* Recovery temporary keys */ 2989 for (i = 0; i < 4; i++) { 2990 sc->areq.an_type = AN_RID_WEP_TEMP; 2991 sc->areq.an_len = sizeof(struct an_ltv_key); 2992 bcopy(&sc->an_temp_keys[i], 2993 &sc->areq, sizeof(struct an_ltv_key)); 2994 an_setdef(sc, &sc->areq); 2995 } 2996 2997 if (ifp->if_flags & IFF_UP) 2998 an_start_locked(ifp); 2999 AN_UNLOCK(sc); 3000 3001 return; 3002 } 3003 3004 #ifdef ANCACHE 3005 /* Aironet signal strength cache code. 3006 * store signal/noise/quality on per MAC src basis in 3007 * a small fixed cache. The cache wraps if > MAX slots 3008 * used. The cache may be zeroed out to start over. 3009 * Two simple filters exist to reduce computation: 3010 * 1. ip only (literally 0x800, ETHERTYPE_IP) which may be used 3011 * to ignore some packets. It defaults to ip only. 3012 * it could be used to focus on broadcast, non-IP 802.11 beacons. 3013 * 2. multicast/broadcast only. This may be used to 3014 * ignore unicast packets and only cache signal strength 3015 * for multicast/broadcast packets (beacons); e.g., Mobile-IP 3016 * beacons and not unicast traffic. 3017 * 3018 * The cache stores (MAC src(index), IP src (major clue), signal, 3019 * quality, noise) 3020 * 3021 * No apologies for storing IP src here. It's easy and saves much 3022 * trouble elsewhere. The cache is assumed to be INET dependent, 3023 * although it need not be. 3024 * 3025 * Note: the Aironet only has a single byte of signal strength value 3026 * in the rx frame header, and it's not scaled to anything sensible. 3027 * This is kind of lame, but it's all we've got. 3028 */ 3029 3030 #ifdef documentation 3031 3032 int an_sigitems; /* number of cached entries */ 3033 struct an_sigcache an_sigcache[MAXANCACHE]; /* array of cache entries */ 3034 int an_nextitem; /* index/# of entries */ 3035 3036 3037 #endif 3038 3039 /* control variables for cache filtering. Basic idea is 3040 * to reduce cost (e.g., to only Mobile-IP agent beacons 3041 * which are broadcast or multicast). Still you might 3042 * want to measure signal strength anth unicast ping packets 3043 * on a pt. to pt. ant. setup. 3044 */ 3045 /* set true if you want to limit cache items to broadcast/mcast 3046 * only packets (not unicast). Useful for mobile-ip beacons which 3047 * are broadcast/multicast at network layer. Default is all packets 3048 * so ping/unicast anll work say anth pt. to pt. antennae setup. 3049 */ 3050 static int an_cache_mcastonly = 0; 3051 SYSCTL_INT(_hw_an, OID_AUTO, an_cache_mcastonly, CTLFLAG_RW, 3052 &an_cache_mcastonly, 0, ""); 3053 3054 /* set true if you want to limit cache items to IP packets only 3055 */ 3056 static int an_cache_iponly = 1; 3057 SYSCTL_INT(_hw_an, OID_AUTO, an_cache_iponly, CTLFLAG_RW, 3058 &an_cache_iponly, 0, ""); 3059 3060 /* 3061 * an_cache_store, per rx packet store signal 3062 * strength in MAC (src) indexed cache. 3063 */ 3064 static void 3065 an_cache_store(struct an_softc *sc, struct ether_header *eh, struct mbuf *m, 3066 u_int8_t rx_rssi, u_int8_t rx_quality) 3067 { 3068 struct ip *ip = NULL; 3069 int i; 3070 static int cache_slot = 0; /* use this cache entry */ 3071 static int wrapindex = 0; /* next "free" cache entry */ 3072 int type_ipv4 = 0; 3073 3074 /* filters: 3075 * 1. ip only 3076 * 2. configurable filter to throw out unicast packets, 3077 * keep multicast only. 3078 */ 3079 3080 if ((ntohs(eh->ether_type) == ETHERTYPE_IP)) { 3081 type_ipv4 = 1; 3082 } 3083 3084 /* filter for ip packets only 3085 */ 3086 if ( an_cache_iponly && !type_ipv4) { 3087 return; 3088 } 3089 3090 /* filter for broadcast/multicast only 3091 */ 3092 if (an_cache_mcastonly && ((eh->ether_dhost[0] & 1) == 0)) { 3093 return; 3094 } 3095 3096 #ifdef SIGDEBUG 3097 if_printf(sc->an_ifp, "q value %x (MSB=0x%x, LSB=0x%x) \n", 3098 rx_rssi & 0xffff, rx_rssi >> 8, rx_rssi & 0xff); 3099 #endif 3100 3101 /* find the ip header. we want to store the ip_src 3102 * address. 3103 */ 3104 if (type_ipv4) { 3105 ip = mtod(m, struct ip *); 3106 } 3107 3108 /* do a linear search for a matching MAC address 3109 * in the cache table 3110 * . MAC address is 6 bytes, 3111 * . var w_nextitem holds total number of entries already cached 3112 */ 3113 for (i = 0; i < sc->an_nextitem; i++) { 3114 if (! bcmp(eh->ether_shost , sc->an_sigcache[i].macsrc, 6 )) { 3115 /* Match!, 3116 * so we already have this entry, 3117 * update the data 3118 */ 3119 break; 3120 } 3121 } 3122 3123 /* did we find a matching mac address? 3124 * if yes, then overwrite a previously existing cache entry 3125 */ 3126 if (i < sc->an_nextitem ) { 3127 cache_slot = i; 3128 } 3129 /* else, have a new address entry,so 3130 * add this new entry, 3131 * if table full, then we need to replace LRU entry 3132 */ 3133 else { 3134 3135 /* check for space in cache table 3136 * note: an_nextitem also holds number of entries 3137 * added in the cache table 3138 */ 3139 if ( sc->an_nextitem < MAXANCACHE ) { 3140 cache_slot = sc->an_nextitem; 3141 sc->an_nextitem++; 3142 sc->an_sigitems = sc->an_nextitem; 3143 } 3144 /* no space found, so simply wrap anth wrap index 3145 * and "zap" the next entry 3146 */ 3147 else { 3148 if (wrapindex == MAXANCACHE) { 3149 wrapindex = 0; 3150 } 3151 cache_slot = wrapindex++; 3152 } 3153 } 3154 3155 /* invariant: cache_slot now points at some slot 3156 * in cache. 3157 */ 3158 if (cache_slot < 0 || cache_slot >= MAXANCACHE) { 3159 log(LOG_ERR, "an_cache_store, bad index: %d of " 3160 "[0..%d], gross cache error\n", 3161 cache_slot, MAXANCACHE); 3162 return; 3163 } 3164 3165 /* store items in cache 3166 * .ip source address 3167 * .mac src 3168 * .signal, etc. 3169 */ 3170 if (type_ipv4) { 3171 sc->an_sigcache[cache_slot].ipsrc = ip->ip_src.s_addr; 3172 } 3173 bcopy( eh->ether_shost, sc->an_sigcache[cache_slot].macsrc, 6); 3174 3175 3176 switch (an_cache_mode) { 3177 case DBM: 3178 if (sc->an_have_rssimap) { 3179 sc->an_sigcache[cache_slot].signal = 3180 - sc->an_rssimap.an_entries[rx_rssi].an_rss_dbm; 3181 sc->an_sigcache[cache_slot].quality = 3182 - sc->an_rssimap.an_entries[rx_quality].an_rss_dbm; 3183 } else { 3184 sc->an_sigcache[cache_slot].signal = rx_rssi - 100; 3185 sc->an_sigcache[cache_slot].quality = rx_quality - 100; 3186 } 3187 break; 3188 case PERCENT: 3189 if (sc->an_have_rssimap) { 3190 sc->an_sigcache[cache_slot].signal = 3191 sc->an_rssimap.an_entries[rx_rssi].an_rss_pct; 3192 sc->an_sigcache[cache_slot].quality = 3193 sc->an_rssimap.an_entries[rx_quality].an_rss_pct; 3194 } else { 3195 if (rx_rssi > 100) 3196 rx_rssi = 100; 3197 if (rx_quality > 100) 3198 rx_quality = 100; 3199 sc->an_sigcache[cache_slot].signal = rx_rssi; 3200 sc->an_sigcache[cache_slot].quality = rx_quality; 3201 } 3202 break; 3203 case RAW: 3204 sc->an_sigcache[cache_slot].signal = rx_rssi; 3205 sc->an_sigcache[cache_slot].quality = rx_quality; 3206 break; 3207 } 3208 3209 sc->an_sigcache[cache_slot].noise = 0; 3210 3211 return; 3212 } 3213 #endif 3214 3215 static int 3216 an_media_change(struct ifnet *ifp) 3217 { 3218 struct an_softc *sc = ifp->if_softc; 3219 struct an_ltv_genconfig *cfg; 3220 int otype = sc->an_config.an_opmode; 3221 int orate = sc->an_tx_rate; 3222 3223 AN_LOCK(sc); 3224 sc->an_tx_rate = ieee80211_media2rate( 3225 IFM_SUBTYPE(sc->an_ifmedia.ifm_cur->ifm_media)); 3226 if (sc->an_tx_rate < 0) 3227 sc->an_tx_rate = 0; 3228 3229 if (orate != sc->an_tx_rate) { 3230 /* Read the current configuration */ 3231 sc->an_config.an_type = AN_RID_GENCONFIG; 3232 sc->an_config.an_len = sizeof(struct an_ltv_genconfig); 3233 an_read_record(sc, (struct an_ltv_gen *)&sc->an_config); 3234 cfg = &sc->an_config; 3235 3236 /* clear other rates and set the only one we want */ 3237 bzero(cfg->an_rates, sizeof(cfg->an_rates)); 3238 cfg->an_rates[0] = sc->an_tx_rate; 3239 3240 /* Save the new rate */ 3241 sc->an_config.an_type = AN_RID_GENCONFIG; 3242 sc->an_config.an_len = sizeof(struct an_ltv_genconfig); 3243 } 3244 3245 if ((sc->an_ifmedia.ifm_cur->ifm_media & IFM_IEEE80211_ADHOC) != 0) 3246 sc->an_config.an_opmode &= ~AN_OPMODE_INFRASTRUCTURE_STATION; 3247 else 3248 sc->an_config.an_opmode |= AN_OPMODE_INFRASTRUCTURE_STATION; 3249 3250 if (otype != sc->an_config.an_opmode || 3251 orate != sc->an_tx_rate) 3252 an_init_locked(sc); 3253 AN_UNLOCK(sc); 3254 3255 return(0); 3256 } 3257 3258 static void 3259 an_media_status(struct ifnet *ifp, struct ifmediareq *imr) 3260 { 3261 struct an_ltv_status status; 3262 struct an_softc *sc = ifp->if_softc; 3263 3264 imr->ifm_active = IFM_IEEE80211; 3265 3266 AN_LOCK(sc); 3267 status.an_len = sizeof(status); 3268 status.an_type = AN_RID_STATUS; 3269 if (an_read_record(sc, (struct an_ltv_gen *)&status)) { 3270 /* If the status read fails, just lie. */ 3271 imr->ifm_active = sc->an_ifmedia.ifm_cur->ifm_media; 3272 imr->ifm_status = IFM_AVALID|IFM_ACTIVE; 3273 } 3274 3275 if (sc->an_tx_rate == 0) { 3276 imr->ifm_active = IFM_IEEE80211|IFM_AUTO; 3277 } 3278 3279 if (sc->an_config.an_opmode == AN_OPMODE_IBSS_ADHOC) 3280 imr->ifm_active |= IFM_IEEE80211_ADHOC; 3281 imr->ifm_active |= ieee80211_rate2media(NULL, 3282 status.an_current_tx_rate, IEEE80211_MODE_AUTO); 3283 imr->ifm_status = IFM_AVALID; 3284 if (status.an_opmode & AN_STATUS_OPMODE_ASSOCIATED) 3285 imr->ifm_status |= IFM_ACTIVE; 3286 AN_UNLOCK(sc); 3287 } 3288 3289 /********************** Cisco utility support routines *************/ 3290 3291 /* 3292 * ReadRids & WriteRids derived from Cisco driver additions to Ben Reed's 3293 * Linux driver 3294 */ 3295 3296 static int 3297 readrids(struct ifnet *ifp, struct aironet_ioctl *l_ioctl) 3298 { 3299 unsigned short rid; 3300 struct an_softc *sc; 3301 int error; 3302 3303 switch (l_ioctl->command) { 3304 case AIROGCAP: 3305 rid = AN_RID_CAPABILITIES; 3306 break; 3307 case AIROGCFG: 3308 rid = AN_RID_GENCONFIG; 3309 break; 3310 case AIROGSLIST: 3311 rid = AN_RID_SSIDLIST; 3312 break; 3313 case AIROGVLIST: 3314 rid = AN_RID_APLIST; 3315 break; 3316 case AIROGDRVNAM: 3317 rid = AN_RID_DRVNAME; 3318 break; 3319 case AIROGEHTENC: 3320 rid = AN_RID_ENCAPPROTO; 3321 break; 3322 case AIROGWEPKTMP: 3323 rid = AN_RID_WEP_TEMP; 3324 break; 3325 case AIROGWEPKNV: 3326 rid = AN_RID_WEP_PERM; 3327 break; 3328 case AIROGSTAT: 3329 rid = AN_RID_STATUS; 3330 break; 3331 case AIROGSTATSD32: 3332 rid = AN_RID_32BITS_DELTA; 3333 break; 3334 case AIROGSTATSC32: 3335 rid = AN_RID_32BITS_CUM; 3336 break; 3337 default: 3338 rid = 999; 3339 break; 3340 } 3341 3342 if (rid == 999) /* Is bad command */ 3343 return -EINVAL; 3344 3345 sc = ifp->if_softc; 3346 sc->areq.an_len = AN_MAX_DATALEN; 3347 sc->areq.an_type = rid; 3348 3349 an_read_record(sc, (struct an_ltv_gen *)&sc->areq); 3350 3351 l_ioctl->len = sc->areq.an_len - 4; /* just data */ 3352 3353 AN_UNLOCK(sc); 3354 /* the data contains the length at first */ 3355 if (copyout(&(sc->areq.an_len), l_ioctl->data, 3356 sizeof(sc->areq.an_len))) { 3357 error = -EFAULT; 3358 goto lock_exit; 3359 } 3360 /* Just copy the data back */ 3361 if (copyout(&(sc->areq.an_val), l_ioctl->data + 2, 3362 l_ioctl->len)) { 3363 error = -EFAULT; 3364 goto lock_exit; 3365 } 3366 error = 0; 3367 lock_exit: 3368 AN_LOCK(sc); 3369 return (error); 3370 } 3371 3372 static int 3373 writerids(struct ifnet *ifp, struct aironet_ioctl *l_ioctl) 3374 { 3375 struct an_softc *sc; 3376 int rid, command, error; 3377 3378 sc = ifp->if_softc; 3379 AN_LOCK_ASSERT(sc); 3380 rid = 0; 3381 command = l_ioctl->command; 3382 3383 switch (command) { 3384 case AIROPSIDS: 3385 rid = AN_RID_SSIDLIST; 3386 break; 3387 case AIROPCAP: 3388 rid = AN_RID_CAPABILITIES; 3389 break; 3390 case AIROPAPLIST: 3391 rid = AN_RID_APLIST; 3392 break; 3393 case AIROPCFG: 3394 rid = AN_RID_GENCONFIG; 3395 break; 3396 case AIROPMACON: 3397 an_cmd(sc, AN_CMD_ENABLE, 0); 3398 return 0; 3399 break; 3400 case AIROPMACOFF: 3401 an_cmd(sc, AN_CMD_DISABLE, 0); 3402 return 0; 3403 break; 3404 case AIROPSTCLR: 3405 /* 3406 * This command merely clears the counts does not actually 3407 * store any data only reads rid. But as it changes the cards 3408 * state, I put it in the writerid routines. 3409 */ 3410 3411 rid = AN_RID_32BITS_DELTACLR; 3412 sc = ifp->if_softc; 3413 sc->areq.an_len = AN_MAX_DATALEN; 3414 sc->areq.an_type = rid; 3415 3416 an_read_record(sc, (struct an_ltv_gen *)&sc->areq); 3417 l_ioctl->len = sc->areq.an_len - 4; /* just data */ 3418 3419 AN_UNLOCK(sc); 3420 /* the data contains the length at first */ 3421 error = copyout(&(sc->areq.an_len), l_ioctl->data, 3422 sizeof(sc->areq.an_len)); 3423 if (error) { 3424 AN_LOCK(sc); 3425 return -EFAULT; 3426 } 3427 /* Just copy the data */ 3428 error = copyout(&(sc->areq.an_val), l_ioctl->data + 2, 3429 l_ioctl->len); 3430 AN_LOCK(sc); 3431 if (error) 3432 return -EFAULT; 3433 return 0; 3434 break; 3435 case AIROPWEPKEY: 3436 rid = AN_RID_WEP_TEMP; 3437 break; 3438 case AIROPWEPKEYNV: 3439 rid = AN_RID_WEP_PERM; 3440 break; 3441 case AIROPLEAPUSR: 3442 rid = AN_RID_LEAPUSERNAME; 3443 break; 3444 case AIROPLEAPPWD: 3445 rid = AN_RID_LEAPPASSWORD; 3446 break; 3447 default: 3448 return -EOPNOTSUPP; 3449 } 3450 3451 if (rid) { 3452 if (l_ioctl->len > sizeof(sc->areq.an_val) + 4) 3453 return -EINVAL; 3454 sc->areq.an_len = l_ioctl->len + 4; /* add type & length */ 3455 sc->areq.an_type = rid; 3456 3457 /* Just copy the data back */ 3458 AN_UNLOCK(sc); 3459 error = copyin((l_ioctl->data) + 2, &sc->areq.an_val, 3460 l_ioctl->len); 3461 AN_LOCK(sc); 3462 if (error) 3463 return -EFAULT; 3464 3465 an_cmd(sc, AN_CMD_DISABLE, 0); 3466 an_write_record(sc, (struct an_ltv_gen *)&sc->areq); 3467 an_cmd(sc, AN_CMD_ENABLE, 0); 3468 return 0; 3469 } 3470 return -EOPNOTSUPP; 3471 } 3472 3473 /* 3474 * General Flash utilities derived from Cisco driver additions to Ben Reed's 3475 * Linux driver 3476 */ 3477 3478 #define FLASH_DELAY(_sc, x) msleep(ifp, &(_sc)->an_mtx, PZERO, \ 3479 "flash", ((x) / hz) + 1); 3480 #define FLASH_COMMAND 0x7e7e 3481 #define FLASH_SIZE 32 * 1024 3482 3483 static int 3484 unstickbusy(struct ifnet *ifp) 3485 { 3486 struct an_softc *sc = ifp->if_softc; 3487 3488 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY) { 3489 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), 3490 AN_EV_CLR_STUCK_BUSY); 3491 return 1; 3492 } 3493 return 0; 3494 } 3495 3496 /* 3497 * Wait for busy completion from card wait for delay uSec's Return true for 3498 * success meaning command reg is clear 3499 */ 3500 3501 static int 3502 WaitBusy(struct ifnet *ifp, int uSec) 3503 { 3504 int statword = 0xffff; 3505 int delay = 0; 3506 struct an_softc *sc = ifp->if_softc; 3507 3508 while ((statword & AN_CMD_BUSY) && delay <= (1000 * 100)) { 3509 FLASH_DELAY(sc, 10); 3510 delay += 10; 3511 statword = CSR_READ_2(sc, AN_COMMAND(sc->mpi350)); 3512 3513 if ((AN_CMD_BUSY & statword) && (delay % 200)) { 3514 unstickbusy(ifp); 3515 } 3516 } 3517 3518 return 0 == (AN_CMD_BUSY & statword); 3519 } 3520 3521 /* 3522 * STEP 1) Disable MAC and do soft reset on card. 3523 */ 3524 3525 static int 3526 cmdreset(struct ifnet *ifp) 3527 { 3528 int status; 3529 struct an_softc *sc = ifp->if_softc; 3530 3531 AN_LOCK(sc); 3532 an_stop(sc); 3533 3534 an_cmd(sc, AN_CMD_DISABLE, 0); 3535 3536 if (!(status = WaitBusy(ifp, AN_TIMEOUT))) { 3537 if_printf(ifp, "Waitbusy hang b4 RESET =%d\n", status); 3538 AN_UNLOCK(sc); 3539 return -EBUSY; 3540 } 3541 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), AN_CMD_FW_RESTART); 3542 3543 FLASH_DELAY(sc, 1000); /* WAS 600 12/7/00 */ 3544 3545 3546 if (!(status = WaitBusy(ifp, 100))) { 3547 if_printf(ifp, "Waitbusy hang AFTER RESET =%d\n", status); 3548 AN_UNLOCK(sc); 3549 return -EBUSY; 3550 } 3551 AN_UNLOCK(sc); 3552 return 0; 3553 } 3554 3555 /* 3556 * STEP 2) Put the card in legendary flash mode 3557 */ 3558 3559 static int 3560 setflashmode(struct ifnet *ifp) 3561 { 3562 int status; 3563 struct an_softc *sc = ifp->if_softc; 3564 3565 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), FLASH_COMMAND); 3566 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), FLASH_COMMAND); 3567 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), FLASH_COMMAND); 3568 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), FLASH_COMMAND); 3569 3570 /* 3571 * mdelay(500); // 500ms delay 3572 */ 3573 3574 FLASH_DELAY(sc, 500); 3575 3576 if (!(status = WaitBusy(ifp, AN_TIMEOUT))) { 3577 printf("Waitbusy hang after setflash mode\n"); 3578 return -EIO; 3579 } 3580 return 0; 3581 } 3582 3583 /* 3584 * Get a character from the card matching matchbyte Step 3) 3585 */ 3586 3587 static int 3588 flashgchar(struct ifnet *ifp, int matchbyte, int dwelltime) 3589 { 3590 int rchar; 3591 unsigned char rbyte = 0; 3592 int success = -1; 3593 struct an_softc *sc = ifp->if_softc; 3594 3595 3596 do { 3597 rchar = CSR_READ_2(sc, AN_SW1(sc->mpi350)); 3598 3599 if (dwelltime && !(0x8000 & rchar)) { 3600 dwelltime -= 10; 3601 FLASH_DELAY(sc, 10); 3602 continue; 3603 } 3604 rbyte = 0xff & rchar; 3605 3606 if ((rbyte == matchbyte) && (0x8000 & rchar)) { 3607 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), 0); 3608 success = 1; 3609 break; 3610 } 3611 if (rbyte == 0x81 || rbyte == 0x82 || rbyte == 0x83 || rbyte == 0x1a || 0xffff == rchar) 3612 break; 3613 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), 0); 3614 3615 } while (dwelltime > 0); 3616 return success; 3617 } 3618 3619 /* 3620 * Put character to SWS0 wait for dwelltime x 50us for echo . 3621 */ 3622 3623 static int 3624 flashpchar(struct ifnet *ifp, int byte, int dwelltime) 3625 { 3626 int echo; 3627 int pollbusy, waittime; 3628 struct an_softc *sc = ifp->if_softc; 3629 3630 byte |= 0x8000; 3631 3632 if (dwelltime == 0) 3633 dwelltime = 200; 3634 3635 waittime = dwelltime; 3636 3637 /* 3638 * Wait for busy bit d15 to go false indicating buffer empty 3639 */ 3640 do { 3641 pollbusy = CSR_READ_2(sc, AN_SW0(sc->mpi350)); 3642 3643 if (pollbusy & 0x8000) { 3644 FLASH_DELAY(sc, 50); 3645 waittime -= 50; 3646 continue; 3647 } else 3648 break; 3649 } 3650 while (waittime >= 0); 3651 3652 /* timeout for busy clear wait */ 3653 3654 if (waittime <= 0) { 3655 if_printf(ifp, "flash putchar busywait timeout!\n"); 3656 return -1; 3657 } 3658 /* 3659 * Port is clear now write byte and wait for it to echo back 3660 */ 3661 do { 3662 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), byte); 3663 FLASH_DELAY(sc, 50); 3664 dwelltime -= 50; 3665 echo = CSR_READ_2(sc, AN_SW1(sc->mpi350)); 3666 } while (dwelltime >= 0 && echo != byte); 3667 3668 3669 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), 0); 3670 3671 return echo == byte; 3672 } 3673 3674 /* 3675 * Transfer 32k of firmware data from user buffer to our buffer and send to 3676 * the card 3677 */ 3678 3679 static int 3680 flashputbuf(struct ifnet *ifp) 3681 { 3682 unsigned short *bufp; 3683 int nwords; 3684 struct an_softc *sc = ifp->if_softc; 3685 3686 /* Write stuff */ 3687 3688 bufp = sc->an_flash_buffer; 3689 3690 if (!sc->mpi350) { 3691 CSR_WRITE_2(sc, AN_AUX_PAGE, 0x100); 3692 CSR_WRITE_2(sc, AN_AUX_OFFSET, 0); 3693 3694 for (nwords = 0; nwords != FLASH_SIZE / 2; nwords++) { 3695 CSR_WRITE_2(sc, AN_AUX_DATA, bufp[nwords] & 0xffff); 3696 } 3697 } else { 3698 for (nwords = 0; nwords != FLASH_SIZE / 4; nwords++) { 3699 CSR_MEM_AUX_WRITE_4(sc, 0x8000, 3700 ((u_int32_t *)bufp)[nwords] & 0xffff); 3701 } 3702 } 3703 3704 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), 0x8000); 3705 3706 return 0; 3707 } 3708 3709 /* 3710 * After flashing restart the card. 3711 */ 3712 3713 static int 3714 flashrestart(struct ifnet *ifp) 3715 { 3716 int status = 0; 3717 struct an_softc *sc = ifp->if_softc; 3718 3719 FLASH_DELAY(sc, 1024); /* Added 12/7/00 */ 3720 3721 an_init_locked(sc); 3722 3723 FLASH_DELAY(sc, 1024); /* Added 12/7/00 */ 3724 return status; 3725 } 3726 3727 /* 3728 * Entry point for flash ioclt. 3729 */ 3730 3731 static int 3732 flashcard(struct ifnet *ifp, struct aironet_ioctl *l_ioctl) 3733 { 3734 int z = 0, status; 3735 struct an_softc *sc; 3736 3737 sc = ifp->if_softc; 3738 if (sc->mpi350) { 3739 if_printf(ifp, "flashing not supported on MPI 350 yet\n"); 3740 return(-1); 3741 } 3742 status = l_ioctl->command; 3743 3744 switch (l_ioctl->command) { 3745 case AIROFLSHRST: 3746 return cmdreset(ifp); 3747 break; 3748 case AIROFLSHSTFL: 3749 if (sc->an_flash_buffer) { 3750 free(sc->an_flash_buffer, M_DEVBUF); 3751 sc->an_flash_buffer = NULL; 3752 } 3753 sc->an_flash_buffer = malloc(FLASH_SIZE, M_DEVBUF, M_WAITOK); 3754 if (sc->an_flash_buffer) 3755 return setflashmode(ifp); 3756 else 3757 return ENOBUFS; 3758 break; 3759 case AIROFLSHGCHR: /* Get char from aux */ 3760 if (l_ioctl->len > sizeof(sc->areq)) { 3761 return -EINVAL; 3762 } 3763 AN_UNLOCK(sc); 3764 status = copyin(l_ioctl->data, &sc->areq, l_ioctl->len); 3765 AN_LOCK(sc); 3766 if (status) 3767 return status; 3768 z = *(int *)&sc->areq; 3769 if ((status = flashgchar(ifp, z, 8000)) == 1) 3770 return 0; 3771 else 3772 return -1; 3773 case AIROFLSHPCHR: /* Send char to card. */ 3774 if (l_ioctl->len > sizeof(sc->areq)) { 3775 return -EINVAL; 3776 } 3777 AN_UNLOCK(sc); 3778 status = copyin(l_ioctl->data, &sc->areq, l_ioctl->len); 3779 AN_LOCK(sc); 3780 if (status) 3781 return status; 3782 z = *(int *)&sc->areq; 3783 if ((status = flashpchar(ifp, z, 8000)) == -1) 3784 return -EIO; 3785 else 3786 return 0; 3787 break; 3788 case AIROFLPUTBUF: /* Send 32k to card */ 3789 if (l_ioctl->len > FLASH_SIZE) { 3790 if_printf(ifp, "Buffer to big, %x %x\n", 3791 l_ioctl->len, FLASH_SIZE); 3792 return -EINVAL; 3793 } 3794 AN_UNLOCK(sc); 3795 status = copyin(l_ioctl->data, sc->an_flash_buffer, l_ioctl->len); 3796 AN_LOCK(sc); 3797 if (status) 3798 return status; 3799 3800 if ((status = flashputbuf(ifp)) != 0) 3801 return -EIO; 3802 else 3803 return 0; 3804 break; 3805 case AIRORESTART: 3806 if ((status = flashrestart(ifp)) != 0) { 3807 if_printf(ifp, "FLASHRESTART returned %d\n", status); 3808 return -EIO; 3809 } else 3810 return 0; 3811 3812 break; 3813 default: 3814 return -EINVAL; 3815 } 3816 3817 return -EINVAL; 3818 }
Cache object: 6a48e684164d8155c282889cd4109d8b
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