FreeBSD/Linux Kernel Cross Reference
sys/dev/an/if_an.c
1 /*
2 * Copyright (c) 1997, 1998, 1999
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Bill Paul.
16 * 4. Neither the name of the author nor the names of any co-contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 * $FreeBSD$
33 */
34
35 /*
36 * Aironet 4500/4800 802.11 PCMCIA/ISA/PCI driver for FreeBSD.
37 *
38 * Written by Bill Paul <wpaul@ctr.columbia.edu>
39 * Electrical Engineering Department
40 * Columbia University, New York City
41 */
42
43 /*
44 * The Aironet 4500/4800 series cards come in PCMCIA, ISA and PCI form.
45 * This driver supports all three device types (PCI devices are supported
46 * through an extra PCI shim: /sys/dev/an/if_an_pci.c). ISA devices can be
47 * supported either using hard-coded IO port/IRQ settings or via Plug
48 * and Play. The 4500 series devices support 1Mbps and 2Mbps data rates.
49 * The 4800 devices support 1, 2, 5.5 and 11Mbps rates.
50 *
51 * Like the WaveLAN/IEEE cards, the Aironet NICs are all essentially
52 * PCMCIA devices. The ISA and PCI cards are a combination of a PCMCIA
53 * device and a PCMCIA to ISA or PCMCIA to PCI adapter card. There are
54 * a couple of important differences though:
55 *
56 * - Lucent ISA card looks to the host like a PCMCIA controller with
57 * a PCMCIA WaveLAN card inserted. This means that even desktop
58 * machines need to be configured with PCMCIA support in order to
59 * use WaveLAN/IEEE ISA cards. The Aironet cards on the other hand
60 * actually look like normal ISA and PCI devices to the host, so
61 * no PCMCIA controller support is needed
62 *
63 * The latter point results in a small gotcha. The Aironet PCMCIA
64 * cards can be configured for one of two operating modes depending
65 * on how the Vpp1 and Vpp2 programming voltages are set when the
66 * card is activated. In order to put the card in proper PCMCIA
67 * operation (where the CIS table is visible and the interface is
68 * programmed for PCMCIA operation), both Vpp1 and Vpp2 have to be
69 * set to 5 volts. FreeBSD by default doesn't set the Vpp voltages,
70 * which leaves the card in ISA/PCI mode, which prevents it from
71 * being activated as an PCMCIA device.
72 *
73 * Note that some PCMCIA controller software packages for Windows NT
74 * fail to set the voltages as well.
75 *
76 * The Aironet devices can operate in both station mode and access point
77 * mode. Typically, when programmed for station mode, the card can be set
78 * to automatically perform encapsulation/decapsulation of Ethernet II
79 * and 802.3 frames within 802.11 frames so that the host doesn't have
80 * to do it itself. This driver doesn't program the card that way: the
81 * driver handles all of the encapsulation/decapsulation itself.
82 */
83
84 #include "opt_inet.h"
85
86 #ifdef INET
87 #define ANCACHE /* enable signal strength cache */
88 #endif
89
90 #include <sys/param.h>
91 #include <sys/systm.h>
92 #include <sys/sockio.h>
93 #include <sys/mbuf.h>
94 #include <sys/proc.h>
95 #include <sys/kernel.h>
96 #include <sys/proc.h>
97 #include <sys/ucred.h>
98 #include <sys/socket.h>
99 #ifdef ANCACHE
100 #include <sys/syslog.h>
101 #endif
102 #include <sys/sysctl.h>
103 #include <machine/clock.h> /* for DELAY */
104
105 #include <sys/module.h>
106 #include <sys/sysctl.h>
107 #include <sys/bus.h>
108 #include <machine/bus.h>
109 #include <sys/rman.h>
110 #include <machine/resource.h>
111 #include <sys/malloc.h>
112
113 #include <net/if.h>
114 #include <net/if_arp.h>
115 #include <net/ethernet.h>
116 #include <net/if_dl.h>
117 #include <net/if_types.h>
118 #include <net/if_ieee80211.h>
119 #include <net/if_media.h>
120
121 #ifdef INET
122 #include <netinet/in.h>
123 #include <netinet/in_systm.h>
124 #include <netinet/in_var.h>
125 #include <netinet/ip.h>
126 #endif
127
128 #include <net/bpf.h>
129
130 #include <machine/md_var.h>
131
132 #include <dev/an/if_aironet_ieee.h>
133 #include <dev/an/if_anreg.h>
134
135 #if !defined(lint)
136 static const char rcsid[] =
137 "$FreeBSD$";
138 #endif
139
140 /* These are global because we need them in sys/pci/if_an_p.c. */
141 static void an_reset __P((struct an_softc *));
142 static int __P(an_init_mpi350_desc (struct an_softc *));
143 static int an_ioctl __P((struct ifnet *, u_long, caddr_t));
144 static void an_init __P((void *));
145 static int an_init_tx_ring __P((struct an_softc *));
146 static void an_start __P((struct ifnet *));
147 static void an_watchdog __P((struct ifnet *));
148 static void an_rxeof __P((struct an_softc *));
149 static void an_txeof __P((struct an_softc *, int));
150
151 static void an_promisc __P((struct an_softc *, int));
152 static int an_cmd __P((struct an_softc *, int, int));
153 static int an_cmd_struct __P((struct an_softc *, struct an_command *,
154 struct an_reply *));
155 static int an_read_record __P((struct an_softc *, struct an_ltv_gen *));
156 static int an_write_record __P((struct an_softc *, struct an_ltv_gen *));
157 static int an_read_data __P((struct an_softc *, int,
158 int, caddr_t, int));
159 static int an_write_data __P((struct an_softc *, int,
160 int, caddr_t, int));
161 static int an_seek __P((struct an_softc *, int, int, int));
162 static int an_alloc_nicmem __P((struct an_softc *, int, int *));
163 static int an_dma_malloc __P((struct an_softc *, bus_size_t,
164 struct an_dma_alloc *, int));
165 static void an_dma_free __P((struct an_softc *,
166 struct an_dma_alloc *));
167 static void an_dma_malloc_cb __P((void *, bus_dma_segment_t *, int, int));
168 static void an_stats_update __P((void *));
169 static void an_setdef __P((struct an_softc *, struct an_req *));
170 #ifdef ANCACHE
171 static void an_cache_store __P((struct an_softc *, struct ether_header *,
172 struct mbuf *, u_int8_t, u_int8_t));
173 #endif
174
175 /* function definitions for use with the Cisco's Linux configuration
176 utilities
177 */
178
179 static int readrids __P((struct ifnet*, struct aironet_ioctl*));
180 static int writerids __P((struct ifnet*, struct aironet_ioctl*));
181 static int flashcard __P((struct ifnet*, struct aironet_ioctl*));
182
183 static int cmdreset __P((struct ifnet *));
184 static int setflashmode __P((struct ifnet *));
185 static int flashgchar __P((struct ifnet *,int,int));
186 static int flashpchar __P((struct ifnet *,int,int));
187 static int flashputbuf __P((struct ifnet *));
188 static int flashrestart __P((struct ifnet *));
189 static int WaitBusy __P((struct ifnet *, int));
190 static int unstickbusy __P((struct ifnet *));
191
192 static void an_dump_record __P((struct an_softc *,struct an_ltv_gen *,
193 char *));
194
195 static int an_media_change __P((struct ifnet *));
196 static void an_media_status __P((struct ifnet *, struct ifmediareq *));
197
198 static int an_dump = 0;
199 static int an_cache_mode = 0;
200
201 #define DBM 0
202 #define PERCENT 1
203 #define RAW 2
204
205 static char an_conf[256];
206 static char an_conf_cache[256];
207
208 /* sysctl vars */
209
210 SYSCTL_NODE(_hw, OID_AUTO, an, CTLFLAG_RD, 0, "Wireless driver parameters");
211
212 static int
213 sysctl_an_dump(SYSCTL_HANDLER_ARGS)
214 {
215 int error, r, last;
216 char *s = an_conf;
217
218 last = an_dump;
219
220 switch (an_dump) {
221 case 0:
222 strcpy(an_conf, "off");
223 break;
224 case 1:
225 strcpy(an_conf, "type");
226 break;
227 case 2:
228 strcpy(an_conf, "dump");
229 break;
230 default:
231 snprintf(an_conf, 5, "%x", an_dump);
232 break;
233 }
234
235 error = sysctl_handle_string(oidp, an_conf, sizeof(an_conf), req);
236
237 if (strncmp(an_conf,"off", 3) == 0) {
238 an_dump = 0;
239 }
240 if (strncmp(an_conf,"dump", 4) == 0) {
241 an_dump = 1;
242 }
243 if (strncmp(an_conf,"type", 4) == 0) {
244 an_dump = 2;
245 }
246 if (*s == 'f') {
247 r = 0;
248 for (;;s++) {
249 if ((*s >= '') && (*s <= '9')) {
250 r = r * 16 + (*s - '');
251 } else if ((*s >= 'a') && (*s <= 'f')) {
252 r = r * 16 + (*s - 'a' + 10);
253 } else {
254 break;
255 }
256 }
257 an_dump = r;
258 }
259 if (an_dump != last)
260 printf("Sysctl changed for Aironet driver\n");
261
262 return error;
263 }
264
265 SYSCTL_PROC(_hw_an, OID_AUTO, an_dump, CTLTYPE_STRING | CTLFLAG_RW,
266 0, sizeof(an_conf), sysctl_an_dump, "A", "");
267
268 static int
269 sysctl_an_cache_mode(SYSCTL_HANDLER_ARGS)
270 {
271 int error, last;
272
273 last = an_cache_mode;
274
275 switch (an_cache_mode) {
276 case 1:
277 strcpy(an_conf_cache, "per");
278 break;
279 case 2:
280 strcpy(an_conf_cache, "raw");
281 break;
282 default:
283 strcpy(an_conf_cache, "dbm");
284 break;
285 }
286
287 error = sysctl_handle_string(oidp, an_conf_cache,
288 sizeof(an_conf_cache), req);
289
290 if (strncmp(an_conf_cache,"dbm", 3) == 0) {
291 an_cache_mode = 0;
292 }
293 if (strncmp(an_conf_cache,"per", 3) == 0) {
294 an_cache_mode = 1;
295 }
296 if (strncmp(an_conf_cache,"raw", 3) == 0) {
297 an_cache_mode = 2;
298 }
299
300 return error;
301 }
302
303 SYSCTL_PROC(_hw_an, OID_AUTO, an_cache_mode, CTLTYPE_STRING | CTLFLAG_RW,
304 0, sizeof(an_conf_cache), sysctl_an_cache_mode, "A", "");
305
306 /*
307 * We probe for an Aironet 4500/4800 card by attempting to
308 * read the default SSID list. On reset, the first entry in
309 * the SSID list will contain the name "tsunami." If we don't
310 * find this, then there's no card present.
311 */
312 int
313 an_probe(dev)
314 device_t dev;
315 {
316 struct an_softc *sc = device_get_softc(dev);
317 struct an_ltv_ssidlist_new ssid;
318 int error;
319
320 bzero((char *)&ssid, sizeof(ssid));
321
322 error = an_alloc_port(dev, 0, AN_IOSIZ);
323 if (error != 0)
324 return (0);
325
326 /* can't do autoprobing */
327 if (rman_get_start(sc->port_res) == -1)
328 return(0);
329
330 /*
331 * We need to fake up a softc structure long enough
332 * to be able to issue commands and call some of the
333 * other routines.
334 */
335 sc->an_bhandle = rman_get_bushandle(sc->port_res);
336 sc->an_btag = rman_get_bustag(sc->port_res);
337 sc->an_unit = device_get_unit(dev);
338
339 ssid.an_len = sizeof(ssid);
340 ssid.an_type = AN_RID_SSIDLIST;
341
342 /* Make sure interrupts are disabled. */
343 sc->mpi350 = 0;
344 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0);
345 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), 0xFFFF);
346
347 an_reset(sc);
348
349 if (an_cmd(sc, AN_CMD_READCFG, 0))
350 return(0);
351
352 if (an_read_record(sc, (struct an_ltv_gen *)&ssid))
353 return(0);
354
355 /* See if the ssid matches what we expect ... but doesn't have to */
356 if (strcmp(ssid.an_entry[0].an_ssid, AN_DEF_SSID))
357 return(0);
358
359 return(AN_IOSIZ);
360 }
361
362 /*
363 * Allocate a port resource with the given resource id.
364 */
365 int
366 an_alloc_port(dev, rid, size)
367 device_t dev;
368 int rid;
369 int size;
370 {
371 struct an_softc *sc = device_get_softc(dev);
372 struct resource *res;
373
374 res = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
375 0ul, ~0ul, size, RF_ACTIVE);
376 if (res) {
377 sc->port_rid = rid;
378 sc->port_res = res;
379 return (0);
380 } else {
381 return (ENOENT);
382 }
383 }
384
385 /*
386 * Allocate a memory resource with the given resource id.
387 */
388 int an_alloc_memory(device_t dev, int rid, int size)
389 {
390 struct an_softc *sc = device_get_softc(dev);
391 struct resource *res;
392
393 res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
394 0ul, ~0ul, size, RF_ACTIVE);
395 if (res) {
396 sc->mem_rid = rid;
397 sc->mem_res = res;
398 sc->mem_used = size;
399 return (0);
400 } else {
401 return (ENOENT);
402 }
403 }
404
405 /*
406 * Allocate a auxilary memory resource with the given resource id.
407 */
408 int an_alloc_aux_memory(device_t dev, int rid, int size)
409 {
410 struct an_softc *sc = device_get_softc(dev);
411 struct resource *res;
412
413 res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
414 0ul, ~0ul, size, RF_ACTIVE);
415 if (res) {
416 sc->mem_aux_rid = rid;
417 sc->mem_aux_res = res;
418 sc->mem_aux_used = size;
419 return (0);
420 } else {
421 return (ENOENT);
422 }
423 }
424
425 /*
426 * Allocate an irq resource with the given resource id.
427 */
428 int
429 an_alloc_irq(dev, rid, flags)
430 device_t dev;
431 int rid;
432 int flags;
433 {
434 struct an_softc *sc = device_get_softc(dev);
435 struct resource *res;
436
437 res = bus_alloc_resource(dev, SYS_RES_IRQ, &rid,
438 0ul, ~0ul, 1, (RF_ACTIVE | flags));
439 if (res) {
440 sc->irq_rid = rid;
441 sc->irq_res = res;
442 return (0);
443 } else {
444 return (ENOENT);
445 }
446 }
447
448 static void
449 an_dma_malloc_cb(arg, segs, nseg, error)
450 void *arg;
451 bus_dma_segment_t *segs;
452 int nseg;
453 int error;
454 {
455 bus_addr_t *paddr = (bus_addr_t*) arg;
456 *paddr = segs->ds_addr;
457 }
458
459 /*
460 * Alloc DMA memory and set the pointer to it
461 */
462 static int
463 an_dma_malloc(sc, size, dma, mapflags)
464 struct an_softc *sc;
465 bus_size_t size;
466 struct an_dma_alloc *dma;
467 int mapflags;
468 {
469 int r;
470
471 r = bus_dmamap_create(sc->an_dtag, BUS_DMA_NOWAIT, &dma->an_dma_map);
472 if (r != 0)
473 goto fail_0;
474
475 r = bus_dmamem_alloc(sc->an_dtag, (void**) &dma->an_dma_vaddr,
476 BUS_DMA_NOWAIT, &dma->an_dma_map);
477 if (r != 0)
478 goto fail_1;
479
480 r = bus_dmamap_load(sc->an_dtag, dma->an_dma_map, dma->an_dma_vaddr,
481 size,
482 an_dma_malloc_cb,
483 &dma->an_dma_paddr,
484 mapflags | BUS_DMA_NOWAIT);
485 if (r != 0)
486 goto fail_2;
487
488 dma->an_dma_size = size;
489 return (0);
490
491 fail_2:
492 bus_dmamap_unload(sc->an_dtag, dma->an_dma_map);
493 fail_1:
494 bus_dmamem_free(sc->an_dtag, dma->an_dma_vaddr, dma->an_dma_map);
495 fail_0:
496 bus_dmamap_destroy(sc->an_dtag, dma->an_dma_map);
497 dma->an_dma_map = NULL;
498 return (r);
499 }
500
501 static void
502 an_dma_free(sc, dma)
503 struct an_softc *sc;
504 struct an_dma_alloc *dma;
505 {
506 bus_dmamap_unload(sc->an_dtag, dma->an_dma_map);
507 bus_dmamem_free(sc->an_dtag, dma->an_dma_vaddr, dma->an_dma_map);
508 dma->an_dma_vaddr = 0;
509 bus_dmamap_destroy(sc->an_dtag, dma->an_dma_map);
510 }
511
512 /*
513 * Release all resources
514 */
515 void
516 an_release_resources(dev)
517 device_t dev;
518 {
519 struct an_softc *sc = device_get_softc(dev);
520 int i;
521
522 if (sc->port_res) {
523 bus_release_resource(dev, SYS_RES_IOPORT,
524 sc->port_rid, sc->port_res);
525 sc->port_res = 0;
526 }
527 if (sc->mem_res) {
528 bus_release_resource(dev, SYS_RES_MEMORY,
529 sc->mem_rid, sc->mem_res);
530 sc->mem_res = 0;
531 }
532 if (sc->mem_aux_res) {
533 bus_release_resource(dev, SYS_RES_MEMORY,
534 sc->mem_aux_rid, sc->mem_aux_res);
535 sc->mem_aux_res = 0;
536 }
537 if (sc->irq_res) {
538 bus_release_resource(dev, SYS_RES_IRQ,
539 sc->irq_rid, sc->irq_res);
540 sc->irq_res = 0;
541 }
542 if (sc->an_rid_buffer.an_dma_paddr) {
543 an_dma_free(sc, &sc->an_rid_buffer);
544 }
545 for (i = 0; i < AN_MAX_RX_DESC; i++)
546 if (sc->an_rx_buffer[i].an_dma_paddr) {
547 an_dma_free(sc, &sc->an_rx_buffer[i]);
548 }
549 for (i = 0; i < AN_MAX_TX_DESC; i++)
550 if (sc->an_tx_buffer[i].an_dma_paddr) {
551 an_dma_free(sc, &sc->an_tx_buffer[i]);
552 }
553 if (sc->an_dtag) {
554 bus_dma_tag_destroy(sc->an_dtag);
555 }
556
557 }
558
559 int
560 an_init_mpi350_desc(sc)
561 struct an_softc *sc;
562 {
563 struct an_command cmd_struct;
564 struct an_reply reply;
565 struct an_card_rid_desc an_rid_desc;
566 struct an_card_rx_desc an_rx_desc;
567 struct an_card_tx_desc an_tx_desc;
568 int i, desc;
569
570 if(!sc->an_rid_buffer.an_dma_paddr)
571 an_dma_malloc(sc, AN_RID_BUFFER_SIZE,
572 &sc->an_rid_buffer, 0);
573 for (i = 0; i < AN_MAX_RX_DESC; i++)
574 if(!sc->an_rx_buffer[i].an_dma_paddr)
575 an_dma_malloc(sc, AN_RX_BUFFER_SIZE,
576 &sc->an_rx_buffer[i], 0);
577 for (i = 0; i < AN_MAX_TX_DESC; i++)
578 if(!sc->an_tx_buffer[i].an_dma_paddr)
579 an_dma_malloc(sc, AN_TX_BUFFER_SIZE,
580 &sc->an_tx_buffer[i], 0);
581
582 /*
583 * Allocate RX descriptor
584 */
585 bzero(&reply,sizeof(reply));
586 cmd_struct.an_cmd = AN_CMD_ALLOC_DESC;
587 cmd_struct.an_parm0 = AN_DESCRIPTOR_RX;
588 cmd_struct.an_parm1 = AN_RX_DESC_OFFSET;
589 cmd_struct.an_parm2 = AN_MAX_RX_DESC;
590 if (an_cmd_struct(sc, &cmd_struct, &reply)) {
591 printf("an%d: failed to allocate RX descriptor\n",
592 sc->an_unit);
593 return(EIO);
594 }
595
596 for (desc = 0; desc < AN_MAX_RX_DESC; desc++) {
597 bzero(&an_rx_desc, sizeof(an_rx_desc));
598 an_rx_desc.an_valid = 1;
599 an_rx_desc.an_len = AN_RX_BUFFER_SIZE;
600 an_rx_desc.an_done = 0;
601 an_rx_desc.an_phys = sc->an_rx_buffer[desc].an_dma_paddr;
602
603 for (i = 0; i < sizeof(an_rx_desc) / 4; i++)
604 CSR_MEM_AUX_WRITE_4(sc, AN_RX_DESC_OFFSET
605 + (desc * sizeof(an_rx_desc))
606 + (i * 4),
607 ((u_int32_t*)&an_rx_desc)[i]);
608 }
609
610 /*
611 * Allocate TX descriptor
612 */
613
614 bzero(&reply,sizeof(reply));
615 cmd_struct.an_cmd = AN_CMD_ALLOC_DESC;
616 cmd_struct.an_parm0 = AN_DESCRIPTOR_TX;
617 cmd_struct.an_parm1 = AN_TX_DESC_OFFSET;
618 cmd_struct.an_parm2 = AN_MAX_TX_DESC;
619 if (an_cmd_struct(sc, &cmd_struct, &reply)) {
620 printf("an%d: failed to allocate TX descriptor\n",
621 sc->an_unit);
622 return(EIO);
623 }
624
625 for (desc = 0; desc < AN_MAX_TX_DESC; desc++) {
626 bzero(&an_tx_desc, sizeof(an_tx_desc));
627 an_tx_desc.an_offset = 0;
628 an_tx_desc.an_eoc = 0;
629 an_tx_desc.an_valid = 0;
630 an_tx_desc.an_len = 0;
631 an_tx_desc.an_phys = sc->an_tx_buffer[desc].an_dma_paddr;
632
633 for (i = 0; i < sizeof(an_tx_desc) / 4; i++)
634 CSR_MEM_AUX_WRITE_4(sc, AN_TX_DESC_OFFSET
635 + (desc * sizeof(an_tx_desc))
636 + (i * 4),
637 ((u_int32_t*)&an_tx_desc)[i]);
638 }
639
640 /*
641 * Allocate RID descriptor
642 */
643
644 bzero(&reply,sizeof(reply));
645 cmd_struct.an_cmd = AN_CMD_ALLOC_DESC;
646 cmd_struct.an_parm0 = AN_DESCRIPTOR_HOSTRW;
647 cmd_struct.an_parm1 = AN_HOST_DESC_OFFSET;
648 cmd_struct.an_parm2 = 1;
649 if (an_cmd_struct(sc, &cmd_struct, &reply)) {
650 printf("an%d: failed to allocate host descriptor\n",
651 sc->an_unit);
652 return(EIO);
653 }
654
655 bzero(&an_rid_desc, sizeof(an_rid_desc));
656 an_rid_desc.an_valid = 1;
657 an_rid_desc.an_len = AN_RID_BUFFER_SIZE;
658 an_rid_desc.an_rid = 0;
659 an_rid_desc.an_phys = sc->an_rid_buffer.an_dma_paddr;
660
661 for (i = 0; i < sizeof(an_rid_desc) / 4; i++)
662 CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4,
663 ((u_int32_t*)&an_rid_desc)[i]);
664
665 return(0);
666 }
667
668 int
669 an_attach(sc, unit, flags)
670 struct an_softc *sc;
671 int unit;
672 int flags;
673 {
674 struct ifnet *ifp = &sc->arpcom.ac_if;
675 int error;
676
677 sc->an_gone = 0;
678 sc->an_associated = 0;
679 sc->an_monitor = 0;
680 sc->an_was_monitor = 0;
681 sc->an_flash_buffer = NULL;
682
683 /* Reset the NIC. */
684 an_reset(sc);
685 if (sc->mpi350) {
686 error = an_init_mpi350_desc(sc);
687 if (error)
688 return(error);
689 }
690
691 /* Load factory config */
692 if (an_cmd(sc, AN_CMD_READCFG, 0)) {
693 printf("an%d: failed to load config data\n", sc->an_unit);
694 return(EIO);
695 }
696
697 /* Read the current configuration */
698 sc->an_config.an_type = AN_RID_GENCONFIG;
699 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
700 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_config)) {
701 printf("an%d: read record failed\n", sc->an_unit);
702 return(EIO);
703 }
704
705 /* Read the card capabilities */
706 sc->an_caps.an_type = AN_RID_CAPABILITIES;
707 sc->an_caps.an_len = sizeof(struct an_ltv_caps);
708 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_caps)) {
709 printf("an%d: read record failed\n", sc->an_unit);
710 return(EIO);
711 }
712
713 /* Read ssid list */
714 sc->an_ssidlist.an_type = AN_RID_SSIDLIST;
715 sc->an_ssidlist.an_len = sizeof(struct an_ltv_ssidlist_new);
716 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_ssidlist)) {
717 printf("an%d: read record failed\n", sc->an_unit);
718 return(EIO);
719 }
720
721 /* Read AP list */
722 sc->an_aplist.an_type = AN_RID_APLIST;
723 sc->an_aplist.an_len = sizeof(struct an_ltv_aplist);
724 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_aplist)) {
725 printf("an%d: read record failed\n", sc->an_unit);
726 return(EIO);
727 }
728
729 #ifdef ANCACHE
730 /* Read the RSSI <-> dBm map */
731 sc->an_have_rssimap = 0;
732 if (sc->an_caps.an_softcaps & 8) {
733 sc->an_rssimap.an_type = AN_RID_RSSI_MAP;
734 sc->an_rssimap.an_len = sizeof(struct an_ltv_rssi_map);
735 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_rssimap)) {
736 printf("an%d: unable to get RSSI <-> dBM map\n", sc->an_unit);
737 } else {
738 printf("an%d: got RSSI <-> dBM map\n", sc->an_unit);
739 sc->an_have_rssimap = 1;
740 }
741 } else {
742 printf("an%d: no RSSI <-> dBM map\n", sc->an_unit);
743 }
744 #endif
745
746 bcopy((char *)&sc->an_caps.an_oemaddr,
747 (char *)&sc->arpcom.ac_enaddr, ETHER_ADDR_LEN);
748
749 printf("an%d: Ethernet address: %6D\n", sc->an_unit,
750 sc->arpcom.ac_enaddr, ":");
751
752 ifp->if_softc = sc;
753 ifp->if_unit = sc->an_unit = unit;
754 ifp->if_name = "an";
755 ifp->if_mtu = ETHERMTU;
756 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
757 ifp->if_ioctl = an_ioctl;
758 ifp->if_output = ether_output;
759 ifp->if_start = an_start;
760 ifp->if_watchdog = an_watchdog;
761 ifp->if_init = an_init;
762 ifp->if_baudrate = 10000000;
763 ifp->if_snd.ifq_maxlen = IFQ_MAXLEN;
764
765 bzero(sc->an_config.an_nodename, sizeof(sc->an_config.an_nodename));
766 bcopy(AN_DEFAULT_NODENAME, sc->an_config.an_nodename,
767 sizeof(AN_DEFAULT_NODENAME) - 1);
768
769 bzero(sc->an_ssidlist.an_entry[0].an_ssid,
770 sizeof(sc->an_ssidlist.an_entry[0].an_ssid));
771 bcopy(AN_DEFAULT_NETNAME, sc->an_ssidlist.an_entry[0].an_ssid,
772 sizeof(AN_DEFAULT_NETNAME) - 1);
773 sc->an_ssidlist.an_entry[0].an_len = strlen(AN_DEFAULT_NETNAME);
774
775 sc->an_config.an_opmode =
776 AN_OPMODE_INFRASTRUCTURE_STATION;
777
778 sc->an_tx_rate = 0;
779 bzero((char *)&sc->an_stats, sizeof(sc->an_stats));
780
781 ifmedia_init(&sc->an_ifmedia, 0, an_media_change, an_media_status);
782 #define ADD(m, c) ifmedia_add(&sc->an_ifmedia, (m), (c), NULL)
783 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS1,
784 IFM_IEEE80211_ADHOC, 0), 0);
785 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS1, 0, 0), 0);
786 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS2,
787 IFM_IEEE80211_ADHOC, 0), 0);
788 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS2, 0, 0), 0);
789 if (sc->an_caps.an_rates[2] == AN_RATE_5_5MBPS) {
790 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS5,
791 IFM_IEEE80211_ADHOC, 0), 0);
792 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS5, 0, 0), 0);
793 }
794 if (sc->an_caps.an_rates[3] == AN_RATE_11MBPS) {
795 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS11,
796 IFM_IEEE80211_ADHOC, 0), 0);
797 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS11, 0, 0), 0);
798 }
799 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_AUTO,
800 IFM_IEEE80211_ADHOC, 0), 0);
801 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_AUTO, 0, 0), 0);
802 #undef ADD
803 ifmedia_set(&sc->an_ifmedia, IFM_MAKEWORD(IFM_IEEE80211, IFM_AUTO,
804 0, 0));
805
806 /*
807 * Call MI attach routine.
808 */
809 ether_ifattach(ifp, ETHER_BPF_SUPPORTED);
810 callout_handle_init(&sc->an_stat_ch);
811
812 return(0);
813 }
814
815 static void
816 an_rxeof(sc)
817 struct an_softc *sc;
818 {
819 struct ifnet *ifp;
820 struct ether_header *eh;
821 struct ieee80211_frame *ih;
822 struct an_rxframe rx_frame;
823 struct an_rxframe_802_3 rx_frame_802_3;
824 struct mbuf *m;
825 int len, id, error = 0, i, count = 0;
826 int ieee80211_header_len;
827 u_char *bpf_buf;
828 u_short fc1;
829 struct an_card_rx_desc an_rx_desc;
830 u_int8_t *buf;
831
832 ifp = &sc->arpcom.ac_if;
833
834 if (!sc->mpi350) {
835 id = CSR_READ_2(sc, AN_RX_FID);
836
837 if (sc->an_monitor && (ifp->if_flags & IFF_PROMISC)) {
838 /* read raw 802.11 packet */
839 bpf_buf = sc->buf_802_11;
840
841 /* read header */
842 if (an_read_data(sc, id, 0x0, (caddr_t)&rx_frame,
843 sizeof(rx_frame))) {
844 ifp->if_ierrors++;
845 return;
846 }
847
848 /*
849 * skip beacon by default since this increases the
850 * system load a lot
851 */
852
853 if (!(sc->an_monitor & AN_MONITOR_INCLUDE_BEACON) &&
854 (rx_frame.an_frame_ctl &
855 IEEE80211_FC0_SUBTYPE_BEACON)) {
856 return;
857 }
858
859 if (sc->an_monitor & AN_MONITOR_AIRONET_HEADER) {
860 len = rx_frame.an_rx_payload_len
861 + sizeof(rx_frame);
862 /* Check for insane frame length */
863 if (len > sizeof(sc->buf_802_11)) {
864 printf("an%d: oversized packet "
865 "received (%d, %d)\n",
866 sc->an_unit, len, MCLBYTES);
867 ifp->if_ierrors++;
868 return;
869 }
870
871 bcopy((char *)&rx_frame,
872 bpf_buf, sizeof(rx_frame));
873
874 error = an_read_data(sc, id, sizeof(rx_frame),
875 (caddr_t)bpf_buf+sizeof(rx_frame),
876 rx_frame.an_rx_payload_len);
877 } else {
878 fc1=rx_frame.an_frame_ctl >> 8;
879 ieee80211_header_len =
880 sizeof(struct ieee80211_frame);
881 if ((fc1 & IEEE80211_FC1_DIR_TODS) &&
882 (fc1 & IEEE80211_FC1_DIR_FROMDS)) {
883 ieee80211_header_len += ETHER_ADDR_LEN;
884 }
885
886 len = rx_frame.an_rx_payload_len
887 + ieee80211_header_len;
888 /* Check for insane frame length */
889 if (len > sizeof(sc->buf_802_11)) {
890 printf("an%d: oversized packet "
891 "received (%d, %d)\n",
892 sc->an_unit, len, MCLBYTES);
893 ifp->if_ierrors++;
894 return;
895 }
896
897 ih = (struct ieee80211_frame *)bpf_buf;
898
899 bcopy((char *)&rx_frame.an_frame_ctl,
900 (char *)ih, ieee80211_header_len);
901
902 error = an_read_data(sc, id, sizeof(rx_frame) +
903 rx_frame.an_gaplen,
904 (caddr_t)ih +ieee80211_header_len,
905 rx_frame.an_rx_payload_len);
906 }
907 /* dump raw 802.11 packet to bpf and skip ip stack */
908 if (ifp->if_bpf != NULL) {
909 bpf_tap(ifp, bpf_buf, len);
910 }
911 } else {
912 MGETHDR(m, M_NOWAIT, MT_DATA);
913 if (m == NULL) {
914 ifp->if_ierrors++;
915 return;
916 }
917 MCLGET(m, M_NOWAIT);
918 if (!(m->m_flags & M_EXT)) {
919 m_freem(m);
920 ifp->if_ierrors++;
921 return;
922 }
923 m->m_pkthdr.rcvif = ifp;
924 /* Read Ethernet encapsulated packet */
925
926 #ifdef ANCACHE
927 /* Read NIC frame header */
928 if (an_read_data(sc, id, 0, (caddr_t)&rx_frame,
929 sizeof(rx_frame))) {
930 ifp->if_ierrors++;
931 return;
932 }
933 #endif
934 /* Read in the 802_3 frame header */
935 if (an_read_data(sc, id, 0x34,
936 (caddr_t)&rx_frame_802_3,
937 sizeof(rx_frame_802_3))) {
938 ifp->if_ierrors++;
939 return;
940 }
941 if (rx_frame_802_3.an_rx_802_3_status != 0) {
942 ifp->if_ierrors++;
943 return;
944 }
945 /* Check for insane frame length */
946 len = rx_frame_802_3.an_rx_802_3_payload_len;
947 if (len > sizeof(sc->buf_802_11)) {
948 printf("an%d: oversized packet "
949 "received (%d, %d)\n",
950 sc->an_unit, len, MCLBYTES);
951 ifp->if_ierrors++;
952 return;
953 }
954 m->m_pkthdr.len = m->m_len =
955 rx_frame_802_3.an_rx_802_3_payload_len + 12;
956
957 eh = mtod(m, struct ether_header *);
958
959 bcopy((char *)&rx_frame_802_3.an_rx_dst_addr,
960 (char *)&eh->ether_dhost, ETHER_ADDR_LEN);
961 bcopy((char *)&rx_frame_802_3.an_rx_src_addr,
962 (char *)&eh->ether_shost, ETHER_ADDR_LEN);
963
964 /* in mbuf header type is just before payload */
965 error = an_read_data(sc, id, 0x44,
966 (caddr_t)&(eh->ether_type),
967 rx_frame_802_3.an_rx_802_3_payload_len);
968
969 if (error) {
970 m_freem(m);
971 ifp->if_ierrors++;
972 return;
973 }
974 ifp->if_ipackets++;
975
976 /* Receive packet. */
977 m_adj(m, sizeof(struct ether_header));
978 #ifdef ANCACHE
979 an_cache_store(sc, eh, m,
980 rx_frame.an_rx_signal_strength,
981 rx_frame.an_rsvd0);
982 #endif
983 ether_input(ifp, eh, m);
984 }
985
986 } else { /* MPI-350 */
987 for (count = 0; count < AN_MAX_RX_DESC; count++){
988 for (i = 0; i < sizeof(an_rx_desc) / 4; i++)
989 ((u_int32_t*)&an_rx_desc)[i]
990 = CSR_MEM_AUX_READ_4(sc,
991 AN_RX_DESC_OFFSET
992 + (count * sizeof(an_rx_desc))
993 + (i * 4));
994
995 if (an_rx_desc.an_done && !an_rx_desc.an_valid) {
996 buf = sc->an_rx_buffer[count].an_dma_vaddr;
997
998 MGETHDR(m, M_NOWAIT, MT_DATA);
999 if (m == NULL) {
1000 ifp->if_ierrors++;
1001 return;
1002 }
1003 MCLGET(m, M_NOWAIT);
1004 if (!(m->m_flags & M_EXT)) {
1005 m_freem(m);
1006 ifp->if_ierrors++;
1007 return;
1008 }
1009 m->m_pkthdr.rcvif = ifp;
1010 /* Read Ethernet encapsulated packet */
1011
1012 /*
1013 * No ANCACHE support since we just get back
1014 * an Ethernet packet no 802.11 info
1015 */
1016 #if 0
1017 #ifdef ANCACHE
1018 /* Read NIC frame header */
1019 bcopy(buf, (caddr_t)&rx_frame,
1020 sizeof(rx_frame));
1021 #endif
1022 #endif
1023 /* Check for insane frame length */
1024 len = an_rx_desc.an_len + 12;
1025 if (len > MCLBYTES) {
1026 printf("an%d: oversized packet "
1027 "received (%d, %d)\n",
1028 sc->an_unit, len, MCLBYTES);
1029 ifp->if_ierrors++;
1030 return;
1031 }
1032
1033 m->m_pkthdr.len = m->m_len =
1034 an_rx_desc.an_len + 12;
1035
1036 eh = mtod(m, struct ether_header *);
1037
1038 bcopy(buf, (char *)eh,
1039 m->m_pkthdr.len);
1040
1041 ifp->if_ipackets++;
1042
1043 /* Receive packet. */
1044 m_adj(m, sizeof(struct ether_header));
1045 #if 0
1046 #ifdef ANCACHE
1047 an_cache_store(sc, eh, m,
1048 rx_frame.an_rx_signal_strength,
1049 rx_frame.an_rsvd0);
1050 #endif
1051 #endif
1052 ether_input(ifp, eh, m);
1053
1054 an_rx_desc.an_valid = 1;
1055 an_rx_desc.an_len = AN_RX_BUFFER_SIZE;
1056 an_rx_desc.an_done = 0;
1057 an_rx_desc.an_phys =
1058 sc->an_rx_buffer[count].an_dma_paddr;
1059
1060 for (i = 0; i < sizeof(an_rx_desc) / 4; i++)
1061 CSR_MEM_AUX_WRITE_4(sc,
1062 AN_RX_DESC_OFFSET
1063 + (count * sizeof(an_rx_desc))
1064 + (i * 4),
1065 ((u_int32_t*)&an_rx_desc)[i]);
1066
1067 } else {
1068 printf("an%d: Didn't get valid RX packet "
1069 "%x %x %d\n",
1070 sc->an_unit,
1071 an_rx_desc.an_done,
1072 an_rx_desc.an_valid, an_rx_desc.an_len);
1073 }
1074 }
1075 }
1076 }
1077
1078 static void
1079 an_txeof(sc, status)
1080 struct an_softc *sc;
1081 int status;
1082 {
1083 struct ifnet *ifp;
1084 int id, i;
1085
1086 ifp = &sc->arpcom.ac_if;
1087
1088 ifp->if_timer = 0;
1089 ifp->if_flags &= ~IFF_OACTIVE;
1090
1091 if (!sc->mpi350) {
1092 id = CSR_READ_2(sc, AN_TX_CMP_FID(sc->mpi350));
1093
1094 if (status & AN_EV_TX_EXC) {
1095 ifp->if_oerrors++;
1096 } else
1097 ifp->if_opackets++;
1098
1099 for (i = 0; i < AN_TX_RING_CNT; i++) {
1100 if (id == sc->an_rdata.an_tx_ring[i]) {
1101 sc->an_rdata.an_tx_ring[i] = 0;
1102 break;
1103 }
1104 }
1105
1106 AN_INC(sc->an_rdata.an_tx_cons, AN_TX_RING_CNT);
1107 } else { /* MPI 350 */
1108 id = CSR_READ_2(sc, AN_TX_CMP_FID(sc->mpi350));
1109 if (!sc->an_rdata.an_tx_empty){
1110 if (status & AN_EV_TX_EXC) {
1111 ifp->if_oerrors++;
1112 } else
1113 ifp->if_opackets++;
1114 AN_INC(sc->an_rdata.an_tx_cons, AN_MAX_TX_DESC);
1115 if (sc->an_rdata.an_tx_prod ==
1116 sc->an_rdata.an_tx_cons)
1117 sc->an_rdata.an_tx_empty = 1;
1118 }
1119 }
1120 return;
1121 }
1122
1123 /*
1124 * We abuse the stats updater to check the current NIC status. This
1125 * is important because we don't want to allow transmissions until
1126 * the NIC has synchronized to the current cell (either as the master
1127 * in an ad-hoc group, or as a station connected to an access point).
1128 */
1129 static void
1130 an_stats_update(xsc)
1131 void *xsc;
1132 {
1133 struct an_softc *sc;
1134 struct ifnet *ifp;
1135 int s;
1136
1137 s = splimp();
1138
1139 sc = xsc;
1140 ifp = &sc->arpcom.ac_if;
1141
1142 sc->an_status.an_type = AN_RID_STATUS;
1143 sc->an_status.an_len = sizeof(struct an_ltv_status);
1144 an_read_record(sc, (struct an_ltv_gen *)&sc->an_status);
1145
1146 if (sc->an_status.an_opmode & AN_STATUS_OPMODE_IN_SYNC)
1147 sc->an_associated = 1;
1148 else
1149 sc->an_associated = 0;
1150
1151 /* Don't do this while we're transmitting */
1152 if (ifp->if_flags & IFF_OACTIVE) {
1153 sc->an_stat_ch = timeout(an_stats_update, sc, hz);
1154 splx(s);
1155 return;
1156 }
1157
1158 sc->an_stats.an_len = sizeof(struct an_ltv_stats);
1159 sc->an_stats.an_type = AN_RID_32BITS_CUM;
1160 an_read_record(sc, (struct an_ltv_gen *)&sc->an_stats.an_len);
1161
1162 sc->an_stat_ch = timeout(an_stats_update, sc, hz);
1163 splx(s);
1164
1165 return;
1166 }
1167
1168 void
1169 an_intr(xsc)
1170 void *xsc;
1171 {
1172 struct an_softc *sc;
1173 struct ifnet *ifp;
1174 u_int16_t status;
1175
1176 sc = (struct an_softc*)xsc;
1177
1178 if (sc->an_gone)
1179 return;
1180
1181 ifp = &sc->arpcom.ac_if;
1182
1183 /* Disable interrupts. */
1184 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0);
1185
1186 status = CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350));
1187 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), ~AN_INTRS(sc->mpi350));
1188
1189 if (status & AN_EV_MIC) {
1190 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_MIC);
1191 }
1192
1193 if (status & AN_EV_LINKSTAT) {
1194 if (CSR_READ_2(sc, AN_LINKSTAT(sc->mpi350))
1195 == AN_LINKSTAT_ASSOCIATED)
1196 sc->an_associated = 1;
1197 else
1198 sc->an_associated = 0;
1199 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_LINKSTAT);
1200 }
1201
1202 if (status & AN_EV_RX) {
1203 an_rxeof(sc);
1204 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_RX);
1205 }
1206
1207 if (sc->mpi350 && status & AN_EV_TX_CPY) {
1208 an_txeof(sc, status);
1209 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350),
1210 AN_EV_TX_CPY);
1211 }
1212
1213 if (status & AN_EV_TX) {
1214 an_txeof(sc, status);
1215 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350),
1216 AN_EV_TX);
1217 }
1218
1219 if (status & AN_EV_TX_EXC) {
1220 an_txeof(sc, status);
1221 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_TX_EXC);
1222 }
1223
1224 if (status & AN_EV_ALLOC)
1225 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_ALLOC);
1226
1227 /* Re-enable interrupts. */
1228 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), AN_INTRS(sc->mpi350));
1229
1230 if ((ifp->if_flags & IFF_UP) && (ifp->if_snd.ifq_head != NULL))
1231 an_start(ifp);
1232
1233 return;
1234 }
1235
1236 static int
1237 an_cmd_struct(sc, cmd, reply)
1238 struct an_softc *sc;
1239 struct an_command *cmd;
1240 struct an_reply *reply;
1241 {
1242 int i;
1243
1244 for (i = 0; i != AN_TIMEOUT; i++) {
1245 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY) {
1246 DELAY(1000);
1247 } else
1248 break;
1249 }
1250
1251 if( i == AN_TIMEOUT) {
1252 printf("BUSY\n");
1253 return(ETIMEDOUT);
1254 }
1255
1256 CSR_WRITE_2(sc, AN_PARAM0(sc->mpi350), cmd->an_parm0);
1257 CSR_WRITE_2(sc, AN_PARAM1(sc->mpi350), cmd->an_parm1);
1258 CSR_WRITE_2(sc, AN_PARAM2(sc->mpi350), cmd->an_parm2);
1259 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), cmd->an_cmd);
1260
1261 for (i = 0; i < AN_TIMEOUT; i++) {
1262 if (CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350)) & AN_EV_CMD)
1263 break;
1264 DELAY(1000);
1265 }
1266
1267 reply->an_resp0 = CSR_READ_2(sc, AN_RESP0(sc->mpi350));
1268 reply->an_resp1 = CSR_READ_2(sc, AN_RESP1(sc->mpi350));
1269 reply->an_resp2 = CSR_READ_2(sc, AN_RESP2(sc->mpi350));
1270 reply->an_status = CSR_READ_2(sc, AN_STATUS(sc->mpi350));
1271
1272 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY)
1273 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350),
1274 AN_EV_CLR_STUCK_BUSY);
1275
1276 /* Ack the command */
1277 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CMD);
1278
1279 if (i == AN_TIMEOUT)
1280 return(ETIMEDOUT);
1281
1282 return(0);
1283 }
1284
1285 static int
1286 an_cmd(sc, cmd, val)
1287 struct an_softc *sc;
1288 int cmd;
1289 int val;
1290 {
1291 int i, s = 0;
1292
1293 CSR_WRITE_2(sc, AN_PARAM0(sc->mpi350), val);
1294 CSR_WRITE_2(sc, AN_PARAM1(sc->mpi350), 0);
1295 CSR_WRITE_2(sc, AN_PARAM2(sc->mpi350), 0);
1296 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), cmd);
1297
1298 for (i = 0; i < AN_TIMEOUT; i++) {
1299 if (CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350)) & AN_EV_CMD)
1300 break;
1301 else {
1302 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) == cmd)
1303 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), cmd);
1304 }
1305 }
1306
1307 for (i = 0; i < AN_TIMEOUT; i++) {
1308 CSR_READ_2(sc, AN_RESP0(sc->mpi350));
1309 CSR_READ_2(sc, AN_RESP1(sc->mpi350));
1310 CSR_READ_2(sc, AN_RESP2(sc->mpi350));
1311 s = CSR_READ_2(sc, AN_STATUS(sc->mpi350));
1312 if ((s & AN_STAT_CMD_CODE) == (cmd & AN_STAT_CMD_CODE))
1313 break;
1314 }
1315
1316 /* Ack the command */
1317 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CMD);
1318
1319 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY)
1320 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CLR_STUCK_BUSY);
1321
1322 if (i == AN_TIMEOUT)
1323 return(ETIMEDOUT);
1324
1325 return(0);
1326 }
1327
1328 /*
1329 * This reset sequence may look a little strange, but this is the
1330 * most reliable method I've found to really kick the NIC in the
1331 * head and force it to reboot correctly.
1332 */
1333 static void
1334 an_reset(sc)
1335 struct an_softc *sc;
1336 {
1337 if (sc->an_gone)
1338 return;
1339
1340 an_cmd(sc, AN_CMD_ENABLE, 0);
1341 an_cmd(sc, AN_CMD_FW_RESTART, 0);
1342 an_cmd(sc, AN_CMD_NOOP2, 0);
1343
1344 if (an_cmd(sc, AN_CMD_FORCE_SYNCLOSS, 0) == ETIMEDOUT)
1345 printf("an%d: reset failed\n", sc->an_unit);
1346
1347 an_cmd(sc, AN_CMD_DISABLE, 0);
1348
1349 return;
1350 }
1351
1352 /*
1353 * Read an LTV record from the NIC.
1354 */
1355 static int
1356 an_read_record(sc, ltv)
1357 struct an_softc *sc;
1358 struct an_ltv_gen *ltv;
1359 {
1360 struct an_ltv_gen *an_ltv;
1361 struct an_card_rid_desc an_rid_desc;
1362 struct an_command cmd;
1363 struct an_reply reply;
1364 u_int16_t *ptr;
1365 u_int8_t *ptr2;
1366 int i, len;
1367
1368 if (ltv->an_len < 4 || ltv->an_type == 0)
1369 return(EINVAL);
1370
1371 if (!sc->mpi350){
1372 /* Tell the NIC to enter record read mode. */
1373 if (an_cmd(sc, AN_CMD_ACCESS|AN_ACCESS_READ, ltv->an_type)) {
1374 printf("an%d: RID access failed\n", sc->an_unit);
1375 return(EIO);
1376 }
1377
1378 /* Seek to the record. */
1379 if (an_seek(sc, ltv->an_type, 0, AN_BAP1)) {
1380 printf("an%d: seek to record failed\n", sc->an_unit);
1381 return(EIO);
1382 }
1383
1384 /*
1385 * Read the length and record type and make sure they
1386 * match what we expect (this verifies that we have enough
1387 * room to hold all of the returned data).
1388 * Length includes type but not length.
1389 */
1390 len = CSR_READ_2(sc, AN_DATA1);
1391 if (len > (ltv->an_len - 2)) {
1392 printf("an%d: record length mismatch -- expected %d, "
1393 "got %d for Rid %x\n", sc->an_unit,
1394 ltv->an_len - 2, len, ltv->an_type);
1395 len = ltv->an_len - 2;
1396 } else {
1397 ltv->an_len = len + 2;
1398 }
1399
1400 /* Now read the data. */
1401 len -= 2; /* skip the type */
1402 ptr = <v->an_val;
1403 for (i = len; i > 1; i -= 2)
1404 *ptr++ = CSR_READ_2(sc, AN_DATA1);
1405 if (i) {
1406 ptr2 = (u_int8_t *)ptr;
1407 *ptr2 = CSR_READ_1(sc, AN_DATA1);
1408 }
1409 } else { /* MPI-350 */
1410 if (!sc->an_rid_buffer.an_dma_vaddr)
1411 return(EIO);
1412 an_rid_desc.an_valid = 1;
1413 an_rid_desc.an_len = AN_RID_BUFFER_SIZE;
1414 an_rid_desc.an_rid = 0;
1415 an_rid_desc.an_phys = sc->an_rid_buffer.an_dma_paddr;
1416 bzero(sc->an_rid_buffer.an_dma_vaddr, AN_RID_BUFFER_SIZE);
1417
1418 bzero(&cmd, sizeof(cmd));
1419 bzero(&reply, sizeof(reply));
1420 cmd.an_cmd = AN_CMD_ACCESS|AN_ACCESS_READ;
1421 cmd.an_parm0 = ltv->an_type;
1422
1423 for (i = 0; i < sizeof(an_rid_desc) / 4; i++)
1424 CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4,
1425 ((u_int32_t*)&an_rid_desc)[i]);
1426
1427 if (an_cmd_struct(sc, &cmd, &reply)
1428 || reply.an_status & AN_CMD_QUAL_MASK) {
1429 printf("an%d: failed to read RID %x %x %x %x %x, %d\n",
1430 sc->an_unit, ltv->an_type,
1431 reply.an_status,
1432 reply.an_resp0,
1433 reply.an_resp1,
1434 reply.an_resp2,
1435 i);
1436 return(EIO);
1437 }
1438
1439 an_ltv = (struct an_ltv_gen *)sc->an_rid_buffer.an_dma_vaddr;
1440 if (an_ltv->an_len + 2 < an_rid_desc.an_len) {
1441 an_rid_desc.an_len = an_ltv->an_len;
1442 }
1443
1444 len = an_rid_desc.an_len;
1445 if (len > (ltv->an_len - 2)) {
1446 printf("an%d: record length mismatch -- expected %d, "
1447 "got %d for Rid %x\n", sc->an_unit,
1448 ltv->an_len - 2, len, ltv->an_type);
1449 len = ltv->an_len - 2;
1450 } else {
1451 ltv->an_len = len + 2;
1452 }
1453 bcopy(&an_ltv->an_type,
1454 <v->an_val,
1455 len);
1456 }
1457
1458 if (an_dump)
1459 an_dump_record(sc, ltv, "Read");
1460
1461 return(0);
1462 }
1463
1464 /*
1465 * Same as read, except we inject data instead of reading it.
1466 */
1467 static int
1468 an_write_record(sc, ltv)
1469 struct an_softc *sc;
1470 struct an_ltv_gen *ltv;
1471 {
1472 struct an_card_rid_desc an_rid_desc;
1473 struct an_command cmd;
1474 struct an_reply reply;
1475 char *buf;
1476 u_int16_t *ptr;
1477 u_int8_t *ptr2;
1478 int i, len;
1479
1480 if (an_dump)
1481 an_dump_record(sc, ltv, "Write");
1482
1483 if (!sc->mpi350){
1484 if (an_cmd(sc, AN_CMD_ACCESS|AN_ACCESS_READ, ltv->an_type))
1485 return(EIO);
1486
1487 if (an_seek(sc, ltv->an_type, 0, AN_BAP1))
1488 return(EIO);
1489
1490 /*
1491 * Length includes type but not length.
1492 */
1493 len = ltv->an_len - 2;
1494 CSR_WRITE_2(sc, AN_DATA1, len);
1495
1496 len -= 2; /* skip the type */
1497 ptr = <v->an_val;
1498 for (i = len; i > 1; i -= 2)
1499 CSR_WRITE_2(sc, AN_DATA1, *ptr++);
1500 if (i) {
1501 ptr2 = (u_int8_t *)ptr;
1502 CSR_WRITE_1(sc, AN_DATA0, *ptr2);
1503 }
1504
1505 if (an_cmd(sc, AN_CMD_ACCESS|AN_ACCESS_WRITE, ltv->an_type))
1506 return(EIO);
1507 } else {
1508 /* MPI-350 */
1509
1510 for (i = 0; i != AN_TIMEOUT; i++) {
1511 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350))
1512 & AN_CMD_BUSY) {
1513 DELAY(10);
1514 } else
1515 break;
1516 }
1517 if (i == AN_TIMEOUT) {
1518 printf("BUSY\n");
1519 }
1520
1521 an_rid_desc.an_valid = 1;
1522 an_rid_desc.an_len = ltv->an_len - 2;
1523 an_rid_desc.an_rid = ltv->an_type;
1524 an_rid_desc.an_phys = sc->an_rid_buffer.an_dma_paddr;
1525
1526 bcopy(<v->an_type, sc->an_rid_buffer.an_dma_vaddr,
1527 an_rid_desc.an_len);
1528
1529 bzero(&cmd,sizeof(cmd));
1530 bzero(&reply,sizeof(reply));
1531 cmd.an_cmd = AN_CMD_ACCESS|AN_ACCESS_WRITE;
1532 cmd.an_parm0 = ltv->an_type;
1533
1534 for (i = 0; i < sizeof(an_rid_desc) / 4; i++)
1535 CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4,
1536 ((u_int32_t*)&an_rid_desc)[i]);
1537
1538 if ((i = an_cmd_struct(sc, &cmd, &reply))) {
1539 printf("an%d: failed to write RID 1 %x %x %x %x %x, %d\n",
1540 sc->an_unit, ltv->an_type,
1541 reply.an_status,
1542 reply.an_resp0,
1543 reply.an_resp1,
1544 reply.an_resp2,
1545 i);
1546 return(EIO);
1547 }
1548
1549 ptr = (u_int16_t *)buf;
1550
1551 if (reply.an_status & AN_CMD_QUAL_MASK) {
1552 printf("an%d: failed to write RID 2 %x %x %x %x %x, %d\n",
1553 sc->an_unit, ltv->an_type,
1554 reply.an_status,
1555 reply.an_resp0,
1556 reply.an_resp1,
1557 reply.an_resp2,
1558 i);
1559 return(EIO);
1560 }
1561 }
1562
1563 return(0);
1564 }
1565
1566 static void
1567 an_dump_record(sc, ltv, string)
1568 struct an_softc *sc;
1569 struct an_ltv_gen *ltv;
1570 char *string;
1571 {
1572 u_int8_t *ptr2;
1573 int len;
1574 int i;
1575 int count = 0;
1576 char buf[17], temp;
1577
1578 len = ltv->an_len - 4;
1579 printf("an%d: RID %4x, Length %4d, Mode %s\n",
1580 sc->an_unit, ltv->an_type, ltv->an_len - 4, string);
1581
1582 if (an_dump == 1 || (an_dump == ltv->an_type)) {
1583 printf("an%d:\t", sc->an_unit);
1584 bzero(buf,sizeof(buf));
1585
1586 ptr2 = (u_int8_t *)<v->an_val;
1587 for (i = len; i > 0; i--) {
1588 printf("%02x ", *ptr2);
1589
1590 temp = *ptr2++;
1591 if (temp >= ' ' && temp <= '~')
1592 buf[count] = temp;
1593 else if (temp >= 'A' && temp <= 'Z')
1594 buf[count] = temp;
1595 else
1596 buf[count] = '.';
1597 if (++count == 16) {
1598 count = 0;
1599 printf("%s\n",buf);
1600 printf("an%d:\t", sc->an_unit);
1601 bzero(buf,sizeof(buf));
1602 }
1603 }
1604 for (; count != 16; count++) {
1605 printf(" ");
1606 }
1607 printf(" %s\n",buf);
1608 }
1609 }
1610
1611 static int
1612 an_seek(sc, id, off, chan)
1613 struct an_softc *sc;
1614 int id, off, chan;
1615 {
1616 int i;
1617 int selreg, offreg;
1618
1619 switch (chan) {
1620 case AN_BAP0:
1621 selreg = AN_SEL0;
1622 offreg = AN_OFF0;
1623 break;
1624 case AN_BAP1:
1625 selreg = AN_SEL1;
1626 offreg = AN_OFF1;
1627 break;
1628 default:
1629 printf("an%d: invalid data path: %x\n", sc->an_unit, chan);
1630 return(EIO);
1631 }
1632
1633 CSR_WRITE_2(sc, selreg, id);
1634 CSR_WRITE_2(sc, offreg, off);
1635
1636 for (i = 0; i < AN_TIMEOUT; i++) {
1637 if (!(CSR_READ_2(sc, offreg) & (AN_OFF_BUSY|AN_OFF_ERR)))
1638 break;
1639 }
1640
1641 if (i == AN_TIMEOUT)
1642 return(ETIMEDOUT);
1643
1644 return(0);
1645 }
1646
1647 static int
1648 an_read_data(sc, id, off, buf, len)
1649 struct an_softc *sc;
1650 int id, off;
1651 caddr_t buf;
1652 int len;
1653 {
1654 int i;
1655 u_int16_t *ptr;
1656 u_int8_t *ptr2;
1657
1658 if (off != -1) {
1659 if (an_seek(sc, id, off, AN_BAP1))
1660 return(EIO);
1661 }
1662
1663 ptr = (u_int16_t *)buf;
1664 for (i = len; i > 1; i -= 2)
1665 *ptr++ = CSR_READ_2(sc, AN_DATA1);
1666 if (i) {
1667 ptr2 = (u_int8_t *)ptr;
1668 *ptr2 = CSR_READ_1(sc, AN_DATA1);
1669 }
1670
1671 return(0);
1672 }
1673
1674 static int
1675 an_write_data(sc, id, off, buf, len)
1676 struct an_softc *sc;
1677 int id, off;
1678 caddr_t buf;
1679 int len;
1680 {
1681 int i;
1682 u_int16_t *ptr;
1683 u_int8_t *ptr2;
1684
1685 if (off != -1) {
1686 if (an_seek(sc, id, off, AN_BAP0))
1687 return(EIO);
1688 }
1689
1690 ptr = (u_int16_t *)buf;
1691 for (i = len; i > 1; i -= 2)
1692 CSR_WRITE_2(sc, AN_DATA0, *ptr++);
1693 if (i) {
1694 ptr2 = (u_int8_t *)ptr;
1695 CSR_WRITE_1(sc, AN_DATA0, *ptr2);
1696 }
1697
1698 return(0);
1699 }
1700
1701 /*
1702 * Allocate a region of memory inside the NIC and zero
1703 * it out.
1704 */
1705 static int
1706 an_alloc_nicmem(sc, len, id)
1707 struct an_softc *sc;
1708 int len;
1709 int *id;
1710 {
1711 int i;
1712
1713 if (an_cmd(sc, AN_CMD_ALLOC_MEM, len)) {
1714 printf("an%d: failed to allocate %d bytes on NIC\n",
1715 sc->an_unit, len);
1716 return(ENOMEM);
1717 }
1718
1719 for (i = 0; i < AN_TIMEOUT; i++) {
1720 if (CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350)) & AN_EV_ALLOC)
1721 break;
1722 }
1723
1724 if (i == AN_TIMEOUT)
1725 return(ETIMEDOUT);
1726
1727 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_ALLOC);
1728 *id = CSR_READ_2(sc, AN_ALLOC_FID);
1729
1730 if (an_seek(sc, *id, 0, AN_BAP0))
1731 return(EIO);
1732
1733 for (i = 0; i < len / 2; i++)
1734 CSR_WRITE_2(sc, AN_DATA0, 0);
1735
1736 return(0);
1737 }
1738
1739 static void
1740 an_setdef(sc, areq)
1741 struct an_softc *sc;
1742 struct an_req *areq;
1743 {
1744 struct sockaddr_dl *sdl;
1745 struct ifaddr *ifa;
1746 struct ifnet *ifp;
1747 struct an_ltv_genconfig *cfg;
1748 struct an_ltv_ssidlist_new *ssid;
1749 struct an_ltv_aplist *ap;
1750 struct an_ltv_gen *sp;
1751
1752 ifp = &sc->arpcom.ac_if;
1753
1754 switch (areq->an_type) {
1755 case AN_RID_GENCONFIG:
1756 cfg = (struct an_ltv_genconfig *)areq;
1757
1758 ifa = ifnet_addrs[ifp->if_index - 1];
1759 sdl = (struct sockaddr_dl *)ifa->ifa_addr;
1760 bcopy((char *)&cfg->an_macaddr, (char *)&sc->arpcom.ac_enaddr,
1761 ETHER_ADDR_LEN);
1762 bcopy((char *)&cfg->an_macaddr, LLADDR(sdl), ETHER_ADDR_LEN);
1763
1764 bcopy((char *)cfg, (char *)&sc->an_config,
1765 sizeof(struct an_ltv_genconfig));
1766 break;
1767 case AN_RID_SSIDLIST:
1768 ssid = (struct an_ltv_ssidlist_new *)areq;
1769 bcopy((char *)ssid, (char *)&sc->an_ssidlist,
1770 sizeof(struct an_ltv_ssidlist_new));
1771 break;
1772 case AN_RID_APLIST:
1773 ap = (struct an_ltv_aplist *)areq;
1774 bcopy((char *)ap, (char *)&sc->an_aplist,
1775 sizeof(struct an_ltv_aplist));
1776 break;
1777 case AN_RID_TX_SPEED:
1778 sp = (struct an_ltv_gen *)areq;
1779 sc->an_tx_rate = sp->an_val;
1780
1781 /* Read the current configuration */
1782 sc->an_config.an_type = AN_RID_GENCONFIG;
1783 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
1784 an_read_record(sc, (struct an_ltv_gen *)&sc->an_config);
1785 cfg = &sc->an_config;
1786
1787 /* clear other rates and set the only one we want */
1788 bzero(cfg->an_rates, sizeof(cfg->an_rates));
1789 cfg->an_rates[0] = sc->an_tx_rate;
1790
1791 /* Save the new rate */
1792 sc->an_config.an_type = AN_RID_GENCONFIG;
1793 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
1794 break;
1795 case AN_RID_WEP_TEMP:
1796 /* Cache the temp keys */
1797 bcopy(areq,
1798 &sc->an_temp_keys[((struct an_ltv_key *)areq)->kindex],
1799 sizeof(struct an_ltv_key));
1800 case AN_RID_WEP_PERM:
1801 case AN_RID_LEAPUSERNAME:
1802 case AN_RID_LEAPPASSWORD:
1803 an_init(sc);
1804
1805 /* Disable the MAC. */
1806 an_cmd(sc, AN_CMD_DISABLE, 0);
1807
1808 /* Write the key */
1809 an_write_record(sc, (struct an_ltv_gen *)areq);
1810
1811 /* Turn the MAC back on. */
1812 an_cmd(sc, AN_CMD_ENABLE, 0);
1813
1814 break;
1815 case AN_RID_MONITOR_MODE:
1816 cfg = (struct an_ltv_genconfig *)areq;
1817 bpfdetach(ifp);
1818 if (ng_ether_detach_p != NULL)
1819 (*ng_ether_detach_p) (ifp);
1820 sc->an_monitor = cfg->an_len;
1821
1822 if (sc->an_monitor & AN_MONITOR) {
1823 if (sc->an_monitor & AN_MONITOR_AIRONET_HEADER) {
1824 bpfattach(ifp, DLT_AIRONET_HEADER,
1825 sizeof(struct ether_header));
1826 } else {
1827 bpfattach(ifp, DLT_IEEE802_11,
1828 sizeof(struct ether_header));
1829 }
1830 } else {
1831 bpfattach(ifp, DLT_EN10MB,
1832 sizeof(struct ether_header));
1833 if (ng_ether_attach_p != NULL)
1834 (*ng_ether_attach_p) (ifp);
1835 }
1836 break;
1837 default:
1838 printf("an%d: unknown RID: %x\n", sc->an_unit, areq->an_type);
1839 return;
1840 break;
1841 }
1842
1843
1844 /* Reinitialize the card. */
1845 if (ifp->if_flags)
1846 an_init(sc);
1847
1848 return;
1849 }
1850
1851 /*
1852 * Derived from Linux driver to enable promiscious mode.
1853 */
1854
1855 static void
1856 an_promisc(sc, promisc)
1857 struct an_softc *sc;
1858 int promisc;
1859 {
1860 if (sc->an_was_monitor)
1861 an_reset(sc);
1862 if (sc->mpi350)
1863 an_init_mpi350_desc(sc);
1864 if (sc->an_monitor || sc->an_was_monitor)
1865 an_init(sc);
1866
1867 sc->an_was_monitor = sc->an_monitor;
1868 an_cmd(sc, AN_CMD_SET_MODE, promisc ? 0xffff : 0);
1869
1870 return;
1871 }
1872
1873 static int
1874 an_ioctl(ifp, command, data)
1875 struct ifnet *ifp;
1876 u_long command;
1877 caddr_t data;
1878 {
1879 int s, error = 0;
1880 int len;
1881 int i, max;
1882 struct an_softc *sc;
1883 struct ifreq *ifr;
1884 struct proc *p = curproc;
1885 struct ieee80211req *ireq;
1886 u_int8_t tmpstr[IEEE80211_NWID_LEN*2];
1887 u_int8_t *tmpptr;
1888 struct an_ltv_genconfig *config;
1889 struct an_ltv_key *key;
1890 struct an_ltv_status *status;
1891 struct an_ltv_ssidlist_new *ssids;
1892 int mode;
1893 struct aironet_ioctl l_ioctl;
1894
1895 sc = ifp->if_softc;
1896 s = splimp();
1897 ifr = (struct ifreq *)data;
1898 ireq = (struct ieee80211req *)data;
1899
1900 config = (struct an_ltv_genconfig *)&sc->areq;
1901 key = (struct an_ltv_key *)&sc->areq;
1902 status = (struct an_ltv_status *)&sc->areq;
1903 ssids = (struct an_ltv_ssidlist_new *)&sc->areq;
1904
1905 if (sc->an_gone) {
1906 error = ENODEV;
1907 goto out;
1908 }
1909
1910 switch (command) {
1911 case SIOCSIFADDR:
1912 case SIOCGIFADDR:
1913 case SIOCSIFMTU:
1914 error = ether_ioctl(ifp, command, data);
1915 break;
1916 case SIOCSIFFLAGS:
1917 if (ifp->if_flags & IFF_UP) {
1918 if (ifp->if_flags & IFF_RUNNING &&
1919 ifp->if_flags & IFF_PROMISC &&
1920 !(sc->an_if_flags & IFF_PROMISC)) {
1921 an_promisc(sc, 1);
1922 } else if (ifp->if_flags & IFF_RUNNING &&
1923 !(ifp->if_flags & IFF_PROMISC) &&
1924 sc->an_if_flags & IFF_PROMISC) {
1925 an_promisc(sc, 0);
1926 } else
1927 an_init(sc);
1928 } else {
1929 if (ifp->if_flags & IFF_RUNNING)
1930 an_stop(sc);
1931 }
1932 sc->an_if_flags = ifp->if_flags;
1933 error = 0;
1934 break;
1935 case SIOCSIFMEDIA:
1936 case SIOCGIFMEDIA:
1937 error = ifmedia_ioctl(ifp, ifr, &sc->an_ifmedia, command);
1938 break;
1939 case SIOCADDMULTI:
1940 case SIOCDELMULTI:
1941 /* The Aironet has no multicast filter. */
1942 error = 0;
1943 break;
1944 case SIOCGAIRONET:
1945 error = copyin(ifr->ifr_data, &sc->areq, sizeof(sc->areq));
1946 if (error != 0)
1947 break;
1948 #ifdef ANCACHE
1949 if (sc->areq.an_type == AN_RID_ZERO_CACHE) {
1950 error = suser(p);
1951 if (error)
1952 break;
1953 sc->an_sigitems = sc->an_nextitem = 0;
1954 break;
1955 } else if (sc->areq.an_type == AN_RID_READ_CACHE) {
1956 char *pt = (char *)&sc->areq.an_val;
1957 bcopy((char *)&sc->an_sigitems, (char *)pt,
1958 sizeof(int));
1959 pt += sizeof(int);
1960 sc->areq.an_len = sizeof(int) / 2;
1961 bcopy((char *)&sc->an_sigcache, (char *)pt,
1962 sizeof(struct an_sigcache) * sc->an_sigitems);
1963 sc->areq.an_len += ((sizeof(struct an_sigcache) *
1964 sc->an_sigitems) / 2) + 1;
1965 } else
1966 #endif
1967 if (an_read_record(sc, (struct an_ltv_gen *)&sc->areq)) {
1968 error = EINVAL;
1969 break;
1970 }
1971 error = copyout(&sc->areq, ifr->ifr_data, sizeof(sc->areq));
1972 break;
1973 case SIOCSAIRONET:
1974 if ((error = suser(p)))
1975 goto out;
1976 error = copyin(ifr->ifr_data, &sc->areq, sizeof(sc->areq));
1977 if (error != 0)
1978 break;
1979 an_setdef(sc, &sc->areq);
1980 break;
1981 case SIOCGPRIVATE_0: /* used by Cisco client utility */
1982 if ((error = suser(p)))
1983 goto out;
1984 copyin(ifr->ifr_data, &l_ioctl, sizeof(l_ioctl));
1985 mode = l_ioctl.command;
1986
1987 if (mode >= AIROGCAP && mode <= AIROGSTATSD32) {
1988 error = readrids(ifp, &l_ioctl);
1989 } else if (mode >= AIROPCAP && mode <= AIROPLEAPUSR) {
1990 error = writerids(ifp, &l_ioctl);
1991 } else if (mode >= AIROFLSHRST && mode <= AIRORESTART) {
1992 error = flashcard(ifp, &l_ioctl);
1993 } else {
1994 error =-1;
1995 }
1996
1997 /* copy out the updated command info */
1998 copyout(&l_ioctl, ifr->ifr_data, sizeof(l_ioctl));
1999
2000 break;
2001 case SIOCGPRIVATE_1: /* used by Cisco client utility */
2002 if ((error = suser(p)))
2003 goto out;
2004 copyin(ifr->ifr_data, &l_ioctl, sizeof(l_ioctl));
2005 l_ioctl.command = 0;
2006 error = AIROMAGIC;
2007 copyout(&error, l_ioctl.data, sizeof(error));
2008 error = 0;
2009 break;
2010 case SIOCG80211:
2011 sc->areq.an_len = sizeof(sc->areq);
2012 /* was that a good idea DJA we are doing a short-cut */
2013 switch (ireq->i_type) {
2014 case IEEE80211_IOC_SSID:
2015 if (ireq->i_val == -1) {
2016 sc->areq.an_type = AN_RID_STATUS;
2017 if (an_read_record(sc,
2018 (struct an_ltv_gen *)&sc->areq)) {
2019 error = EINVAL;
2020 break;
2021 }
2022 len = status->an_ssidlen;
2023 tmpptr = status->an_ssid;
2024 } else if (ireq->i_val >= 0) {
2025 sc->areq.an_type = AN_RID_SSIDLIST;
2026 if (an_read_record(sc,
2027 (struct an_ltv_gen *)&sc->areq)) {
2028 error = EINVAL;
2029 break;
2030 }
2031 max = (sc->areq.an_len - 4)
2032 / sizeof(struct an_ltv_ssid_entry);
2033 if ( max > MAX_SSIDS ) {
2034 printf("To many SSIDs only using "
2035 "%d of %d\n",
2036 MAX_SSIDS, max);
2037 max = MAX_SSIDS;
2038 }
2039 if (ireq->i_val > max) {
2040 error = EINVAL;
2041 break;
2042 } else {
2043 len = ssids->an_entry[ireq->i_val].an_len;
2044 tmpptr = ssids->an_entry[ireq->i_val].an_ssid;
2045 }
2046 } else {
2047 error = EINVAL;
2048 break;
2049 }
2050 if (len > IEEE80211_NWID_LEN) {
2051 error = EINVAL;
2052 break;
2053 }
2054 ireq->i_len = len;
2055 bzero(tmpstr, IEEE80211_NWID_LEN);
2056 bcopy(tmpptr, tmpstr, len);
2057 error = copyout(tmpstr, ireq->i_data,
2058 IEEE80211_NWID_LEN);
2059 break;
2060 case IEEE80211_IOC_NUMSSIDS:
2061 sc->areq.an_len = sizeof(sc->areq);
2062 sc->areq.an_type = AN_RID_SSIDLIST;
2063 if (an_read_record(sc,
2064 (struct an_ltv_gen *)&sc->areq)) {
2065 error = EINVAL;
2066 break;
2067 }
2068 max = (sc->areq.an_len - 4)
2069 / sizeof(struct an_ltv_ssid_entry);
2070 if ( max > MAX_SSIDS ) {
2071 printf("To many SSIDs only using "
2072 "%d of %d\n",
2073 MAX_SSIDS, max);
2074 max = MAX_SSIDS;
2075 }
2076 ireq->i_val = max;
2077 break;
2078 case IEEE80211_IOC_WEP:
2079 sc->areq.an_type = AN_RID_ACTUALCFG;
2080 if (an_read_record(sc,
2081 (struct an_ltv_gen *)&sc->areq)) {
2082 error = EINVAL;
2083 break;
2084 }
2085 if (config->an_authtype & AN_AUTHTYPE_PRIVACY_IN_USE) {
2086 if (config->an_authtype &
2087 AN_AUTHTYPE_ALLOW_UNENCRYPTED)
2088 ireq->i_val = IEEE80211_WEP_MIXED;
2089 else
2090 ireq->i_val = IEEE80211_WEP_ON;
2091 } else {
2092 ireq->i_val = IEEE80211_WEP_OFF;
2093 }
2094 break;
2095 case IEEE80211_IOC_WEPKEY:
2096 /*
2097 * XXX: I'm not entierly convinced this is
2098 * correct, but it's what is implemented in
2099 * ancontrol so it will have to do until we get
2100 * access to actual Cisco code.
2101 */
2102 if (ireq->i_val < 0 || ireq->i_val > 8) {
2103 error = EINVAL;
2104 break;
2105 }
2106 len = 0;
2107 if (ireq->i_val < 5) {
2108 sc->areq.an_type = AN_RID_WEP_TEMP;
2109 for (i = 0; i < 5; i++) {
2110 if (an_read_record(sc,
2111 (struct an_ltv_gen *)&sc->areq)) {
2112 error = EINVAL;
2113 break;
2114 }
2115 if (key->kindex == 0xffff)
2116 break;
2117 if (key->kindex == ireq->i_val)
2118 len = key->klen;
2119 /* Required to get next entry */
2120 sc->areq.an_type = AN_RID_WEP_PERM;
2121 }
2122 if (error != 0)
2123 break;
2124 }
2125 /* We aren't allowed to read the value of the
2126 * key from the card so we just output zeros
2127 * like we would if we could read the card, but
2128 * denied the user access.
2129 */
2130 bzero(tmpstr, len);
2131 ireq->i_len = len;
2132 error = copyout(tmpstr, ireq->i_data, len);
2133 break;
2134 case IEEE80211_IOC_NUMWEPKEYS:
2135 ireq->i_val = 9; /* include home key */
2136 break;
2137 case IEEE80211_IOC_WEPTXKEY:
2138 /*
2139 * For some strange reason, you have to read all
2140 * keys before you can read the txkey.
2141 */
2142 sc->areq.an_type = AN_RID_WEP_TEMP;
2143 for (i = 0; i < 5; i++) {
2144 if (an_read_record(sc,
2145 (struct an_ltv_gen *) &sc->areq)) {
2146 error = EINVAL;
2147 break;
2148 }
2149 if (key->kindex == 0xffff)
2150 break;
2151 /* Required to get next entry */
2152 sc->areq.an_type = AN_RID_WEP_PERM;
2153 }
2154 if (error != 0)
2155 break;
2156
2157 sc->areq.an_type = AN_RID_WEP_PERM;
2158 key->kindex = 0xffff;
2159 if (an_read_record(sc,
2160 (struct an_ltv_gen *)&sc->areq)) {
2161 error = EINVAL;
2162 break;
2163 }
2164 ireq->i_val = key->mac[0];
2165 /*
2166 * Check for home mode. Map home mode into
2167 * 5th key since that is how it is stored on
2168 * the card
2169 */
2170 sc->areq.an_len = sizeof(struct an_ltv_genconfig);
2171 sc->areq.an_type = AN_RID_GENCONFIG;
2172 if (an_read_record(sc,
2173 (struct an_ltv_gen *)&sc->areq)) {
2174 error = EINVAL;
2175 break;
2176 }
2177 if (config->an_home_product & AN_HOME_NETWORK)
2178 ireq->i_val = 4;
2179 break;
2180 case IEEE80211_IOC_AUTHMODE:
2181 sc->areq.an_type = AN_RID_ACTUALCFG;
2182 if (an_read_record(sc,
2183 (struct an_ltv_gen *)&sc->areq)) {
2184 error = EINVAL;
2185 break;
2186 }
2187 if ((config->an_authtype & AN_AUTHTYPE_MASK) ==
2188 AN_AUTHTYPE_NONE) {
2189 ireq->i_val = IEEE80211_AUTH_NONE;
2190 } else if ((config->an_authtype & AN_AUTHTYPE_MASK) ==
2191 AN_AUTHTYPE_OPEN) {
2192 ireq->i_val = IEEE80211_AUTH_OPEN;
2193 } else if ((config->an_authtype & AN_AUTHTYPE_MASK) ==
2194 AN_AUTHTYPE_SHAREDKEY) {
2195 ireq->i_val = IEEE80211_AUTH_SHARED;
2196 } else
2197 error = EINVAL;
2198 break;
2199 case IEEE80211_IOC_STATIONNAME:
2200 sc->areq.an_type = AN_RID_ACTUALCFG;
2201 if (an_read_record(sc,
2202 (struct an_ltv_gen *)&sc->areq)) {
2203 error = EINVAL;
2204 break;
2205 }
2206 ireq->i_len = sizeof(config->an_nodename);
2207 tmpptr = config->an_nodename;
2208 bzero(tmpstr, IEEE80211_NWID_LEN);
2209 bcopy(tmpptr, tmpstr, ireq->i_len);
2210 error = copyout(tmpstr, ireq->i_data,
2211 IEEE80211_NWID_LEN);
2212 break;
2213 case IEEE80211_IOC_CHANNEL:
2214 sc->areq.an_type = AN_RID_STATUS;
2215 if (an_read_record(sc,
2216 (struct an_ltv_gen *)&sc->areq)) {
2217 error = EINVAL;
2218 break;
2219 }
2220 ireq->i_val = status->an_cur_channel;
2221 break;
2222 case IEEE80211_IOC_POWERSAVE:
2223 sc->areq.an_type = AN_RID_ACTUALCFG;
2224 if (an_read_record(sc,
2225 (struct an_ltv_gen *)&sc->areq)) {
2226 error = EINVAL;
2227 break;
2228 }
2229 if (config->an_psave_mode == AN_PSAVE_NONE) {
2230 ireq->i_val = IEEE80211_POWERSAVE_OFF;
2231 } else if (config->an_psave_mode == AN_PSAVE_CAM) {
2232 ireq->i_val = IEEE80211_POWERSAVE_CAM;
2233 } else if (config->an_psave_mode == AN_PSAVE_PSP) {
2234 ireq->i_val = IEEE80211_POWERSAVE_PSP;
2235 } else if (config->an_psave_mode == AN_PSAVE_PSP_CAM) {
2236 ireq->i_val = IEEE80211_POWERSAVE_PSP_CAM;
2237 } else
2238 error = EINVAL;
2239 break;
2240 case IEEE80211_IOC_POWERSAVESLEEP:
2241 sc->areq.an_type = AN_RID_ACTUALCFG;
2242 if (an_read_record(sc,
2243 (struct an_ltv_gen *)&sc->areq)) {
2244 error = EINVAL;
2245 break;
2246 }
2247 ireq->i_val = config->an_listen_interval;
2248 break;
2249 }
2250 break;
2251 case SIOCS80211:
2252 if ((error = suser(p)))
2253 goto out;
2254 sc->areq.an_len = sizeof(sc->areq);
2255 /*
2256 * We need a config structure for everything but the WEP
2257 * key management and SSIDs so we get it now so avoid
2258 * duplicating this code every time.
2259 */
2260 if (ireq->i_type != IEEE80211_IOC_SSID &&
2261 ireq->i_type != IEEE80211_IOC_WEPKEY &&
2262 ireq->i_type != IEEE80211_IOC_WEPTXKEY) {
2263 sc->areq.an_type = AN_RID_GENCONFIG;
2264 if (an_read_record(sc,
2265 (struct an_ltv_gen *)&sc->areq)) {
2266 error = EINVAL;
2267 break;
2268 }
2269 }
2270 switch (ireq->i_type) {
2271 case IEEE80211_IOC_SSID:
2272 sc->areq.an_len = sizeof(sc->areq);
2273 sc->areq.an_type = AN_RID_SSIDLIST;
2274 if (an_read_record(sc,
2275 (struct an_ltv_gen *)&sc->areq)) {
2276 error = EINVAL;
2277 break;
2278 }
2279 if (ireq->i_len > IEEE80211_NWID_LEN) {
2280 error = EINVAL;
2281 break;
2282 }
2283 max = (sc->areq.an_len - 4)
2284 / sizeof(struct an_ltv_ssid_entry);
2285 if ( max > MAX_SSIDS ) {
2286 printf("To many SSIDs only using "
2287 "%d of %d\n",
2288 MAX_SSIDS, max);
2289 max = MAX_SSIDS;
2290 }
2291 if (ireq->i_val > max) {
2292 error = EINVAL;
2293 break;
2294 } else {
2295 error = copyin(ireq->i_data,
2296 ssids->an_entry[ireq->i_val].an_ssid,
2297 ireq->i_len);
2298 ssids->an_entry[ireq->i_val].an_len
2299 = ireq->i_len;
2300 break;
2301 }
2302 break;
2303 case IEEE80211_IOC_WEP:
2304 switch (ireq->i_val) {
2305 case IEEE80211_WEP_OFF:
2306 config->an_authtype &=
2307 ~(AN_AUTHTYPE_PRIVACY_IN_USE |
2308 AN_AUTHTYPE_ALLOW_UNENCRYPTED);
2309 break;
2310 case IEEE80211_WEP_ON:
2311 config->an_authtype |=
2312 AN_AUTHTYPE_PRIVACY_IN_USE;
2313 config->an_authtype &=
2314 ~AN_AUTHTYPE_ALLOW_UNENCRYPTED;
2315 break;
2316 case IEEE80211_WEP_MIXED:
2317 config->an_authtype |=
2318 AN_AUTHTYPE_PRIVACY_IN_USE |
2319 AN_AUTHTYPE_ALLOW_UNENCRYPTED;
2320 break;
2321 default:
2322 error = EINVAL;
2323 break;
2324 }
2325 break;
2326 case IEEE80211_IOC_WEPKEY:
2327 if (ireq->i_val < 0 || ireq->i_val > 8 ||
2328 ireq->i_len > 13) {
2329 error = EINVAL;
2330 break;
2331 }
2332 error = copyin(ireq->i_data, tmpstr, 13);
2333 if (error != 0)
2334 break;
2335 /*
2336 * Map the 9th key into the home mode
2337 * since that is how it is stored on
2338 * the card
2339 */
2340 bzero(&sc->areq, sizeof(struct an_ltv_key));
2341 sc->areq.an_len = sizeof(struct an_ltv_key);
2342 key->mac[0] = 1; /* The others are 0. */
2343 if (ireq->i_val < 4) {
2344 sc->areq.an_type = AN_RID_WEP_TEMP;
2345 key->kindex = ireq->i_val;
2346 } else {
2347 sc->areq.an_type = AN_RID_WEP_PERM;
2348 key->kindex = ireq->i_val - 4;
2349 }
2350 key->klen = ireq->i_len;
2351 bcopy(tmpstr, key->key, key->klen);
2352 break;
2353 case IEEE80211_IOC_WEPTXKEY:
2354 if (ireq->i_val < 0 || ireq->i_val > 4) {
2355 error = EINVAL;
2356 break;
2357 }
2358
2359 /*
2360 * Map the 5th key into the home mode
2361 * since that is how it is stored on
2362 * the card
2363 */
2364 sc->areq.an_len = sizeof(struct an_ltv_genconfig);
2365 sc->areq.an_type = AN_RID_ACTUALCFG;
2366 if (an_read_record(sc,
2367 (struct an_ltv_gen *)&sc->areq)) {
2368 error = EINVAL;
2369 break;
2370 }
2371 if (ireq->i_val == 4) {
2372 config->an_home_product |= AN_HOME_NETWORK;
2373 ireq->i_val = 0;
2374 } else {
2375 config->an_home_product &= ~AN_HOME_NETWORK;
2376 }
2377
2378 sc->an_config.an_home_product
2379 = config->an_home_product;
2380
2381 /* update configuration */
2382 an_init(sc);
2383
2384 bzero(&sc->areq, sizeof(struct an_ltv_key));
2385 sc->areq.an_len = sizeof(struct an_ltv_key);
2386 sc->areq.an_type = AN_RID_WEP_PERM;
2387 key->kindex = 0xffff;
2388 key->mac[0] = ireq->i_val;
2389 break;
2390 case IEEE80211_IOC_AUTHMODE:
2391 switch (ireq->i_val) {
2392 case IEEE80211_AUTH_NONE:
2393 config->an_authtype = AN_AUTHTYPE_NONE |
2394 (config->an_authtype & ~AN_AUTHTYPE_MASK);
2395 break;
2396 case IEEE80211_AUTH_OPEN:
2397 config->an_authtype = AN_AUTHTYPE_OPEN |
2398 (config->an_authtype & ~AN_AUTHTYPE_MASK);
2399 break;
2400 case IEEE80211_AUTH_SHARED:
2401 config->an_authtype = AN_AUTHTYPE_SHAREDKEY |
2402 (config->an_authtype & ~AN_AUTHTYPE_MASK);
2403 break;
2404 default:
2405 error = EINVAL;
2406 }
2407 break;
2408 case IEEE80211_IOC_STATIONNAME:
2409 if (ireq->i_len > 16) {
2410 error = EINVAL;
2411 break;
2412 }
2413 bzero(config->an_nodename, 16);
2414 error = copyin(ireq->i_data,
2415 config->an_nodename, ireq->i_len);
2416 break;
2417 case IEEE80211_IOC_CHANNEL:
2418 /*
2419 * The actual range is 1-14, but if you set it
2420 * to 0 you get the default so we let that work
2421 * too.
2422 */
2423 if (ireq->i_val < 0 || ireq->i_val >14) {
2424 error = EINVAL;
2425 break;
2426 }
2427 config->an_ds_channel = ireq->i_val;
2428 break;
2429 case IEEE80211_IOC_POWERSAVE:
2430 switch (ireq->i_val) {
2431 case IEEE80211_POWERSAVE_OFF:
2432 config->an_psave_mode = AN_PSAVE_NONE;
2433 break;
2434 case IEEE80211_POWERSAVE_CAM:
2435 config->an_psave_mode = AN_PSAVE_CAM;
2436 break;
2437 case IEEE80211_POWERSAVE_PSP:
2438 config->an_psave_mode = AN_PSAVE_PSP;
2439 break;
2440 case IEEE80211_POWERSAVE_PSP_CAM:
2441 config->an_psave_mode = AN_PSAVE_PSP_CAM;
2442 break;
2443 default:
2444 error = EINVAL;
2445 break;
2446 }
2447 break;
2448 case IEEE80211_IOC_POWERSAVESLEEP:
2449 config->an_listen_interval = ireq->i_val;
2450 break;
2451 }
2452
2453 if (!error)
2454 an_setdef(sc, &sc->areq);
2455 break;
2456 default:
2457 error = EINVAL;
2458 break;
2459 }
2460 out:
2461 splx(s);
2462
2463 return(error != 0);
2464 }
2465
2466 static int
2467 an_init_tx_ring(sc)
2468 struct an_softc *sc;
2469 {
2470 int i;
2471 int id;
2472
2473 if (sc->an_gone)
2474 return (0);
2475
2476 if (!sc->mpi350) {
2477 for (i = 0; i < AN_TX_RING_CNT; i++) {
2478 if (an_alloc_nicmem(sc, 1518 +
2479 0x44, &id))
2480 return(ENOMEM);
2481 sc->an_rdata.an_tx_fids[i] = id;
2482 sc->an_rdata.an_tx_ring[i] = 0;
2483 }
2484 }
2485
2486 sc->an_rdata.an_tx_prod = 0;
2487 sc->an_rdata.an_tx_cons = 0;
2488 sc->an_rdata.an_tx_empty = 1;
2489
2490 return(0);
2491 }
2492
2493 static void
2494 an_init(xsc)
2495 void *xsc;
2496 {
2497 struct an_softc *sc = xsc;
2498 struct ifnet *ifp = &sc->arpcom.ac_if;
2499 int s;
2500
2501 s = splimp();
2502
2503 if (sc->an_gone) {
2504 splx(s);
2505 return;
2506 }
2507
2508 if (ifp->if_flags & IFF_RUNNING)
2509 an_stop(sc);
2510
2511 sc->an_associated = 0;
2512
2513 /* Allocate the TX buffers */
2514 if (an_init_tx_ring(sc)) {
2515 an_reset(sc);
2516 if (sc->mpi350)
2517 an_init_mpi350_desc(sc);
2518 if (an_init_tx_ring(sc)) {
2519 printf("an%d: tx buffer allocation "
2520 "failed\n", sc->an_unit);
2521 splx(s);
2522 return;
2523 }
2524 }
2525
2526 /* Set our MAC address. */
2527 bcopy((char *)&sc->arpcom.ac_enaddr,
2528 (char *)&sc->an_config.an_macaddr, ETHER_ADDR_LEN);
2529
2530 if (ifp->if_flags & IFF_BROADCAST)
2531 sc->an_config.an_rxmode = AN_RXMODE_BC_ADDR;
2532 else
2533 sc->an_config.an_rxmode = AN_RXMODE_ADDR;
2534
2535 if (ifp->if_flags & IFF_MULTICAST)
2536 sc->an_config.an_rxmode = AN_RXMODE_BC_MC_ADDR;
2537
2538 if (ifp->if_flags & IFF_PROMISC) {
2539 if (sc->an_monitor & AN_MONITOR) {
2540 if (sc->an_monitor & AN_MONITOR_ANY_BSS) {
2541 sc->an_config.an_rxmode |=
2542 AN_RXMODE_80211_MONITOR_ANYBSS |
2543 AN_RXMODE_NO_8023_HEADER;
2544 } else {
2545 sc->an_config.an_rxmode |=
2546 AN_RXMODE_80211_MONITOR_CURBSS |
2547 AN_RXMODE_NO_8023_HEADER;
2548 }
2549 }
2550 }
2551
2552 if (sc->an_have_rssimap)
2553 sc->an_config.an_rxmode |= AN_RXMODE_NORMALIZED_RSSI;
2554
2555 /* Set the ssid list */
2556 sc->an_ssidlist.an_type = AN_RID_SSIDLIST;
2557 sc->an_ssidlist.an_len = sizeof(struct an_ltv_ssidlist_new);
2558 if (an_write_record(sc, (struct an_ltv_gen *)&sc->an_ssidlist)) {
2559 printf("an%d: failed to set ssid list\n", sc->an_unit);
2560 splx(s);
2561 return;
2562 }
2563
2564 /* Set the AP list */
2565 sc->an_aplist.an_type = AN_RID_APLIST;
2566 sc->an_aplist.an_len = sizeof(struct an_ltv_aplist);
2567 if (an_write_record(sc, (struct an_ltv_gen *)&sc->an_aplist)) {
2568 printf("an%d: failed to set AP list\n", sc->an_unit);
2569 splx(s);
2570 return;
2571 }
2572
2573 /* Set the configuration in the NIC */
2574 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
2575 sc->an_config.an_type = AN_RID_GENCONFIG;
2576 if (an_write_record(sc, (struct an_ltv_gen *)&sc->an_config)) {
2577 printf("an%d: failed to set configuration\n", sc->an_unit);
2578 splx(s);
2579 return;
2580 }
2581
2582 /* Enable the MAC */
2583 if (an_cmd(sc, AN_CMD_ENABLE, 0)) {
2584 printf("an%d: failed to enable MAC\n", sc->an_unit);
2585 splx(s);
2586 return;
2587 }
2588
2589 if (ifp->if_flags & IFF_PROMISC)
2590 an_cmd(sc, AN_CMD_SET_MODE, 0xffff);
2591
2592 /* enable interrupts */
2593 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), AN_INTRS(sc->mpi350));
2594
2595 ifp->if_flags |= IFF_RUNNING;
2596 ifp->if_flags &= ~IFF_OACTIVE;
2597
2598 sc->an_stat_ch = timeout(an_stats_update, sc, hz);
2599 splx(s);
2600
2601 return;
2602 }
2603
2604 static void
2605 an_start(ifp)
2606 struct ifnet *ifp;
2607 {
2608 struct an_softc *sc;
2609 struct mbuf *m0 = NULL;
2610 struct an_txframe_802_3 tx_frame_802_3;
2611 struct ether_header *eh;
2612 int id, idx, i;
2613 unsigned char txcontrol;
2614 struct an_card_tx_desc an_tx_desc;
2615 u_int8_t *buf;
2616
2617 sc = ifp->if_softc;
2618
2619 if (sc->an_gone)
2620 return;
2621
2622 if (ifp->if_flags & IFF_OACTIVE)
2623 return;
2624
2625 if (!sc->an_associated)
2626 return;
2627
2628 /* We can't send in monitor mode so toss any attempts. */
2629 if (sc->an_monitor && (ifp->if_flags & IFF_PROMISC)) {
2630 for (;;) {
2631 IF_DEQUEUE(&ifp->if_snd, m0);
2632 if (m0 == NULL)
2633 break;
2634 m_freem(m0);
2635 }
2636 return;
2637 }
2638
2639 idx = sc->an_rdata.an_tx_prod;
2640
2641 if (!sc->mpi350) {
2642 bzero((char *)&tx_frame_802_3, sizeof(tx_frame_802_3));
2643
2644 while (sc->an_rdata.an_tx_ring[idx] == 0) {
2645 IF_DEQUEUE(&ifp->if_snd, m0);
2646 if (m0 == NULL)
2647 break;
2648
2649 id = sc->an_rdata.an_tx_fids[idx];
2650 eh = mtod(m0, struct ether_header *);
2651
2652 bcopy((char *)&eh->ether_dhost,
2653 (char *)&tx_frame_802_3.an_tx_dst_addr,
2654 ETHER_ADDR_LEN);
2655 bcopy((char *)&eh->ether_shost,
2656 (char *)&tx_frame_802_3.an_tx_src_addr,
2657 ETHER_ADDR_LEN);
2658
2659 /* minus src/dest mac & type */
2660 tx_frame_802_3.an_tx_802_3_payload_len =
2661 m0->m_pkthdr.len - 12;
2662
2663 m_copydata(m0, sizeof(struct ether_header) - 2 ,
2664 tx_frame_802_3.an_tx_802_3_payload_len,
2665 (caddr_t)&sc->an_txbuf);
2666
2667 txcontrol = AN_TXCTL_8023;
2668 /* write the txcontrol only */
2669 an_write_data(sc, id, 0x08, (caddr_t)&txcontrol,
2670 sizeof(txcontrol));
2671
2672 /* 802_3 header */
2673 an_write_data(sc, id, 0x34, (caddr_t)&tx_frame_802_3,
2674 sizeof(struct an_txframe_802_3));
2675
2676 /* in mbuf header type is just before payload */
2677 an_write_data(sc, id, 0x44, (caddr_t)&sc->an_txbuf,
2678 tx_frame_802_3.an_tx_802_3_payload_len);
2679
2680 /*
2681 * If there's a BPF listner, bounce a copy of
2682 * this frame to him.
2683 */
2684 if (ifp->if_bpf)
2685 bpf_mtap(ifp, m0);
2686
2687 m_freem(m0);
2688 m0 = NULL;
2689
2690 sc->an_rdata.an_tx_ring[idx] = id;
2691 if (an_cmd(sc, AN_CMD_TX, id))
2692 printf("an%d: xmit failed\n", sc->an_unit);
2693
2694 AN_INC(idx, AN_TX_RING_CNT);
2695
2696 /*
2697 * Set a timeout in case the chip goes out to lunch.
2698 */
2699 ifp->if_timer = 5;
2700 }
2701 } else { /* MPI-350 */
2702 /* Disable interrupts. */
2703 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0);
2704
2705 while (sc->an_rdata.an_tx_empty ||
2706 idx != sc->an_rdata.an_tx_cons) {
2707 IF_DEQUEUE(&ifp->if_snd, m0);
2708 if (m0 == NULL) {
2709 break;
2710 }
2711 buf = sc->an_tx_buffer[idx].an_dma_vaddr;
2712
2713 eh = mtod(m0, struct ether_header *);
2714
2715 /* DJA optimize this to limit bcopy */
2716 bcopy((char *)&eh->ether_dhost,
2717 (char *)&tx_frame_802_3.an_tx_dst_addr,
2718 ETHER_ADDR_LEN);
2719 bcopy((char *)&eh->ether_shost,
2720 (char *)&tx_frame_802_3.an_tx_src_addr,
2721 ETHER_ADDR_LEN);
2722
2723 /* minus src/dest mac & type */
2724 tx_frame_802_3.an_tx_802_3_payload_len =
2725 m0->m_pkthdr.len - 12;
2726
2727 m_copydata(m0, sizeof(struct ether_header) - 2 ,
2728 tx_frame_802_3.an_tx_802_3_payload_len,
2729 (caddr_t)&sc->an_txbuf);
2730
2731 txcontrol = AN_TXCTL_8023;
2732 /* write the txcontrol only */
2733 bcopy((caddr_t)&txcontrol, &buf[0x08],
2734 sizeof(txcontrol));
2735
2736 /* 802_3 header */
2737 bcopy((caddr_t)&tx_frame_802_3, &buf[0x34],
2738 sizeof(struct an_txframe_802_3));
2739
2740 /* in mbuf header type is just before payload */
2741 bcopy((caddr_t)&sc->an_txbuf, &buf[0x44],
2742 tx_frame_802_3.an_tx_802_3_payload_len);
2743
2744
2745 bzero(&an_tx_desc, sizeof(an_tx_desc));
2746 an_tx_desc.an_offset = 0;
2747 an_tx_desc.an_eoc = 1;
2748 an_tx_desc.an_valid = 1;
2749 an_tx_desc.an_len = 0x44 +
2750 tx_frame_802_3.an_tx_802_3_payload_len;
2751 an_tx_desc.an_phys
2752 = sc->an_tx_buffer[idx].an_dma_paddr;
2753 for (i = 0; i < sizeof(an_tx_desc) / 4 ; i++) {
2754 CSR_MEM_AUX_WRITE_4(sc, AN_TX_DESC_OFFSET
2755 /* zero for now */
2756 + (0 * sizeof(an_tx_desc))
2757 + (i * 4),
2758 ((u_int32_t*)&an_tx_desc)[i]);
2759 }
2760
2761 /*
2762 * If there's a BPF listner, bounce a copy of
2763 * this frame to him.
2764 */
2765 if (ifp->if_bpf)
2766 bpf_mtap(ifp, m0);
2767
2768 m_freem(m0);
2769 m0 = NULL;
2770 AN_INC(idx, AN_MAX_TX_DESC);
2771 sc->an_rdata.an_tx_empty = 0;
2772 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_ALLOC);
2773
2774 /*
2775 * Set a timeout in case the chip goes out to lunch.
2776 */
2777 ifp->if_timer = 5;
2778 }
2779
2780 /* Re-enable interrupts. */
2781 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), AN_INTRS(sc->mpi350));
2782 }
2783
2784 if (m0 != NULL)
2785 ifp->if_flags |= IFF_OACTIVE;
2786
2787 sc->an_rdata.an_tx_prod = idx;
2788
2789 return;
2790 }
2791
2792 void
2793 an_stop(sc)
2794 struct an_softc *sc;
2795 {
2796 struct ifnet *ifp;
2797 int i;
2798 int s;
2799
2800 s = splimp();
2801
2802 if (sc->an_gone) {
2803 splx(s);
2804 return;
2805 }
2806
2807 ifp = &sc->arpcom.ac_if;
2808
2809 an_cmd(sc, AN_CMD_FORCE_SYNCLOSS, 0);
2810 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0);
2811 an_cmd(sc, AN_CMD_DISABLE, 0);
2812
2813 for (i = 0; i < AN_TX_RING_CNT; i++)
2814 an_cmd(sc, AN_CMD_DEALLOC_MEM, sc->an_rdata.an_tx_fids[i]);
2815
2816 untimeout(an_stats_update, sc, sc->an_stat_ch);
2817
2818 ifp->if_flags &= ~(IFF_RUNNING|IFF_OACTIVE);
2819
2820 if (sc->an_flash_buffer) {
2821 free(sc->an_flash_buffer, M_DEVBUF);
2822 sc->an_flash_buffer = NULL;
2823 }
2824
2825 splx(s);
2826
2827 return;
2828 }
2829
2830 static void
2831 an_watchdog(ifp)
2832 struct ifnet *ifp;
2833 {
2834 struct an_softc *sc;
2835 int s;
2836
2837 sc = ifp->if_softc;
2838 s = splimp();
2839
2840 if (sc->an_gone) {
2841 splx(s);
2842 return;
2843 }
2844
2845 printf("an%d: device timeout\n", sc->an_unit);
2846
2847 an_reset(sc);
2848 if (sc->mpi350)
2849 an_init_mpi350_desc(sc);
2850 an_init(sc);
2851
2852 ifp->if_oerrors++;
2853 splx(s);
2854
2855 return;
2856 }
2857
2858 void
2859 an_shutdown(dev)
2860 device_t dev;
2861 {
2862 struct an_softc *sc;
2863
2864 sc = device_get_softc(dev);
2865 an_stop(sc);
2866
2867 return;
2868 }
2869
2870 void
2871 an_resume(dev)
2872 device_t dev;
2873 {
2874 struct an_softc *sc;
2875 struct ifnet *ifp;
2876 int i;
2877
2878 sc = device_get_softc(dev);
2879 ifp = &sc->arpcom.ac_if;
2880
2881 an_reset(sc);
2882 if (sc->mpi350)
2883 an_init_mpi350_desc(sc);
2884 an_init(sc);
2885
2886 /* Recovery temporary keys */
2887 for (i = 0; i < 4; i++) {
2888 sc->areq.an_type = AN_RID_WEP_TEMP;
2889 sc->areq.an_len = sizeof(struct an_ltv_key);
2890 bcopy(&sc->an_temp_keys[i],
2891 &sc->areq, sizeof(struct an_ltv_key));
2892 an_setdef(sc, &sc->areq);
2893 }
2894
2895 if (ifp->if_flags & IFF_UP)
2896 an_start(ifp);
2897
2898 return;
2899 }
2900
2901 #ifdef ANCACHE
2902 /* Aironet signal strength cache code.
2903 * store signal/noise/quality on per MAC src basis in
2904 * a small fixed cache. The cache wraps if > MAX slots
2905 * used. The cache may be zeroed out to start over.
2906 * Two simple filters exist to reduce computation:
2907 * 1. ip only (literally 0x800, ETHERTYPE_IP) which may be used
2908 * to ignore some packets. It defaults to ip only.
2909 * it could be used to focus on broadcast, non-IP 802.11 beacons.
2910 * 2. multicast/broadcast only. This may be used to
2911 * ignore unicast packets and only cache signal strength
2912 * for multicast/broadcast packets (beacons); e.g., Mobile-IP
2913 * beacons and not unicast traffic.
2914 *
2915 * The cache stores (MAC src(index), IP src (major clue), signal,
2916 * quality, noise)
2917 *
2918 * No apologies for storing IP src here. It's easy and saves much
2919 * trouble elsewhere. The cache is assumed to be INET dependent,
2920 * although it need not be.
2921 *
2922 * Note: the Aironet only has a single byte of signal strength value
2923 * in the rx frame header, and it's not scaled to anything sensible.
2924 * This is kind of lame, but it's all we've got.
2925 */
2926
2927 #ifdef documentation
2928
2929 int an_sigitems; /* number of cached entries */
2930 struct an_sigcache an_sigcache[MAXANCACHE]; /* array of cache entries */
2931 int an_nextitem; /* index/# of entries */
2932
2933
2934 #endif
2935
2936 /* control variables for cache filtering. Basic idea is
2937 * to reduce cost (e.g., to only Mobile-IP agent beacons
2938 * which are broadcast or multicast). Still you might
2939 * want to measure signal strength anth unicast ping packets
2940 * on a pt. to pt. ant. setup.
2941 */
2942 /* set true if you want to limit cache items to broadcast/mcast
2943 * only packets (not unicast). Useful for mobile-ip beacons which
2944 * are broadcast/multicast at network layer. Default is all packets
2945 * so ping/unicast anll work say anth pt. to pt. antennae setup.
2946 */
2947 static int an_cache_mcastonly = 0;
2948 SYSCTL_INT(_hw_an, OID_AUTO, an_cache_mcastonly, CTLFLAG_RW,
2949 &an_cache_mcastonly, 0, "");
2950
2951 /* set true if you want to limit cache items to IP packets only
2952 */
2953 static int an_cache_iponly = 1;
2954 SYSCTL_INT(_hw_an, OID_AUTO, an_cache_iponly, CTLFLAG_RW,
2955 &an_cache_iponly, 0, "");
2956
2957 /*
2958 * an_cache_store, per rx packet store signal
2959 * strength in MAC (src) indexed cache.
2960 */
2961 static void
2962 an_cache_store (sc, eh, m, rx_rssi, rx_quality)
2963 struct an_softc *sc;
2964 struct ether_header *eh;
2965 struct mbuf *m;
2966 u_int8_t rx_rssi;
2967 u_int8_t rx_quality;
2968 {
2969 struct ip *ip = 0;
2970 int i;
2971 static int cache_slot = 0; /* use this cache entry */
2972 static int wrapindex = 0; /* next "free" cache entry */
2973 int type_ipv4 = 0;
2974
2975 /* filters:
2976 * 1. ip only
2977 * 2. configurable filter to throw out unicast packets,
2978 * keep multicast only.
2979 */
2980
2981 if ((ntohs(eh->ether_type) == ETHERTYPE_IP)) {
2982 type_ipv4 = 1;
2983 }
2984
2985 /* filter for ip packets only
2986 */
2987 if ( an_cache_iponly && !type_ipv4) {
2988 return;
2989 }
2990
2991 /* filter for broadcast/multicast only
2992 */
2993 if (an_cache_mcastonly && ((eh->ether_dhost[0] & 1) == 0)) {
2994 return;
2995 }
2996
2997 #ifdef SIGDEBUG
2998 printf("an: q value %x (MSB=0x%x, LSB=0x%x) \n",
2999 rx_rssi & 0xffff, rx_rssi >> 8, rx_rssi & 0xff);
3000 #endif
3001
3002 /* find the ip header. we want to store the ip_src
3003 * address.
3004 */
3005 if (type_ipv4) {
3006 ip = mtod(m, struct ip *);
3007 }
3008
3009 /* do a linear search for a matching MAC address
3010 * in the cache table
3011 * . MAC address is 6 bytes,
3012 * . var w_nextitem holds total number of entries already cached
3013 */
3014 for (i = 0; i < sc->an_nextitem; i++) {
3015 if (! bcmp(eh->ether_shost , sc->an_sigcache[i].macsrc, 6 )) {
3016 /* Match!,
3017 * so we already have this entry,
3018 * update the data
3019 */
3020 break;
3021 }
3022 }
3023
3024 /* did we find a matching mac address?
3025 * if yes, then overwrite a previously existing cache entry
3026 */
3027 if (i < sc->an_nextitem ) {
3028 cache_slot = i;
3029 }
3030 /* else, have a new address entry,so
3031 * add this new entry,
3032 * if table full, then we need to replace LRU entry
3033 */
3034 else {
3035
3036 /* check for space in cache table
3037 * note: an_nextitem also holds number of entries
3038 * added in the cache table
3039 */
3040 if ( sc->an_nextitem < MAXANCACHE ) {
3041 cache_slot = sc->an_nextitem;
3042 sc->an_nextitem++;
3043 sc->an_sigitems = sc->an_nextitem;
3044 }
3045 /* no space found, so simply wrap anth wrap index
3046 * and "zap" the next entry
3047 */
3048 else {
3049 if (wrapindex == MAXANCACHE) {
3050 wrapindex = 0;
3051 }
3052 cache_slot = wrapindex++;
3053 }
3054 }
3055
3056 /* invariant: cache_slot now points at some slot
3057 * in cache.
3058 */
3059 if (cache_slot < 0 || cache_slot >= MAXANCACHE) {
3060 log(LOG_ERR, "an_cache_store, bad index: %d of "
3061 "[0..%d], gross cache error\n",
3062 cache_slot, MAXANCACHE);
3063 return;
3064 }
3065
3066 /* store items in cache
3067 * .ip source address
3068 * .mac src
3069 * .signal, etc.
3070 */
3071 if (type_ipv4) {
3072 sc->an_sigcache[cache_slot].ipsrc = ip->ip_src.s_addr;
3073 }
3074 bcopy( eh->ether_shost, sc->an_sigcache[cache_slot].macsrc, 6);
3075
3076
3077 switch (an_cache_mode) {
3078 case DBM:
3079 if (sc->an_have_rssimap) {
3080 sc->an_sigcache[cache_slot].signal =
3081 - sc->an_rssimap.an_entries[rx_rssi].an_rss_dbm;
3082 sc->an_sigcache[cache_slot].quality =
3083 - sc->an_rssimap.an_entries[rx_quality].an_rss_dbm;
3084 } else {
3085 sc->an_sigcache[cache_slot].signal = rx_rssi - 100;
3086 sc->an_sigcache[cache_slot].quality = rx_quality - 100;
3087 }
3088 break;
3089 case PERCENT:
3090 if (sc->an_have_rssimap) {
3091 sc->an_sigcache[cache_slot].signal =
3092 sc->an_rssimap.an_entries[rx_rssi].an_rss_pct;
3093 sc->an_sigcache[cache_slot].quality =
3094 sc->an_rssimap.an_entries[rx_quality].an_rss_pct;
3095 } else {
3096 if (rx_rssi > 100)
3097 rx_rssi = 100;
3098 if (rx_quality > 100)
3099 rx_quality = 100;
3100 sc->an_sigcache[cache_slot].signal = rx_rssi;
3101 sc->an_sigcache[cache_slot].quality = rx_quality;
3102 }
3103 break;
3104 case RAW:
3105 sc->an_sigcache[cache_slot].signal = rx_rssi;
3106 sc->an_sigcache[cache_slot].quality = rx_quality;
3107 break;
3108 }
3109
3110 sc->an_sigcache[cache_slot].noise = 0;
3111
3112 return;
3113 }
3114 #endif
3115
3116 static int
3117 an_media_change(ifp)
3118 struct ifnet *ifp;
3119 {
3120 struct an_softc *sc = ifp->if_softc;
3121 struct an_ltv_genconfig *cfg;
3122 int otype = sc->an_config.an_opmode;
3123 int orate = sc->an_tx_rate;
3124
3125 switch (IFM_SUBTYPE(sc->an_ifmedia.ifm_cur->ifm_media)) {
3126 case IFM_IEEE80211_DS1:
3127 sc->an_tx_rate = AN_RATE_1MBPS;
3128 break;
3129 case IFM_IEEE80211_DS2:
3130 sc->an_tx_rate = AN_RATE_2MBPS;
3131 break;
3132 case IFM_IEEE80211_DS5:
3133 sc->an_tx_rate = AN_RATE_5_5MBPS;
3134 break;
3135 case IFM_IEEE80211_DS11:
3136 sc->an_tx_rate = AN_RATE_11MBPS;
3137 break;
3138 case IFM_AUTO:
3139 sc->an_tx_rate = 0;
3140 break;
3141 }
3142
3143 if (orate != sc->an_tx_rate) {
3144 /* Read the current configuration */
3145 sc->an_config.an_type = AN_RID_GENCONFIG;
3146 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
3147 an_read_record(sc, (struct an_ltv_gen *)&sc->an_config);
3148 cfg = &sc->an_config;
3149
3150 /* clear other rates and set the only one we want */
3151 bzero(cfg->an_rates, sizeof(cfg->an_rates));
3152 cfg->an_rates[0] = sc->an_tx_rate;
3153
3154 /* Save the new rate */
3155 sc->an_config.an_type = AN_RID_GENCONFIG;
3156 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
3157 }
3158
3159 if ((sc->an_ifmedia.ifm_cur->ifm_media & IFM_IEEE80211_ADHOC) != 0)
3160 sc->an_config.an_opmode &= ~AN_OPMODE_INFRASTRUCTURE_STATION;
3161 else
3162 sc->an_config.an_opmode |= AN_OPMODE_INFRASTRUCTURE_STATION;
3163
3164 if (otype != sc->an_config.an_opmode ||
3165 orate != sc->an_tx_rate)
3166 an_init(sc);
3167
3168 return(0);
3169 }
3170
3171 static void
3172 an_media_status(ifp, imr)
3173 struct ifnet *ifp;
3174 struct ifmediareq *imr;
3175 {
3176 struct an_ltv_status status;
3177 struct an_softc *sc = ifp->if_softc;
3178
3179 status.an_len = sizeof(status);
3180 status.an_type = AN_RID_STATUS;
3181 if (an_read_record(sc, (struct an_ltv_gen *)&status)) {
3182 /* If the status read fails, just lie. */
3183 imr->ifm_active = sc->an_ifmedia.ifm_cur->ifm_media;
3184 imr->ifm_status = IFM_AVALID|IFM_ACTIVE;
3185 }
3186
3187 if (sc->an_tx_rate == 0) {
3188 imr->ifm_active = IFM_IEEE80211|IFM_AUTO;
3189 if (sc->an_config.an_opmode == AN_OPMODE_IBSS_ADHOC)
3190 imr->ifm_active |= IFM_IEEE80211_ADHOC;
3191 switch (status.an_current_tx_rate) {
3192 case AN_RATE_1MBPS:
3193 imr->ifm_active |= IFM_IEEE80211_DS1;
3194 break;
3195 case AN_RATE_2MBPS:
3196 imr->ifm_active |= IFM_IEEE80211_DS2;
3197 break;
3198 case AN_RATE_5_5MBPS:
3199 imr->ifm_active |= IFM_IEEE80211_DS5;
3200 break;
3201 case AN_RATE_11MBPS:
3202 imr->ifm_active |= IFM_IEEE80211_DS11;
3203 break;
3204 }
3205 } else {
3206 imr->ifm_active = sc->an_ifmedia.ifm_cur->ifm_media;
3207 }
3208
3209 imr->ifm_status = IFM_AVALID;
3210 if (status.an_opmode & AN_STATUS_OPMODE_ASSOCIATED)
3211 imr->ifm_status |= IFM_ACTIVE;
3212 }
3213
3214 /********************** Cisco utility support routines *************/
3215
3216 /*
3217 * ReadRids & WriteRids derived from Cisco driver additions to Ben Reed's
3218 * Linux driver
3219 */
3220
3221 static int
3222 readrids(ifp, l_ioctl)
3223 struct ifnet *ifp;
3224 struct aironet_ioctl *l_ioctl;
3225 {
3226 unsigned short rid;
3227 struct an_softc *sc;
3228
3229 switch (l_ioctl->command) {
3230 case AIROGCAP:
3231 rid = AN_RID_CAPABILITIES;
3232 break;
3233 case AIROGCFG:
3234 rid = AN_RID_GENCONFIG;
3235 break;
3236 case AIROGSLIST:
3237 rid = AN_RID_SSIDLIST;
3238 break;
3239 case AIROGVLIST:
3240 rid = AN_RID_APLIST;
3241 break;
3242 case AIROGDRVNAM:
3243 rid = AN_RID_DRVNAME;
3244 break;
3245 case AIROGEHTENC:
3246 rid = AN_RID_ENCAPPROTO;
3247 break;
3248 case AIROGWEPKTMP:
3249 rid = AN_RID_WEP_TEMP;
3250 break;
3251 case AIROGWEPKNV:
3252 rid = AN_RID_WEP_PERM;
3253 break;
3254 case AIROGSTAT:
3255 rid = AN_RID_STATUS;
3256 break;
3257 case AIROGSTATSD32:
3258 rid = AN_RID_32BITS_DELTA;
3259 break;
3260 case AIROGSTATSC32:
3261 rid = AN_RID_32BITS_CUM;
3262 break;
3263 default:
3264 rid = 999;
3265 break;
3266 }
3267
3268 if (rid == 999) /* Is bad command */
3269 return -EINVAL;
3270
3271 sc = ifp->if_softc;
3272 sc->areq.an_len = AN_MAX_DATALEN;
3273 sc->areq.an_type = rid;
3274
3275 an_read_record(sc, (struct an_ltv_gen *)&sc->areq);
3276
3277 l_ioctl->len = sc->areq.an_len - 4; /* just data */
3278
3279 /* the data contains the length at first */
3280 if (copyout(&(sc->areq.an_len), l_ioctl->data,
3281 sizeof(sc->areq.an_len))) {
3282 return -EFAULT;
3283 }
3284 /* Just copy the data back */
3285 if (copyout(&(sc->areq.an_val), l_ioctl->data + 2,
3286 l_ioctl->len)) {
3287 return -EFAULT;
3288 }
3289 return 0;
3290 }
3291
3292 static int
3293 writerids(ifp, l_ioctl)
3294 struct ifnet *ifp;
3295 struct aironet_ioctl *l_ioctl;
3296 {
3297 struct an_softc *sc;
3298 int rid, command;
3299
3300 sc = ifp->if_softc;
3301 rid = 0;
3302 command = l_ioctl->command;
3303
3304 switch (command) {
3305 case AIROPSIDS:
3306 rid = AN_RID_SSIDLIST;
3307 break;
3308 case AIROPCAP:
3309 rid = AN_RID_CAPABILITIES;
3310 break;
3311 case AIROPAPLIST:
3312 rid = AN_RID_APLIST;
3313 break;
3314 case AIROPCFG:
3315 rid = AN_RID_GENCONFIG;
3316 break;
3317 case AIROPMACON:
3318 an_cmd(sc, AN_CMD_ENABLE, 0);
3319 return 0;
3320 break;
3321 case AIROPMACOFF:
3322 an_cmd(sc, AN_CMD_DISABLE, 0);
3323 return 0;
3324 break;
3325 case AIROPSTCLR:
3326 /*
3327 * This command merely clears the counts does not actually
3328 * store any data only reads rid. But as it changes the cards
3329 * state, I put it in the writerid routines.
3330 */
3331
3332 rid = AN_RID_32BITS_DELTACLR;
3333 sc = ifp->if_softc;
3334 sc->areq.an_len = AN_MAX_DATALEN;
3335 sc->areq.an_type = rid;
3336
3337 an_read_record(sc, (struct an_ltv_gen *)&sc->areq);
3338 l_ioctl->len = sc->areq.an_len - 4; /* just data */
3339
3340 /* the data contains the length at first */
3341 if (copyout(&(sc->areq.an_len), l_ioctl->data,
3342 sizeof(sc->areq.an_len))) {
3343 return -EFAULT;
3344 }
3345 /* Just copy the data */
3346 if (copyout(&(sc->areq.an_val), l_ioctl->data + 2,
3347 l_ioctl->len)) {
3348 return -EFAULT;
3349 }
3350 return 0;
3351 break;
3352 case AIROPWEPKEY:
3353 rid = AN_RID_WEP_TEMP;
3354 break;
3355 case AIROPWEPKEYNV:
3356 rid = AN_RID_WEP_PERM;
3357 break;
3358 case AIROPLEAPUSR:
3359 rid = AN_RID_LEAPUSERNAME;
3360 break;
3361 case AIROPLEAPPWD:
3362 rid = AN_RID_LEAPPASSWORD;
3363 break;
3364 default:
3365 return -EOPNOTSUPP;
3366 }
3367
3368 if (rid) {
3369 if (l_ioctl->len > sizeof(sc->areq.an_val) + 4)
3370 return -EINVAL;
3371 sc->areq.an_len = l_ioctl->len + 4; /* add type & length */
3372 sc->areq.an_type = rid;
3373
3374 /* Just copy the data back */
3375 copyin((l_ioctl->data) + 2, &sc->areq.an_val,
3376 l_ioctl->len);
3377
3378 an_cmd(sc, AN_CMD_DISABLE, 0);
3379 an_write_record(sc, (struct an_ltv_gen *)&sc->areq);
3380 an_cmd(sc, AN_CMD_ENABLE, 0);
3381 return 0;
3382 }
3383 return -EOPNOTSUPP;
3384 }
3385
3386 /*
3387 * General Flash utilities derived from Cisco driver additions to Ben Reed's
3388 * Linux driver
3389 */
3390
3391 #define FLASH_DELAY(x) tsleep(ifp, PZERO, "flash", ((x) / hz) + 1);
3392 #define FLASH_COMMAND 0x7e7e
3393 #define FLASH_SIZE 32 * 1024
3394
3395 static int
3396 unstickbusy(ifp)
3397 struct ifnet *ifp;
3398 {
3399 struct an_softc *sc = ifp->if_softc;
3400
3401 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY) {
3402 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350),
3403 AN_EV_CLR_STUCK_BUSY);
3404 return 1;
3405 }
3406 return 0;
3407 }
3408
3409 /*
3410 * Wait for busy completion from card wait for delay uSec's Return true for
3411 * success meaning command reg is clear
3412 */
3413
3414 static int
3415 WaitBusy(ifp, uSec)
3416 struct ifnet *ifp;
3417 int uSec;
3418 {
3419 int statword = 0xffff;
3420 int delay = 0;
3421 struct an_softc *sc = ifp->if_softc;
3422
3423 while ((statword & AN_CMD_BUSY) && delay <= (1000 * 100)) {
3424 FLASH_DELAY(10);
3425 delay += 10;
3426 statword = CSR_READ_2(sc, AN_COMMAND(sc->mpi350));
3427
3428 if ((AN_CMD_BUSY & statword) && (delay % 200)) {
3429 unstickbusy(ifp);
3430 }
3431 }
3432
3433 return 0 == (AN_CMD_BUSY & statword);
3434 }
3435
3436 /*
3437 * STEP 1) Disable MAC and do soft reset on card.
3438 */
3439
3440 static int
3441 cmdreset(ifp)
3442 struct ifnet *ifp;
3443 {
3444 int status;
3445 struct an_softc *sc = ifp->if_softc;
3446
3447 an_stop(sc);
3448
3449 an_cmd(sc, AN_CMD_DISABLE, 0);
3450
3451 if (!(status = WaitBusy(ifp, AN_TIMEOUT))) {
3452 printf("an%d: Waitbusy hang b4 RESET =%d\n",
3453 sc->an_unit, status);
3454 return -EBUSY;
3455 }
3456 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), AN_CMD_FW_RESTART);
3457
3458 FLASH_DELAY(1000); /* WAS 600 12/7/00 */
3459
3460
3461 if (!(status = WaitBusy(ifp, 100))) {
3462 printf("an%d: Waitbusy hang AFTER RESET =%d\n",
3463 sc->an_unit, status);
3464 return -EBUSY;
3465 }
3466 return 0;
3467 }
3468
3469 /*
3470 * STEP 2) Put the card in legendary flash mode
3471 */
3472
3473 static int
3474 setflashmode(ifp)
3475 struct ifnet *ifp;
3476 {
3477 int status;
3478 struct an_softc *sc = ifp->if_softc;
3479
3480 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), FLASH_COMMAND);
3481 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), FLASH_COMMAND);
3482 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), FLASH_COMMAND);
3483 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), FLASH_COMMAND);
3484
3485 /*
3486 * mdelay(500); // 500ms delay
3487 */
3488
3489 FLASH_DELAY(500);
3490
3491 if (!(status = WaitBusy(ifp, AN_TIMEOUT))) {
3492 printf("Waitbusy hang after setflash mode\n");
3493 return -EIO;
3494 }
3495 return 0;
3496 }
3497
3498 /*
3499 * Get a character from the card matching matchbyte Step 3)
3500 */
3501
3502 static int
3503 flashgchar(ifp, matchbyte, dwelltime)
3504 struct ifnet *ifp;
3505 int matchbyte;
3506 int dwelltime;
3507 {
3508 int rchar;
3509 unsigned char rbyte = 0;
3510 int success = -1;
3511 struct an_softc *sc = ifp->if_softc;
3512
3513
3514 do {
3515 rchar = CSR_READ_2(sc, AN_SW1(sc->mpi350));
3516
3517 if (dwelltime && !(0x8000 & rchar)) {
3518 dwelltime -= 10;
3519 FLASH_DELAY(10);
3520 continue;
3521 }
3522 rbyte = 0xff & rchar;
3523
3524 if ((rbyte == matchbyte) && (0x8000 & rchar)) {
3525 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), 0);
3526 success = 1;
3527 break;
3528 }
3529 if (rbyte == 0x81 || rbyte == 0x82 || rbyte == 0x83 || rbyte == 0x1a || 0xffff == rchar)
3530 break;
3531 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), 0);
3532
3533 } while (dwelltime > 0);
3534 return success;
3535 }
3536
3537 /*
3538 * Put character to SWS0 wait for dwelltime x 50us for echo .
3539 */
3540
3541 static int
3542 flashpchar(ifp, byte, dwelltime)
3543 struct ifnet *ifp;
3544 int byte;
3545 int dwelltime;
3546 {
3547 int echo;
3548 int pollbusy, waittime;
3549 struct an_softc *sc = ifp->if_softc;
3550
3551 byte |= 0x8000;
3552
3553 if (dwelltime == 0)
3554 dwelltime = 200;
3555
3556 waittime = dwelltime;
3557
3558 /*
3559 * Wait for busy bit d15 to go false indicating buffer empty
3560 */
3561 do {
3562 pollbusy = CSR_READ_2(sc, AN_SW0(sc->mpi350));
3563
3564 if (pollbusy & 0x8000) {
3565 FLASH_DELAY(50);
3566 waittime -= 50;
3567 continue;
3568 } else
3569 break;
3570 }
3571 while (waittime >= 0);
3572
3573 /* timeout for busy clear wait */
3574
3575 if (waittime <= 0) {
3576 printf("an%d: flash putchar busywait timeout! \n",
3577 sc->an_unit);
3578 return -1;
3579 }
3580 /*
3581 * Port is clear now write byte and wait for it to echo back
3582 */
3583 do {
3584 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), byte);
3585 FLASH_DELAY(50);
3586 dwelltime -= 50;
3587 echo = CSR_READ_2(sc, AN_SW1(sc->mpi350));
3588 } while (dwelltime >= 0 && echo != byte);
3589
3590
3591 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), 0);
3592
3593 return echo == byte;
3594 }
3595
3596 /*
3597 * Transfer 32k of firmware data from user buffer to our buffer and send to
3598 * the card
3599 */
3600
3601 static int
3602 flashputbuf(ifp)
3603 struct ifnet *ifp;
3604 {
3605 unsigned short *bufp;
3606 int nwords;
3607 struct an_softc *sc = ifp->if_softc;
3608
3609 /* Write stuff */
3610
3611 bufp = sc->an_flash_buffer;
3612
3613 if (!sc->mpi350) {
3614 CSR_WRITE_2(sc, AN_AUX_PAGE, 0x100);
3615 CSR_WRITE_2(sc, AN_AUX_OFFSET, 0);
3616
3617 for (nwords = 0; nwords != FLASH_SIZE / 2; nwords++) {
3618 CSR_WRITE_2(sc, AN_AUX_DATA, bufp[nwords] & 0xffff);
3619 }
3620 } else {
3621 for (nwords = 0; nwords != FLASH_SIZE / 4; nwords++) {
3622 CSR_MEM_AUX_WRITE_4(sc, 0x8000,
3623 ((u_int32_t *)bufp)[nwords] & 0xffff);
3624 }
3625 }
3626
3627 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), 0x8000);
3628
3629 return 0;
3630 }
3631
3632 /*
3633 * After flashing restart the card.
3634 */
3635
3636 static int
3637 flashrestart(ifp)
3638 struct ifnet *ifp;
3639 {
3640 int status = 0;
3641 struct an_softc *sc = ifp->if_softc;
3642
3643 FLASH_DELAY(1024); /* Added 12/7/00 */
3644
3645 an_init(sc);
3646
3647 FLASH_DELAY(1024); /* Added 12/7/00 */
3648 return status;
3649 }
3650
3651 /*
3652 * Entry point for flash ioclt.
3653 */
3654
3655 static int
3656 flashcard(ifp, l_ioctl)
3657 struct ifnet *ifp;
3658 struct aironet_ioctl *l_ioctl;
3659 {
3660 int z = 0, status;
3661 struct an_softc *sc;
3662
3663 sc = ifp->if_softc;
3664 if (sc->mpi350) {
3665 printf("an%d: flashing not supported on MPI 350 yet\n",
3666 sc->an_unit);
3667 return(-1);
3668 }
3669 status = l_ioctl->command;
3670
3671 switch (l_ioctl->command) {
3672 case AIROFLSHRST:
3673 return cmdreset(ifp);
3674 break;
3675 case AIROFLSHSTFL:
3676 if (sc->an_flash_buffer) {
3677 free(sc->an_flash_buffer, M_DEVBUF);
3678 sc->an_flash_buffer = NULL;
3679 }
3680 sc->an_flash_buffer = malloc(FLASH_SIZE, M_DEVBUF, 0);
3681 if (sc->an_flash_buffer)
3682 return setflashmode(ifp);
3683 else
3684 return ENOBUFS;
3685 break;
3686 case AIROFLSHGCHR: /* Get char from aux */
3687 copyin(l_ioctl->data, &sc->areq, l_ioctl->len);
3688 z = *(int *)&sc->areq;
3689 if ((status = flashgchar(ifp, z, 8000)) == 1)
3690 return 0;
3691 else
3692 return -1;
3693 break;
3694 case AIROFLSHPCHR: /* Send char to card. */
3695 copyin(l_ioctl->data, &sc->areq, l_ioctl->len);
3696 z = *(int *)&sc->areq;
3697 if ((status = flashpchar(ifp, z, 8000)) == -1)
3698 return -EIO;
3699 else
3700 return 0;
3701 break;
3702 case AIROFLPUTBUF: /* Send 32k to card */
3703 if (l_ioctl->len > FLASH_SIZE) {
3704 printf("an%d: Buffer to big, %x %x\n", sc->an_unit,
3705 l_ioctl->len, FLASH_SIZE);
3706 return -EINVAL;
3707 }
3708 copyin(l_ioctl->data, sc->an_flash_buffer, l_ioctl->len);
3709
3710 if ((status = flashputbuf(ifp)) != 0)
3711 return -EIO;
3712 else
3713 return 0;
3714 break;
3715 case AIRORESTART:
3716 if ((status = flashrestart(ifp)) != 0) {
3717 printf("an%d: FLASHRESTART returned %d\n",
3718 sc->an_unit, status);
3719 return -EIO;
3720 } else
3721 return 0;
3722
3723 break;
3724 default:
3725 return -EINVAL;
3726 }
3727
3728 return -EINVAL;
3729 }
Cache object: 69ca305a2297e11146cd82072427be39
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