Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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sys/dev/ar/if_ar.c
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1 /*- 2 * Copyright (c) 1995 - 2001 John Hay. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 3. Neither the name of the author nor the names of any co-contributors 13 * may be used to endorse or promote products derived from this software 14 * without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY John Hay ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL John Hay BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 /* 33 * Programming assumptions and other issues. 34 * 35 * The descriptors of a DMA channel will fit in a 16K memory window. 36 * 37 * The buffers of a transmit DMA channel will fit in a 16K memory window. 38 * 39 * Only the ISA bus cards with X.21 and V.35 is tested. 40 * 41 * When interface is going up, handshaking is set and it is only cleared 42 * when the interface is down'ed. 43 * 44 * There should be a way to set/reset Raw HDLC/PPP, Loopback, DCE/DTE, 45 * internal/external clock, etc..... 46 */ 47 48 #include "opt_netgraph.h" 49 50 #include <sys/param.h> 51 #include <sys/systm.h> 52 #include <sys/kernel.h> 53 #include <sys/malloc.h> 54 #include <sys/mbuf.h> 55 #include <sys/socket.h> 56 #include <sys/sockio.h> 57 #include <sys/module.h> 58 #include <sys/bus.h> 59 #include <machine/bus.h> 60 #include <machine/resource.h> 61 #include <sys/rman.h> 62 63 #include <net/if.h> 64 #ifdef NETGRAPH 65 #include <netgraph/ng_message.h> 66 #include <netgraph/netgraph.h> 67 #include <sys/syslog.h> 68 #include <dev/ar/if_ar.h> 69 #else /* NETGRAPH */ 70 #include <net/if_sppp.h> 71 #include <net/if_types.h> 72 #include <net/bpf.h> 73 #endif /* NETGRAPH */ 74 75 #include <machine/md_var.h> 76 77 #include <dev/ic/hd64570.h> 78 #include <dev/ar/if_arregs.h> 79 80 #ifdef TRACE 81 #define TRC(x) x 82 #else 83 #define TRC(x) 84 #endif 85 86 #define TRCL(x) x 87 88 #define PPP_HEADER_LEN 4 89 90 devclass_t ar_devclass; 91 92 struct ar_softc { 93 #ifndef NETGRAPH 94 struct ifnet *ifp; 95 #endif /* NETGRAPH */ 96 int unit; /* With regards to all ar devices */ 97 int subunit; /* With regards to this card */ 98 struct ar_hardc *hc; 99 100 struct buf_block { 101 u_int txdesc; /* On card address */ 102 u_int txstart; /* On card address */ 103 u_int txend; /* On card address */ 104 u_int txtail; /* Index of first unused buffer */ 105 u_int txmax; /* number of usable buffers/descriptors */ 106 u_int txeda; /* Error descriptor addresses */ 107 }block[AR_TX_BLOCKS]; 108 109 char xmit_busy; /* Transmitter is busy */ 110 char txb_inuse; /* Number of tx blocks currently in use */ 111 u_char txb_new; /* Index to where new buffer will be added */ 112 u_char txb_next_tx; /* Index to next block ready to tx */ 113 114 u_int rxdesc; /* On card address */ 115 u_int rxstart; /* On card address */ 116 u_int rxend; /* On card address */ 117 u_int rxhind; /* Index to the head of the rx buffers. */ 118 u_int rxmax; /* number of usable buffers/descriptors */ 119 120 int scano; 121 int scachan; 122 sca_regs *sca; 123 #ifdef NETGRAPH 124 int running; /* something is attached so we are running */ 125 int dcd; /* do we have dcd? */ 126 /* ---netgraph bits --- */ 127 char nodename[NG_NODESIZ]; /* store our node name */ 128 int datahooks; /* number of data hooks attached */ 129 node_p node; /* netgraph node */ 130 hook_p hook; /* data hook */ 131 hook_p debug_hook; 132 struct ifqueue xmitq_hipri; /* hi-priority transmit queue */ 133 struct ifqueue xmitq; /* transmit queue */ 134 int flags; /* state */ 135 #define SCF_RUNNING 0x01 /* board is active */ 136 #define SCF_OACTIVE 0x02 /* output is active */ 137 int out_dog; /* watchdog cycles output count-down */ 138 struct callout_handle handle; /* timeout(9) handle */ 139 u_long inbytes, outbytes; /* stats */ 140 u_long lastinbytes, lastoutbytes; /* a second ago */ 141 u_long inrate, outrate; /* highest rate seen */ 142 u_long inlast; /* last input N secs ago */ 143 u_long out_deficit; /* output since last input */ 144 u_long oerrors, ierrors[6]; 145 u_long opackets, ipackets; 146 #endif /* NETGRAPH */ 147 }; 148 #define SC2IFP(sc) (sc)->ifp 149 150 static int next_ar_unit = 0; 151 152 #ifdef NETGRAPH 153 #define DOG_HOLDOFF 6 /* dog holds off for 6 secs */ 154 #define QUITE_A_WHILE 300 /* 5 MINUTES */ 155 #define LOTS_OF_PACKETS 100 156 #endif /* NETGRAPH */ 157 158 /* 159 * This translate from irq numbers to 160 * the value that the arnet card needs 161 * in the lower part of the AR_INT_SEL 162 * register. 163 */ 164 static int irqtable[16] = { 165 0, /* 0 */ 166 0, /* 1 */ 167 0, /* 2 */ 168 1, /* 3 */ 169 0, /* 4 */ 170 2, /* 5 */ 171 0, /* 6 */ 172 3, /* 7 */ 173 0, /* 8 */ 174 0, /* 9 */ 175 4, /* 10 */ 176 5, /* 11 */ 177 6, /* 12 */ 178 0, /* 13 */ 179 0, /* 14 */ 180 7 /* 15 */ 181 }; 182 183 #ifndef NETGRAPH 184 MODULE_DEPEND(if_ar, sppp, 1, 1, 1); 185 #endif 186 187 static void arintr(void *arg); 188 static void ar_xmit(struct ar_softc *sc); 189 #ifndef NETGRAPH 190 static void arstart(struct ifnet *ifp); 191 static int arioctl(struct ifnet *ifp, u_long cmd, caddr_t data); 192 static void arwatchdog(struct ifnet *ifp); 193 #else /* NETGRAPH */ 194 static void arstart(struct ar_softc *sc); 195 static void arwatchdog(struct ar_softc *sc); 196 #endif /* NETGRAPH */ 197 static int ar_packet_avail(struct ar_softc *sc, int *len, u_char *rxstat); 198 static void ar_copy_rxbuf(struct mbuf *m, struct ar_softc *sc, int len); 199 static void ar_eat_packet(struct ar_softc *sc, int single); 200 static void ar_get_packets(struct ar_softc *sc); 201 202 static int ar_read_pim_iface(volatile struct ar_hardc *hc, int channel); 203 static void ar_up(struct ar_softc *sc); 204 static void ar_down(struct ar_softc *sc); 205 static void arc_init(struct ar_hardc *hc); 206 static void ar_init_sca(struct ar_hardc *hc, int scano); 207 static void ar_init_msci(struct ar_softc *sc); 208 static void ar_init_rx_dmac(struct ar_softc *sc); 209 static void ar_init_tx_dmac(struct ar_softc *sc); 210 static void ar_dmac_intr(struct ar_hardc *hc, int scano, u_char isr); 211 static void ar_msci_intr(struct ar_hardc *hc, int scano, u_char isr); 212 static void ar_timer_intr(struct ar_hardc *hc, int scano, u_char isr); 213 214 #ifdef NETGRAPH 215 static void ngar_watchdog_frame(void * arg); 216 217 static ng_constructor_t ngar_constructor; 218 static ng_rcvmsg_t ngar_rcvmsg; 219 static ng_shutdown_t ngar_shutdown; 220 static ng_newhook_t ngar_newhook; 221 /*static ng_findhook_t ngar_findhook; */ 222 static ng_connect_t ngar_connect; 223 static ng_rcvdata_t ngar_rcvdata; 224 static ng_disconnect_t ngar_disconnect; 225 226 static struct ng_type typestruct = { 227 .version = NG_ABI_VERSION, 228 .name = NG_AR_NODE_TYPE, 229 .constructor = ngar_constructor, 230 .rcvmsg = ngar_rcvmsg, 231 .shutdown = ngar_shutdown, 232 .newhook = ngar_newhook, 233 .connect = ngar_connect, 234 .rcvdata = ngar_rcvdata, 235 .disconnect = ngar_disconnect, 236 }; 237 NETGRAPH_INIT_ORDERED(sync_ar, &typestruct, SI_SUB_DRIVERS, SI_ORDER_FIRST); 238 #endif /* NETGRAPH */ 239 240 int 241 ar_attach(device_t device) 242 { 243 struct ar_hardc *hc; 244 struct ar_softc *sc; 245 #ifndef NETGRAPH 246 struct ifnet *ifp; 247 char *iface; 248 #endif /* NETGRAPH */ 249 int unit; 250 251 hc = (struct ar_hardc *)device_get_softc(device); 252 253 printf("arc%d: %uK RAM, %u ports, rev %u.\n", 254 hc->cunit, 255 hc->memsize/1024, 256 hc->numports, 257 hc->revision); 258 259 arc_init(hc); 260 261 if(BUS_SETUP_INTR(device_get_parent(device), device, hc->res_irq, 262 INTR_TYPE_NET, arintr, hc, &hc->intr_cookie) != 0) 263 return (1); 264 265 sc = hc->sc; 266 267 for(unit=0;unit<hc->numports;unit+=NCHAN) 268 ar_init_sca(hc, unit / NCHAN); 269 270 /* 271 * Now configure each port on the card. 272 */ 273 for(unit=0;unit<hc->numports;sc++,unit++) { 274 sc->hc = hc; 275 sc->subunit = unit; 276 sc->unit = next_ar_unit; 277 next_ar_unit++; 278 sc->scano = unit / NCHAN; 279 sc->scachan = unit%NCHAN; 280 281 ar_init_rx_dmac(sc); 282 ar_init_tx_dmac(sc); 283 ar_init_msci(sc); 284 285 #ifndef NETGRAPH 286 ifp = SC2IFP(sc) = if_alloc(IFT_PPP); 287 if (ifp == NULL) { 288 if (BUS_TEARDOWN_INTR(device_get_parent(device), device, 289 hc->res_irq, hc->intr_cookie) != 0) { 290 printf("intr teardown failed.. continuing\n"); 291 } 292 return (1); 293 } 294 295 ifp->if_softc = sc; 296 if_initname(ifp, device_get_name(device), 297 device_get_unit(device)); 298 ifp->if_mtu = PP_MTU; 299 ifp->if_flags = IFF_POINTOPOINT | IFF_MULTICAST | 300 IFF_NEEDSGIANT; 301 ifp->if_ioctl = arioctl; 302 ifp->if_start = arstart; 303 ifp->if_watchdog = arwatchdog; 304 305 IFP2SP(sc->ifp)->pp_flags = PP_KEEPALIVE; 306 307 switch(hc->interface[unit]) { 308 default: iface = "UNKNOWN"; break; 309 case AR_IFACE_EIA_232: iface = "EIA-232"; break; 310 case AR_IFACE_V_35: iface = "EIA-232 or V.35"; break; 311 case AR_IFACE_EIA_530: iface = "EIA-530"; break; 312 case AR_IFACE_X_21: iface = "X.21"; break; 313 case AR_IFACE_COMBO: iface = "COMBO X.21 / EIA-530"; break; 314 } 315 316 printf("ar%d: Adapter %d, port %d, interface %s.\n", 317 sc->unit, 318 hc->cunit, 319 sc->subunit, 320 iface); 321 322 sppp_attach(SC2IFP(sc)); 323 if_attach(ifp); 324 325 bpfattach(ifp, DLT_PPP, PPP_HEADER_LEN); 326 #else /* NETGRAPH */ 327 if (ng_make_node_common(&typestruct, &sc->node) != 0) 328 return (1); 329 sprintf(sc->nodename, "%s%d", NG_AR_NODE_TYPE, sc->unit); 330 if (ng_name_node(sc->node, sc->nodename)) { 331 NG_NODE_UNREF(sc->node); /* drop it again */ 332 return (1); 333 } 334 NG_NODE_SET_PRIVATE(sc->node, sc); 335 callout_handle_init(&sc->handle); 336 sc->xmitq.ifq_maxlen = IFQ_MAXLEN; 337 sc->xmitq_hipri.ifq_maxlen = IFQ_MAXLEN; 338 mtx_init(&sc->xmitq.ifq_mtx, "ar_xmitq", NULL, MTX_DEF); 339 mtx_init(&sc->xmitq_hipri.ifq_mtx, "ar_xmitq_hipri", NULL, 340 MTX_DEF); 341 sc->running = 0; 342 #endif /* NETGRAPH */ 343 } 344 345 if(hc->bustype == AR_BUS_ISA) 346 ARC_SET_OFF(hc); 347 348 return (0); 349 } 350 351 int 352 ar_detach(device_t device) 353 { 354 device_t parent = device_get_parent(device); 355 struct ar_hardc *hc = device_get_softc(device); 356 357 if (hc->intr_cookie != NULL) { 358 if (BUS_TEARDOWN_INTR(parent, device, 359 hc->res_irq, hc->intr_cookie) != 0) { 360 printf("intr teardown failed.. continuing\n"); 361 } 362 hc->intr_cookie = NULL; 363 } 364 365 /* 366 * deallocate any system resources we may have 367 * allocated on behalf of this driver. 368 */ 369 FREE(hc->sc, M_DEVBUF); 370 hc->sc = NULL; 371 hc->mem_start = NULL; 372 return (ar_deallocate_resources(device)); 373 } 374 375 int 376 ar_allocate_ioport(device_t device, int rid, u_long size) 377 { 378 struct ar_hardc *hc = device_get_softc(device); 379 380 hc->rid_ioport = rid; 381 hc->res_ioport = bus_alloc_resource(device, SYS_RES_IOPORT, 382 &hc->rid_ioport, 0ul, ~0ul, size, RF_ACTIVE); 383 if (hc->res_ioport == NULL) { 384 goto errexit; 385 } 386 hc->bt = rman_get_bustag(hc->res_ioport); 387 hc->bh = rman_get_bushandle(hc->res_ioport); 388 389 return (0); 390 391 errexit: 392 ar_deallocate_resources(device); 393 return (ENXIO); 394 } 395 396 int 397 ar_allocate_irq(device_t device, int rid, u_long size) 398 { 399 struct ar_hardc *hc = device_get_softc(device); 400 401 hc->rid_irq = rid; 402 hc->res_irq = bus_alloc_resource_any(device, SYS_RES_IRQ, 403 &hc->rid_irq, RF_SHAREABLE|RF_ACTIVE); 404 if (hc->res_irq == NULL) { 405 goto errexit; 406 } 407 return (0); 408 409 errexit: 410 ar_deallocate_resources(device); 411 return (ENXIO); 412 } 413 414 int 415 ar_allocate_memory(device_t device, int rid, u_long size) 416 { 417 struct ar_hardc *hc = device_get_softc(device); 418 419 hc->rid_memory = rid; 420 hc->res_memory = bus_alloc_resource(device, SYS_RES_MEMORY, 421 &hc->rid_memory, 0ul, ~0ul, size, RF_ACTIVE); 422 if (hc->res_memory == NULL) { 423 goto errexit; 424 } 425 return (0); 426 427 errexit: 428 ar_deallocate_resources(device); 429 return (ENXIO); 430 } 431 432 int 433 ar_allocate_plx_memory(device_t device, int rid, u_long size) 434 { 435 struct ar_hardc *hc = device_get_softc(device); 436 437 hc->rid_plx_memory = rid; 438 hc->res_plx_memory = bus_alloc_resource(device, SYS_RES_MEMORY, 439 &hc->rid_plx_memory, 0ul, ~0ul, size, RF_ACTIVE); 440 if (hc->res_plx_memory == NULL) { 441 goto errexit; 442 } 443 return (0); 444 445 errexit: 446 ar_deallocate_resources(device); 447 return (ENXIO); 448 } 449 450 int 451 ar_deallocate_resources(device_t device) 452 { 453 struct ar_hardc *hc = device_get_softc(device); 454 455 if (hc->res_irq != 0) { 456 bus_release_resource(device, SYS_RES_IRQ, 457 hc->rid_irq, hc->res_irq); 458 hc->res_irq = 0; 459 } 460 if (hc->res_ioport != 0) { 461 bus_release_resource(device, SYS_RES_IOPORT, 462 hc->rid_ioport, hc->res_ioport); 463 hc->res_ioport = 0; 464 } 465 if (hc->res_memory != 0) { 466 bus_release_resource(device, SYS_RES_MEMORY, 467 hc->rid_memory, hc->res_memory); 468 hc->res_memory = 0; 469 } 470 if (hc->res_plx_memory != 0) { 471 bus_release_resource(device, SYS_RES_MEMORY, 472 hc->rid_plx_memory, hc->res_plx_memory); 473 hc->res_plx_memory = 0; 474 } 475 return (0); 476 } 477 478 /* 479 * First figure out which SCA gave the interrupt. 480 * Process it. 481 * See if there is other interrupts pending. 482 * Repeat until there is no more interrupts. 483 */ 484 static void 485 arintr(void *arg) 486 { 487 struct ar_hardc *hc = (struct ar_hardc *)arg; 488 sca_regs *sca; 489 u_char isr0, isr1, isr2, arisr; 490 int scano; 491 492 /* XXX Use the PCI interrupt score board register later */ 493 if(hc->bustype == AR_BUS_PCI) 494 arisr = hc->orbase[AR_ISTAT * 4]; 495 else 496 arisr = ar_inb(hc, AR_ISTAT); 497 498 while(arisr & AR_BD_INT) { 499 TRC(printf("arisr = %x\n", arisr)); 500 if(arisr & AR_INT_0) 501 scano = 0; 502 else if(arisr & AR_INT_1) 503 scano = 1; 504 else { 505 /* XXX Oops this shouldn't happen. */ 506 printf("arc%d: Interrupted with no interrupt.\n", 507 hc->cunit); 508 return; 509 } 510 sca = hc->sca[scano]; 511 512 if(hc->bustype == AR_BUS_ISA) 513 ARC_SET_SCA(hc, scano); 514 515 isr0 = sca->isr0; 516 isr1 = sca->isr1; 517 isr2 = sca->isr2; 518 519 TRC(printf("arc%d: ARINTR isr0 %x, isr1 %x, isr2 %x\n", 520 hc->cunit, 521 isr0, 522 isr1, 523 isr2)); 524 if(isr0) 525 ar_msci_intr(hc, scano, isr0); 526 527 if(isr1) 528 ar_dmac_intr(hc, scano, isr1); 529 530 if(isr2) 531 ar_timer_intr(hc, scano, isr2); 532 533 /* 534 * Proccess the second sca's interrupt if available. 535 * Else see if there are any new interrupts. 536 */ 537 if((arisr & AR_INT_0) && (arisr & AR_INT_1)) 538 arisr &= ~AR_INT_0; 539 else { 540 if(hc->bustype == AR_BUS_PCI) 541 arisr = hc->orbase[AR_ISTAT * 4]; 542 else 543 arisr = ar_inb(hc, AR_ISTAT); 544 } 545 } 546 547 if(hc->bustype == AR_BUS_ISA) 548 ARC_SET_OFF(hc); 549 } 550 551 552 /* 553 * This will only start the transmitter. It is assumed that the data 554 * is already there. It is normally called from arstart() or ar_dmac_intr(). 555 * 556 */ 557 static void 558 ar_xmit(struct ar_softc *sc) 559 { 560 #ifndef NETGRAPH 561 struct ifnet *ifp; 562 #endif /* NETGRAPH */ 563 dmac_channel *dmac; 564 565 #ifndef NETGRAPH 566 ifp = SC2IFP(sc); 567 #endif /* NETGRAPH */ 568 dmac = &sc->sca->dmac[DMAC_TXCH(sc->scachan)]; 569 570 if(sc->hc->bustype == AR_BUS_ISA) 571 ARC_SET_SCA(sc->hc, sc->scano); 572 dmac->cda = (u_short)(sc->block[sc->txb_next_tx].txdesc & 0xffff); 573 574 dmac->eda = (u_short)(sc->block[sc->txb_next_tx].txeda & 0xffff); 575 dmac->dsr = SCA_DSR_DE; 576 577 sc->xmit_busy = 1; 578 579 sc->txb_next_tx++; 580 if(sc->txb_next_tx == AR_TX_BLOCKS) 581 sc->txb_next_tx = 0; 582 583 #ifndef NETGRAPH 584 ifp->if_timer = 2; /* Value in seconds. */ 585 #else /* NETGRAPH */ 586 sc->out_dog = DOG_HOLDOFF; /* give ourself some breathing space*/ 587 #endif /* NETGRAPH */ 588 if(sc->hc->bustype == AR_BUS_ISA) 589 ARC_SET_OFF(sc->hc); 590 } 591 592 /* 593 * This function will be called from the upper level when a user add a 594 * packet to be send, and from the interrupt handler after a finished 595 * transmit. 596 * 597 * NOTE: it should run at spl_imp(). 598 * 599 * This function only place the data in the oncard buffers. It does not 600 * start the transmition. ar_xmit() does that. 601 * 602 * Transmitter idle state is indicated by the IFF_DRV_OACTIVE flag. The 603 * function that clears that should ensure that the transmitter and its 604 * DMA is in a "good" idle state. 605 */ 606 #ifndef NETGRAPH 607 static void 608 arstart(struct ifnet *ifp) 609 { 610 struct ar_softc *sc = ifp->if_softc; 611 #else /* NETGRAPH */ 612 static void 613 arstart(struct ar_softc *sc) 614 { 615 #endif /* NETGRAPH */ 616 int i, len, tlen; 617 struct mbuf *mtx; 618 u_char *txdata; 619 sca_descriptor *txdesc; 620 struct buf_block *blkp; 621 622 #ifndef NETGRAPH 623 if(!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 624 return; 625 #else /* NETGRAPH */ 626 /* XXX */ 627 #endif /* NETGRAPH */ 628 629 top_arstart: 630 631 /* 632 * See if we have space for more packets. 633 */ 634 if(sc->txb_inuse == AR_TX_BLOCKS) { 635 #ifndef NETGRAPH 636 ifp->if_drv_flags |= IFF_DRV_OACTIVE; /* yes, mark active */ 637 #else /* NETGRAPH */ 638 /*XXX*/ /*ifp->if_drv_flags |= IFF_DRV_OACTIVE;*/ /* yes, mark active */ 639 #endif /* NETGRAPH */ 640 return; 641 } 642 643 #ifndef NETGRAPH 644 mtx = sppp_dequeue(ifp); 645 #else /* NETGRAPH */ 646 IF_DEQUEUE(&sc->xmitq_hipri, mtx); 647 if (mtx == NULL) { 648 IF_DEQUEUE(&sc->xmitq, mtx); 649 } 650 #endif /* NETGRAPH */ 651 if(!mtx) 652 return; 653 654 /* 655 * It is OK to set the memory window outside the loop because 656 * all tx buffers and descriptors are assumed to be in the same 657 * 16K window. 658 */ 659 if(sc->hc->bustype == AR_BUS_ISA) 660 ARC_SET_MEM(sc->hc, sc->block[0].txdesc); 661 662 /* 663 * We stay in this loop until there is nothing in the 664 * TX queue left or the tx buffer is full. 665 */ 666 i = 0; 667 blkp = &sc->block[sc->txb_new]; 668 txdesc = (sca_descriptor *) 669 (sc->hc->mem_start + (blkp->txdesc & sc->hc->winmsk)); 670 txdata = (u_char *)(sc->hc->mem_start + (blkp->txstart & sc->hc->winmsk)); 671 for(;;) { 672 len = mtx->m_pkthdr.len; 673 674 TRC(printf("ar%d: ARstart len %u\n", sc->unit, len)); 675 676 /* 677 * We can do this because the tx buffers don't wrap. 678 */ 679 m_copydata(mtx, 0, len, txdata); 680 tlen = len; 681 while(tlen > AR_BUF_SIZ) { 682 txdesc->stat = 0; 683 txdesc->len = AR_BUF_SIZ; 684 tlen -= AR_BUF_SIZ; 685 txdesc++; 686 txdata += AR_BUF_SIZ; 687 i++; 688 } 689 /* XXX Move into the loop? */ 690 txdesc->stat = SCA_DESC_EOM; 691 txdesc->len = tlen; 692 txdesc++; 693 txdata += AR_BUF_SIZ; 694 i++; 695 696 #ifndef NETGRAPH 697 BPF_MTAP(ifp, mtx); 698 m_freem(mtx); 699 ++SC2IFP(sc)->if_opackets; 700 #else /* NETGRAPH */ 701 m_freem(mtx); 702 sc->outbytes += len; 703 ++sc->opackets; 704 #endif /* NETGRAPH */ 705 706 /* 707 * Check if we have space for another mbuf. 708 * XXX This is hardcoded. A packet won't be larger 709 * than 3 buffers (3 x 512). 710 */ 711 if((i + 3) >= blkp->txmax) 712 break; 713 714 #ifndef NETGRAPH 715 mtx = sppp_dequeue(ifp); 716 #else /* NETGRAPH */ 717 IF_DEQUEUE(&sc->xmitq_hipri, mtx); 718 if (mtx == NULL) { 719 IF_DEQUEUE(&sc->xmitq, mtx); 720 } 721 #endif /* NETGRAPH */ 722 if(!mtx) 723 break; 724 } 725 726 blkp->txtail = i; 727 728 /* 729 * Mark the last descriptor, so that the SCA know where 730 * to stop. 731 */ 732 txdesc--; 733 txdesc->stat |= SCA_DESC_EOT; 734 735 txdesc = (sca_descriptor *)blkp->txdesc; 736 blkp->txeda = (u_short)((u_int)&txdesc[i]); 737 738 #if 0 739 printf("ARstart: %p desc->cp %x\n", &txdesc->cp, txdesc->cp); 740 printf("ARstart: %p desc->bp %x\n", &txdesc->bp, txdesc->bp); 741 printf("ARstart: %p desc->bpb %x\n", &txdesc->bpb, txdesc->bpb); 742 printf("ARstart: %p desc->len %x\n", &txdesc->len, txdesc->len); 743 printf("ARstart: %p desc->stat %x\n", &txdesc->stat, txdesc->stat); 744 #endif 745 746 sc->txb_inuse++; 747 sc->txb_new++; 748 if(sc->txb_new == AR_TX_BLOCKS) 749 sc->txb_new = 0; 750 751 if(sc->xmit_busy == 0) 752 ar_xmit(sc); 753 754 if(sc->hc->bustype == AR_BUS_ISA) 755 ARC_SET_OFF(sc->hc); 756 757 goto top_arstart; 758 } 759 760 #ifndef NETGRAPH 761 static int 762 arioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 763 { 764 int s, error; 765 int was_up, should_be_up; 766 struct ar_softc *sc = ifp->if_softc; 767 768 TRC(if_printf(ifp, "arioctl.\n");) 769 770 was_up = ifp->if_drv_flags & IFF_DRV_RUNNING; 771 772 error = sppp_ioctl(ifp, cmd, data); 773 TRC(if_printf(ifp, "ioctl: ifsppp.pp_flags = %x, if_flags %x.\n", 774 ((struct sppp *)ifp)->pp_flags, ifp->if_flags);) 775 if(error) 776 return (error); 777 778 if((cmd != SIOCSIFFLAGS) && cmd != (SIOCSIFADDR)) 779 return (0); 780 781 TRC(if_printf(ifp, "arioctl %s.\n", 782 (cmd == SIOCSIFFLAGS) ? "SIOCSIFFLAGS" : "SIOCSIFADDR");) 783 784 s = splimp(); 785 should_be_up = ifp->if_drv_flags & IFF_DRV_RUNNING; 786 787 if(!was_up && should_be_up) { 788 /* Interface should be up -- start it. */ 789 ar_up(sc); 790 arstart(ifp); 791 /* XXX Maybe clear the IFF_UP flag so that the link 792 * will only go up after sppp lcp and ipcp negotiation. 793 */ 794 } else if(was_up && !should_be_up) { 795 /* Interface should be down -- stop it. */ 796 ar_down(sc); 797 sppp_flush(ifp); 798 } 799 splx(s); 800 return (0); 801 } 802 #endif /* NETGRAPH */ 803 804 /* 805 * This is to catch lost tx interrupts. 806 */ 807 static void 808 #ifndef NETGRAPH 809 arwatchdog(struct ifnet *ifp) 810 { 811 struct ar_softc *sc = ifp->if_softc; 812 #else /* NETGRAPH */ 813 arwatchdog(struct ar_softc *sc) 814 { 815 #endif /* NETGRAPH */ 816 msci_channel *msci = &sc->sca->msci[sc->scachan]; 817 818 #ifndef NETGRAPH 819 if(!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 820 return; 821 #endif /* NETGRAPH */ 822 823 if(sc->hc->bustype == AR_BUS_ISA) 824 ARC_SET_SCA(sc->hc, sc->scano); 825 826 /* XXX if(SC2IFP(sc)->if_flags & IFF_DEBUG) */ 827 printf("ar%d: transmit failed, " 828 "ST0 %x, ST1 %x, ST3 %x, DSR %x.\n", 829 sc->unit, 830 msci->st0, 831 msci->st1, 832 msci->st3, 833 sc->sca->dmac[DMAC_TXCH(sc->scachan)].dsr); 834 835 if(msci->st1 & SCA_ST1_UDRN) { 836 msci->cmd = SCA_CMD_TXABORT; 837 msci->cmd = SCA_CMD_TXENABLE; 838 msci->st1 = SCA_ST1_UDRN; 839 } 840 841 sc->xmit_busy = 0; 842 #ifndef NETGRAPH 843 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 844 #else /* NETGRAPH */ 845 /* XXX ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; */ 846 #endif /* NETGRAPH */ 847 848 if(sc->txb_inuse && --sc->txb_inuse) 849 ar_xmit(sc); 850 851 #ifndef NETGRAPH 852 arstart(ifp); 853 #else /* NETGRAPH */ 854 arstart(sc); 855 #endif /* NETGRAPH */ 856 } 857 858 static void 859 ar_up(struct ar_softc *sc) 860 { 861 sca_regs *sca; 862 msci_channel *msci; 863 864 sca = sc->sca; 865 msci = &sca->msci[sc->scachan]; 866 867 TRC(printf("ar%d: sca %p, msci %p, ch %d\n", 868 sc->unit, sca, msci, sc->scachan)); 869 870 /* 871 * Enable transmitter and receiver. 872 * Raise DTR and RTS. 873 * Enable interrupts. 874 */ 875 if(sc->hc->bustype == AR_BUS_ISA) 876 ARC_SET_SCA(sc->hc, sc->scano); 877 878 /* XXX 879 * What about using AUTO mode in msci->md0 ??? 880 * And what about CTS/DCD etc... ? 881 */ 882 if(sc->hc->handshake & AR_SHSK_RTS) 883 msci->ctl &= ~SCA_CTL_RTS; 884 if(sc->hc->handshake & AR_SHSK_DTR) { 885 sc->hc->txc_dtr[sc->scano] &= sc->scachan ? 886 ~AR_TXC_DTR_DTR1 : ~AR_TXC_DTR_DTR0; 887 if(sc->hc->bustype == AR_BUS_PCI) 888 sc->hc->orbase[sc->hc->txc_dtr_off[sc->scano]] = 889 sc->hc->txc_dtr[sc->scano]; 890 else 891 ar_outb(sc->hc, sc->hc->txc_dtr_off[sc->scano], 892 sc->hc->txc_dtr[sc->scano]); 893 } 894 895 if(sc->scachan == 0) { 896 sca->ier0 |= 0x0F; 897 sca->ier1 |= 0x0F; 898 } else { 899 sca->ier0 |= 0xF0; 900 sca->ier1 |= 0xF0; 901 } 902 903 msci->cmd = SCA_CMD_RXENABLE; 904 if(sc->hc->bustype == AR_BUS_ISA) 905 ar_inb(sc->hc, AR_ID_5); /* XXX slow it down a bit. */ 906 msci->cmd = SCA_CMD_TXENABLE; 907 908 if(sc->hc->bustype == AR_BUS_ISA) 909 ARC_SET_OFF(sc->hc); 910 #ifdef NETGRAPH 911 untimeout(ngar_watchdog_frame, sc, sc->handle); 912 sc->handle = timeout(ngar_watchdog_frame, sc, hz); 913 sc->running = 1; 914 #endif /* NETGRAPH */ 915 } 916 917 static void 918 ar_down(struct ar_softc *sc) 919 { 920 sca_regs *sca; 921 msci_channel *msci; 922 923 sca = sc->sca; 924 msci = &sca->msci[sc->scachan]; 925 926 #ifdef NETGRAPH 927 untimeout(ngar_watchdog_frame, sc, sc->handle); 928 sc->running = 0; 929 #endif /* NETGRAPH */ 930 /* 931 * Disable transmitter and receiver. 932 * Lower DTR and RTS. 933 * Disable interrupts. 934 */ 935 if(sc->hc->bustype == AR_BUS_ISA) 936 ARC_SET_SCA(sc->hc, sc->scano); 937 msci->cmd = SCA_CMD_RXDISABLE; 938 if(sc->hc->bustype == AR_BUS_ISA) 939 ar_inb(sc->hc, AR_ID_5); /* XXX slow it down a bit. */ 940 msci->cmd = SCA_CMD_TXDISABLE; 941 942 if(sc->hc->handshake & AR_SHSK_RTS) 943 msci->ctl |= SCA_CTL_RTS; 944 if(sc->hc->handshake & AR_SHSK_DTR) { 945 sc->hc->txc_dtr[sc->scano] |= sc->scachan ? 946 AR_TXC_DTR_DTR1 : AR_TXC_DTR_DTR0; 947 if(sc->hc->bustype == AR_BUS_PCI) 948 sc->hc->orbase[sc->hc->txc_dtr_off[sc->scano]] = 949 sc->hc->txc_dtr[sc->scano]; 950 else 951 ar_outb(sc->hc, sc->hc->txc_dtr_off[sc->scano], 952 sc->hc->txc_dtr[sc->scano]); 953 } 954 955 if(sc->scachan == 0) { 956 sca->ier0 &= ~0x0F; 957 sca->ier1 &= ~0x0F; 958 } else { 959 sca->ier0 &= ~0xF0; 960 sca->ier1 &= ~0xF0; 961 } 962 963 if(sc->hc->bustype == AR_BUS_ISA) 964 ARC_SET_OFF(sc->hc); 965 } 966 967 static int 968 ar_read_pim_iface(volatile struct ar_hardc *hc, int channel) 969 { 970 int ctype, i, val, x; 971 volatile u_char *pimctrl; 972 973 ctype = 0; 974 val = 0; 975 976 pimctrl = hc->orbase + AR_PIMCTRL; 977 978 /* Reset the PIM */ 979 *pimctrl = 0x00; 980 *pimctrl = AR_PIM_STROBE; 981 982 /* Check if there is a PIM */ 983 *pimctrl = 0x00; 984 *pimctrl = AR_PIM_READ; 985 x = *pimctrl; 986 TRC(printf("x = %x", x)); 987 if(x & AR_PIM_DATA) { 988 printf("No PIM installed\n"); 989 return (AR_IFACE_UNKNOWN); 990 } 991 992 x = (x >> 1) & 0x01; 993 val |= x << 0; 994 995 /* Now read the next 15 bits */ 996 for(i = 1; i < 16; i++) { 997 *pimctrl = AR_PIM_READ; 998 *pimctrl = AR_PIM_READ | AR_PIM_STROBE; 999 x = *pimctrl; 1000 TRC(printf(" %x ", x)); 1001 x = (x >> 1) & 0x01; 1002 val |= x << i; 1003 if(i == 8 && (val & 0x000f) == 0x0004) { 1004 int ii; 1005 1006 /* Start bit */ 1007 *pimctrl = AR_PIM_A2D_DOUT | AR_PIM_A2D_STROBE; 1008 *pimctrl = AR_PIM_A2D_DOUT; 1009 1010 /* Mode bit */ 1011 *pimctrl = AR_PIM_A2D_DOUT | AR_PIM_A2D_STROBE; 1012 *pimctrl = AR_PIM_A2D_DOUT; 1013 1014 /* Sign bit */ 1015 *pimctrl = AR_PIM_A2D_DOUT | AR_PIM_A2D_STROBE; 1016 *pimctrl = AR_PIM_A2D_DOUT; 1017 1018 /* Select channel */ 1019 *pimctrl = AR_PIM_A2D_STROBE | ((channel & 2) << 2); 1020 *pimctrl = ((channel & 2) << 2); 1021 *pimctrl = AR_PIM_A2D_STROBE | ((channel & 1) << 3); 1022 *pimctrl = ((channel & 1) << 3); 1023 1024 *pimctrl = AR_PIM_A2D_STROBE; 1025 1026 x = *pimctrl; 1027 if(x & AR_PIM_DATA) 1028 printf("\nOops A2D start bit not zero (%X)\n", x); 1029 1030 for(ii = 7; ii >= 0; ii--) { 1031 *pimctrl = 0x00; 1032 *pimctrl = AR_PIM_A2D_STROBE; 1033 x = *pimctrl; 1034 if(x & AR_PIM_DATA) 1035 ctype |= 1 << ii; 1036 } 1037 } 1038 } 1039 TRC(printf("\nPIM val %x, ctype %x, %d\n", val, ctype, ctype)); 1040 *pimctrl = AR_PIM_MODEG; 1041 *pimctrl = AR_PIM_MODEG | AR_PIM_AUTO_LED; 1042 if(ctype > 255) 1043 return (AR_IFACE_UNKNOWN); 1044 if(ctype > 239) 1045 return (AR_IFACE_V_35); 1046 if(ctype > 207) 1047 return (AR_IFACE_EIA_232); 1048 if(ctype > 178) 1049 return (AR_IFACE_X_21); 1050 if(ctype > 150) 1051 return (AR_IFACE_EIA_530); 1052 if(ctype > 25) 1053 return (AR_IFACE_UNKNOWN); 1054 if(ctype > 7) 1055 return (AR_IFACE_LOOPBACK); 1056 return (AR_IFACE_UNKNOWN); 1057 } 1058 1059 /* 1060 * Initialize the card, allocate memory for the ar_softc structures 1061 * and fill in the pointers. 1062 */ 1063 static void 1064 arc_init(struct ar_hardc *hc) 1065 { 1066 struct ar_softc *sc; 1067 int x; 1068 u_int chanmem; 1069 u_int bufmem; 1070 u_int next; 1071 u_int descneeded; 1072 u_char isr, mar; 1073 u_long memst; 1074 1075 MALLOC(sc, struct ar_softc *, hc->numports * sizeof(struct ar_softc), 1076 M_DEVBUF, M_WAITOK | M_ZERO); 1077 if (sc == NULL) 1078 return; 1079 hc->sc = sc; 1080 1081 hc->txc_dtr[0] = AR_TXC_DTR_NOTRESET | 1082 AR_TXC_DTR_DTR0 | AR_TXC_DTR_DTR1; 1083 hc->txc_dtr[1] = AR_TXC_DTR_DTR0 | AR_TXC_DTR_DTR1; 1084 hc->txc_dtr_off[0] = AR_TXC_DTR0; 1085 hc->txc_dtr_off[1] = AR_TXC_DTR2; 1086 if(hc->bustype == AR_BUS_PCI) { 1087 hc->txc_dtr_off[0] *= 4; 1088 hc->txc_dtr_off[1] *= 4; 1089 } 1090 1091 /* 1092 * reset the card and wait at least 1uS. 1093 */ 1094 if(hc->bustype == AR_BUS_PCI) 1095 hc->orbase[AR_TXC_DTR0 * 4] = ~AR_TXC_DTR_NOTRESET & 1096 hc->txc_dtr[0]; 1097 else 1098 ar_outb(hc, AR_TXC_DTR0, ~AR_TXC_DTR_NOTRESET & 1099 hc->txc_dtr[0]); 1100 DELAY(2); 1101 if(hc->bustype == AR_BUS_PCI) 1102 hc->orbase[AR_TXC_DTR0 * 4] = hc->txc_dtr[0]; 1103 else 1104 ar_outb(hc, AR_TXC_DTR0, hc->txc_dtr[0]); 1105 1106 if(hc->bustype == AR_BUS_ISA) { 1107 /* 1108 * Configure the card. 1109 * Mem address, irq, 1110 */ 1111 memst = rman_get_start(hc->res_memory); 1112 mar = memst >> 16; 1113 isr = irqtable[hc->isa_irq] << 1; 1114 if(isr == 0) 1115 printf("ar%d: Warning illegal interrupt %d\n", 1116 hc->cunit, hc->isa_irq); 1117 isr = isr | ((memst & 0xc000) >> 10); 1118 1119 hc->sca[0] = (sca_regs *)hc->mem_start; 1120 hc->sca[1] = (sca_regs *)hc->mem_start; 1121 1122 ar_outb(hc, AR_MEM_SEL, mar); 1123 ar_outb(hc, AR_INT_SEL, isr | AR_INTS_CEN); 1124 } 1125 1126 if(hc->bustype == AR_BUS_PCI && hc->interface[0] == AR_IFACE_PIM) 1127 for(x = 0; x < hc->numports; x++) 1128 hc->interface[x] = ar_read_pim_iface(hc, x); 1129 1130 /* 1131 * Set the TX clock direction and enable TX. 1132 */ 1133 for(x=0;x<hc->numports;x++) { 1134 switch(hc->interface[x]) { 1135 case AR_IFACE_V_35: 1136 hc->txc_dtr[x / NCHAN] |= (x % NCHAN == 0) ? 1137 AR_TXC_DTR_TX0 : AR_TXC_DTR_TX1; 1138 hc->txc_dtr[x / NCHAN] |= (x % NCHAN == 0) ? 1139 AR_TXC_DTR_TXCS0 : AR_TXC_DTR_TXCS1; 1140 break; 1141 case AR_IFACE_EIA_530: 1142 case AR_IFACE_COMBO: 1143 case AR_IFACE_X_21: 1144 hc->txc_dtr[x / NCHAN] |= (x % NCHAN == 0) ? 1145 AR_TXC_DTR_TX0 : AR_TXC_DTR_TX1; 1146 break; 1147 } 1148 } 1149 1150 if(hc->bustype == AR_BUS_PCI) 1151 hc->orbase[AR_TXC_DTR0 * 4] = hc->txc_dtr[0]; 1152 else 1153 ar_outb(hc, AR_TXC_DTR0, hc->txc_dtr[0]); 1154 if(hc->numports > NCHAN) { 1155 if(hc->bustype == AR_BUS_PCI) 1156 hc->orbase[AR_TXC_DTR2 * 4] = hc->txc_dtr[1]; 1157 else 1158 ar_outb(hc, AR_TXC_DTR2, hc->txc_dtr[1]); 1159 } 1160 1161 chanmem = hc->memsize / hc->numports; 1162 next = 0; 1163 1164 for(x=0;x<hc->numports;x++, sc++) { 1165 int blk; 1166 1167 sc->sca = hc->sca[x / NCHAN]; 1168 1169 for(blk = 0; blk < AR_TX_BLOCKS; blk++) { 1170 sc->block[blk].txdesc = next; 1171 bufmem = (16 * 1024) / AR_TX_BLOCKS; 1172 descneeded = bufmem / AR_BUF_SIZ; 1173 sc->block[blk].txstart = sc->block[blk].txdesc + 1174 ((((descneeded * sizeof(sca_descriptor)) / 1175 AR_BUF_SIZ) + 1) * AR_BUF_SIZ); 1176 sc->block[blk].txend = next + bufmem; 1177 sc->block[blk].txmax = 1178 (sc->block[blk].txend - sc->block[blk].txstart) 1179 / AR_BUF_SIZ; 1180 next += bufmem; 1181 1182 TRC(printf("ar%d: blk %d: txdesc %x, txstart %x, " 1183 "txend %x, txmax %d\n", 1184 x, 1185 blk, 1186 sc->block[blk].txdesc, 1187 sc->block[blk].txstart, 1188 sc->block[blk].txend, 1189 sc->block[blk].txmax)); 1190 } 1191 1192 sc->rxdesc = next; 1193 bufmem = chanmem - (bufmem * AR_TX_BLOCKS); 1194 descneeded = bufmem / AR_BUF_SIZ; 1195 sc->rxstart = sc->rxdesc + 1196 ((((descneeded * sizeof(sca_descriptor)) / 1197 AR_BUF_SIZ) + 1) * AR_BUF_SIZ); 1198 sc->rxend = next + bufmem; 1199 sc->rxmax = (sc->rxend - sc->rxstart) / AR_BUF_SIZ; 1200 next += bufmem; 1201 TRC(printf("ar%d: rxdesc %x, rxstart %x, " 1202 "rxend %x, rxmax %d\n", 1203 x, sc->rxdesc, sc->rxstart, sc->rxend, sc->rxmax)); 1204 } 1205 1206 if(hc->bustype == AR_BUS_PCI) 1207 hc->orbase[AR_PIMCTRL] = AR_PIM_MODEG | AR_PIM_AUTO_LED; 1208 } 1209 1210 1211 /* 1212 * The things done here are channel independent. 1213 * 1214 * Configure the sca waitstates. 1215 * Configure the global interrupt registers. 1216 * Enable master dma enable. 1217 */ 1218 static void 1219 ar_init_sca(struct ar_hardc *hc, int scano) 1220 { 1221 sca_regs *sca; 1222 1223 sca = hc->sca[scano]; 1224 if(hc->bustype == AR_BUS_ISA) 1225 ARC_SET_SCA(hc, scano); 1226 1227 /* 1228 * Do the wait registers. 1229 * Set everything to 0 wait states. 1230 */ 1231 sca->pabr0 = 0; 1232 sca->pabr1 = 0; 1233 sca->wcrl = 0; 1234 sca->wcrm = 0; 1235 sca->wcrh = 0; 1236 1237 /* 1238 * Configure the interrupt registers. 1239 * Most are cleared until the interface is configured. 1240 */ 1241 sca->ier0 = 0x00; /* MSCI interrupts... Not used with dma. */ 1242 sca->ier1 = 0x00; /* DMAC interrupts */ 1243 sca->ier2 = 0x00; /* TIMER interrupts... Not used yet. */ 1244 sca->itcr = 0x00; /* Use ivr and no intr ack */ 1245 sca->ivr = 0x40; /* Fill in the interrupt vector. */ 1246 sca->imvr = 0x40; 1247 1248 /* 1249 * Configure the timers. 1250 * XXX Later 1251 */ 1252 1253 1254 /* 1255 * Set the DMA channel priority to rotate between 1256 * all four channels. 1257 * 1258 * Enable all dma channels. 1259 */ 1260 if(hc->bustype == AR_BUS_PCI) { 1261 u_char *t; 1262 1263 /* 1264 * Stupid problem with the PCI interface chip that break 1265 * things. 1266 * XXX 1267 */ 1268 t = (u_char *)sca; 1269 t[AR_PCI_SCA_PCR] = SCA_PCR_PR2; 1270 t[AR_PCI_SCA_DMER] = SCA_DMER_EN; 1271 } else { 1272 sca->pcr = SCA_PCR_PR2; 1273 sca->dmer = SCA_DMER_EN; 1274 } 1275 } 1276 1277 1278 /* 1279 * Configure the msci 1280 * 1281 * NOTE: The serial port configuration is hardcoded at the moment. 1282 */ 1283 static void 1284 ar_init_msci(struct ar_softc *sc) 1285 { 1286 msci_channel *msci; 1287 1288 msci = &sc->sca->msci[sc->scachan]; 1289 1290 if(sc->hc->bustype == AR_BUS_ISA) 1291 ARC_SET_SCA(sc->hc, sc->scano); 1292 1293 msci->cmd = SCA_CMD_RESET; 1294 1295 msci->md0 = SCA_MD0_CRC_1 | 1296 SCA_MD0_CRC_CCITT | 1297 SCA_MD0_CRC_ENABLE | 1298 SCA_MD0_MODE_HDLC; 1299 msci->md1 = SCA_MD1_NOADDRCHK; 1300 msci->md2 = SCA_MD2_DUPLEX | SCA_MD2_NRZ; 1301 1302 /* 1303 * Acording to the manual I should give a reset after changing the 1304 * mode registers. 1305 */ 1306 msci->cmd = SCA_CMD_RXRESET; 1307 msci->ctl = SCA_CTL_IDLPAT | SCA_CTL_UDRNC | SCA_CTL_RTS; 1308 1309 /* 1310 * For now all interfaces are programmed to use the RX clock for 1311 * the TX clock. 1312 */ 1313 switch(sc->hc->interface[sc->subunit]) { 1314 case AR_IFACE_V_35: 1315 msci->rxs = SCA_RXS_CLK_RXC0 | SCA_RXS_DIV1; 1316 msci->txs = SCA_TXS_CLK_TXC | SCA_TXS_DIV1; 1317 break; 1318 case AR_IFACE_X_21: 1319 case AR_IFACE_EIA_530: 1320 case AR_IFACE_COMBO: 1321 msci->rxs = SCA_RXS_CLK_RXC0 | SCA_RXS_DIV1; 1322 msci->txs = SCA_TXS_CLK_RX | SCA_TXS_DIV1; 1323 } 1324 1325 msci->tmc = 153; /* This give 64k for loopback */ 1326 1327 /* XXX 1328 * Disable all interrupts for now. I think if you are using 1329 * the dmac you don't use these interrupts. 1330 */ 1331 msci->ie0 = 0; 1332 msci->ie1 = 0x0C; /* XXX CTS and DCD (DSR on 570I) level change. */ 1333 msci->ie2 = 0; 1334 msci->fie = 0; 1335 1336 msci->sa0 = 0; 1337 msci->sa1 = 0; 1338 1339 msci->idl = 0x7E; /* XXX This is what cisco does. */ 1340 1341 /* 1342 * This is what the ARNET diags use. 1343 */ 1344 msci->rrc = 0x0E; 1345 msci->trc0 = 0x12; 1346 msci->trc1 = 0x1F; 1347 } 1348 1349 /* 1350 * Configure the rx dma controller. 1351 */ 1352 static void 1353 ar_init_rx_dmac(struct ar_softc *sc) 1354 { 1355 dmac_channel *dmac; 1356 sca_descriptor *rxd; 1357 u_int rxbuf; 1358 u_int rxda; 1359 u_int rxda_d; 1360 int x = 0; 1361 1362 dmac = &sc->sca->dmac[DMAC_RXCH(sc->scachan)]; 1363 1364 if(sc->hc->bustype == AR_BUS_ISA) 1365 ARC_SET_MEM(sc->hc, sc->rxdesc); 1366 1367 rxd = (sca_descriptor *)(sc->hc->mem_start + (sc->rxdesc&sc->hc->winmsk)); 1368 rxda_d = (u_int)sc->hc->mem_start - (sc->rxdesc & ~sc->hc->winmsk); 1369 1370 for(rxbuf=sc->rxstart;rxbuf<sc->rxend;rxbuf += AR_BUF_SIZ, rxd++) { 1371 rxda = (u_int)&rxd[1] - rxda_d; 1372 rxd->cp = (u_short)(rxda & 0xfffful); 1373 1374 x++; 1375 if(x < 6) 1376 TRC(printf("Descrp %p, data pt %x, data %x, ", 1377 rxd, rxda, rxbuf)); 1378 1379 rxd->bp = (u_short)(rxbuf & 0xfffful); 1380 rxd->bpb = (u_char)((rxbuf >> 16) & 0xff); 1381 rxd->len = 0; 1382 rxd->stat = 0xff; /* The sca write here when it is finished. */ 1383 1384 if(x < 6) 1385 TRC(printf("bpb %x, bp %x.\n", rxd->bpb, rxd->bp)); 1386 } 1387 rxd--; 1388 rxd->cp = (u_short)(sc->rxdesc & 0xfffful); 1389 1390 sc->rxhind = 0; 1391 1392 if(sc->hc->bustype == AR_BUS_ISA) 1393 ARC_SET_SCA(sc->hc, sc->scano); 1394 1395 dmac->dsr = 0; /* Disable DMA transfer */ 1396 dmac->dcr = SCA_DCR_ABRT; 1397 1398 /* XXX maybe also SCA_DMR_CNTE */ 1399 dmac->dmr = SCA_DMR_TMOD | SCA_DMR_NF; 1400 dmac->bfl = AR_BUF_SIZ; 1401 1402 dmac->cda = (u_short)(sc->rxdesc & 0xffff); 1403 dmac->sarb = (u_char)((sc->rxdesc >> 16) & 0xff); 1404 1405 rxd = (sca_descriptor *)sc->rxstart; 1406 dmac->eda = (u_short)((u_int)&rxd[sc->rxmax - 1] & 0xffff); 1407 1408 dmac->dir = 0xF0; 1409 1410 dmac->dsr = SCA_DSR_DE; 1411 } 1412 1413 /* 1414 * Configure the TX DMA descriptors. 1415 * Initialize the needed values and chain the descriptors. 1416 */ 1417 static void 1418 ar_init_tx_dmac(struct ar_softc *sc) 1419 { 1420 dmac_channel *dmac; 1421 struct buf_block *blkp; 1422 int blk; 1423 sca_descriptor *txd; 1424 u_int txbuf; 1425 u_int txda; 1426 u_int txda_d; 1427 1428 dmac = &sc->sca->dmac[DMAC_TXCH(sc->scachan)]; 1429 1430 if(sc->hc->bustype == AR_BUS_ISA) 1431 ARC_SET_MEM(sc->hc, sc->block[0].txdesc); 1432 1433 for(blk = 0; blk < AR_TX_BLOCKS; blk++) { 1434 blkp = &sc->block[blk]; 1435 txd = (sca_descriptor *)(sc->hc->mem_start + 1436 (blkp->txdesc&sc->hc->winmsk)); 1437 txda_d = (u_int)sc->hc->mem_start - 1438 (blkp->txdesc & ~sc->hc->winmsk); 1439 1440 txbuf=blkp->txstart; 1441 for(;txbuf<blkp->txend;txbuf += AR_BUF_SIZ, txd++) { 1442 txda = (u_int)&txd[1] - txda_d; 1443 txd->cp = (u_short)(txda & 0xfffful); 1444 1445 txd->bp = (u_short)(txbuf & 0xfffful); 1446 txd->bpb = (u_char)((txbuf >> 16) & 0xff); 1447 TRC(printf("ar%d: txbuf %x, bpb %x, bp %x\n", 1448 sc->unit, txbuf, txd->bpb, txd->bp)); 1449 txd->len = 0; 1450 txd->stat = 0; 1451 } 1452 txd--; 1453 txd->cp = (u_short)(blkp->txdesc & 0xfffful); 1454 1455 blkp->txtail = (u_int)txd - (u_int)sc->hc->mem_start; 1456 TRC(printf("TX Descriptors start %x, end %x.\n", 1457 blkp->txdesc, 1458 blkp->txtail)); 1459 } 1460 1461 if(sc->hc->bustype == AR_BUS_ISA) 1462 ARC_SET_SCA(sc->hc, sc->scano); 1463 1464 dmac->dsr = 0; /* Disable DMA */ 1465 dmac->dcr = SCA_DCR_ABRT; 1466 dmac->dmr = SCA_DMR_TMOD | SCA_DMR_NF; 1467 dmac->dir = SCA_DIR_EOT | SCA_DIR_BOF | SCA_DIR_COF; 1468 1469 dmac->sarb = (u_char)((sc->block[0].txdesc >> 16) & 0xff); 1470 } 1471 1472 1473 /* 1474 * Look through the descriptors to see if there is a complete packet 1475 * available. Stop if we get to where the sca is busy. 1476 * 1477 * Return the length and status of the packet. 1478 * Return nonzero if there is a packet available. 1479 * 1480 * NOTE: 1481 * It seems that we get the interrupt a bit early. The updateing of 1482 * descriptor values is not always completed when this is called. 1483 */ 1484 static int 1485 ar_packet_avail(struct ar_softc *sc, 1486 int *len, 1487 u_char *rxstat) 1488 { 1489 dmac_channel *dmac; 1490 sca_descriptor *rxdesc; 1491 sca_descriptor *endp; 1492 sca_descriptor *cda; 1493 1494 if(sc->hc->bustype == AR_BUS_ISA) 1495 ARC_SET_SCA(sc->hc, sc->scano); 1496 dmac = &sc->sca->dmac[DMAC_RXCH(sc->scachan)]; 1497 cda = (sca_descriptor *)(sc->hc->mem_start + 1498 ((((u_int)dmac->sarb << 16) + dmac->cda) & sc->hc->winmsk)); 1499 1500 if(sc->hc->bustype == AR_BUS_ISA) 1501 ARC_SET_MEM(sc->hc, sc->rxdesc); 1502 rxdesc = (sca_descriptor *) 1503 (sc->hc->mem_start + (sc->rxdesc & sc->hc->winmsk)); 1504 endp = rxdesc; 1505 rxdesc = &rxdesc[sc->rxhind]; 1506 endp = &endp[sc->rxmax]; 1507 1508 *len = 0; 1509 1510 while(rxdesc != cda) { 1511 *len += rxdesc->len; 1512 1513 if(rxdesc->stat & SCA_DESC_EOM) { 1514 *rxstat = rxdesc->stat; 1515 TRC(printf("ar%d: PKT AVAIL len %d, %x.\n", 1516 sc->unit, *len, *rxstat)); 1517 return (1); 1518 } 1519 1520 rxdesc++; 1521 if(rxdesc == endp) 1522 rxdesc = (sca_descriptor *) 1523 (sc->hc->mem_start + (sc->rxdesc & sc->hc->winmsk)); 1524 } 1525 1526 *len = 0; 1527 *rxstat = 0; 1528 return (0); 1529 } 1530 1531 1532 /* 1533 * Copy a packet from the on card memory into a provided mbuf. 1534 * Take into account that buffers wrap and that a packet may 1535 * be larger than a buffer. 1536 */ 1537 static void 1538 ar_copy_rxbuf(struct mbuf *m, 1539 struct ar_softc *sc, 1540 int len) 1541 { 1542 sca_descriptor *rxdesc; 1543 u_int rxdata; 1544 u_int rxmax; 1545 u_int off = 0; 1546 u_int tlen; 1547 1548 rxdata = sc->rxstart + (sc->rxhind * AR_BUF_SIZ); 1549 rxmax = sc->rxstart + (sc->rxmax * AR_BUF_SIZ); 1550 1551 rxdesc = (sca_descriptor *) 1552 (sc->hc->mem_start + (sc->rxdesc & sc->hc->winmsk)); 1553 rxdesc = &rxdesc[sc->rxhind]; 1554 1555 while(len) { 1556 tlen = (len < AR_BUF_SIZ) ? len : AR_BUF_SIZ; 1557 if(sc->hc->bustype == AR_BUS_ISA) 1558 ARC_SET_MEM(sc->hc, rxdata); 1559 bcopy(sc->hc->mem_start + (rxdata & sc->hc->winmsk), 1560 mtod(m, caddr_t) + off, 1561 tlen); 1562 1563 off += tlen; 1564 len -= tlen; 1565 1566 if(sc->hc->bustype == AR_BUS_ISA) 1567 ARC_SET_MEM(sc->hc, sc->rxdesc); 1568 rxdesc->len = 0; 1569 rxdesc->stat = 0xff; 1570 1571 rxdata += AR_BUF_SIZ; 1572 rxdesc++; 1573 if(rxdata == rxmax) { 1574 rxdata = sc->rxstart; 1575 rxdesc = (sca_descriptor *) 1576 (sc->hc->mem_start + (sc->rxdesc & sc->hc->winmsk)); 1577 } 1578 } 1579 } 1580 1581 /* 1582 * If single is set, just eat a packet. Otherwise eat everything up to 1583 * where cda points. Update pointers to point to the next packet. 1584 */ 1585 static void 1586 ar_eat_packet(struct ar_softc *sc, int single) 1587 { 1588 dmac_channel *dmac; 1589 sca_descriptor *rxdesc; 1590 sca_descriptor *endp; 1591 sca_descriptor *cda; 1592 int loopcnt = 0; 1593 u_char stat; 1594 1595 if(sc->hc->bustype == AR_BUS_ISA) 1596 ARC_SET_SCA(sc->hc, sc->scano); 1597 dmac = &sc->sca->dmac[DMAC_RXCH(sc->scachan)]; 1598 cda = (sca_descriptor *)(sc->hc->mem_start + 1599 ((((u_int)dmac->sarb << 16) + dmac->cda) & sc->hc->winmsk)); 1600 1601 /* 1602 * Loop until desc->stat == (0xff || EOM) 1603 * Clear the status and length in the descriptor. 1604 * Increment the descriptor. 1605 */ 1606 if(sc->hc->bustype == AR_BUS_ISA) 1607 ARC_SET_MEM(sc->hc, sc->rxdesc); 1608 rxdesc = (sca_descriptor *) 1609 (sc->hc->mem_start + (sc->rxdesc & sc->hc->winmsk)); 1610 endp = rxdesc; 1611 rxdesc = &rxdesc[sc->rxhind]; 1612 endp = &endp[sc->rxmax]; 1613 1614 while(rxdesc != cda) { 1615 loopcnt++; 1616 if(loopcnt > sc->rxmax) { 1617 printf("ar%d: eat pkt %d loop, cda %p, " 1618 "rxdesc %p, stat %x.\n", 1619 sc->unit, 1620 loopcnt, 1621 (void *)cda, 1622 (void *)rxdesc, 1623 rxdesc->stat); 1624 break; 1625 } 1626 1627 stat = rxdesc->stat; 1628 1629 rxdesc->len = 0; 1630 rxdesc->stat = 0xff; 1631 1632 rxdesc++; 1633 sc->rxhind++; 1634 if(rxdesc == endp) { 1635 rxdesc = (sca_descriptor *) 1636 (sc->hc->mem_start + (sc->rxdesc & sc->hc->winmsk)); 1637 sc->rxhind = 0; 1638 } 1639 1640 if(single && (stat == SCA_DESC_EOM)) 1641 break; 1642 } 1643 1644 /* 1645 * Update the eda to the previous descriptor. 1646 */ 1647 if(sc->hc->bustype == AR_BUS_ISA) 1648 ARC_SET_SCA(sc->hc, sc->scano); 1649 1650 rxdesc = (sca_descriptor *)sc->rxdesc; 1651 rxdesc = &rxdesc[(sc->rxhind + sc->rxmax - 2 ) % sc->rxmax]; 1652 1653 sc->sca->dmac[DMAC_RXCH(sc->scachan)].eda = 1654 (u_short)((u_int)rxdesc & 0xffff); 1655 } 1656 1657 1658 /* 1659 * While there is packets available in the rx buffer, read them out 1660 * into mbufs and ship them off. 1661 */ 1662 static void 1663 ar_get_packets(struct ar_softc *sc) 1664 { 1665 sca_descriptor *rxdesc; 1666 struct mbuf *m = NULL; 1667 int i; 1668 int len; 1669 u_char rxstat; 1670 #ifdef NETGRAPH 1671 int error; 1672 #endif 1673 1674 while(ar_packet_avail(sc, &len, &rxstat)) { 1675 TRC(printf("apa: len %d, rxstat %x\n", len, rxstat)); 1676 if(((rxstat & SCA_DESC_ERRORS) == 0) && (len < MCLBYTES)) { 1677 MGETHDR(m, M_DONTWAIT, MT_DATA); 1678 if(m == NULL) { 1679 /* eat packet if get mbuf fail!! */ 1680 ar_eat_packet(sc, 1); 1681 continue; 1682 } 1683 #ifndef NETGRAPH 1684 m->m_pkthdr.rcvif = SC2IFP(sc); 1685 #else /* NETGRAPH */ 1686 m->m_pkthdr.rcvif = NULL; 1687 sc->inbytes += len; 1688 sc->inlast = 0; 1689 #endif /* NETGRAPH */ 1690 m->m_pkthdr.len = m->m_len = len; 1691 if(len > MHLEN) { 1692 MCLGET(m, M_DONTWAIT); 1693 if((m->m_flags & M_EXT) == 0) { 1694 m_freem(m); 1695 ar_eat_packet(sc, 1); 1696 continue; 1697 } 1698 } 1699 ar_copy_rxbuf(m, sc, len); 1700 #ifndef NETGRAPH 1701 BPF_MTAP(SC2IFP(sc), m); 1702 sppp_input(SC2IFP(sc), m); 1703 SC2IFP(sc)->if_ipackets++; 1704 #else /* NETGRAPH */ 1705 NG_SEND_DATA_ONLY(error, sc->hook, m); 1706 sc->ipackets++; 1707 #endif /* NETGRAPH */ 1708 1709 /* 1710 * Update the eda to the previous descriptor. 1711 */ 1712 i = (len + AR_BUF_SIZ - 1) / AR_BUF_SIZ; 1713 sc->rxhind = (sc->rxhind + i) % sc->rxmax; 1714 1715 if(sc->hc->bustype == AR_BUS_ISA) 1716 ARC_SET_SCA(sc->hc, sc->scano); 1717 1718 rxdesc = (sca_descriptor *)sc->rxdesc; 1719 rxdesc = 1720 &rxdesc[(sc->rxhind + sc->rxmax - 2 ) % sc->rxmax]; 1721 1722 sc->sca->dmac[DMAC_RXCH(sc->scachan)].eda = 1723 (u_short)((u_int)rxdesc & 0xffff); 1724 } else { 1725 int tries = 5; 1726 1727 while((rxstat == 0xff) && --tries) 1728 ar_packet_avail(sc, &len, &rxstat); 1729 1730 /* 1731 * It look like we get an interrupt early 1732 * sometimes and then the status is not 1733 * filled in yet. 1734 */ 1735 if(tries && (tries != 5)) 1736 continue; 1737 1738 ar_eat_packet(sc, 1); 1739 1740 #ifndef NETGRAPH 1741 SC2IFP(sc)->if_ierrors++; 1742 #else /* NETGRAPH */ 1743 sc->ierrors[0]++; 1744 #endif /* NETGRAPH */ 1745 1746 if(sc->hc->bustype == AR_BUS_ISA) 1747 ARC_SET_SCA(sc->hc, sc->scano); 1748 1749 TRCL(printf("ar%d: Receive error chan %d, " 1750 "stat %x, msci st3 %x," 1751 "rxhind %d, cda %x, eda %x.\n", 1752 sc->unit, 1753 sc->scachan, 1754 rxstat, 1755 sc->sca->msci[sc->scachan].st3, 1756 sc->rxhind, 1757 sc->sca->dmac[ 1758 DMAC_RXCH(sc->scachan)].cda, 1759 sc->sca->dmac[ 1760 DMAC_RXCH(sc->scachan)].eda)); 1761 } 1762 } 1763 } 1764 1765 1766 /* 1767 * All DMA interrupts come here. 1768 * 1769 * Each channel has two interrupts. 1770 * Interrupt A for errors and Interrupt B for normal stuff like end 1771 * of transmit or receive dmas. 1772 */ 1773 static void 1774 ar_dmac_intr(struct ar_hardc *hc, int scano, u_char isr1) 1775 { 1776 u_char dsr; 1777 u_char dotxstart = isr1; 1778 int mch; 1779 struct ar_softc *sc; 1780 sca_regs *sca; 1781 dmac_channel *dmac; 1782 1783 sca = hc->sca[scano]; 1784 mch = 0; 1785 /* 1786 * Shortcut if there is no interrupts for dma channel 0 or 1 1787 */ 1788 if((isr1 & 0x0F) == 0) { 1789 mch = 1; 1790 isr1 >>= 4; 1791 } 1792 1793 do { 1794 sc = &hc->sc[mch + (NCHAN * scano)]; 1795 1796 /* 1797 * Transmit channel 1798 */ 1799 if(isr1 & 0x0C) { 1800 dmac = &sca->dmac[DMAC_TXCH(mch)]; 1801 1802 if(hc->bustype == AR_BUS_ISA) 1803 ARC_SET_SCA(hc, scano); 1804 1805 dsr = dmac->dsr; 1806 dmac->dsr = dsr; 1807 1808 /* Counter overflow */ 1809 if(dsr & SCA_DSR_COF) { 1810 printf("ar%d: TX DMA Counter overflow, " 1811 "txpacket no %lu.\n", 1812 sc->unit, 1813 #ifndef NETGRAPH 1814 SC2IFP(sc)->if_opackets); 1815 SC2IFP(sc)->if_oerrors++; 1816 #else /* NETGRAPH */ 1817 sc->opackets); 1818 sc->oerrors++; 1819 #endif /* NETGRAPH */ 1820 } 1821 1822 /* Buffer overflow */ 1823 if(dsr & SCA_DSR_BOF) { 1824 printf("ar%d: TX DMA Buffer overflow, " 1825 "txpacket no %lu, dsr %02x, " 1826 "cda %04x, eda %04x.\n", 1827 sc->unit, 1828 #ifndef NETGRAPH 1829 SC2IFP(sc)->if_opackets, 1830 #else /* NETGRAPH */ 1831 sc->opackets, 1832 #endif /* NETGRAPH */ 1833 dsr, 1834 dmac->cda, 1835 dmac->eda); 1836 #ifndef NETGRAPH 1837 SC2IFP(sc)->if_oerrors++; 1838 #else /* NETGRAPH */ 1839 sc->oerrors++; 1840 #endif /* NETGRAPH */ 1841 } 1842 1843 /* End of Transfer */ 1844 if(dsr & SCA_DSR_EOT) { 1845 /* 1846 * This should be the most common case. 1847 * 1848 * Clear the IFF_DRV_OACTIVE flag. 1849 * 1850 * Call arstart to start a new transmit if 1851 * there is data to transmit. 1852 */ 1853 sc->xmit_busy = 0; 1854 #ifndef NETGRAPH 1855 SC2IFP(sc)->if_drv_flags &= ~IFF_DRV_OACTIVE; 1856 SC2IFP(sc)->if_timer = 0; 1857 #else /* NETGRAPH */ 1858 /* XXX SC2IFP(sc)->if_drv_flags &= ~IFF_DRV_OACTIVE; */ 1859 sc->out_dog = 0; /* XXX */ 1860 #endif /* NETGRAPH */ 1861 1862 if(sc->txb_inuse && --sc->txb_inuse) 1863 ar_xmit(sc); 1864 } 1865 } 1866 1867 /* 1868 * Receive channel 1869 */ 1870 if(isr1 & 0x03) { 1871 dmac = &sca->dmac[DMAC_RXCH(mch)]; 1872 1873 if(hc->bustype == AR_BUS_ISA) 1874 ARC_SET_SCA(hc, scano); 1875 1876 dsr = dmac->dsr; 1877 dmac->dsr = dsr; 1878 1879 TRC(printf("AR: RX DSR %x\n", dsr)); 1880 1881 /* End of frame */ 1882 if(dsr & SCA_DSR_EOM) { 1883 TRC(int tt = SC2IFP(sc)->if_ipackets;) 1884 TRC(int ind = sc->rxhind;) 1885 1886 ar_get_packets(sc); 1887 #ifndef NETGRAPH 1888 #define IPACKETS SC2IFP(sc)->if_ipackets 1889 #else /* NETGRAPH */ 1890 #define IPACKETS sc->ipackets 1891 #endif /* NETGRAPH */ 1892 TRC(if(tt == IPACKETS) { 1893 sca_descriptor *rxdesc; 1894 int i; 1895 1896 if(hc->bustype == AR_BUS_ISA) 1897 ARC_SET_SCA(hc, scano); 1898 printf("AR: RXINTR isr1 %x, dsr %x, " 1899 "no data %d pkts, orxhind %d.\n", 1900 dotxstart, 1901 dsr, 1902 tt, 1903 ind); 1904 printf("AR: rxdesc %x, rxstart %x, " 1905 "rxend %x, rxhind %d, " 1906 "rxmax %d.\n", 1907 sc->rxdesc, 1908 sc->rxstart, 1909 sc->rxend, 1910 sc->rxhind, 1911 sc->rxmax); 1912 printf("AR: cda %x, eda %x.\n", 1913 dmac->cda, 1914 dmac->eda); 1915 1916 if(sc->hc->bustype == AR_BUS_ISA) 1917 ARC_SET_MEM(sc->hc, 1918 sc->rxdesc); 1919 rxdesc = (sca_descriptor *) 1920 (sc->hc->mem_start + 1921 (sc->rxdesc & sc->hc->winmsk)); 1922 rxdesc = &rxdesc[sc->rxhind]; 1923 for(i=0;i<3;i++,rxdesc++) 1924 printf("AR: rxdesc->stat %x, " 1925 "len %d.\n", 1926 rxdesc->stat, 1927 rxdesc->len); 1928 }) 1929 } 1930 1931 /* Counter overflow */ 1932 if(dsr & SCA_DSR_COF) { 1933 printf("ar%d: RX DMA Counter overflow, " 1934 "rxpkts %lu.\n", 1935 sc->unit, 1936 #ifndef NETGRAPH 1937 SC2IFP(sc)->if_ipackets); 1938 SC2IFP(sc)->if_ierrors++; 1939 #else /* NETGRAPH */ 1940 sc->ipackets); 1941 sc->ierrors[1]++; 1942 #endif /* NETGRAPH */ 1943 } 1944 1945 /* Buffer overflow */ 1946 if(dsr & SCA_DSR_BOF) { 1947 if(hc->bustype == AR_BUS_ISA) 1948 ARC_SET_SCA(hc, scano); 1949 printf("ar%d: RX DMA Buffer overflow, " 1950 "rxpkts %lu, rxind %d, " 1951 "cda %x, eda %x, dsr %x.\n", 1952 sc->unit, 1953 #ifndef NETGRAPH 1954 SC2IFP(sc)->if_ipackets, 1955 #else /* NETGRAPH */ 1956 sc->ipackets, 1957 #endif /* NETGRAPH */ 1958 sc->rxhind, 1959 dmac->cda, 1960 dmac->eda, 1961 dsr); 1962 /* 1963 * Make sure we eat as many as possible. 1964 * Then get the system running again. 1965 */ 1966 ar_eat_packet(sc, 0); 1967 #ifndef NETGRAPH 1968 SC2IFP(sc)->if_ierrors++; 1969 #else /* NETGRAPH */ 1970 sc->ierrors[2]++; 1971 #endif /* NETGRAPH */ 1972 if(hc->bustype == AR_BUS_ISA) 1973 ARC_SET_SCA(hc, scano); 1974 sca->msci[mch].cmd = SCA_CMD_RXMSGREJ; 1975 dmac->dsr = SCA_DSR_DE; 1976 1977 TRC(printf("ar%d: RX DMA Buffer overflow, " 1978 "rxpkts %lu, rxind %d, " 1979 "cda %x, eda %x, dsr %x. After\n", 1980 sc->unit, 1981 SC2IFP(sc)->if_ipackets, 1982 sc->rxhind, 1983 dmac->cda, 1984 dmac->eda, 1985 dmac->dsr);) 1986 } 1987 1988 /* End of Transfer */ 1989 if(dsr & SCA_DSR_EOT) { 1990 /* 1991 * If this happen, it means that we are 1992 * receiving faster than what the processor 1993 * can handle. 1994 * 1995 * XXX We should enable the dma again. 1996 */ 1997 printf("ar%d: RX End of transfer, rxpkts %lu.\n", 1998 sc->unit, 1999 #ifndef NETGRAPH 2000 SC2IFP(sc)->if_ipackets); 2001 SC2IFP(sc)->if_ierrors++; 2002 #else /* NETGRAPH */ 2003 sc->ipackets); 2004 sc->ierrors[3]++; 2005 #endif /* NETGRAPH */ 2006 } 2007 } 2008 2009 isr1 >>= 4; 2010 2011 mch++; 2012 }while((mch<NCHAN) && isr1); 2013 2014 /* 2015 * Now that we have done all the urgent things, see if we 2016 * can fill the transmit buffers. 2017 */ 2018 for(mch = 0; mch < NCHAN; mch++) { 2019 if(dotxstart & 0x0C) { 2020 sc = &hc->sc[mch + (NCHAN * scano)]; 2021 #ifndef NETGRAPH 2022 arstart(SC2IFP(sc)); 2023 #else /* NETGRAPH */ 2024 arstart(sc); 2025 #endif /* NETGRAPH */ 2026 } 2027 dotxstart >>= 4; 2028 } 2029 } 2030 2031 static void 2032 ar_msci_intr(struct ar_hardc *hc, int scano, u_char isr0) 2033 { 2034 printf("arc%d: ARINTR: MSCI\n", hc->cunit); 2035 } 2036 2037 static void 2038 ar_timer_intr(struct ar_hardc *hc, int scano, u_char isr2) 2039 { 2040 printf("arc%d: ARINTR: TIMER\n", hc->cunit); 2041 } 2042 2043 2044 #ifdef NETGRAPH 2045 /***************************************** 2046 * Device timeout/watchdog routine. 2047 * called once per second. 2048 * checks to see that if activity was expected, that it hapenned. 2049 * At present we only look to see if expected output was completed. 2050 */ 2051 static void 2052 ngar_watchdog_frame(void * arg) 2053 { 2054 struct ar_softc * sc = arg; 2055 int s; 2056 int speed; 2057 2058 if(sc->running == 0) 2059 return; /* if we are not running let timeouts die */ 2060 /* 2061 * calculate the apparent throughputs 2062 * XXX a real hack 2063 */ 2064 s = splimp(); 2065 speed = sc->inbytes - sc->lastinbytes; 2066 sc->lastinbytes = sc->inbytes; 2067 if ( sc->inrate < speed ) 2068 sc->inrate = speed; 2069 speed = sc->outbytes - sc->lastoutbytes; 2070 sc->lastoutbytes = sc->outbytes; 2071 if ( sc->outrate < speed ) 2072 sc->outrate = speed; 2073 sc->inlast++; 2074 splx(s); 2075 2076 if ((sc->inlast > QUITE_A_WHILE) 2077 && (sc->out_deficit > LOTS_OF_PACKETS)) { 2078 log(LOG_ERR, "ar%d: No response from remote end\n", sc->unit); 2079 s = splimp(); 2080 ar_down(sc); 2081 ar_up(sc); 2082 sc->inlast = sc->out_deficit = 0; 2083 splx(s); 2084 } else if ( sc->xmit_busy ) { /* no TX -> no TX timeouts */ 2085 if (sc->out_dog == 0) { 2086 log(LOG_ERR, "ar%d: Transmit failure.. no clock?\n", 2087 sc->unit); 2088 s = splimp(); 2089 arwatchdog(sc); 2090 #if 0 2091 ar_down(sc); 2092 ar_up(sc); 2093 #endif 2094 splx(s); 2095 sc->inlast = sc->out_deficit = 0; 2096 } else { 2097 sc->out_dog--; 2098 } 2099 } 2100 sc->handle = timeout(ngar_watchdog_frame, sc, hz); 2101 } 2102 2103 /*********************************************************************** 2104 * This section contains the methods for the Netgraph interface 2105 ***********************************************************************/ 2106 /* 2107 * It is not possible or allowable to create a node of this type. 2108 * If the hardware exists, it will already have created it. 2109 */ 2110 static int 2111 ngar_constructor(node_p node) 2112 { 2113 return (EINVAL); 2114 } 2115 2116 /* 2117 * give our ok for a hook to be added... 2118 * If we are not running this should kick the device into life. 2119 * The hook's private info points to our stash of info about that 2120 * channel. 2121 */ 2122 static int 2123 ngar_newhook(node_p node, hook_p hook, const char *name) 2124 { 2125 struct ar_softc * sc = NG_NODE_PRIVATE(node); 2126 2127 /* 2128 * check if it's our friend the debug hook 2129 */ 2130 if (strcmp(name, NG_AR_HOOK_DEBUG) == 0) { 2131 NG_HOOK_SET_PRIVATE(hook, NULL); /* paranoid */ 2132 sc->debug_hook = hook; 2133 return (0); 2134 } 2135 2136 /* 2137 * Check for raw mode hook. 2138 */ 2139 if (strcmp(name, NG_AR_HOOK_RAW) != 0) { 2140 return (EINVAL); 2141 } 2142 NG_HOOK_SET_PRIVATE(hook, sc); 2143 sc->hook = hook; 2144 sc->datahooks++; 2145 ar_up(sc); 2146 return (0); 2147 } 2148 2149 /* 2150 * incoming messages. 2151 * Just respond to the generic TEXT_STATUS message 2152 */ 2153 static int 2154 ngar_rcvmsg(node_p node, item_p item, hook_p lasthook) 2155 { 2156 struct ar_softc * sc; 2157 struct ng_mesg *resp = NULL; 2158 int error = 0; 2159 struct ng_mesg *msg; 2160 2161 NGI_GET_MSG(item, msg); 2162 sc = NG_NODE_PRIVATE(node); 2163 switch (msg->header.typecookie) { 2164 case NG_AR_COOKIE: 2165 error = EINVAL; 2166 break; 2167 case NGM_GENERIC_COOKIE: 2168 switch(msg->header.cmd) { 2169 case NGM_TEXT_STATUS: { 2170 char *arg; 2171 int pos = 0; 2172 2173 int resplen = sizeof(struct ng_mesg) + 512; 2174 NG_MKRESPONSE(resp, msg, resplen, M_NOWAIT); 2175 if (resp == NULL) { 2176 error = ENOMEM; 2177 break; 2178 } 2179 arg = (resp)->data; 2180 pos = sprintf(arg, "%ld bytes in, %ld bytes out\n" 2181 "highest rate seen: %ld B/S in, %ld B/S out\n", 2182 sc->inbytes, sc->outbytes, 2183 sc->inrate, sc->outrate); 2184 pos += sprintf(arg + pos, 2185 "%ld output errors\n", 2186 sc->oerrors); 2187 pos += sprintf(arg + pos, 2188 "ierrors = %ld, %ld, %ld, %ld\n", 2189 sc->ierrors[0], 2190 sc->ierrors[1], 2191 sc->ierrors[2], 2192 sc->ierrors[3]); 2193 2194 resp->header.arglen = pos + 1; 2195 break; 2196 } 2197 default: 2198 error = EINVAL; 2199 break; 2200 } 2201 break; 2202 default: 2203 error = EINVAL; 2204 break; 2205 } 2206 /* Take care of synchronous response, if any */ 2207 NG_RESPOND_MSG(error, node, item, resp); 2208 NG_FREE_MSG(msg); 2209 return (error); 2210 } 2211 2212 /* 2213 * get data from another node and transmit it to the correct channel 2214 */ 2215 static int 2216 ngar_rcvdata(hook_p hook, item_p item) 2217 { 2218 int s; 2219 int error = 0; 2220 struct ar_softc * sc = NG_NODE_PRIVATE(NG_HOOK_NODE(hook)); 2221 struct ifqueue *xmitq_p; 2222 struct mbuf *m; 2223 struct ng_tag_prio *ptag; 2224 2225 NGI_GET_M(item, m); 2226 NG_FREE_ITEM(item); 2227 /* 2228 * data doesn't come in from just anywhere (e.g control hook) 2229 */ 2230 if ( NG_HOOK_PRIVATE(hook) == NULL) { 2231 error = ENETDOWN; 2232 goto bad; 2233 } 2234 2235 /* 2236 * Now queue the data for when it can be sent 2237 */ 2238 if ((ptag = (struct ng_tag_prio *)m_tag_locate(m, NGM_GENERIC_COOKIE, 2239 NG_TAG_PRIO, NULL)) != NULL && (ptag->priority > NG_PRIO_CUTOFF) ) 2240 xmitq_p = (&sc->xmitq_hipri); 2241 else 2242 xmitq_p = (&sc->xmitq); 2243 2244 s = splimp(); 2245 IF_LOCK(xmitq_p); 2246 if (_IF_QFULL(xmitq_p)) { 2247 _IF_DROP(xmitq_p); 2248 IF_UNLOCK(xmitq_p); 2249 splx(s); 2250 error = ENOBUFS; 2251 goto bad; 2252 } 2253 _IF_ENQUEUE(xmitq_p, m); 2254 IF_UNLOCK(xmitq_p); 2255 arstart(sc); 2256 splx(s); 2257 return (0); 2258 2259 bad: 2260 /* 2261 * It was an error case. 2262 * check if we need to free the mbuf, and then return the error 2263 */ 2264 NG_FREE_M(m); 2265 return (error); 2266 } 2267 2268 /* 2269 * do local shutdown processing.. 2270 * this node will refuse to go away, unless the hardware says to.. 2271 * don't unref the node, or remove our name. just clear our links up. 2272 */ 2273 static int 2274 ngar_shutdown(node_p node) 2275 { 2276 struct ar_softc * sc = NG_NODE_PRIVATE(node); 2277 2278 ar_down(sc); 2279 NG_NODE_UNREF(node); 2280 /* XXX need to drain the output queues! */ 2281 2282 /* The node is dead, long live the node! */ 2283 /* stolen from the attach routine */ 2284 if (ng_make_node_common(&typestruct, &sc->node) != 0) 2285 return (0); 2286 sprintf(sc->nodename, "%s%d", NG_AR_NODE_TYPE, sc->unit); 2287 if (ng_name_node(sc->node, sc->nodename)) { 2288 sc->node = NULL; 2289 printf("node naming failed\n"); 2290 NG_NODE_UNREF(sc->node); /* node dissappears */ 2291 return (0); 2292 } 2293 NG_NODE_SET_PRIVATE(sc->node, sc); 2294 sc->running = 0; 2295 return (0); 2296 } 2297 2298 /* already linked */ 2299 static int 2300 ngar_connect(hook_p hook) 2301 { 2302 /* probably not at splnet, force outward queueing */ 2303 NG_HOOK_FORCE_QUEUE(NG_HOOK_PEER(hook)); 2304 /* be really amiable and just say "YUP that's OK by me! " */ 2305 return (0); 2306 } 2307 2308 /* 2309 * notify on hook disconnection (destruction) 2310 * 2311 * Invalidate the private data associated with this dlci. 2312 * For this type, removal of the last link resets tries to destroy the node. 2313 * As the device still exists, the shutdown method will not actually 2314 * destroy the node, but reset the device and leave it 'fresh' :) 2315 * 2316 * The node removal code will remove all references except that owned by the 2317 * driver. 2318 */ 2319 static int 2320 ngar_disconnect(hook_p hook) 2321 { 2322 struct ar_softc * sc = NG_NODE_PRIVATE(NG_HOOK_NODE(hook)); 2323 int s; 2324 /* 2325 * If it's the data hook, then free resources etc. 2326 */ 2327 if (NG_HOOK_PRIVATE(hook)) { 2328 s = splimp(); 2329 sc->datahooks--; 2330 if (sc->datahooks == 0) 2331 ar_down(sc); 2332 splx(s); 2333 } else { 2334 sc->debug_hook = NULL; 2335 } 2336 return (0); 2337 } 2338 #endif /* NETGRAPH */ 2339 2340 /* 2341 ********************************* END ************************************ 2342 */
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