The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/dev/ar/if_ar.c

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    1 /*-
    2  * Copyright (c) 1995 - 2001 John Hay.  All rights reserved.
    3  *
    4  * Redistribution and use in source and binary forms, with or without
    5  * modification, are permitted provided that the following conditions
    6  * are met:
    7  * 1. Redistributions of source code must retain the above copyright
    8  *    notice, this list of conditions and the following disclaimer.
    9  * 2. Redistributions in binary form must reproduce the above copyright
   10  *    notice, this list of conditions and the following disclaimer in the
   11  *    documentation and/or other materials provided with the distribution.
   12  * 3. Neither the name of the author nor the names of any co-contributors
   13  *    may be used to endorse or promote products derived from this software
   14  *    without specific prior written permission.
   15  *
   16  * THIS SOFTWARE IS PROVIDED BY John Hay ``AS IS'' AND
   17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   19  * ARE DISCLAIMED.  IN NO EVENT SHALL John Hay BE LIABLE
   20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   26  * SUCH DAMAGE.
   27  */
   28 
   29 #include <sys/cdefs.h>
   30 __FBSDID("$FreeBSD$");
   31 
   32 /*
   33  * Programming assumptions and other issues.
   34  *
   35  * The descriptors of a DMA channel will fit in a 16K memory window.
   36  *
   37  * The buffers of a transmit DMA channel will fit in a 16K memory window.
   38  *
   39  * Only the ISA bus cards with X.21 and V.35 is tested.
   40  *
   41  * When interface is going up, handshaking is set and it is only cleared
   42  * when the interface is down'ed.
   43  *
   44  * There should be a way to set/reset Raw HDLC/PPP, Loopback, DCE/DTE,
   45  * internal/external clock, etc.....
   46  */
   47 
   48 #include "opt_netgraph.h"
   49 
   50 #include <sys/param.h>
   51 #include <sys/systm.h>
   52 #include <sys/kernel.h>
   53 #include <sys/malloc.h>
   54 #include <sys/mbuf.h>
   55 #include <sys/socket.h>
   56 #include <sys/sockio.h>
   57 #include <sys/module.h>
   58 #include <sys/bus.h>
   59 #include <machine/bus.h>
   60 #include <machine/resource.h>
   61 #include <sys/rman.h>
   62 
   63 #include <net/if.h>
   64 #ifdef NETGRAPH
   65 #include <netgraph/ng_message.h>
   66 #include <netgraph/netgraph.h>
   67 #include <sys/syslog.h>
   68 #include <dev/ar/if_ar.h>
   69 #else /* NETGRAPH */
   70 #include <net/if_sppp.h>
   71 #include <net/if_types.h>
   72 #include <net/bpf.h>
   73 #endif /* NETGRAPH */
   74 
   75 #include <machine/md_var.h>
   76 
   77 #include <dev/ic/hd64570.h>
   78 #include <dev/ar/if_arregs.h>
   79 
   80 #ifdef TRACE
   81 #define TRC(x)               x
   82 #else
   83 #define TRC(x)
   84 #endif
   85 
   86 #define TRCL(x)              x
   87 
   88 #define PPP_HEADER_LEN       4
   89 
   90 devclass_t ar_devclass;
   91 
   92 struct ar_softc {
   93 #ifndef NETGRAPH
   94         struct ifnet *ifp;
   95 #endif /* NETGRAPH */
   96         int unit;            /* With regards to all ar devices */
   97         int subunit;         /* With regards to this card */
   98         struct ar_hardc *hc;
   99 
  100         struct buf_block {
  101                 u_int txdesc;        /* On card address */
  102                 u_int txstart;       /* On card address */
  103                 u_int txend;         /* On card address */
  104                 u_int txtail;        /* Index of first unused buffer */
  105                 u_int txmax;         /* number of usable buffers/descriptors */
  106                 u_int txeda;         /* Error descriptor addresses */
  107         }block[AR_TX_BLOCKS];
  108 
  109         char  xmit_busy;     /* Transmitter is busy */
  110         char  txb_inuse;     /* Number of tx blocks currently in use */
  111         u_char txb_new;      /* Index to where new buffer will be added */
  112         u_char txb_next_tx;  /* Index to next block ready to tx */
  113 
  114         u_int rxdesc;        /* On card address */
  115         u_int rxstart;       /* On card address */
  116         u_int rxend;         /* On card address */
  117         u_int rxhind;        /* Index to the head of the rx buffers. */
  118         u_int rxmax;         /* number of usable buffers/descriptors */
  119 
  120         int scano;
  121         int scachan;
  122         sca_regs *sca;
  123 #ifdef NETGRAPH
  124         int     running;        /* something is attached so we are running */
  125         int     dcd;            /* do we have dcd? */
  126         /* ---netgraph bits --- */
  127         char            nodename[NG_NODESIZ]; /* store our node name */
  128         int             datahooks;      /* number of data hooks attached */
  129         node_p          node;           /* netgraph node */
  130         hook_p          hook;           /* data hook */
  131         hook_p          debug_hook;
  132         struct ifqueue  xmitq_hipri;    /* hi-priority transmit queue */
  133         struct ifqueue  xmitq;          /* transmit queue */
  134         int             flags;          /* state */
  135 #define SCF_RUNNING     0x01            /* board is active */
  136 #define SCF_OACTIVE     0x02            /* output is active */
  137         int             out_dog;        /* watchdog cycles output count-down */
  138         struct callout_handle handle;   /* timeout(9) handle */
  139         u_long          inbytes, outbytes;      /* stats */
  140         u_long          lastinbytes, lastoutbytes; /* a second ago */
  141         u_long          inrate, outrate;        /* highest rate seen */
  142         u_long          inlast;         /* last input N secs ago */
  143         u_long          out_deficit;    /* output since last input */
  144         u_long          oerrors, ierrors[6];
  145         u_long          opackets, ipackets;
  146 #endif /* NETGRAPH */
  147 };
  148 #define SC2IFP(sc)      (sc)->ifp
  149 
  150 static int      next_ar_unit = 0;
  151 
  152 #ifdef NETGRAPH
  153 #define DOG_HOLDOFF     6       /* dog holds off for 6 secs */
  154 #define QUITE_A_WHILE   300     /* 5 MINUTES */
  155 #define LOTS_OF_PACKETS 100
  156 #endif /* NETGRAPH */
  157 
  158 /*
  159  * This translate from irq numbers to
  160  * the value that the arnet card needs
  161  * in the lower part of the AR_INT_SEL
  162  * register.
  163  */
  164 static int irqtable[16] = {
  165         0,      /*  0 */
  166         0,      /*  1 */
  167         0,      /*  2 */
  168         1,      /*  3 */
  169         0,      /*  4 */
  170         2,      /*  5 */
  171         0,      /*  6 */
  172         3,      /*  7 */
  173         0,      /*  8 */
  174         0,      /*  9 */
  175         4,      /* 10 */
  176         5,      /* 11 */
  177         6,      /* 12 */
  178         0,      /* 13 */
  179         0,      /* 14 */
  180         7       /* 15 */
  181 };
  182 
  183 #ifndef NETGRAPH
  184 MODULE_DEPEND(if_ar, sppp, 1, 1, 1);
  185 #endif
  186 
  187 static void arintr(void *arg);
  188 static void ar_xmit(struct ar_softc *sc);
  189 #ifndef NETGRAPH
  190 static void arstart(struct ifnet *ifp);
  191 static int arioctl(struct ifnet *ifp, u_long cmd, caddr_t data);
  192 static void arwatchdog(struct ifnet *ifp);
  193 #else   /* NETGRAPH */
  194 static void arstart(struct ar_softc *sc);
  195 static void arwatchdog(struct ar_softc *sc);
  196 #endif  /* NETGRAPH */
  197 static int ar_packet_avail(struct ar_softc *sc, int *len, u_char *rxstat);
  198 static void ar_copy_rxbuf(struct mbuf *m, struct ar_softc *sc, int len);
  199 static void ar_eat_packet(struct ar_softc *sc, int single);
  200 static void ar_get_packets(struct ar_softc *sc);
  201 
  202 static int ar_read_pim_iface(volatile struct ar_hardc *hc, int channel);
  203 static void ar_up(struct ar_softc *sc);
  204 static void ar_down(struct ar_softc *sc);
  205 static void arc_init(struct ar_hardc *hc);
  206 static void ar_init_sca(struct ar_hardc *hc, int scano);
  207 static void ar_init_msci(struct ar_softc *sc);
  208 static void ar_init_rx_dmac(struct ar_softc *sc);
  209 static void ar_init_tx_dmac(struct ar_softc *sc);
  210 static void ar_dmac_intr(struct ar_hardc *hc, int scano, u_char isr);
  211 static void ar_msci_intr(struct ar_hardc *hc, int scano, u_char isr);
  212 static void ar_timer_intr(struct ar_hardc *hc, int scano, u_char isr);
  213 
  214 #ifdef  NETGRAPH
  215 static  void    ngar_watchdog_frame(void * arg);
  216 
  217 static ng_constructor_t ngar_constructor;
  218 static ng_rcvmsg_t      ngar_rcvmsg;
  219 static ng_shutdown_t    ngar_shutdown;
  220 static ng_newhook_t     ngar_newhook;
  221 /*static ng_findhook_t  ngar_findhook; */
  222 static ng_connect_t     ngar_connect;
  223 static ng_rcvdata_t     ngar_rcvdata;
  224 static ng_disconnect_t  ngar_disconnect;
  225         
  226 static struct ng_type typestruct = {
  227         .version =      NG_ABI_VERSION,
  228         .name =         NG_AR_NODE_TYPE,
  229         .constructor =  ngar_constructor,
  230         .rcvmsg =       ngar_rcvmsg,
  231         .shutdown =     ngar_shutdown,
  232         .newhook =      ngar_newhook,
  233         .connect =      ngar_connect,
  234         .rcvdata =      ngar_rcvdata,
  235         .disconnect =   ngar_disconnect,
  236 };
  237 NETGRAPH_INIT_ORDERED(sync_ar, &typestruct, SI_SUB_DRIVERS, SI_ORDER_FIRST);
  238 #endif /* NETGRAPH */
  239 
  240 int
  241 ar_attach(device_t device)
  242 {
  243         struct ar_hardc *hc;
  244         struct ar_softc *sc;
  245 #ifndef NETGRAPH
  246         struct ifnet *ifp;
  247         char *iface;
  248 #endif  /* NETGRAPH */
  249         int unit;
  250 
  251         hc = (struct ar_hardc *)device_get_softc(device);
  252 
  253         printf("arc%d: %uK RAM, %u ports, rev %u.\n",
  254                 hc->cunit,
  255                 hc->memsize/1024,
  256                 hc->numports,
  257                 hc->revision);
  258         
  259         arc_init(hc);
  260 
  261         if(bus_setup_intr(device, hc->res_irq,
  262             INTR_TYPE_NET, NULL, arintr, hc, &hc->intr_cookie) != 0)
  263                 return (1);
  264 
  265         sc = hc->sc;
  266 
  267         for(unit=0;unit<hc->numports;unit+=NCHAN)
  268                 ar_init_sca(hc, unit / NCHAN);
  269 
  270         /*
  271          * Now configure each port on the card.
  272          */
  273         for(unit=0;unit<hc->numports;sc++,unit++) {
  274                 sc->hc = hc;
  275                 sc->subunit = unit;
  276                 sc->unit = next_ar_unit;
  277                 next_ar_unit++;
  278                 sc->scano = unit / NCHAN;
  279                 sc->scachan = unit%NCHAN;
  280 
  281                 ar_init_rx_dmac(sc);
  282                 ar_init_tx_dmac(sc);
  283                 ar_init_msci(sc);
  284 
  285 #ifndef NETGRAPH
  286                 ifp = SC2IFP(sc) = if_alloc(IFT_PPP);
  287                 if (ifp == NULL) {
  288                         if (bus_teardown_intr(device,
  289                             hc->res_irq, hc->intr_cookie) != 0) {
  290                                 printf("intr teardown failed.. continuing\n");
  291                         }
  292                         return (1);
  293                 }
  294 
  295                 ifp->if_softc = sc;
  296                 if_initname(ifp, device_get_name(device),
  297                     device_get_unit(device));
  298                 ifp->if_mtu = PP_MTU;
  299                 ifp->if_flags = IFF_POINTOPOINT | IFF_MULTICAST |
  300                     IFF_NEEDSGIANT;
  301                 ifp->if_ioctl = arioctl;
  302                 ifp->if_start = arstart;
  303                 ifp->if_watchdog = arwatchdog;
  304 
  305                 IFP2SP(sc->ifp)->pp_flags = PP_KEEPALIVE;
  306 
  307                 switch(hc->interface[unit]) {
  308                 default: iface = "UNKNOWN"; break;
  309                 case AR_IFACE_EIA_232: iface = "EIA-232"; break;
  310                 case AR_IFACE_V_35: iface = "EIA-232 or V.35"; break;
  311                 case AR_IFACE_EIA_530: iface = "EIA-530"; break;
  312                 case AR_IFACE_X_21: iface = "X.21"; break;
  313                 case AR_IFACE_COMBO: iface = "COMBO X.21 / EIA-530"; break;
  314                 }
  315 
  316                 printf("ar%d: Adapter %d, port %d, interface %s.\n",
  317                         sc->unit,
  318                         hc->cunit,
  319                         sc->subunit,
  320                         iface);
  321 
  322                 sppp_attach(SC2IFP(sc));
  323                 if_attach(ifp);
  324 
  325                 bpfattach(ifp, DLT_PPP, PPP_HEADER_LEN);
  326 #else   /* NETGRAPH */
  327                 if (ng_make_node_common(&typestruct, &sc->node) != 0)
  328                         return (1);
  329                 sprintf(sc->nodename, "%s%d", NG_AR_NODE_TYPE, sc->unit);
  330                 if (ng_name_node(sc->node, sc->nodename)) {
  331                         NG_NODE_UNREF(sc->node); /* drop it again */
  332                         return (1);
  333                 }
  334                 NG_NODE_SET_PRIVATE(sc->node, sc);
  335                 callout_handle_init(&sc->handle);
  336                 sc->xmitq.ifq_maxlen = IFQ_MAXLEN;
  337                 sc->xmitq_hipri.ifq_maxlen = IFQ_MAXLEN;
  338                 mtx_init(&sc->xmitq.ifq_mtx, "ar_xmitq", NULL, MTX_DEF);
  339                 mtx_init(&sc->xmitq_hipri.ifq_mtx, "ar_xmitq_hipri", NULL,
  340                     MTX_DEF);
  341                 sc->running = 0;
  342 #endif  /* NETGRAPH */
  343         }
  344 
  345         if(hc->bustype == AR_BUS_ISA)
  346                 ARC_SET_OFF(hc);
  347 
  348         return (0);
  349 }
  350 
  351 int
  352 ar_detach(device_t device)
  353 {
  354         struct ar_hardc *hc = device_get_softc(device);
  355 
  356         if (hc->intr_cookie != NULL) {
  357                 if (bus_teardown_intr(device,
  358                         hc->res_irq, hc->intr_cookie) != 0) {
  359                                 printf("intr teardown failed.. continuing\n");
  360                 }
  361                 hc->intr_cookie = NULL;
  362         }
  363 
  364         /*
  365          * deallocate any system resources we may have
  366          * allocated on behalf of this driver.
  367          */
  368         FREE(hc->sc, M_DEVBUF);
  369         hc->sc = NULL;
  370         hc->mem_start = NULL;
  371         return (ar_deallocate_resources(device));
  372 }
  373 
  374 int
  375 ar_allocate_ioport(device_t device, int rid, u_long size)
  376 {
  377         struct ar_hardc *hc = device_get_softc(device);
  378 
  379         hc->rid_ioport = rid;
  380         hc->res_ioport = bus_alloc_resource(device, SYS_RES_IOPORT,
  381                         &hc->rid_ioport, 0ul, ~0ul, size, RF_ACTIVE);
  382         if (hc->res_ioport == NULL) {
  383                 goto errexit;
  384         }
  385         hc->bt = rman_get_bustag(hc->res_ioport);
  386         hc->bh = rman_get_bushandle(hc->res_ioport);
  387 
  388         return (0);
  389 
  390 errexit:
  391         ar_deallocate_resources(device);
  392         return (ENXIO);
  393 }
  394 
  395 int
  396 ar_allocate_irq(device_t device, int rid, u_long size)
  397 {
  398         struct ar_hardc *hc = device_get_softc(device);
  399 
  400         hc->rid_irq = rid;
  401         hc->res_irq = bus_alloc_resource_any(device, SYS_RES_IRQ,
  402                         &hc->rid_irq, RF_SHAREABLE|RF_ACTIVE);
  403         if (hc->res_irq == NULL) {
  404                 goto errexit;
  405         }
  406         return (0);
  407 
  408 errexit:
  409         ar_deallocate_resources(device);
  410         return (ENXIO);
  411 }
  412 
  413 int
  414 ar_allocate_memory(device_t device, int rid, u_long size)
  415 {
  416         struct ar_hardc *hc = device_get_softc(device);
  417 
  418         hc->rid_memory = rid;
  419         hc->res_memory = bus_alloc_resource(device, SYS_RES_MEMORY,
  420                         &hc->rid_memory, 0ul, ~0ul, size, RF_ACTIVE);
  421         if (hc->res_memory == NULL) {
  422                 goto errexit;
  423         }
  424         return (0);
  425 
  426 errexit:
  427         ar_deallocate_resources(device);
  428         return (ENXIO);
  429 }
  430 
  431 int
  432 ar_allocate_plx_memory(device_t device, int rid, u_long size)
  433 {
  434         struct ar_hardc *hc = device_get_softc(device);
  435 
  436         hc->rid_plx_memory = rid;
  437         hc->res_plx_memory = bus_alloc_resource(device, SYS_RES_MEMORY,
  438                         &hc->rid_plx_memory, 0ul, ~0ul, size, RF_ACTIVE);
  439         if (hc->res_plx_memory == NULL) {
  440                 goto errexit;
  441         }
  442         return (0);
  443 
  444 errexit:
  445         ar_deallocate_resources(device);
  446         return (ENXIO);
  447 }
  448 
  449 int
  450 ar_deallocate_resources(device_t device)
  451 {
  452         struct ar_hardc *hc = device_get_softc(device);
  453 
  454         if (hc->res_irq != 0) {
  455                 bus_release_resource(device, SYS_RES_IRQ,
  456                         hc->rid_irq, hc->res_irq);
  457                 hc->res_irq = 0;
  458         }
  459         if (hc->res_ioport != 0) {
  460                 bus_release_resource(device, SYS_RES_IOPORT,
  461                         hc->rid_ioport, hc->res_ioport);
  462                 hc->res_ioport = 0;
  463         }
  464         if (hc->res_memory != 0) {
  465                 bus_release_resource(device, SYS_RES_MEMORY,
  466                         hc->rid_memory, hc->res_memory);
  467                 hc->res_memory = 0;
  468         }
  469         if (hc->res_plx_memory != 0) {
  470                 bus_release_resource(device, SYS_RES_MEMORY,
  471                         hc->rid_plx_memory, hc->res_plx_memory);
  472                 hc->res_plx_memory = 0;
  473         }
  474         return (0);
  475 }
  476 
  477 /*
  478  * First figure out which SCA gave the interrupt.
  479  * Process it.
  480  * See if there is other interrupts pending.
  481  * Repeat until there is no more interrupts.
  482  */
  483 static void
  484 arintr(void *arg)
  485 {
  486         struct ar_hardc *hc = (struct ar_hardc *)arg;
  487         sca_regs *sca;
  488         u_char isr0, isr1, isr2, arisr;
  489         int scano;
  490 
  491         /* XXX Use the PCI interrupt score board register later */
  492         if(hc->bustype == AR_BUS_PCI)
  493                 arisr = hc->orbase[AR_ISTAT * 4];
  494         else
  495                 arisr = ar_inb(hc, AR_ISTAT);
  496 
  497         while(arisr & AR_BD_INT) {
  498                 TRC(printf("arisr = %x\n", arisr));
  499                 if(arisr & AR_INT_0)
  500                         scano = 0;
  501                 else if(arisr & AR_INT_1)
  502                         scano = 1;
  503                 else {
  504                         /* XXX Oops this shouldn't happen. */
  505                         printf("arc%d: Interrupted with no interrupt.\n",
  506                                 hc->cunit);
  507                         return;
  508                 }
  509                 sca = hc->sca[scano];
  510 
  511                 if(hc->bustype == AR_BUS_ISA)
  512                         ARC_SET_SCA(hc, scano);
  513 
  514                 isr0 = sca->isr0;
  515                 isr1 = sca->isr1;
  516                 isr2 = sca->isr2;
  517 
  518                 TRC(printf("arc%d: ARINTR isr0 %x, isr1 %x, isr2 %x\n",
  519                         hc->cunit,
  520                         isr0,
  521                         isr1,
  522                         isr2));
  523                 if(isr0)
  524                         ar_msci_intr(hc, scano, isr0);
  525 
  526                 if(isr1)
  527                         ar_dmac_intr(hc, scano, isr1);
  528 
  529                 if(isr2)
  530                         ar_timer_intr(hc, scano, isr2);
  531 
  532                 /*
  533                  * Proccess the second sca's interrupt if available.
  534                  * Else see if there are any new interrupts.
  535                  */
  536                 if((arisr & AR_INT_0) && (arisr & AR_INT_1))
  537                         arisr &= ~AR_INT_0;
  538                 else {
  539                         if(hc->bustype == AR_BUS_PCI)
  540                                 arisr = hc->orbase[AR_ISTAT * 4];
  541                         else
  542                                 arisr = ar_inb(hc, AR_ISTAT);
  543                 }
  544         }
  545 
  546         if(hc->bustype == AR_BUS_ISA)
  547                 ARC_SET_OFF(hc);
  548 }
  549 
  550 
  551 /*
  552  * This will only start the transmitter. It is assumed that the data
  553  * is already there. It is normally called from arstart() or ar_dmac_intr().
  554  *
  555  */
  556 static void
  557 ar_xmit(struct ar_softc *sc)
  558 {
  559 #ifndef NETGRAPH
  560         struct ifnet *ifp;
  561 #endif /* NETGRAPH */
  562         dmac_channel *dmac;
  563 
  564 #ifndef NETGRAPH
  565         ifp = SC2IFP(sc);
  566 #endif /* NETGRAPH */
  567         dmac = &sc->sca->dmac[DMAC_TXCH(sc->scachan)];
  568 
  569         if(sc->hc->bustype == AR_BUS_ISA)
  570                 ARC_SET_SCA(sc->hc, sc->scano);
  571         dmac->cda = (u_short)(sc->block[sc->txb_next_tx].txdesc & 0xffff);
  572 
  573         dmac->eda = (u_short)(sc->block[sc->txb_next_tx].txeda & 0xffff);
  574         dmac->dsr = SCA_DSR_DE;
  575 
  576         sc->xmit_busy = 1;
  577 
  578         sc->txb_next_tx++;
  579         if(sc->txb_next_tx == AR_TX_BLOCKS)
  580                 sc->txb_next_tx = 0;
  581 
  582 #ifndef NETGRAPH
  583         ifp->if_timer = 2; /* Value in seconds. */
  584 #else   /* NETGRAPH */
  585         sc->out_dog = DOG_HOLDOFF;      /* give ourself some breathing space*/
  586 #endif  /* NETGRAPH */
  587         if(sc->hc->bustype == AR_BUS_ISA)
  588                 ARC_SET_OFF(sc->hc);
  589 }
  590 
  591 /*
  592  * This function will be called from the upper level when a user add a
  593  * packet to be send, and from the interrupt handler after a finished
  594  * transmit.
  595  *
  596  * NOTE: it should run at spl_imp().
  597  *
  598  * This function only place the data in the oncard buffers. It does not
  599  * start the transmition. ar_xmit() does that.
  600  *
  601  * Transmitter idle state is indicated by the IFF_DRV_OACTIVE flag. The
  602  * function that clears that should ensure that the transmitter and its
  603  * DMA is in a "good" idle state.
  604  */
  605 #ifndef NETGRAPH
  606 static void
  607 arstart(struct ifnet *ifp)
  608 {
  609         struct ar_softc *sc = ifp->if_softc;
  610 #else   /* NETGRAPH */
  611 static void
  612 arstart(struct ar_softc *sc)
  613 {
  614 #endif  /* NETGRAPH */
  615         int i, len, tlen;
  616         struct mbuf *mtx;
  617         u_char *txdata;
  618         sca_descriptor *txdesc;
  619         struct buf_block *blkp;
  620 
  621 #ifndef NETGRAPH
  622         if(!(ifp->if_drv_flags & IFF_DRV_RUNNING))
  623                 return;
  624 #else   /* NETGRAPH */
  625 /* XXX */
  626 #endif  /* NETGRAPH */
  627   
  628 top_arstart:
  629 
  630         /*
  631          * See if we have space for more packets.
  632          */
  633         if(sc->txb_inuse == AR_TX_BLOCKS) {
  634 #ifndef NETGRAPH
  635                 ifp->if_drv_flags |= IFF_DRV_OACTIVE;   /* yes, mark active */
  636 #else   /* NETGRAPH */
  637 /*XXX*/         /*ifp->if_drv_flags |= IFF_DRV_OACTIVE;*/       /* yes, mark active */
  638 #endif /* NETGRAPH */
  639                 return;
  640         }
  641 
  642 #ifndef NETGRAPH
  643         mtx = sppp_dequeue(ifp);
  644 #else   /* NETGRAPH */
  645         IF_DEQUEUE(&sc->xmitq_hipri, mtx);
  646         if (mtx == NULL) {
  647                 IF_DEQUEUE(&sc->xmitq, mtx);
  648         }
  649 #endif /* NETGRAPH */
  650         if(!mtx)
  651                 return;
  652 
  653         /*
  654          * It is OK to set the memory window outside the loop because
  655          * all tx buffers and descriptors are assumed to be in the same
  656          * 16K window.
  657          */
  658         if(sc->hc->bustype == AR_BUS_ISA)
  659                 ARC_SET_MEM(sc->hc, sc->block[0].txdesc);
  660 
  661         /*
  662          * We stay in this loop until there is nothing in the
  663          * TX queue left or the tx buffer is full.
  664          */
  665         i = 0;
  666         blkp = &sc->block[sc->txb_new];
  667         txdesc = (sca_descriptor *)
  668                 (sc->hc->mem_start + (blkp->txdesc & sc->hc->winmsk));
  669         txdata = (u_char *)(sc->hc->mem_start + (blkp->txstart & sc->hc->winmsk));
  670         for(;;) {
  671                 len = mtx->m_pkthdr.len;
  672 
  673                 TRC(printf("ar%d: ARstart len %u\n", sc->unit, len));
  674 
  675                 /*
  676                  * We can do this because the tx buffers don't wrap.
  677                  */
  678                 m_copydata(mtx, 0, len, txdata);
  679                 tlen = len;
  680                 while(tlen > AR_BUF_SIZ) {
  681                         txdesc->stat = 0;
  682                         txdesc->len = AR_BUF_SIZ;
  683                         tlen -= AR_BUF_SIZ;
  684                         txdesc++;
  685                         txdata += AR_BUF_SIZ;
  686                         i++;
  687                 }
  688                 /* XXX Move into the loop? */
  689                 txdesc->stat = SCA_DESC_EOM;
  690                 txdesc->len = tlen;
  691                 txdesc++;
  692                 txdata += AR_BUF_SIZ;
  693                 i++;
  694 
  695 #ifndef NETGRAPH
  696                 BPF_MTAP(ifp, mtx);
  697                 m_freem(mtx);
  698                 ++SC2IFP(sc)->if_opackets;
  699 #else   /* NETGRAPH */
  700                 m_freem(mtx);
  701                 sc->outbytes += len;
  702                 ++sc->opackets;
  703 #endif  /* NETGRAPH */
  704 
  705                 /*
  706                  * Check if we have space for another mbuf.
  707                  * XXX This is hardcoded. A packet won't be larger
  708                  * than 3 buffers (3 x 512).
  709                  */
  710                 if((i + 3) >= blkp->txmax)
  711                         break;
  712 
  713 #ifndef NETGRAPH
  714                 mtx = sppp_dequeue(ifp);
  715 #else   /* NETGRAPH */
  716                 IF_DEQUEUE(&sc->xmitq_hipri, mtx);
  717                 if (mtx == NULL) {
  718                         IF_DEQUEUE(&sc->xmitq, mtx);
  719                 }
  720 #endif /* NETGRAPH */
  721                 if(!mtx)
  722                         break;
  723         }
  724 
  725         blkp->txtail = i;
  726 
  727         /*
  728          * Mark the last descriptor, so that the SCA know where
  729          * to stop.
  730          */
  731         txdesc--;
  732         txdesc->stat |= SCA_DESC_EOT;
  733 
  734         txdesc = (sca_descriptor *)blkp->txdesc;
  735         blkp->txeda = (u_short)((u_int)&txdesc[i]);
  736 
  737 #if 0
  738         printf("ARstart: %p desc->cp %x\n", &txdesc->cp, txdesc->cp);
  739         printf("ARstart: %p desc->bp %x\n", &txdesc->bp, txdesc->bp);
  740         printf("ARstart: %p desc->bpb %x\n", &txdesc->bpb, txdesc->bpb);
  741         printf("ARstart: %p desc->len %x\n", &txdesc->len, txdesc->len);
  742         printf("ARstart: %p desc->stat %x\n", &txdesc->stat, txdesc->stat);
  743 #endif
  744 
  745         sc->txb_inuse++;
  746         sc->txb_new++;
  747         if(sc->txb_new == AR_TX_BLOCKS)
  748                 sc->txb_new = 0;
  749 
  750         if(sc->xmit_busy == 0)
  751                 ar_xmit(sc);
  752 
  753         if(sc->hc->bustype == AR_BUS_ISA)
  754                 ARC_SET_OFF(sc->hc);
  755 
  756         goto top_arstart;
  757 }
  758 
  759 #ifndef NETGRAPH
  760 static int
  761 arioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
  762 {
  763         int s, error;
  764         int was_up, should_be_up;
  765         struct ar_softc *sc = ifp->if_softc;
  766 
  767         TRC(if_printf(ifp, "arioctl.\n");)
  768 
  769         was_up = ifp->if_drv_flags & IFF_DRV_RUNNING;
  770 
  771         error = sppp_ioctl(ifp, cmd, data);
  772         TRC(if_printf(ifp, "ioctl: ifsppp.pp_flags = %x, if_flags %x.\n", 
  773                 ((struct sppp *)ifp)->pp_flags, ifp->if_flags);)
  774         if(error)
  775                 return (error);
  776 
  777         if((cmd != SIOCSIFFLAGS) && cmd != (SIOCSIFADDR))
  778                 return (0);
  779 
  780         TRC(if_printf(ifp, "arioctl %s.\n",
  781                 (cmd == SIOCSIFFLAGS) ? "SIOCSIFFLAGS" : "SIOCSIFADDR");)
  782 
  783         s = splimp();
  784         should_be_up = ifp->if_drv_flags & IFF_DRV_RUNNING;
  785 
  786         if(!was_up && should_be_up) {
  787                 /* Interface should be up -- start it. */
  788                 ar_up(sc);
  789                 arstart(ifp);
  790                 /* XXX Maybe clear the IFF_UP flag so that the link
  791                  * will only go up after sppp lcp and ipcp negotiation.
  792                  */
  793         } else if(was_up && !should_be_up) {
  794                 /* Interface should be down -- stop it. */
  795                 ar_down(sc);
  796                 sppp_flush(ifp);
  797         }
  798         splx(s);
  799         return (0);
  800 }
  801 #endif  /* NETGRAPH */
  802 
  803 /*
  804  * This is to catch lost tx interrupts.
  805  */
  806 static void
  807 #ifndef NETGRAPH
  808 arwatchdog(struct ifnet *ifp)
  809 {
  810         struct ar_softc *sc = ifp->if_softc;
  811 #else   /* NETGRAPH */
  812 arwatchdog(struct ar_softc *sc)
  813 {
  814 #endif  /* NETGRAPH */
  815         msci_channel *msci = &sc->sca->msci[sc->scachan];
  816 
  817 #ifndef NETGRAPH
  818         if(!(ifp->if_drv_flags & IFF_DRV_RUNNING))
  819                 return;
  820 #endif  /* NETGRAPH */
  821 
  822         if(sc->hc->bustype == AR_BUS_ISA)
  823                 ARC_SET_SCA(sc->hc, sc->scano);
  824 
  825         /* XXX if(SC2IFP(sc)->if_flags & IFF_DEBUG) */
  826                 printf("ar%d: transmit failed, "
  827                         "ST0 %x, ST1 %x, ST3 %x, DSR %x.\n",
  828                         sc->unit,
  829                         msci->st0,
  830                         msci->st1,
  831                         msci->st3,
  832                         sc->sca->dmac[DMAC_TXCH(sc->scachan)].dsr);
  833 
  834         if(msci->st1 & SCA_ST1_UDRN) {
  835                 msci->cmd = SCA_CMD_TXABORT;
  836                 msci->cmd = SCA_CMD_TXENABLE;
  837                 msci->st1 = SCA_ST1_UDRN;
  838         }
  839 
  840         sc->xmit_busy = 0;
  841 #ifndef NETGRAPH
  842         ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
  843 #else   /* NETGRAPH */
  844         /* XXX ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; */
  845 #endif  /* NETGRAPH */
  846 
  847         if(sc->txb_inuse && --sc->txb_inuse)
  848                 ar_xmit(sc);
  849 
  850 #ifndef NETGRAPH
  851         arstart(ifp);
  852 #else   /* NETGRAPH */
  853         arstart(sc);
  854 #endif  /* NETGRAPH */
  855 }
  856 
  857 static void
  858 ar_up(struct ar_softc *sc)
  859 {
  860         sca_regs *sca;
  861         msci_channel *msci;
  862 
  863         sca = sc->sca;
  864         msci = &sca->msci[sc->scachan];
  865 
  866         TRC(printf("ar%d: sca %p, msci %p, ch %d\n",
  867                 sc->unit, sca, msci, sc->scachan));
  868 
  869         /*
  870          * Enable transmitter and receiver.
  871          * Raise DTR and RTS.
  872          * Enable interrupts.
  873          */
  874         if(sc->hc->bustype == AR_BUS_ISA)
  875                 ARC_SET_SCA(sc->hc, sc->scano);
  876 
  877         /* XXX
  878          * What about using AUTO mode in msci->md0 ???
  879          * And what about CTS/DCD etc... ?
  880          */
  881         if(sc->hc->handshake & AR_SHSK_RTS)
  882                 msci->ctl &= ~SCA_CTL_RTS;
  883         if(sc->hc->handshake & AR_SHSK_DTR) {
  884                 sc->hc->txc_dtr[sc->scano] &= sc->scachan ? 
  885                         ~AR_TXC_DTR_DTR1 : ~AR_TXC_DTR_DTR0;
  886                 if(sc->hc->bustype == AR_BUS_PCI)
  887                         sc->hc->orbase[sc->hc->txc_dtr_off[sc->scano]] =
  888                                 sc->hc->txc_dtr[sc->scano];
  889                 else
  890                         ar_outb(sc->hc, sc->hc->txc_dtr_off[sc->scano],
  891                                 sc->hc->txc_dtr[sc->scano]);
  892         }
  893 
  894         if(sc->scachan == 0) {
  895                 sca->ier0 |= 0x0F;
  896                 sca->ier1 |= 0x0F;
  897         } else {
  898                 sca->ier0 |= 0xF0;
  899                 sca->ier1 |= 0xF0;
  900         }
  901 
  902         msci->cmd = SCA_CMD_RXENABLE;
  903         if(sc->hc->bustype == AR_BUS_ISA)
  904                 ar_inb(sc->hc, AR_ID_5); /* XXX slow it down a bit. */
  905         msci->cmd = SCA_CMD_TXENABLE;
  906 
  907         if(sc->hc->bustype == AR_BUS_ISA)
  908                 ARC_SET_OFF(sc->hc);
  909 #ifdef  NETGRAPH
  910         untimeout(ngar_watchdog_frame, sc, sc->handle);
  911         sc->handle = timeout(ngar_watchdog_frame, sc, hz);
  912         sc->running = 1;
  913 #endif  /* NETGRAPH */
  914 }
  915 
  916 static void
  917 ar_down(struct ar_softc *sc)
  918 {
  919         sca_regs *sca;
  920         msci_channel *msci;
  921 
  922         sca = sc->sca;
  923         msci = &sca->msci[sc->scachan];
  924 
  925 #ifdef  NETGRAPH
  926         untimeout(ngar_watchdog_frame, sc, sc->handle);
  927         sc->running = 0;
  928 #endif  /* NETGRAPH */
  929         /*
  930          * Disable transmitter and receiver.
  931          * Lower DTR and RTS.
  932          * Disable interrupts.
  933          */
  934         if(sc->hc->bustype == AR_BUS_ISA)
  935                 ARC_SET_SCA(sc->hc, sc->scano);
  936         msci->cmd = SCA_CMD_RXDISABLE;
  937         if(sc->hc->bustype == AR_BUS_ISA)
  938                 ar_inb(sc->hc, AR_ID_5); /* XXX slow it down a bit. */
  939         msci->cmd = SCA_CMD_TXDISABLE;
  940 
  941         if(sc->hc->handshake & AR_SHSK_RTS)
  942                 msci->ctl |= SCA_CTL_RTS;
  943         if(sc->hc->handshake & AR_SHSK_DTR) {
  944                 sc->hc->txc_dtr[sc->scano] |= sc->scachan ? 
  945                         AR_TXC_DTR_DTR1 : AR_TXC_DTR_DTR0;
  946                 if(sc->hc->bustype == AR_BUS_PCI)
  947                         sc->hc->orbase[sc->hc->txc_dtr_off[sc->scano]] =
  948                                 sc->hc->txc_dtr[sc->scano];
  949                 else
  950                         ar_outb(sc->hc, sc->hc->txc_dtr_off[sc->scano],
  951                                 sc->hc->txc_dtr[sc->scano]);
  952         }
  953 
  954         if(sc->scachan == 0) {
  955                 sca->ier0 &= ~0x0F;
  956                 sca->ier1 &= ~0x0F;
  957         } else {
  958                 sca->ier0 &= ~0xF0;
  959                 sca->ier1 &= ~0xF0;
  960         }
  961 
  962         if(sc->hc->bustype == AR_BUS_ISA)
  963                 ARC_SET_OFF(sc->hc);
  964 }
  965 
  966 static int
  967 ar_read_pim_iface(volatile struct ar_hardc *hc, int channel)
  968 {
  969         int ctype, i, val, x;
  970         volatile u_char *pimctrl;
  971 
  972         ctype = 0;
  973         val = 0;
  974 
  975         pimctrl = hc->orbase + AR_PIMCTRL;
  976 
  977         /* Reset the PIM */
  978         *pimctrl = 0x00;
  979         *pimctrl = AR_PIM_STROBE;
  980 
  981         /* Check if there is a PIM */
  982         *pimctrl = 0x00;
  983         *pimctrl = AR_PIM_READ;
  984         x = *pimctrl;
  985         TRC(printf("x = %x", x));
  986         if(x & AR_PIM_DATA) {
  987                 printf("No PIM installed\n");
  988                 return (AR_IFACE_UNKNOWN);
  989         }
  990 
  991         x = (x >> 1) & 0x01;
  992         val |= x << 0;
  993 
  994         /* Now read the next 15 bits */
  995         for(i = 1; i < 16; i++) {
  996                 *pimctrl = AR_PIM_READ;
  997                 *pimctrl = AR_PIM_READ | AR_PIM_STROBE;
  998                 x = *pimctrl;
  999                 TRC(printf(" %x ", x));
 1000                 x = (x >> 1) & 0x01;
 1001                 val |= x << i;
 1002                 if(i == 8 && (val & 0x000f) == 0x0004) {
 1003                         int ii;
 1004                         
 1005                         /* Start bit */
 1006                         *pimctrl = AR_PIM_A2D_DOUT | AR_PIM_A2D_STROBE;
 1007                         *pimctrl = AR_PIM_A2D_DOUT;
 1008 
 1009                         /* Mode bit */
 1010                         *pimctrl = AR_PIM_A2D_DOUT | AR_PIM_A2D_STROBE;
 1011                         *pimctrl = AR_PIM_A2D_DOUT;
 1012 
 1013                         /* Sign bit */
 1014                         *pimctrl = AR_PIM_A2D_DOUT | AR_PIM_A2D_STROBE;
 1015                         *pimctrl = AR_PIM_A2D_DOUT;
 1016 
 1017                         /* Select channel */
 1018                         *pimctrl = AR_PIM_A2D_STROBE | ((channel & 2) << 2);
 1019                         *pimctrl = ((channel & 2) << 2);
 1020                         *pimctrl = AR_PIM_A2D_STROBE | ((channel & 1) << 3);
 1021                         *pimctrl = ((channel & 1) << 3);
 1022 
 1023                         *pimctrl = AR_PIM_A2D_STROBE;
 1024 
 1025                         x = *pimctrl;
 1026                         if(x & AR_PIM_DATA)
 1027                                 printf("\nOops A2D start bit not zero (%X)\n", x);
 1028 
 1029                         for(ii = 7; ii >= 0; ii--) {
 1030                                 *pimctrl = 0x00;
 1031                                 *pimctrl = AR_PIM_A2D_STROBE;
 1032                                 x = *pimctrl;
 1033                                 if(x & AR_PIM_DATA)
 1034                                         ctype |= 1 << ii;
 1035                         }
 1036                 }
 1037         }
 1038         TRC(printf("\nPIM val %x, ctype %x, %d\n", val, ctype, ctype));
 1039         *pimctrl = AR_PIM_MODEG;
 1040         *pimctrl = AR_PIM_MODEG | AR_PIM_AUTO_LED;
 1041         if(ctype > 255)
 1042                 return (AR_IFACE_UNKNOWN);
 1043         if(ctype > 239)
 1044                 return (AR_IFACE_V_35);
 1045         if(ctype > 207)
 1046                 return (AR_IFACE_EIA_232);
 1047         if(ctype > 178)
 1048                 return (AR_IFACE_X_21);
 1049         if(ctype > 150)
 1050                 return (AR_IFACE_EIA_530);
 1051         if(ctype > 25)
 1052                 return (AR_IFACE_UNKNOWN);
 1053         if(ctype > 7)
 1054                 return (AR_IFACE_LOOPBACK);
 1055         return (AR_IFACE_UNKNOWN);
 1056 }
 1057 
 1058 /*
 1059  * Initialize the card, allocate memory for the ar_softc structures
 1060  * and fill in the pointers.
 1061  */
 1062 static void
 1063 arc_init(struct ar_hardc *hc)
 1064 {
 1065         struct ar_softc *sc;
 1066         int x;
 1067         u_int chanmem;
 1068         u_int bufmem;
 1069         u_int next;
 1070         u_int descneeded;
 1071         u_char isr, mar;
 1072         u_long memst;
 1073 
 1074         MALLOC(sc, struct ar_softc *, hc->numports * sizeof(struct ar_softc),
 1075                 M_DEVBUF, M_WAITOK | M_ZERO);
 1076         if (sc == NULL)
 1077                 return;
 1078         hc->sc = sc;
 1079 
 1080         hc->txc_dtr[0] = AR_TXC_DTR_NOTRESET |
 1081                          AR_TXC_DTR_DTR0 | AR_TXC_DTR_DTR1;
 1082         hc->txc_dtr[1] = AR_TXC_DTR_DTR0 | AR_TXC_DTR_DTR1;
 1083         hc->txc_dtr_off[0] = AR_TXC_DTR0;
 1084         hc->txc_dtr_off[1] = AR_TXC_DTR2;
 1085         if(hc->bustype == AR_BUS_PCI) {
 1086                 hc->txc_dtr_off[0] *= 4;
 1087                 hc->txc_dtr_off[1] *= 4;
 1088         }
 1089 
 1090         /*
 1091          * reset the card and wait at least 1uS.
 1092          */
 1093         if(hc->bustype == AR_BUS_PCI)
 1094                 hc->orbase[AR_TXC_DTR0 * 4] = ~AR_TXC_DTR_NOTRESET &
 1095                         hc->txc_dtr[0];
 1096         else
 1097                 ar_outb(hc, AR_TXC_DTR0, ~AR_TXC_DTR_NOTRESET &
 1098                         hc->txc_dtr[0]);
 1099         DELAY(2);
 1100         if(hc->bustype == AR_BUS_PCI)
 1101                 hc->orbase[AR_TXC_DTR0 * 4] = hc->txc_dtr[0];
 1102         else
 1103                 ar_outb(hc, AR_TXC_DTR0, hc->txc_dtr[0]);
 1104 
 1105         if(hc->bustype == AR_BUS_ISA) {
 1106                 /*
 1107                  * Configure the card.
 1108                  * Mem address, irq, 
 1109                  */
 1110                 memst = rman_get_start(hc->res_memory);
 1111                 mar = memst >> 16;
 1112                 isr = irqtable[hc->isa_irq] << 1;
 1113                 if(isr == 0)
 1114                         printf("ar%d: Warning illegal interrupt %d\n",
 1115                                 hc->cunit, hc->isa_irq);
 1116                 isr = isr | ((memst & 0xc000) >> 10);
 1117 
 1118                 hc->sca[0] = (sca_regs *)hc->mem_start;
 1119                 hc->sca[1] = (sca_regs *)hc->mem_start;
 1120 
 1121                 ar_outb(hc, AR_MEM_SEL, mar);
 1122                 ar_outb(hc, AR_INT_SEL, isr | AR_INTS_CEN);
 1123         }
 1124 
 1125         if(hc->bustype == AR_BUS_PCI && hc->interface[0] == AR_IFACE_PIM)
 1126                 for(x = 0; x < hc->numports; x++)
 1127                         hc->interface[x] = ar_read_pim_iface(hc, x);
 1128 
 1129         /*
 1130          * Set the TX clock direction and enable TX.
 1131          */
 1132         for(x=0;x<hc->numports;x++) {
 1133                 switch(hc->interface[x]) {
 1134                 case AR_IFACE_V_35:
 1135                         hc->txc_dtr[x / NCHAN] |= (x % NCHAN == 0) ?
 1136                             AR_TXC_DTR_TX0 : AR_TXC_DTR_TX1;
 1137                         hc->txc_dtr[x / NCHAN] |= (x % NCHAN == 0) ?
 1138                             AR_TXC_DTR_TXCS0 : AR_TXC_DTR_TXCS1;
 1139                         break;
 1140                 case AR_IFACE_EIA_530:
 1141                 case AR_IFACE_COMBO:
 1142                 case AR_IFACE_X_21:
 1143                         hc->txc_dtr[x / NCHAN] |= (x % NCHAN == 0) ?
 1144                             AR_TXC_DTR_TX0 : AR_TXC_DTR_TX1;
 1145                         break;
 1146                 }
 1147         }
 1148 
 1149         if(hc->bustype == AR_BUS_PCI)
 1150                 hc->orbase[AR_TXC_DTR0 * 4] = hc->txc_dtr[0];
 1151         else
 1152                 ar_outb(hc, AR_TXC_DTR0, hc->txc_dtr[0]);
 1153         if(hc->numports > NCHAN) {
 1154                 if(hc->bustype == AR_BUS_PCI)
 1155                         hc->orbase[AR_TXC_DTR2 * 4] = hc->txc_dtr[1];
 1156                 else
 1157                         ar_outb(hc, AR_TXC_DTR2, hc->txc_dtr[1]);
 1158         }
 1159 
 1160         chanmem = hc->memsize / hc->numports;
 1161         next = 0;
 1162 
 1163         for(x=0;x<hc->numports;x++, sc++) {
 1164                 int blk;
 1165 
 1166                 sc->sca = hc->sca[x / NCHAN];
 1167 
 1168                 for(blk = 0; blk < AR_TX_BLOCKS; blk++) {
 1169                         sc->block[blk].txdesc = next;
 1170                         bufmem = (16 * 1024) / AR_TX_BLOCKS;
 1171                         descneeded = bufmem / AR_BUF_SIZ;
 1172                         sc->block[blk].txstart = sc->block[blk].txdesc +
 1173                                 ((((descneeded * sizeof(sca_descriptor)) /
 1174                                         AR_BUF_SIZ) + 1) * AR_BUF_SIZ);
 1175                         sc->block[blk].txend = next + bufmem;
 1176                         sc->block[blk].txmax =
 1177                                 (sc->block[blk].txend - sc->block[blk].txstart)
 1178                                 / AR_BUF_SIZ;
 1179                         next += bufmem;
 1180 
 1181                         TRC(printf("ar%d: blk %d: txdesc %x, txstart %x, "
 1182                                    "txend %x, txmax %d\n",
 1183                                    x,
 1184                                    blk,
 1185                                    sc->block[blk].txdesc,
 1186                                    sc->block[blk].txstart,
 1187                                    sc->block[blk].txend,
 1188                                    sc->block[blk].txmax));
 1189                 }
 1190 
 1191                 sc->rxdesc = next;
 1192                 bufmem = chanmem - (bufmem * AR_TX_BLOCKS);
 1193                 descneeded = bufmem / AR_BUF_SIZ;
 1194                 sc->rxstart = sc->rxdesc +
 1195                                 ((((descneeded * sizeof(sca_descriptor)) /
 1196                                         AR_BUF_SIZ) + 1) * AR_BUF_SIZ);
 1197                 sc->rxend = next + bufmem;
 1198                 sc->rxmax = (sc->rxend - sc->rxstart) / AR_BUF_SIZ;
 1199                 next += bufmem;
 1200                 TRC(printf("ar%d: rxdesc %x, rxstart %x, "
 1201                            "rxend %x, rxmax %d\n",
 1202                            x, sc->rxdesc, sc->rxstart, sc->rxend, sc->rxmax));
 1203         }
 1204 
 1205         if(hc->bustype == AR_BUS_PCI)
 1206                 hc->orbase[AR_PIMCTRL] = AR_PIM_MODEG | AR_PIM_AUTO_LED;
 1207 }
 1208 
 1209 
 1210 /*
 1211  * The things done here are channel independent.
 1212  *
 1213  *   Configure the sca waitstates.
 1214  *   Configure the global interrupt registers.
 1215  *   Enable master dma enable.
 1216  */
 1217 static void
 1218 ar_init_sca(struct ar_hardc *hc, int scano)
 1219 {
 1220         sca_regs *sca;
 1221 
 1222         sca = hc->sca[scano];
 1223         if(hc->bustype == AR_BUS_ISA)
 1224                 ARC_SET_SCA(hc, scano);
 1225 
 1226         /*
 1227          * Do the wait registers.
 1228          * Set everything to 0 wait states.
 1229          */
 1230         sca->pabr0 = 0;
 1231         sca->pabr1 = 0;
 1232         sca->wcrl  = 0;
 1233         sca->wcrm  = 0;
 1234         sca->wcrh  = 0;
 1235 
 1236         /*
 1237          * Configure the interrupt registers.
 1238          * Most are cleared until the interface is configured.
 1239          */
 1240         sca->ier0 = 0x00; /* MSCI interrupts... Not used with dma. */
 1241         sca->ier1 = 0x00; /* DMAC interrupts */
 1242         sca->ier2 = 0x00; /* TIMER interrupts... Not used yet. */
 1243         sca->itcr = 0x00; /* Use ivr and no intr ack */
 1244         sca->ivr  = 0x40; /* Fill in the interrupt vector. */
 1245         sca->imvr = 0x40;
 1246 
 1247         /*
 1248          * Configure the timers.
 1249          * XXX Later
 1250          */
 1251 
 1252 
 1253         /*
 1254          * Set the DMA channel priority to rotate between
 1255          * all four channels.
 1256          *
 1257          * Enable all dma channels.
 1258          */
 1259         if(hc->bustype == AR_BUS_PCI) {
 1260                 u_char *t;
 1261 
 1262                 /*
 1263                  * Stupid problem with the PCI interface chip that break
 1264                  * things.
 1265                  * XXX
 1266                  */
 1267                 t = (u_char *)sca;
 1268                 t[AR_PCI_SCA_PCR] = SCA_PCR_PR2;
 1269                 t[AR_PCI_SCA_DMER] = SCA_DMER_EN;
 1270         } else {
 1271                 sca->pcr = SCA_PCR_PR2;
 1272                 sca->dmer = SCA_DMER_EN;
 1273         }
 1274 }
 1275 
 1276 
 1277 /*
 1278  * Configure the msci
 1279  *
 1280  * NOTE: The serial port configuration is hardcoded at the moment.
 1281  */
 1282 static void
 1283 ar_init_msci(struct ar_softc *sc)
 1284 {
 1285         msci_channel *msci;
 1286 
 1287         msci = &sc->sca->msci[sc->scachan];
 1288 
 1289         if(sc->hc->bustype == AR_BUS_ISA)
 1290                 ARC_SET_SCA(sc->hc, sc->scano);
 1291 
 1292         msci->cmd = SCA_CMD_RESET;
 1293 
 1294         msci->md0 = SCA_MD0_CRC_1 |
 1295                     SCA_MD0_CRC_CCITT |
 1296                     SCA_MD0_CRC_ENABLE |
 1297                     SCA_MD0_MODE_HDLC;
 1298         msci->md1 = SCA_MD1_NOADDRCHK;
 1299         msci->md2 = SCA_MD2_DUPLEX | SCA_MD2_NRZ;
 1300 
 1301         /*
 1302          * Acording to the manual I should give a reset after changing the
 1303          * mode registers.
 1304          */
 1305         msci->cmd = SCA_CMD_RXRESET;
 1306         msci->ctl = SCA_CTL_IDLPAT | SCA_CTL_UDRNC | SCA_CTL_RTS;
 1307 
 1308         /*
 1309          * For now all interfaces are programmed to use the RX clock for
 1310          * the TX clock.
 1311          */
 1312         switch(sc->hc->interface[sc->subunit]) {
 1313         case AR_IFACE_V_35:
 1314                 msci->rxs = SCA_RXS_CLK_RXC0 | SCA_RXS_DIV1;
 1315                 msci->txs = SCA_TXS_CLK_TXC | SCA_TXS_DIV1;
 1316                 break;
 1317         case AR_IFACE_X_21:
 1318         case AR_IFACE_EIA_530:
 1319         case AR_IFACE_COMBO:
 1320                 msci->rxs = SCA_RXS_CLK_RXC0 | SCA_RXS_DIV1;
 1321                 msci->txs = SCA_TXS_CLK_RX | SCA_TXS_DIV1;
 1322         }
 1323 
 1324         msci->tmc = 153;   /* This give 64k for loopback */
 1325 
 1326         /* XXX
 1327          * Disable all interrupts for now. I think if you are using
 1328          * the dmac you don't use these interrupts.
 1329          */
 1330         msci->ie0 = 0;
 1331         msci->ie1 = 0x0C; /* XXX CTS and DCD (DSR on 570I) level change. */
 1332         msci->ie2 = 0;
 1333         msci->fie = 0;
 1334 
 1335         msci->sa0 = 0;
 1336         msci->sa1 = 0;
 1337 
 1338         msci->idl = 0x7E; /* XXX This is what cisco does. */
 1339 
 1340         /*
 1341          * This is what the ARNET diags use.
 1342          */
 1343         msci->rrc  = 0x0E;
 1344         msci->trc0 = 0x12;
 1345         msci->trc1 = 0x1F;
 1346 }
 1347 
 1348 /*
 1349  * Configure the rx dma controller.
 1350  */
 1351 static void
 1352 ar_init_rx_dmac(struct ar_softc *sc)
 1353 {
 1354         dmac_channel *dmac;
 1355         sca_descriptor *rxd;
 1356         u_int rxbuf;
 1357         u_int rxda;
 1358         u_int rxda_d;
 1359         int x = 0;
 1360 
 1361         dmac = &sc->sca->dmac[DMAC_RXCH(sc->scachan)];
 1362 
 1363         if(sc->hc->bustype == AR_BUS_ISA)
 1364                 ARC_SET_MEM(sc->hc, sc->rxdesc);
 1365 
 1366         rxd = (sca_descriptor *)(sc->hc->mem_start + (sc->rxdesc&sc->hc->winmsk));
 1367         rxda_d = (u_int)sc->hc->mem_start - (sc->rxdesc & ~sc->hc->winmsk);
 1368 
 1369         for(rxbuf=sc->rxstart;rxbuf<sc->rxend;rxbuf += AR_BUF_SIZ, rxd++) {
 1370                 rxda = (u_int)&rxd[1] - rxda_d;
 1371                 rxd->cp = (u_short)(rxda & 0xfffful);
 1372 
 1373                 x++;
 1374                 if(x < 6)
 1375                 TRC(printf("Descrp %p, data pt %x, data %x, ",
 1376                         rxd, rxda, rxbuf));
 1377 
 1378                 rxd->bp = (u_short)(rxbuf & 0xfffful);
 1379                 rxd->bpb = (u_char)((rxbuf >> 16) & 0xff);
 1380                 rxd->len = 0;
 1381                 rxd->stat = 0xff; /* The sca write here when it is finished. */
 1382 
 1383                 if(x < 6)
 1384                 TRC(printf("bpb %x, bp %x.\n", rxd->bpb, rxd->bp));
 1385         }
 1386         rxd--;
 1387         rxd->cp = (u_short)(sc->rxdesc & 0xfffful);
 1388 
 1389         sc->rxhind = 0;
 1390 
 1391         if(sc->hc->bustype == AR_BUS_ISA)
 1392                 ARC_SET_SCA(sc->hc, sc->scano);
 1393 
 1394         dmac->dsr = 0;    /* Disable DMA transfer */
 1395         dmac->dcr = SCA_DCR_ABRT;
 1396 
 1397         /* XXX maybe also SCA_DMR_CNTE */
 1398         dmac->dmr = SCA_DMR_TMOD | SCA_DMR_NF;
 1399         dmac->bfl = AR_BUF_SIZ;
 1400 
 1401         dmac->cda = (u_short)(sc->rxdesc & 0xffff);
 1402         dmac->sarb = (u_char)((sc->rxdesc >> 16) & 0xff);
 1403 
 1404         rxd = (sca_descriptor *)sc->rxstart;
 1405         dmac->eda = (u_short)((u_int)&rxd[sc->rxmax - 1] & 0xffff);
 1406 
 1407         dmac->dir = 0xF0;
 1408 
 1409         dmac->dsr = SCA_DSR_DE;
 1410 }
 1411 
 1412 /*
 1413  * Configure the TX DMA descriptors.
 1414  * Initialize the needed values and chain the descriptors.
 1415  */
 1416 static void
 1417 ar_init_tx_dmac(struct ar_softc *sc)
 1418 {
 1419         dmac_channel *dmac;
 1420         struct buf_block *blkp;
 1421         int blk;
 1422         sca_descriptor *txd;
 1423         u_int txbuf;
 1424         u_int txda;
 1425         u_int txda_d;
 1426 
 1427         dmac = &sc->sca->dmac[DMAC_TXCH(sc->scachan)];
 1428 
 1429         if(sc->hc->bustype == AR_BUS_ISA)
 1430                 ARC_SET_MEM(sc->hc, sc->block[0].txdesc);
 1431 
 1432         for(blk = 0; blk < AR_TX_BLOCKS; blk++) {
 1433                 blkp = &sc->block[blk];
 1434                 txd = (sca_descriptor *)(sc->hc->mem_start +
 1435                                         (blkp->txdesc&sc->hc->winmsk));
 1436                 txda_d = (u_int)sc->hc->mem_start -
 1437                                 (blkp->txdesc & ~sc->hc->winmsk);
 1438 
 1439                 txbuf=blkp->txstart;
 1440                 for(;txbuf<blkp->txend;txbuf += AR_BUF_SIZ, txd++) {
 1441                         txda = (u_int)&txd[1] - txda_d;
 1442                         txd->cp = (u_short)(txda & 0xfffful);
 1443 
 1444                         txd->bp = (u_short)(txbuf & 0xfffful);
 1445                         txd->bpb = (u_char)((txbuf >> 16) & 0xff);
 1446                         TRC(printf("ar%d: txbuf %x, bpb %x, bp %x\n",
 1447                                 sc->unit, txbuf, txd->bpb, txd->bp));
 1448                         txd->len = 0;
 1449                         txd->stat = 0;
 1450                 }
 1451                 txd--;
 1452                 txd->cp = (u_short)(blkp->txdesc & 0xfffful);
 1453 
 1454                 blkp->txtail = (u_int)txd - (u_int)sc->hc->mem_start;
 1455                 TRC(printf("TX Descriptors start %x, end %x.\n",
 1456                         blkp->txdesc,
 1457                         blkp->txtail));
 1458         }
 1459 
 1460         if(sc->hc->bustype == AR_BUS_ISA)
 1461                 ARC_SET_SCA(sc->hc, sc->scano);
 1462 
 1463         dmac->dsr = 0; /* Disable DMA */
 1464         dmac->dcr = SCA_DCR_ABRT;
 1465         dmac->dmr = SCA_DMR_TMOD | SCA_DMR_NF;
 1466         dmac->dir = SCA_DIR_EOT | SCA_DIR_BOF | SCA_DIR_COF;
 1467 
 1468         dmac->sarb = (u_char)((sc->block[0].txdesc >> 16) & 0xff);
 1469 }
 1470 
 1471 
 1472 /*
 1473  * Look through the descriptors to see if there is a complete packet
 1474  * available. Stop if we get to where the sca is busy.
 1475  *
 1476  * Return the length and status of the packet.
 1477  * Return nonzero if there is a packet available.
 1478  *
 1479  * NOTE:
 1480  * It seems that we get the interrupt a bit early. The updateing of
 1481  * descriptor values is not always completed when this is called.
 1482  */
 1483 static int
 1484 ar_packet_avail(struct ar_softc *sc,
 1485                     int *len,
 1486                     u_char *rxstat)
 1487 {
 1488         dmac_channel *dmac;
 1489         sca_descriptor *rxdesc;
 1490         sca_descriptor *endp;
 1491         sca_descriptor *cda;
 1492 
 1493         if(sc->hc->bustype == AR_BUS_ISA)
 1494                 ARC_SET_SCA(sc->hc, sc->scano);
 1495         dmac = &sc->sca->dmac[DMAC_RXCH(sc->scachan)];
 1496         cda = (sca_descriptor *)(sc->hc->mem_start +
 1497               ((((u_int)dmac->sarb << 16) + dmac->cda) & sc->hc->winmsk));
 1498 
 1499         if(sc->hc->bustype == AR_BUS_ISA)
 1500                 ARC_SET_MEM(sc->hc, sc->rxdesc);
 1501         rxdesc = (sca_descriptor *)
 1502                         (sc->hc->mem_start + (sc->rxdesc & sc->hc->winmsk));
 1503         endp = rxdesc;
 1504         rxdesc = &rxdesc[sc->rxhind];
 1505         endp = &endp[sc->rxmax];
 1506 
 1507         *len = 0;
 1508 
 1509         while(rxdesc != cda) {
 1510                 *len += rxdesc->len;
 1511 
 1512                 if(rxdesc->stat & SCA_DESC_EOM) {
 1513                         *rxstat = rxdesc->stat;
 1514                         TRC(printf("ar%d: PKT AVAIL len %d, %x.\n",
 1515                                 sc->unit, *len, *rxstat));
 1516                         return (1);
 1517                 }
 1518 
 1519                 rxdesc++;
 1520                 if(rxdesc == endp)
 1521                         rxdesc = (sca_descriptor *)
 1522                                (sc->hc->mem_start + (sc->rxdesc & sc->hc->winmsk));
 1523         }
 1524 
 1525         *len = 0;
 1526         *rxstat = 0;
 1527         return (0);
 1528 }
 1529 
 1530 
 1531 /*
 1532  * Copy a packet from the on card memory into a provided mbuf.
 1533  * Take into account that buffers wrap and that a packet may
 1534  * be larger than a buffer.
 1535  */
 1536 static void 
 1537 ar_copy_rxbuf(struct mbuf *m,
 1538                    struct ar_softc *sc,
 1539                    int len)
 1540 {
 1541         sca_descriptor *rxdesc;
 1542         u_int rxdata;
 1543         u_int rxmax;
 1544         u_int off = 0;
 1545         u_int tlen;
 1546 
 1547         rxdata = sc->rxstart + (sc->rxhind * AR_BUF_SIZ);
 1548         rxmax = sc->rxstart + (sc->rxmax * AR_BUF_SIZ);
 1549 
 1550         rxdesc = (sca_descriptor *)
 1551                         (sc->hc->mem_start + (sc->rxdesc & sc->hc->winmsk));
 1552         rxdesc = &rxdesc[sc->rxhind];
 1553 
 1554         while(len) {
 1555                 tlen = (len < AR_BUF_SIZ) ? len : AR_BUF_SIZ;
 1556                 if(sc->hc->bustype == AR_BUS_ISA)
 1557                         ARC_SET_MEM(sc->hc, rxdata);
 1558                 bcopy(sc->hc->mem_start + (rxdata & sc->hc->winmsk), 
 1559                         mtod(m, caddr_t) + off,
 1560                         tlen);
 1561 
 1562                 off += tlen;
 1563                 len -= tlen;
 1564 
 1565                 if(sc->hc->bustype == AR_BUS_ISA)
 1566                         ARC_SET_MEM(sc->hc, sc->rxdesc);
 1567                 rxdesc->len = 0;
 1568                 rxdesc->stat = 0xff;
 1569 
 1570                 rxdata += AR_BUF_SIZ;
 1571                 rxdesc++;
 1572                 if(rxdata == rxmax) {
 1573                         rxdata = sc->rxstart;
 1574                         rxdesc = (sca_descriptor *)
 1575                                 (sc->hc->mem_start + (sc->rxdesc & sc->hc->winmsk));
 1576                 }
 1577         }
 1578 }
 1579 
 1580 /*
 1581  * If single is set, just eat a packet. Otherwise eat everything up to
 1582  * where cda points. Update pointers to point to the next packet.
 1583  */
 1584 static void
 1585 ar_eat_packet(struct ar_softc *sc, int single)
 1586 {
 1587         dmac_channel *dmac;
 1588         sca_descriptor *rxdesc;
 1589         sca_descriptor *endp;
 1590         sca_descriptor *cda;
 1591         int loopcnt = 0;
 1592         u_char stat;
 1593 
 1594         if(sc->hc->bustype == AR_BUS_ISA)
 1595                 ARC_SET_SCA(sc->hc, sc->scano);
 1596         dmac = &sc->sca->dmac[DMAC_RXCH(sc->scachan)];
 1597         cda = (sca_descriptor *)(sc->hc->mem_start +
 1598               ((((u_int)dmac->sarb << 16) + dmac->cda) & sc->hc->winmsk));
 1599 
 1600         /*
 1601          * Loop until desc->stat == (0xff || EOM)
 1602          * Clear the status and length in the descriptor.
 1603          * Increment the descriptor.
 1604          */
 1605         if(sc->hc->bustype == AR_BUS_ISA)
 1606                 ARC_SET_MEM(sc->hc, sc->rxdesc);
 1607         rxdesc = (sca_descriptor *)
 1608                 (sc->hc->mem_start + (sc->rxdesc & sc->hc->winmsk));
 1609         endp = rxdesc;
 1610         rxdesc = &rxdesc[sc->rxhind];
 1611         endp = &endp[sc->rxmax];
 1612 
 1613         while(rxdesc != cda) {
 1614                 loopcnt++;
 1615                 if(loopcnt > sc->rxmax) {
 1616                         printf("ar%d: eat pkt %d loop, cda %p, "
 1617                                "rxdesc %p, stat %x.\n",
 1618                                sc->unit,
 1619                                loopcnt,
 1620                                (void *)cda,
 1621                                (void *)rxdesc,
 1622                                rxdesc->stat);
 1623                         break;
 1624                 }
 1625 
 1626                 stat = rxdesc->stat;
 1627 
 1628                 rxdesc->len = 0;
 1629                 rxdesc->stat = 0xff;
 1630 
 1631                 rxdesc++;
 1632                 sc->rxhind++;
 1633                 if(rxdesc == endp) {
 1634                         rxdesc = (sca_descriptor *)
 1635                                (sc->hc->mem_start + (sc->rxdesc & sc->hc->winmsk));
 1636                         sc->rxhind = 0;
 1637                 }
 1638 
 1639                 if(single && (stat == SCA_DESC_EOM))
 1640                         break;
 1641         }
 1642 
 1643         /*
 1644          * Update the eda to the previous descriptor.
 1645          */
 1646         if(sc->hc->bustype == AR_BUS_ISA)
 1647                 ARC_SET_SCA(sc->hc, sc->scano);
 1648 
 1649         rxdesc = (sca_descriptor *)sc->rxdesc;
 1650         rxdesc = &rxdesc[(sc->rxhind + sc->rxmax - 2 ) % sc->rxmax];
 1651 
 1652         sc->sca->dmac[DMAC_RXCH(sc->scachan)].eda = 
 1653                         (u_short)((u_int)rxdesc & 0xffff);
 1654 }
 1655 
 1656 
 1657 /*
 1658  * While there is packets available in the rx buffer, read them out
 1659  * into mbufs and ship them off.
 1660  */
 1661 static void
 1662 ar_get_packets(struct ar_softc *sc)
 1663 {
 1664         sca_descriptor *rxdesc;
 1665         struct mbuf *m = NULL;
 1666         int i;
 1667         int len;
 1668         u_char rxstat;
 1669 #ifdef NETGRAPH
 1670         int error;
 1671 #endif
 1672 
 1673         while(ar_packet_avail(sc, &len, &rxstat)) {
 1674                 TRC(printf("apa: len %d, rxstat %x\n", len, rxstat));
 1675                 if(((rxstat & SCA_DESC_ERRORS) == 0) && (len < MCLBYTES)) {
 1676                         MGETHDR(m, M_DONTWAIT, MT_DATA);
 1677                         if(m == NULL) {
 1678                                 /* eat packet if get mbuf fail!! */
 1679                                 ar_eat_packet(sc, 1);
 1680                                 continue;
 1681                         }
 1682 #ifndef NETGRAPH
 1683                         m->m_pkthdr.rcvif = SC2IFP(sc);
 1684 #else   /* NETGRAPH */
 1685                         m->m_pkthdr.rcvif = NULL;
 1686                         sc->inbytes += len;
 1687                         sc->inlast = 0;
 1688 #endif  /* NETGRAPH */
 1689                         m->m_pkthdr.len = m->m_len = len;
 1690                         if(len > MHLEN) {
 1691                                 MCLGET(m, M_DONTWAIT);
 1692                                 if((m->m_flags & M_EXT) == 0) {
 1693                                         m_freem(m);
 1694                                         ar_eat_packet(sc, 1);
 1695                                         continue;
 1696                                 }
 1697                         }
 1698                         ar_copy_rxbuf(m, sc, len);
 1699 #ifndef NETGRAPH
 1700                         BPF_MTAP(SC2IFP(sc), m);
 1701                         sppp_input(SC2IFP(sc), m);
 1702                         SC2IFP(sc)->if_ipackets++;
 1703 #else   /* NETGRAPH */
 1704                         NG_SEND_DATA_ONLY(error, sc->hook, m);
 1705                         sc->ipackets++;
 1706 #endif  /* NETGRAPH */
 1707 
 1708                         /*
 1709                          * Update the eda to the previous descriptor.
 1710                          */
 1711                         i = (len + AR_BUF_SIZ - 1) / AR_BUF_SIZ;
 1712                         sc->rxhind = (sc->rxhind + i) % sc->rxmax;
 1713 
 1714                         if(sc->hc->bustype == AR_BUS_ISA)
 1715                                 ARC_SET_SCA(sc->hc, sc->scano);
 1716 
 1717                         rxdesc = (sca_descriptor *)sc->rxdesc;
 1718                         rxdesc =
 1719                              &rxdesc[(sc->rxhind + sc->rxmax - 2 ) % sc->rxmax];
 1720 
 1721                         sc->sca->dmac[DMAC_RXCH(sc->scachan)].eda = 
 1722                                 (u_short)((u_int)rxdesc & 0xffff);
 1723                 } else {
 1724                         int tries = 5;
 1725 
 1726                         while((rxstat == 0xff) && --tries)
 1727                                 ar_packet_avail(sc, &len, &rxstat);
 1728 
 1729                         /*
 1730                          * It look like we get an interrupt early
 1731                          * sometimes and then the status is not
 1732                          * filled in yet.
 1733                          */
 1734                         if(tries && (tries != 5))
 1735                                 continue;
 1736 
 1737                         ar_eat_packet(sc, 1);
 1738 
 1739 #ifndef NETGRAPH
 1740                         SC2IFP(sc)->if_ierrors++;
 1741 #else   /* NETGRAPH */
 1742                         sc->ierrors[0]++;
 1743 #endif  /* NETGRAPH */
 1744 
 1745                         if(sc->hc->bustype == AR_BUS_ISA)
 1746                                 ARC_SET_SCA(sc->hc, sc->scano);
 1747 
 1748                         TRCL(printf("ar%d: Receive error chan %d, "
 1749                                         "stat %x, msci st3 %x,"
 1750                                         "rxhind %d, cda %x, eda %x.\n",
 1751                                         sc->unit,
 1752                                         sc->scachan, 
 1753                                         rxstat,
 1754                                         sc->sca->msci[sc->scachan].st3,
 1755                                         sc->rxhind,
 1756                                         sc->sca->dmac[
 1757                                                 DMAC_RXCH(sc->scachan)].cda,
 1758                                         sc->sca->dmac[
 1759                                                 DMAC_RXCH(sc->scachan)].eda));
 1760                 }
 1761         }
 1762 }
 1763 
 1764 
 1765 /*
 1766  * All DMA interrupts come here.
 1767  *
 1768  * Each channel has two interrupts.
 1769  * Interrupt A for errors and Interrupt B for normal stuff like end
 1770  * of transmit or receive dmas.
 1771  */
 1772 static void
 1773 ar_dmac_intr(struct ar_hardc *hc, int scano, u_char isr1)
 1774 {
 1775         u_char dsr;
 1776         u_char dotxstart = isr1;
 1777         int mch;
 1778         struct ar_softc *sc;
 1779         sca_regs *sca;
 1780         dmac_channel *dmac;
 1781 
 1782         sca = hc->sca[scano];
 1783         mch = 0;
 1784         /*
 1785          * Shortcut if there is no interrupts for dma channel 0 or 1
 1786          */
 1787         if((isr1 & 0x0F) == 0) {
 1788                 mch = 1;
 1789                 isr1 >>= 4;
 1790         }
 1791 
 1792         do {
 1793                 sc = &hc->sc[mch + (NCHAN * scano)];
 1794 
 1795                 /*
 1796                  * Transmit channel
 1797                  */
 1798                 if(isr1 & 0x0C) {
 1799                         dmac = &sca->dmac[DMAC_TXCH(mch)];
 1800 
 1801                         if(hc->bustype == AR_BUS_ISA)
 1802                                 ARC_SET_SCA(hc, scano);
 1803 
 1804                         dsr = dmac->dsr;
 1805                         dmac->dsr = dsr;
 1806 
 1807                         /* Counter overflow */
 1808                         if(dsr & SCA_DSR_COF) {
 1809                                 printf("ar%d: TX DMA Counter overflow, "
 1810                                         "txpacket no %lu.\n",
 1811                                         sc->unit,
 1812 #ifndef NETGRAPH
 1813                                         SC2IFP(sc)->if_opackets);
 1814                                 SC2IFP(sc)->if_oerrors++;
 1815 #else   /* NETGRAPH */
 1816                                         sc->opackets);
 1817                                 sc->oerrors++;
 1818 #endif  /* NETGRAPH */
 1819                         }
 1820 
 1821                         /* Buffer overflow */
 1822                         if(dsr & SCA_DSR_BOF) {
 1823                                 printf("ar%d: TX DMA Buffer overflow, "
 1824                                         "txpacket no %lu, dsr %02x, "
 1825                                         "cda %04x, eda %04x.\n",
 1826                                         sc->unit,
 1827 #ifndef NETGRAPH
 1828                                         SC2IFP(sc)->if_opackets,
 1829 #else   /* NETGRAPH */
 1830                                         sc->opackets,
 1831 #endif  /* NETGRAPH */
 1832                                         dsr,
 1833                                         dmac->cda,
 1834                                         dmac->eda);
 1835 #ifndef NETGRAPH
 1836                                 SC2IFP(sc)->if_oerrors++;
 1837 #else   /* NETGRAPH */
 1838                                 sc->oerrors++;
 1839 #endif  /* NETGRAPH */
 1840                         }
 1841 
 1842                         /* End of Transfer */
 1843                         if(dsr & SCA_DSR_EOT) {
 1844                                 /*
 1845                                  * This should be the most common case.
 1846                                  *
 1847                                  * Clear the IFF_DRV_OACTIVE flag.
 1848                                  *
 1849                                  * Call arstart to start a new transmit if
 1850                                  * there is data to transmit.
 1851                                  */
 1852                                 sc->xmit_busy = 0;
 1853 #ifndef NETGRAPH
 1854                                 SC2IFP(sc)->if_drv_flags &= ~IFF_DRV_OACTIVE;
 1855                                 SC2IFP(sc)->if_timer = 0;
 1856 #else   /* NETGRAPH */
 1857                         /* XXX  SC2IFP(sc)->if_drv_flags &= ~IFF_DRV_OACTIVE; */
 1858                                 sc->out_dog = 0; /* XXX */
 1859 #endif  /* NETGRAPH */
 1860 
 1861                                 if(sc->txb_inuse && --sc->txb_inuse)
 1862                                         ar_xmit(sc);
 1863                         }
 1864                 }
 1865 
 1866                 /*
 1867                  * Receive channel
 1868                  */
 1869                 if(isr1 & 0x03) {
 1870                         dmac = &sca->dmac[DMAC_RXCH(mch)];
 1871 
 1872                         if(hc->bustype == AR_BUS_ISA)
 1873                                 ARC_SET_SCA(hc, scano);
 1874 
 1875                         dsr = dmac->dsr;
 1876                         dmac->dsr = dsr;
 1877 
 1878                         TRC(printf("AR: RX DSR %x\n", dsr));
 1879 
 1880                         /* End of frame */
 1881                         if(dsr & SCA_DSR_EOM) {
 1882                                 TRC(int tt = SC2IFP(sc)->if_ipackets;)
 1883                                 TRC(int ind = sc->rxhind;)
 1884 
 1885                                 ar_get_packets(sc);
 1886 #ifndef NETGRAPH
 1887 #define IPACKETS SC2IFP(sc)->if_ipackets
 1888 #else   /* NETGRAPH */
 1889 #define IPACKETS sc->ipackets
 1890 #endif  /* NETGRAPH */
 1891                                 TRC(if(tt == IPACKETS) {
 1892                                         sca_descriptor *rxdesc;
 1893                                         int i;
 1894 
 1895                                         if(hc->bustype == AR_BUS_ISA)
 1896                                                 ARC_SET_SCA(hc, scano);
 1897                                         printf("AR: RXINTR isr1 %x, dsr %x, "
 1898                                                "no data %d pkts, orxhind %d.\n",
 1899                                                dotxstart,
 1900                                                dsr,
 1901                                                tt,
 1902                                                ind);
 1903                                         printf("AR: rxdesc %x, rxstart %x, "
 1904                                                "rxend %x, rxhind %d, "
 1905                                                "rxmax %d.\n",
 1906                                                sc->rxdesc,
 1907                                                sc->rxstart,
 1908                                                sc->rxend,
 1909                                                sc->rxhind,
 1910                                                sc->rxmax);
 1911                                         printf("AR: cda %x, eda %x.\n",
 1912                                                dmac->cda,
 1913                                                dmac->eda);
 1914 
 1915                                         if(sc->hc->bustype == AR_BUS_ISA)
 1916                                                 ARC_SET_MEM(sc->hc,
 1917                                                     sc->rxdesc);
 1918                                         rxdesc = (sca_descriptor *)
 1919                                                  (sc->hc->mem_start +
 1920                                                   (sc->rxdesc & sc->hc->winmsk));
 1921                                         rxdesc = &rxdesc[sc->rxhind];
 1922                                         for(i=0;i<3;i++,rxdesc++)
 1923                                                 printf("AR: rxdesc->stat %x, "
 1924                                                         "len %d.\n",
 1925                                                         rxdesc->stat,
 1926                                                         rxdesc->len);
 1927                                 })
 1928                         }
 1929 
 1930                         /* Counter overflow */
 1931                         if(dsr & SCA_DSR_COF) {
 1932                                 printf("ar%d: RX DMA Counter overflow, "
 1933                                         "rxpkts %lu.\n",
 1934                                         sc->unit,
 1935 #ifndef NETGRAPH
 1936                                         SC2IFP(sc)->if_ipackets);
 1937                                 SC2IFP(sc)->if_ierrors++;
 1938 #else   /* NETGRAPH */
 1939                                         sc->ipackets);
 1940                                 sc->ierrors[1]++;
 1941 #endif  /* NETGRAPH */
 1942                         }
 1943 
 1944                         /* Buffer overflow */
 1945                         if(dsr & SCA_DSR_BOF) {
 1946                                 if(hc->bustype == AR_BUS_ISA)
 1947                                         ARC_SET_SCA(hc, scano);
 1948                                 printf("ar%d: RX DMA Buffer overflow, "
 1949                                         "rxpkts %lu, rxind %d, "
 1950                                         "cda %x, eda %x, dsr %x.\n",
 1951                                         sc->unit,
 1952 #ifndef NETGRAPH
 1953                                         SC2IFP(sc)->if_ipackets,
 1954 #else   /* NETGRAPH */
 1955                                         sc->ipackets,
 1956 #endif  /* NETGRAPH */
 1957                                         sc->rxhind,
 1958                                         dmac->cda,
 1959                                         dmac->eda,
 1960                                         dsr);
 1961                                 /*
 1962                                  * Make sure we eat as many as possible.
 1963                                  * Then get the system running again.
 1964                                  */
 1965                                 ar_eat_packet(sc, 0);
 1966 #ifndef NETGRAPH
 1967                                 SC2IFP(sc)->if_ierrors++;
 1968 #else   /* NETGRAPH */
 1969                                 sc->ierrors[2]++;
 1970 #endif  /* NETGRAPH */
 1971                                 if(hc->bustype == AR_BUS_ISA)
 1972                                         ARC_SET_SCA(hc, scano);
 1973                                 sca->msci[mch].cmd = SCA_CMD_RXMSGREJ;
 1974                                 dmac->dsr = SCA_DSR_DE;
 1975 
 1976                                 TRC(printf("ar%d: RX DMA Buffer overflow, "
 1977                                         "rxpkts %lu, rxind %d, "
 1978                                         "cda %x, eda %x, dsr %x. After\n",
 1979                                         sc->unit,
 1980                                         SC2IFP(sc)->if_ipackets,
 1981                                         sc->rxhind,
 1982                                         dmac->cda,
 1983                                         dmac->eda,
 1984                                         dmac->dsr);)
 1985                         }
 1986 
 1987                         /* End of Transfer */
 1988                         if(dsr & SCA_DSR_EOT) {
 1989                                 /*
 1990                                  * If this happen, it means that we are
 1991                                  * receiving faster than what the processor
 1992                                  * can handle.
 1993                                  *
 1994                                  * XXX We should enable the dma again.
 1995                                  */
 1996                                 printf("ar%d: RX End of transfer, rxpkts %lu.\n",
 1997                                         sc->unit,
 1998 #ifndef NETGRAPH
 1999                                         SC2IFP(sc)->if_ipackets);
 2000                                 SC2IFP(sc)->if_ierrors++;
 2001 #else   /* NETGRAPH */
 2002                                         sc->ipackets);
 2003                                 sc->ierrors[3]++;
 2004 #endif  /* NETGRAPH */
 2005                         }
 2006                 }
 2007 
 2008                 isr1 >>= 4;
 2009 
 2010                 mch++;
 2011         }while((mch<NCHAN) && isr1);
 2012 
 2013         /*
 2014          * Now that we have done all the urgent things, see if we
 2015          * can fill the transmit buffers.
 2016          */
 2017         for(mch = 0; mch < NCHAN; mch++) {
 2018                 if(dotxstart & 0x0C) {
 2019                         sc = &hc->sc[mch + (NCHAN * scano)];
 2020 #ifndef NETGRAPH
 2021                         arstart(SC2IFP(sc));
 2022 #else   /* NETGRAPH */
 2023                         arstart(sc);
 2024 #endif  /* NETGRAPH */
 2025                 }
 2026                 dotxstart >>= 4;
 2027         }
 2028 }
 2029 
 2030 static void
 2031 ar_msci_intr(struct ar_hardc *hc, int scano, u_char isr0)
 2032 {
 2033         printf("arc%d: ARINTR: MSCI\n", hc->cunit);
 2034 }
 2035 
 2036 static void
 2037 ar_timer_intr(struct ar_hardc *hc, int scano, u_char isr2)
 2038 {
 2039         printf("arc%d: ARINTR: TIMER\n", hc->cunit);
 2040 }
 2041 
 2042 
 2043 #ifdef  NETGRAPH
 2044 /*****************************************
 2045  * Device timeout/watchdog routine.
 2046  * called once per second.
 2047  * checks to see that if activity was expected, that it hapenned.
 2048  * At present we only look to see if expected output was completed.
 2049  */
 2050 static void
 2051 ngar_watchdog_frame(void * arg)
 2052 {
 2053         struct ar_softc * sc = arg;
 2054         int s;
 2055         int     speed;
 2056 
 2057         if(sc->running == 0)
 2058                 return; /* if we are not running let timeouts die */
 2059         /*
 2060          * calculate the apparent throughputs 
 2061          *  XXX a real hack
 2062          */
 2063         s = splimp();
 2064         speed = sc->inbytes - sc->lastinbytes;
 2065         sc->lastinbytes = sc->inbytes;
 2066         if ( sc->inrate < speed )
 2067                 sc->inrate = speed;
 2068         speed = sc->outbytes - sc->lastoutbytes;
 2069         sc->lastoutbytes = sc->outbytes;
 2070         if ( sc->outrate < speed )
 2071                 sc->outrate = speed;
 2072         sc->inlast++;
 2073         splx(s);
 2074 
 2075         if ((sc->inlast > QUITE_A_WHILE)
 2076         && (sc->out_deficit > LOTS_OF_PACKETS)) {
 2077                 log(LOG_ERR, "ar%d: No response from remote end\n", sc->unit);
 2078                 s = splimp();
 2079                 ar_down(sc);
 2080                 ar_up(sc);
 2081                 sc->inlast = sc->out_deficit = 0;
 2082                 splx(s);
 2083         } else if ( sc->xmit_busy ) { /* no TX -> no TX timeouts */
 2084                 if (sc->out_dog == 0) { 
 2085                         log(LOG_ERR, "ar%d: Transmit failure.. no clock?\n",
 2086                                         sc->unit);
 2087                         s = splimp();
 2088                         arwatchdog(sc);
 2089 #if 0
 2090                         ar_down(sc);
 2091                         ar_up(sc);
 2092 #endif
 2093                         splx(s);
 2094                         sc->inlast = sc->out_deficit = 0;
 2095                 } else {
 2096                         sc->out_dog--;
 2097                 }
 2098         }
 2099         sc->handle = timeout(ngar_watchdog_frame, sc, hz);
 2100 }
 2101 
 2102 /***********************************************************************
 2103  * This section contains the methods for the Netgraph interface
 2104  ***********************************************************************/
 2105 /*
 2106  * It is not possible or allowable to create a node of this type.
 2107  * If the hardware exists, it will already have created it.
 2108  */
 2109 static  int
 2110 ngar_constructor(node_p node)
 2111 {
 2112         return (EINVAL);
 2113 }
 2114 
 2115 /*
 2116  * give our ok for a hook to be added...
 2117  * If we are not running this should kick the device into life.
 2118  * The hook's private info points to our stash of info about that
 2119  * channel.
 2120  */
 2121 static int
 2122 ngar_newhook(node_p node, hook_p hook, const char *name)
 2123 {
 2124         struct ar_softc *       sc = NG_NODE_PRIVATE(node);
 2125 
 2126         /*
 2127          * check if it's our friend the debug hook
 2128          */
 2129         if (strcmp(name, NG_AR_HOOK_DEBUG) == 0) {
 2130                 NG_HOOK_SET_PRIVATE(hook, NULL); /* paranoid */
 2131                 sc->debug_hook = hook;
 2132                 return (0);
 2133         }
 2134 
 2135         /*
 2136          * Check for raw mode hook.
 2137          */
 2138         if (strcmp(name, NG_AR_HOOK_RAW) != 0) {
 2139                 return (EINVAL);
 2140         }
 2141         NG_HOOK_SET_PRIVATE(hook, sc);
 2142         sc->hook = hook;
 2143         sc->datahooks++;
 2144         ar_up(sc);
 2145         return (0);
 2146 }
 2147 
 2148 /*
 2149  * incoming messages.
 2150  * Just respond to the generic TEXT_STATUS message
 2151  */
 2152 static  int
 2153 ngar_rcvmsg(node_p node, item_p item, hook_p lasthook)
 2154 {
 2155         struct ar_softc *       sc;
 2156         struct ng_mesg *resp = NULL;
 2157         int error = 0;
 2158         struct ng_mesg *msg;
 2159 
 2160         NGI_GET_MSG(item, msg);
 2161         sc = NG_NODE_PRIVATE(node);
 2162         switch (msg->header.typecookie) {
 2163         case    NG_AR_COOKIE: 
 2164                 error = EINVAL;
 2165                 break;
 2166         case    NGM_GENERIC_COOKIE: 
 2167                 switch(msg->header.cmd) {
 2168                 case NGM_TEXT_STATUS: {
 2169                         char        *arg;
 2170                         int pos = 0;
 2171 
 2172                         int resplen = sizeof(struct ng_mesg) + 512;
 2173                         NG_MKRESPONSE(resp, msg, resplen, M_NOWAIT);
 2174                         if (resp == NULL) {
 2175                                 error = ENOMEM;
 2176                                 break;
 2177                         }
 2178                         arg = (resp)->data;
 2179                         pos = sprintf(arg, "%ld bytes in, %ld bytes out\n"
 2180                             "highest rate seen: %ld B/S in, %ld B/S out\n",
 2181                         sc->inbytes, sc->outbytes,
 2182                         sc->inrate, sc->outrate);
 2183                         pos += sprintf(arg + pos,
 2184                                 "%ld output errors\n",
 2185                                 sc->oerrors);
 2186                         pos += sprintf(arg + pos,
 2187                                 "ierrors = %ld, %ld, %ld, %ld\n",
 2188                                 sc->ierrors[0],
 2189                                 sc->ierrors[1],
 2190                                 sc->ierrors[2],
 2191                                 sc->ierrors[3]);
 2192 
 2193                         resp->header.arglen = pos + 1;
 2194                         break;
 2195                       }
 2196                 default:
 2197                         error = EINVAL;
 2198                         break;
 2199                     }
 2200                 break;
 2201         default:
 2202                 error = EINVAL;
 2203                 break;
 2204         }
 2205         /* Take care of synchronous response, if any */
 2206         NG_RESPOND_MSG(error, node, item, resp);
 2207         NG_FREE_MSG(msg);
 2208         return (error);
 2209 }
 2210 
 2211 /*
 2212  * get data from another node and transmit it to the correct channel
 2213  */
 2214 static int
 2215 ngar_rcvdata(hook_p hook, item_p item)
 2216 {
 2217         int s;
 2218         int error = 0;
 2219         struct ar_softc * sc = NG_NODE_PRIVATE(NG_HOOK_NODE(hook));
 2220         struct ifqueue  *xmitq_p;
 2221         struct mbuf *m;
 2222         struct ng_tag_prio *ptag;
 2223         
 2224         NGI_GET_M(item, m);
 2225         NG_FREE_ITEM(item);
 2226         /*
 2227          * data doesn't come in from just anywhere (e.g control hook)
 2228          */
 2229         if ( NG_HOOK_PRIVATE(hook) == NULL) {
 2230                 error = ENETDOWN;
 2231                 goto bad;
 2232         }
 2233 
 2234         /* 
 2235          * Now queue the data for when it can be sent
 2236          */
 2237         if ((ptag = (struct ng_tag_prio *)m_tag_locate(m, NGM_GENERIC_COOKIE,
 2238             NG_TAG_PRIO, NULL)) != NULL && (ptag->priority > NG_PRIO_CUTOFF) )
 2239                 xmitq_p = (&sc->xmitq_hipri);
 2240         else
 2241                 xmitq_p = (&sc->xmitq);
 2242 
 2243         s = splimp();
 2244         IF_LOCK(xmitq_p);
 2245         if (_IF_QFULL(xmitq_p)) {
 2246                 _IF_DROP(xmitq_p);
 2247                 IF_UNLOCK(xmitq_p);
 2248                 splx(s);
 2249                 error = ENOBUFS;
 2250                 goto bad;
 2251         }
 2252         _IF_ENQUEUE(xmitq_p, m);
 2253         IF_UNLOCK(xmitq_p);
 2254         arstart(sc);
 2255         splx(s);
 2256         return (0);
 2257 
 2258 bad:
 2259         /* 
 2260          * It was an error case.
 2261          * check if we need to free the mbuf, and then return the error
 2262          */
 2263         NG_FREE_M(m);
 2264         return (error);
 2265 }
 2266 
 2267 /*
 2268  * do local shutdown processing..
 2269  * this node will refuse to go away, unless the hardware says to..
 2270  * don't unref the node, or remove our name. just clear our links up.
 2271  */
 2272 static  int
 2273 ngar_shutdown(node_p node)
 2274 {
 2275         struct ar_softc * sc = NG_NODE_PRIVATE(node);
 2276 
 2277         ar_down(sc);
 2278         NG_NODE_UNREF(node);
 2279         /* XXX need to drain the output queues! */
 2280 
 2281         /* The node is dead, long live the node! */
 2282         /* stolen from the attach routine */
 2283         if (ng_make_node_common(&typestruct, &sc->node) != 0)
 2284                 return (0);
 2285         sprintf(sc->nodename, "%s%d", NG_AR_NODE_TYPE, sc->unit);
 2286         if (ng_name_node(sc->node, sc->nodename)) {
 2287                 sc->node = NULL;
 2288                 printf("node naming failed\n");
 2289                 NG_NODE_UNREF(sc->node); /* node dissappears */
 2290                 return (0);
 2291         }
 2292         NG_NODE_SET_PRIVATE(sc->node, sc);
 2293         sc->running = 0;
 2294         return (0);
 2295 }
 2296 
 2297 /* already linked */
 2298 static  int
 2299 ngar_connect(hook_p hook)
 2300 {
 2301         /* probably not at splnet, force outward queueing */
 2302         NG_HOOK_FORCE_QUEUE(NG_HOOK_PEER(hook));
 2303         /* be really amiable and just say "YUP that's OK by me! " */
 2304         return (0);
 2305 }
 2306 
 2307 /*
 2308  * notify on hook disconnection (destruction)
 2309  *
 2310  * Invalidate the private data associated with this dlci.
 2311  * For this type, removal of the last link resets tries to destroy the node.
 2312  * As the device still exists, the shutdown method will not actually
 2313  * destroy the node, but reset the device and leave it 'fresh' :)
 2314  *
 2315  * The node removal code will remove all references except that owned by the
 2316  * driver. 
 2317  */
 2318 static  int
 2319 ngar_disconnect(hook_p hook)
 2320 {
 2321         struct ar_softc * sc = NG_NODE_PRIVATE(NG_HOOK_NODE(hook));
 2322         int     s;
 2323         /*
 2324          * If it's the data hook, then free resources etc.
 2325          */
 2326         if (NG_HOOK_PRIVATE(hook)) {
 2327                 s = splimp();
 2328                 sc->datahooks--;
 2329                 if (sc->datahooks == 0)
 2330                         ar_down(sc);
 2331                 splx(s);
 2332         } else {
 2333                 sc->debug_hook = NULL;
 2334         }
 2335         return (0);
 2336 }
 2337 #endif /* NETGRAPH */
 2338 
 2339 /*
 2340  ********************************* END ************************************
 2341  */

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