1 /*
2 ******************************************************************************************
3 ** O.S : FreeBSD
4 ** FILE NAME : arcmsr.c
5 ** BY : Erich Chen
6 ** Description: SCSI RAID Device Driver for
7 ** ARECA (ARC1110/1120/1160/1210/1220/1260) SATA RAID HOST Adapter
8 ** ARCMSR RAID Host adapter[RAID controller:INTEL 331(PCI-X) 341(PCI-EXPRESS) chip set]
9 ******************************************************************************************
10 ************************************************************************
11 **
12 ** Copyright (c) 2004-2006 ARECA Co. Ltd.
13 ** Erich Chen, Taipei Taiwan All rights reserved.
14 **
15 ** Redistribution and use in source and binary forms,with or without
16 ** modification,are permitted provided that the following conditions
17 ** are met:
18 ** 1. Redistributions of source code must retain the above copyright
19 ** notice,this list of conditions and the following disclaimer.
20 ** 2. Redistributions in binary form must reproduce the above copyright
21 ** notice,this list of conditions and the following disclaimer in the
22 ** documentation and/or other materials provided with the distribution.
23 ** 3. The name of the author may not be used to endorse or promote products
24 ** derived from this software without specific prior written permission.
25 **
26 ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
27 ** IMPLIED WARRANTIES,INCLUDING,BUT NOT LIMITED TO,THE IMPLIED WARRANTIES
28 ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
29 ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,INDIRECT,
30 ** INCIDENTAL,SPECIAL,EXEMPLARY,OR CONSEQUENTIAL DAMAGES(INCLUDING,BUT
31 ** NOT LIMITED TO,PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 ** DATA,OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY
33 ** THEORY OF LIABILITY,WHETHER IN CONTRACT,STRICT LIABILITY,OR TORT
34 **(INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF
35 ** THIS SOFTWARE,EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 **************************************************************************
37 ** History
38 **
39 ** REV# DATE NAME DESCRIPTION
40 ** 1.00.00.00 3/31/2004 Erich Chen First release
41 ** 1.20.00.02 11/29/2004 Erich Chen bug fix with arcmsr_bus_reset when PHY error
42 ******************************************************************************************
43 ** $FreeBSD: releng/5.4/sys/dev/arcmsr/arcmsr.c 145708 2005-04-30 15:58:47Z scottl $
44 */
45 #define ARCMSR_DEBUG 1
46 /*
47 **********************************
48 */
49 #include <sys/param.h>
50 #include <sys/systm.h>
51 #include <sys/malloc.h>
52 #include <sys/kernel.h>
53 #include <sys/bus.h>
54 #include <sys/queue.h>
55 #include <sys/stat.h>
56 #include <sys/devicestat.h>
57 #include <sys/kthread.h>
58 #include <sys/module.h>
59 #include <sys/proc.h>
60 #include <sys/lock.h>
61 #include <sys/sysctl.h>
62 #include <sys/poll.h>
63 #include <sys/ioccom.h>
64 #include <vm/vm.h>
65 #include <vm/vm_param.h>
66 #include <vm/pmap.h>
67
68 #include <isa/rtc.h>
69
70 #include <machine/bus_memio.h>
71 #include <machine/bus.h>
72 #include <machine/clock.h>
73 #include <machine/resource.h>
74 #include <machine/atomic.h>
75 #include <sys/conf.h>
76 #include <sys/rman.h>
77
78 #include <cam/cam.h>
79 #include <cam/cam_ccb.h>
80 #include <cam/cam_sim.h>
81 #include <cam/cam_xpt_sim.h>
82 #include <cam/cam_debug.h>
83 #include <cam/scsi/scsi_all.h>
84 #include <cam/scsi/scsi_message.h>
85 /*
86 **************************************************************************
87 ** Define the OS version specific locks
88 **************************************************************************
89 */
90 #if __FreeBSD_version >= 500005
91 #include <sys/selinfo.h>
92 #include <sys/mutex.h>
93 #include <dev/pci/pcivar.h>
94 #include <dev/pci/pcireg.h>
95 #define ARCMSR_LOCK_INIT(l, s) mtx_init(l, s,NULL, MTX_DEF|MTX_RECURSE)
96 #define ARCMSR_LOCK_ACQUIRE(l) mtx_lock(l)
97 #define ARCMSR_LOCK_RELEASE(l) mtx_unlock(l)
98 typedef struct mtx arcmsr_lock_t;
99 #else
100 #include <sys/select.h>
101 #include <pci/pcivar.h>
102 #include <pci/pcireg.h>
103 #define ARCMSR_LOCK_INIT(l, s) simple_lock_init(l)
104 #define ARCMSR_LOCK_ACQUIRE(l) simple_lock(l)
105 #define ARCMSR_LOCK_RELEASE(l) simple_unlock(l)
106 typedef struct simplelock arcmsr_lock_t;
107 #endif
108 #include <dev/arcmsr/arcmsr.h>
109 /*
110 **************************************************************************
111 ** __FreeBSD_version 502010
112 **************************************************************************
113 */
114 static VOID arcmsr_interrupt(VOID *arg);
115 static LONG arcmsr_probe(device_t dev);
116 static LONG arcmsr_attach(device_t dev);
117 static LONG arcmsr_detach(device_t dev);
118 static VOID arcmsr_shutdown(device_t dev);
119 #if 0
120 ULONG arcmsr_make_timespec(ULONG year,ULONG mon,ULONG day,ULONG hour,ULONG min,ULONG sec);
121 ULONG arcmsr_getcmos_time(VOID);
122 #endif
123 LONG arcmsr_queue_dpc(PACB pACB,DPCFUN dpcfun,VOID *arg);
124 LONG arcmsr_iop_ioctlcmd(PACB pACB,ULONG ioctl_cmd,caddr_t arg);
125 BOOLEAN arcmsr_seek_cmd2abort(union ccb * pabortccb);
126 BOOLEAN arcmsr_wait_msgint_ready(PACB pACB);
127 PSRB arcmsr_get_freesrb(PACB pACB);
128 VOID arcmsr_free_resource(PACB pACB);
129 VOID arcmsr_bus_reset(PACB pACB);
130 VOID arcmsr_stop_adapter_bgrb(PACB pACB);
131 VOID arcmsr_start_adapter_bgrb(PACB pACB);
132 VOID arcmsr_iop_init(PACB pACB);
133 VOID arcmsr_do_dpcQ(PACB pACB);
134 VOID arcmsr_flush_adapter_cache(PACB pACB);
135 VOID arcmsr_do_thread_works(VOID *arg);
136 VOID arcmsr_queue_wait2go_srb(PACB pACB,PSRB pSRB);
137 VOID arcmsr_post_wait2go_srb(PACB pACB);
138 VOID arcmsr_post_Qbuffer(PACB pACB);
139 VOID arcmsr_abort_allcmd(PACB pACB);
140 VOID arcmsr_srb_complete(PSRB pSRB);
141 VOID arcmsr_iop_reset(PACB pACB);
142 VOID arcmsr_report_SenseInfoBuffer(PSRB pSRB);
143 VOID arcmsr_build_srb(PSRB pSRB, bus_dma_segment_t *dm_segs, LONG nseg);
144 /*
145 *****************************************************************************************
146 ** Character device switch table
147 **struct cdevsw {
148 ** d_open_t *d_open;
149 ** d_close_t *d_close;
150 ** d_read_t *d_read;
151 ** d_write_t *d_write;
152 ** d_ioctl_t *d_ioctl;
153 ** d_poll_t *d_poll;
154 ** d_mmap_t *d_mmap;
155 ** d_strategy_t *d_strategy;
156 ** const char *d_name; "" base device name, e.g. 'vn'
157 ** int d_maj;
158 ** d_dump_t *d_dump;
159 ** d_psize_t *d_psize;
160 ** u_int d_flags;
161 ** int d_bmaj;
162 ** d_kqfilter_t *d_kqfilter; "" additions below are not binary compatible with 4.2 and below
163 **};
164 ******************************************************************************************
165 */
166 /*
167 **************************************************************************
168 ** Insert a delay in micro-seconds and milli-seconds.
169 ** static void MDELAY(LONG ms) { while (ms--) UDELAY(1000); }
170 **************************************************************************
171 */
172 static VOID UDELAY(LONG us) { DELAY(us); }
173 /*
174 **************************************************************************
175 **
176 **************************************************************************
177 */
178 static bus_dmamap_callback_t arcmsr_map_freesrb;
179 static bus_dmamap_callback_t arcmsr_executesrb;
180 /*
181 **************************************************************************
182 **
183 **************************************************************************
184 */
185 static d_open_t arcmsr_open;
186 static d_close_t arcmsr_close;
187 static d_ioctl_t arcmsr_ioctl;
188
189 static device_method_t arcmsr_methods[]={
190 DEVMETHOD(device_probe, arcmsr_probe),
191 DEVMETHOD(device_attach, arcmsr_attach),
192 DEVMETHOD(device_detach, arcmsr_detach),
193 DEVMETHOD(device_shutdown, arcmsr_shutdown),
194 { 0,0 }
195 };
196
197 static driver_t arcmsr_driver={
198 "arcmsr",arcmsr_methods,sizeof(struct _ACB)
199 };
200
201 static devclass_t arcmsr_devclass;
202 DRIVER_MODULE(arcmsr,pci,arcmsr_driver,arcmsr_devclass,0,0);
203
204 #if __FreeBSD_version >= 502010
205 static struct cdevsw arcmsr_cdevsw={
206 .d_version = D_VERSION,
207 .d_flags = D_NEEDGIANT,
208 .d_open = arcmsr_open, /* open */
209 .d_close = arcmsr_close, /* close */
210 .d_ioctl = arcmsr_ioctl, /* ioctl */
211 .d_name = "arcmsr", /* name */
212 };
213 #else
214 #define ARCMSR_CDEV_MAJOR 180
215
216 static struct cdevsw arcmsr_cdevsw = {
217 arcmsr_open, /* open */
218 arcmsr_close, /* close */
219 noread, /* read */
220 nowrite, /* write */
221 arcmsr_ioctl, /* ioctl */
222 nopoll, /* poll */
223 nommap, /* mmap */
224 nostrategy, /* strategy */
225 "arcmsr", /* name */
226 ARCMSR_CDEV_MAJOR, /* major */
227 nodump, /* dump */
228 nopsize, /* psize */
229 0 /* flags */
230 };
231 #endif
232
233 #if __FreeBSD_version < 500005
234 static int arcmsr_open(dev_t dev, int flags, int fmt, struct proc *proc)
235 #else
236 #if __FreeBSD_version < 503000
237 static int arcmsr_open(dev_t dev, int flags, int fmt, struct thread *proc)
238 #else
239 static int arcmsr_open(struct cdev *dev, int flags, int fmt, d_thread_t *proc)
240 #endif
241 #endif
242 {
243 #if __FreeBSD_version < 503000
244 PACB pACB=dev->si_drv1;
245 #else
246 int unit = minor(dev);
247 PACB pACB = devclass_get_softc(arcmsr_devclass, unit);
248 #endif
249
250 if(pACB==NULL)
251 {
252 return ENXIO;
253 }
254 /* Check to make sure the device isn't already open */
255 if (pACB->acb_flags & ACB_F_IOCTL_OPEN)
256 {
257 return EBUSY;
258 }
259 pACB->acb_flags |= ACB_F_IOCTL_OPEN;
260 return 0;
261 }
262 /*
263 **************************************************************************
264 **************************************************************************
265 */
266 #if __FreeBSD_version < 500005
267 static int arcmsr_close(dev_t dev, int flags, int fmt, struct proc *proc)
268 #else
269 #if __FreeBSD_version < 503000
270 static int arcmsr_close(dev_t dev, int flags, int fmt, struct thread *proc)
271 #else
272 static int arcmsr_close(struct cdev *dev, int flags, int fmt, d_thread_t *proc)
273 #endif
274 #endif
275 {
276 #if __FreeBSD_version < 503000
277 PACB pACB=dev->si_drv1;
278 #else
279 int unit = minor(dev);
280 PACB pACB = devclass_get_softc(arcmsr_devclass, unit);
281 #endif
282
283 if(pACB==NULL)
284 {
285 return ENXIO;
286 }
287 pACB->acb_flags &= ~ACB_F_IOCTL_OPEN;
288 return 0;
289 }
290 /*
291 **************************************************************************
292 **ENOENT
293 **ENOIOCTL
294 **ENOMEM
295 **EINVAL
296 **************************************************************************
297 */
298 #if __FreeBSD_version < 500005
299 static int arcmsr_ioctl(dev_t dev, u_long ioctl_cmd, caddr_t arg, int flags, struct proc *proc)
300 #else
301 #if __FreeBSD_version < 503000
302 static int arcmsr_ioctl(dev_t dev, u_long ioctl_cmd, caddr_t arg, int flags, struct thread *proc)
303 #else
304 static int arcmsr_ioctl(struct cdev *dev, u_long ioctl_cmd, caddr_t arg,int flags, d_thread_t *proc)
305 #endif
306 #endif
307 {
308 #if __FreeBSD_version < 503000
309 PACB pACB=dev->si_drv1;
310 #else
311 int unit = minor(dev);
312 PACB pACB = devclass_get_softc(arcmsr_devclass, unit);
313 #endif
314
315 if(pACB==NULL)
316 {
317 return ENXIO;
318 }
319 return(arcmsr_iop_ioctlcmd(pACB,ioctl_cmd,arg));
320 }
321 /*
322 **************************************************************************
323 **************************************************************************
324 */
325 LONG arcmsr_queue_dpc(PACB pACB,DPCFUN dpcfun,VOID *arg)
326 {
327 ULONG s;
328 UCHAR index_pointer;
329
330 #if ARCMSR_DEBUG0
331 printf("arcmsr_queue_dpc................. \n");
332 #endif
333
334 s=splcam();
335 index_pointer=(pACB->dpcQ_tail + 1) % ARCMSR_MAX_DPC;
336 if(index_pointer==pACB->dpcQ_head)
337 {
338 splx(s);
339 printf("DPC Queue full!\n");
340 return -1;
341 }
342 pACB->dpcQ[pACB->dpcQ_tail].dpcfun=dpcfun;
343 pACB->dpcQ[pACB->dpcQ_tail].arg=arg;
344 pACB->dpcQ_tail=index_pointer;
345 /*
346 *********************************************************
347 *********************************************************
348 */
349 wakeup(pACB->kthread_proc);
350
351 splx(s);
352 return 0;
353 }
354 /*
355 **************************************************************************
356 ** arcmsr_do_dpcQ
357 ** execute dpc routine by kernel thread
358 ***************************************************************************
359 */
360 VOID arcmsr_do_dpcQ(PACB pACB)
361 {
362 #if ARCMSR_DEBUG0
363 printf("arcmsr_do_dpcQ................. \n");
364 #endif
365 /*
366 ******************************************
367 ******************************************
368 */
369 while (pACB->dpcQ_head!=pACB->dpcQ_tail)
370 {
371 ULONG s;
372 DPC dpc;
373
374 /* got a "dpc routine" */
375 s=splcam();
376 dpc=pACB->dpcQ[pACB->dpcQ_head];
377 pACB->dpcQ_head++;
378 pACB->dpcQ_head %=ARCMSR_MAX_DPC;
379 splx(s);
380 /* execute this "dpc routine" */
381 dpc.dpcfun(dpc.arg);
382 }
383 return;
384 }
385 #if 0
386 /*
387 **********************************************************************
388 ** <second> bit 05,04,03,02,01,00: 0 - 59
389 ** <minute> bit 11,10,09,08,07,06: 0 - 59
390 ** <month> bit 15,14,13,12: 1 - 12
391 ** <hour> bit 21,20,19,18,17,16: 0 - 59
392 ** <day> bit 26,25,24,23,22: 1 - 31
393 ** <year> bit 31,30,29,28,27: 0=2000,31=2031
394 **********************************************************************
395 */
396 ULONG arcmsr_make_timespec(ULONG year,ULONG mon,ULONG day,ULONG hour,ULONG min,ULONG sec)
397 {
398 return((year<<27)|(day<<22)|(hour<<16)|(mon<<12)|(min<<6)|(sec));
399 }
400 /*
401 ********************************************************************
402 ********************************************************************
403 */
404 ULONG arcmsr_getcmos_time(VOID)
405 {
406 ULONG year,mon,day,hour,min,sec;
407
408 #if ARCMSR_DEBUG0
409 printf("arcmsr_getcmos_time \n");
410 #endif
411 sec=bcd2bin(rtcin(RTC_SEC));
412 min=bcd2bin(rtcin(RTC_MIN));
413 hour=bcd2bin(rtcin(RTC_HRS));
414 day=bcd2bin(rtcin(RTC_DAY));
415 mon=bcd2bin(rtcin(RTC_MONTH));
416 year=bcd2bin(rtcin(RTC_YEAR));
417 if((year +=1900) < 1970)
418 year +=100;
419 return arcmsr_make_timespec(year,mon,day,hour,min,sec);
420 }
421 #endif
422 /*
423 *********************************************************************************
424 ** Asynchronous notification handler.
425 *********************************************************************************
426 */
427 static VOID arcmsr_async(VOID *cb_arg, ULONG code, struct cam_path *path, VOID *arg)
428 {
429 PACB pACB;
430 UCHAR target_id,target_lun;
431 struct cam_sim *sim;
432 ULONG s;
433 #if ARCMSR_DEBUG0
434 printf("arcmsr_async.......................................... \n");
435 #endif
436 s=splcam();
437
438 sim=(struct cam_sim *) cb_arg;
439 pACB =(PACB) cam_sim_softc(sim);
440 switch (code)
441 {
442 case AC_LOST_DEVICE:
443 target_id=xpt_path_target_id(path);
444 target_lun=xpt_path_lun_id(path);
445 if((target_id > ARCMSR_MAX_TARGETID) || (target_lun > ARCMSR_MAX_TARGETLUN))
446 {
447 break;
448 }
449 printf("%s:scsi id%d lun%d device lost \n",device_get_name(pACB->pci_dev),target_id,target_lun);
450 break;
451 default:
452 break;
453 }
454 splx(s);
455 }
456 /*
457 **************************************************************************
458 * arcmsr_do_thread_works
459 * execute programs schedule by kernel thread
460 * execute programs schedule by kernel thread
461 * :do background rebuilding
462 *
463 * tsleep(void *ident,int priority,const char *wmesg,int timo)
464 * tsleep()
465 * General sleep call. Suspends the current process until a wakeup is
466 * performed on the specified identifier. The process will then be made
467 * runnable with the specified priority. Sleeps at most timo/hz seconds
468 * (0 means no timeout). If pri includes PCATCH flag, signals are checked
469 * before and after sleeping, else signals are not checked. Returns 0 if
470 * awakened, EWOULDBLOCK if the timeout expires. If PCATCH is set and a
471 * signal needs to be delivered, ERESTART is returned if the current system
472 * call should be restarted if possible, and EINTR is returned if the system
473 * call should be interrupted by the signal (return EINTR).
474 *
475 * await(int priority, int timo)
476 * await() - wait for async condition to occur. The process blocks until
477 * wakeup() is called on the most recent asleep() address. If wakeup is called
478 * priority to await(), await() winds up being a NOP.
479 *
480 * If await() is called more then once (without an intervening asleep() call),
481 * await() is still effectively a NOP but it calls mi_switch() to give other
482 * processes some cpu before returning. The process is left runnable.
483 *
484 * <<<<<<<< EXPERIMENTAL, UNTESTED >>>>>>>>>>
485 * asleep(void *ident, int priority, const char *wmesg, int timo)
486 * asleep() - async sleep call. Place process on wait queue and return
487 * immediately without blocking. The process stays runnable until await()
488 * is called. If ident is NULL, remove process from wait queue if it is still
489 * on one.
490 *
491 * Only the most recent sleep condition is effective when making successive
492 * calls to asleep() or when calling tsleep().
493 *
494 * The timeout, if any, is not initiated until await() is called. The sleep
495 * priority, signal, and timeout is specified in the asleep() call but may be
496 * overriden in the await() call.
497 *
498 * <<<<<<<< EXPERIMENTAL, UNTESTED >>>>>>>>>>
499 * :do background rebuilding
500 ***************************************************************************
501 */
502 VOID arcmsr_do_thread_works(VOID *arg)
503 {
504 PACB pACB=(PACB) arg;
505 ARCMSR_LOCK_INIT(&pACB->arcmsr_kthread_lock, "arcmsr kthread lock");
506
507 #if ARCMSR_DEBUG0
508 printf("arcmsr_do_thread_works................. \n");
509 #endif
510
511 ARCMSR_LOCK_ACQUIRE(&pACB->arcmsr_kthread_lock);
512 while(1)
513 {
514 tsleep((caddr_t)pACB->kthread_proc, PRIBIO | PWAIT, "arcmsr", hz/4);/*.25 sec*/
515 /*
516 ** if do_dpcQ_semaphore is signal
517 ** do following works
518 */
519 arcmsr_do_dpcQ(pACB); /*see if there were some dpc routine need to execute*/
520 if(pACB->acb_flags & ACB_F_STOP_THREAD)
521 {
522 ARCMSR_LOCK_RELEASE(&pACB->arcmsr_kthread_lock);
523 break;
524 }
525 }
526 kthread_exit(0);
527 return;
528 }
529 /*
530 ************************************************************************
531 **
532 **
533 ************************************************************************
534 */
535 VOID arcmsr_flush_adapter_cache(PACB pACB)
536 {
537 #if ARCMSR_DEBUG0
538 printf("arcmsr_flush_adapter_cache..............\n");
539 #endif
540 CHIP_REG_WRITE32(&pACB->pmu->inbound_msgaddr0,ARCMSR_INBOUND_MESG0_FLUSH_CACHE);
541 return;
542 }
543 /*
544 **********************************************************************
545 **
546 **
547 **
548 **********************************************************************
549 */
550 BOOLEAN arcmsr_wait_msgint_ready(PACB pACB)
551 {
552 ULONG Index;
553 UCHAR Retries=0x00;
554 do
555 {
556 for(Index=0; Index < 500000; Index++)
557 {
558 if(CHIP_REG_READ32(&pACB->pmu->outbound_intstatus) & ARCMSR_MU_OUTBOUND_MESSAGE0_INT)
559 {
560 CHIP_REG_WRITE32(&pACB->pmu->outbound_intstatus, ARCMSR_MU_OUTBOUND_MESSAGE0_INT);/*clear interrupt*/
561 return TRUE;
562 }
563 /* one us delay */
564 UDELAY(10);
565 }/*max 5 seconds*/
566 }while(Retries++ < 24);/*max 2 minutes*/
567 return FALSE;
568 }
569 /*
570 **********************************************************************
571 **
572 ** Q back this SRB into ACB ArraySRB
573 **
574 **********************************************************************
575 */
576 VOID arcmsr_srb_complete(PSRB pSRB)
577 {
578 ULONG s;
579 PACB pACB=pSRB->pACB;
580 union ccb *pccb=pSRB->pccb;
581
582 #if ARCMSR_DEBUG0
583 printf("arcmsr_srb_complete: pSRB=%p srb_doneindex=%x srb_startindex=%x\n",pSRB,pACB->srb_doneindex,pACB->srb_startindex);
584 #endif
585
586 if ((pccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE)
587 {
588 bus_dmasync_op_t op;
589
590 if ((pccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
591 {
592 op = BUS_DMASYNC_POSTREAD;
593 }
594 else
595 {
596 op = BUS_DMASYNC_POSTWRITE;
597 }
598 bus_dmamap_sync(pACB->buffer_dmat, pSRB->dmamap, op);
599 bus_dmamap_unload(pACB->buffer_dmat, pSRB->dmamap);
600 }
601 s=splcam();
602 atomic_subtract_int(&pACB->srboutstandingcount,1);
603 pSRB->startdone=ARCMSR_SRB_DONE;
604 pSRB->srb_flags=0;
605 pACB->psrbringQ[pACB->srb_doneindex]=pSRB;
606 pACB->srb_doneindex++;
607 pACB->srb_doneindex %= ARCMSR_MAX_FREESRB_NUM;
608 splx(s);
609 xpt_done(pccb);
610 return;
611 }
612 /*
613 **********************************************************************
614 ** if scsi error do auto request sense
615 **********************************************************************
616 */
617 VOID arcmsr_report_SenseInfoBuffer(PSRB pSRB)
618 {
619 union ccb *pccb=pSRB->pccb;
620 PSENSE_DATA psenseBuffer=(PSENSE_DATA)&pccb->csio.sense_data;
621 #if ARCMSR_DEBUG0
622 printf("arcmsr_report_SenseInfoBuffer...........\n");
623 #endif
624
625 pccb->ccb_h.status|=CAM_REQ_CMP;
626 if(psenseBuffer)
627 {
628 memset(psenseBuffer, 0, sizeof(pccb->csio.sense_data));
629 memcpy(psenseBuffer,pSRB->arcmsr_cdb.SenseData,get_min(sizeof(struct _SENSE_DATA),sizeof(pccb->csio.sense_data)));
630 psenseBuffer->ErrorCode=0x70;
631 psenseBuffer->Valid=1;
632 pccb->ccb_h.status|=CAM_AUTOSNS_VALID;
633 }
634 return;
635 }
636 /*
637 *********************************************************************
638 ** to insert pSRB into tail of pACB wait exec srbQ
639 *********************************************************************
640 */
641 VOID arcmsr_queue_wait2go_srb(PACB pACB,PSRB pSRB)
642 {
643 ULONG s;
644 LONG i=0;
645 #if ARCMSR_DEBUG0
646 printf("arcmsr_qtail_wait2go_srb:......................................... \n");
647 #endif
648
649 s=splcam();
650 while(1)
651 {
652 if(pACB->psrbwait2go[i]==NULL)
653 {
654 pACB->psrbwait2go[i]=pSRB;
655 atomic_add_int(&pACB->srbwait2gocount,1);
656 splx(s);
657 return;
658 }
659 i++;
660 i%=ARCMSR_MAX_OUTSTANDING_CMD;
661 }
662 return;
663 }
664 /*
665 *********************************************************************
666 **
667 *********************************************************************
668 */
669 VOID arcmsr_abort_allcmd(PACB pACB)
670 {
671 CHIP_REG_WRITE32(&pACB->pmu->inbound_msgaddr0,ARCMSR_INBOUND_MESG0_ABORT_CMD);
672 return;
673 }
674
675 /*
676 ****************************************************************************
677 ** Routine Description: Reset 80331 iop.
678 ** Arguments:
679 ** Return Value: Nothing.
680 ****************************************************************************
681 */
682 VOID arcmsr_iop_reset(PACB pACB)
683 {
684 PSRB pSRB,pfreesrb;
685 ULONG intmask_org,mask;
686 LONG i=0;
687
688 #if ARCMSR_DEBUG0
689 printf("arcmsr_iop_reset: reset iop controller......................................\n");
690 #endif
691 if(pACB->srboutstandingcount!=0)
692 {
693 /* Q back all outstanding srb into wait exec psrb Q*/
694 #if ARCMSR_DEBUG0
695 printf("arcmsr_iop_reset: srboutstandingcount=%d ...\n",pACB->srboutstandingcount);
696 #endif
697 /* disable all outbound interrupt */
698 intmask_org=CHIP_REG_READ32(&pACB->pmu->outbound_intmask);
699 CHIP_REG_WRITE32(&pACB->pmu->outbound_intmask,intmask_org|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE);
700 /* talk to iop 331 outstanding command aborted*/
701 arcmsr_abort_allcmd(pACB);
702 if(arcmsr_wait_msgint_ready(pACB)!=TRUE)
703 {
704 printf("arcmsr_iop_reset: wait 'abort all outstanding command' timeout.................in \n");
705 }
706 /*clear all outbound posted Q*/
707 for(i=0;i<ARCMSR_MAX_OUTSTANDING_CMD;i++)
708 {
709 CHIP_REG_READ32(&pACB->pmu->outbound_queueport);
710 }
711 pfreesrb=pACB->pfreesrb;
712 for(i=0;i<ARCMSR_MAX_FREESRB_NUM;i++)
713 {
714 pSRB=&pfreesrb[i];
715 if(pSRB->startdone==ARCMSR_SRB_START)
716 {
717 pSRB->startdone=ARCMSR_SRB_ABORTED;
718 pSRB->pccb->ccb_h.status=CAM_REQ_ABORTED;
719 arcmsr_srb_complete(pSRB);
720 }
721 }
722 /* enable all outbound interrupt */
723 mask=~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE|ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE|ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE);
724 CHIP_REG_WRITE32(&pACB->pmu->outbound_intmask,intmask_org & mask);
725 atomic_set_int(&pACB->srboutstandingcount,0);
726 /* post abort all outstanding command message to RAID controller */
727 }
728 i=0;
729 while(pACB->srbwait2gocount > 0)
730 {
731 pSRB=pACB->psrbwait2go[i];
732 if(pSRB!=NULL)
733 {
734 #if ARCMSR_DEBUG0
735 printf("arcmsr_iop_reset:abort command... srbwait2gocount=%d ...\n",pACB->srbwait2gocount);
736 #endif
737 pACB->psrbwait2go[i]=NULL;
738 pSRB->startdone=ARCMSR_SRB_ABORTED;
739 pSRB->pccb->ccb_h.status=CAM_REQ_ABORTED;
740 arcmsr_srb_complete(pSRB);
741 atomic_subtract_int(&pACB->srbwait2gocount,1);
742 }
743 i++;
744 i%=ARCMSR_MAX_OUTSTANDING_CMD;
745 }
746 return;
747 }
748 /*
749 **********************************************************************
750 **
751 ** PAGE_SIZE=4096 or 8192,PAGE_SHIFT=12
752 **********************************************************************
753 */
754 VOID arcmsr_build_srb(PSRB pSRB, bus_dma_segment_t *dm_segs, LONG nseg)
755 {
756 PARCMSR_CDB pARCMSR_CDB=&pSRB->arcmsr_cdb;
757 PCHAR psge=(PCHAR)&pARCMSR_CDB->u;
758 ULONG address_lo,address_hi;
759 union ccb *pccb=pSRB->pccb;
760 struct ccb_scsiio *pcsio=&pccb->csio;
761 LONG arccdbsize=0x30;
762
763 #if ARCMSR_DEBUG0
764 printf("arcmsr_build_srb........................... \n");
765 #endif
766 memset(pARCMSR_CDB,0,sizeof(struct _ARCMSR_CDB));
767 pARCMSR_CDB->Bus=0;
768 pARCMSR_CDB->TargetID=pccb->ccb_h.target_id;
769 pARCMSR_CDB->LUN=pccb->ccb_h.target_lun;
770 pARCMSR_CDB->Function=1;
771 pARCMSR_CDB->CdbLength=(UCHAR)pcsio->cdb_len;
772 pARCMSR_CDB->Context=(CPT2INT)pARCMSR_CDB;
773 bcopy(pcsio->cdb_io.cdb_bytes, pARCMSR_CDB->Cdb, pcsio->cdb_len);
774 if(nseg != 0)
775 {
776 PACB pACB=pSRB->pACB;
777 bus_dmasync_op_t op;
778 LONG length,i,cdb_sgcount=0;
779
780 /* map stor port SG list to our iop SG List.*/
781 for(i=0;i<nseg;i++)
782 {
783 /* Get the physical address of the current data pointer */
784 length=(ULONG) dm_segs[i].ds_len;
785 address_lo=dma_addr_lo32(dm_segs[i].ds_addr);
786 address_hi=dma_addr_hi32(dm_segs[i].ds_addr);
787 if(address_hi==0)
788 {
789 PSG32ENTRY pdma_sg=(PSG32ENTRY)psge;
790 pdma_sg->address=address_lo;
791 pdma_sg->length=length;
792 psge += sizeof(SG32ENTRY);
793 arccdbsize += sizeof(SG32ENTRY);
794 }
795 else
796 {
797 LONG sg64s_size=0,tmplength=length;
798
799 #if ARCMSR_DEBUG0
800 printf("arcmsr_build_srb: !!!!!!!!!!!......address_hi=%x.... \n",address_hi);
801 #endif
802 while(1)
803 {
804 LONG64 span4G,length0;
805 PSG64ENTRY pdma_sg=(PSG64ENTRY)psge;
806
807 span4G=(LONG64)address_lo + tmplength;
808 pdma_sg->addresshigh=address_hi;
809 pdma_sg->address=address_lo;
810 if(span4G > 0x100000000)
811 {
812 /*see if cross 4G boundary*/
813 length0=0x100000000-address_lo;
814 pdma_sg->length=(ULONG)length0|IS_SG64_ADDR;
815 address_hi=address_hi+1;
816 address_lo=0;
817 tmplength=tmplength-(LONG)length0;
818 sg64s_size += sizeof(SG64ENTRY);
819 psge += sizeof(SG64ENTRY);
820 cdb_sgcount++;
821 }
822 else
823 {
824 pdma_sg->length=tmplength|IS_SG64_ADDR;
825 sg64s_size += sizeof(SG64ENTRY);
826 psge += sizeof(SG64ENTRY);
827 break;
828 }
829 }
830 arccdbsize += sg64s_size;
831 }
832 cdb_sgcount++;
833 }
834 pARCMSR_CDB->sgcount=(UCHAR)cdb_sgcount;
835 pARCMSR_CDB->DataLength=pcsio->dxfer_len;
836 if( arccdbsize > 256)
837 {
838 pARCMSR_CDB->Flags|=ARCMSR_CDB_FLAG_SGL_BSIZE;
839 }
840 if((pccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
841 {
842 op=BUS_DMASYNC_PREREAD;
843 }
844 else
845 {
846 op=BUS_DMASYNC_PREWRITE;
847 pARCMSR_CDB->Flags|=ARCMSR_CDB_FLAG_WRITE;
848 pSRB->srb_flags|=SRB_FLAG_WRITE;
849 }
850 bus_dmamap_sync(pACB->buffer_dmat, pSRB->dmamap, op);
851 }
852 #if ARCMSR_DEBUG0
853 printf("arcmsr_build_srb: pSRB=%p cmd=%x xferlength=%d arccdbsize=%d sgcount=%d\n",pSRB,pcsio->cdb_io.cdb_bytes[0],pARCMSR_CDB->DataLength,arccdbsize,pARCMSR_CDB->sgcount);
854 #endif
855 return;
856 }
857 /*
858 **************************************************************************
859 **
860 ** arcmsr_post_srb - Send a protocol specific ARC send postcard to a AIOC .
861 ** handle: Handle of registered ARC protocol driver
862 ** adapter_id: AIOC unique identifier(integer)
863 ** pPOSTCARD_SEND: Pointer to ARC send postcard
864 **
865 ** This routine posts a ARC send postcard to the request post FIFO of a
866 ** specific ARC adapter.
867 **
868 **************************************************************************
869 */
870 static VOID arcmsr_post_srb(PACB pACB,PSRB pSRB)
871 {
872 ULONG cdb_shifted_phyaddr=(ULONG) pSRB->cdb_shifted_phyaddr;
873 PARCMSR_CDB pARCMSR_CDB=(PARCMSR_CDB)&pSRB->arcmsr_cdb;
874
875 #if ARCMSR_DEBUG0
876 printf("arcmsr_post_srb: pSRB=%p cdb_shifted_phyaddr=%x\n",pSRB,cdb_shifted_phyaddr);
877 #endif
878 atomic_add_int(&pACB->srboutstandingcount,1);
879 pSRB->startdone=ARCMSR_SRB_START;
880 if(pARCMSR_CDB->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE)
881 {
882 CHIP_REG_WRITE32(&pACB->pmu->inbound_queueport,cdb_shifted_phyaddr|ARCMSR_SRBPOST_FLAG_SGL_BSIZE);
883 }
884 else
885 {
886 CHIP_REG_WRITE32(&pACB->pmu->inbound_queueport,cdb_shifted_phyaddr);
887 }
888 return;
889 }
890 /*
891 **************************************************************************
892 **
893 **
894 **************************************************************************
895 */
896 VOID arcmsr_post_wait2go_srb(PACB pACB)
897 {
898 ULONG s;
899 PSRB pSRB;
900 LONG i=0;
901 #if ARCMSR_DEBUG0
902 printf("arcmsr_post_wait2go_srb:srbwait2gocount=%d srboutstandingcount=%d\n",pACB->srbwait2gocount,pACB->srboutstandingcount);
903 #endif
904 s=splcam();
905 while((pACB->srbwait2gocount > 0) && (pACB->srboutstandingcount < ARCMSR_MAX_OUTSTANDING_CMD))
906 {
907 pSRB=pACB->psrbwait2go[i];
908 if(pSRB!=NULL)
909 {
910 pACB->psrbwait2go[i]=NULL;
911 arcmsr_post_srb(pACB,pSRB);
912 atomic_subtract_int(&pACB->srbwait2gocount,1);
913 }
914 i++;
915 i%=ARCMSR_MAX_OUTSTANDING_CMD;
916 }
917 splx(s);
918 return;
919 }
920 /*
921 **********************************************************************
922 ** Function: arcmsr_post_Qbuffer
923 ** Output:
924 **********************************************************************
925 */
926 VOID arcmsr_post_Qbuffer(PACB pACB)
927 {
928 ULONG s;
929 PUCHAR pQbuffer;
930 PQBUFFER pwbuffer=(PQBUFFER)&pACB->pmu->ioctl_wbuffer;
931 PUCHAR iop_data=(PUCHAR)pwbuffer->data;
932 LONG allxfer_len=0;
933
934 s=splcam();
935 while((pACB->wqbuf_firstindex!=pACB->wqbuf_lastindex) && (allxfer_len<124))
936 {
937 pQbuffer=&pACB->wqbuffer[pACB->wqbuf_firstindex];
938 memcpy(iop_data,pQbuffer,1);
939 pACB->wqbuf_firstindex++;
940 pACB->wqbuf_firstindex %= ARCMSR_MAX_QBUFFER; /*if last index number set it to 0 */
941 iop_data++;
942 allxfer_len++;
943 }
944 pwbuffer->data_len=allxfer_len;
945 /*
946 ** push inbound doorbell and wait reply at hwinterrupt routine for next Qbuffer post
947 */
948 CHIP_REG_WRITE32(&pACB->pmu->inbound_doorbell,ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK);
949 splx(s);
950 return;
951 }
952 /*
953 ************************************************************************
954 **
955 **
956 ************************************************************************
957 */
958 VOID arcmsr_stop_adapter_bgrb(PACB pACB)
959 {
960 #if ARCMSR_DEBUG0
961 printf("arcmsr_stop_adapter_bgrb..............\n");
962 #endif
963 pACB->acb_flags |= ACB_F_MSG_STOP_BGRB;
964 pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
965 CHIP_REG_WRITE32(&pACB->pmu->inbound_msgaddr0,ARCMSR_INBOUND_MESG0_STOP_BGRB);
966 return;
967 }
968 /*
969 ************************************************************************
970 **
971 **
972 ************************************************************************
973 */
974 static VOID arcmsr_poll(struct cam_sim * psim)
975 {
976 arcmsr_interrupt(cam_sim_softc(psim));
977 return;
978 }
979 /*
980 **********************************************************************
981 ** Function: arcmsr_interrupt
982 ** Output: VOID
983 ** CAM Status field values
984 **typedef enum {
985 ** CAM_REQ_INPROG, CCB request is in progress
986 ** CAM_REQ_CMP, CCB request completed without error
987 ** CAM_REQ_ABORTED, CCB request aborted by the host
988 ** CAM_UA_ABORT, Unable to abort CCB request
989 ** CAM_REQ_CMP_ERR, CCB request completed with an error
990 ** CAM_BUSY, CAM subsytem is busy
991 ** CAM_REQ_INVALID, CCB request was invalid
992 ** CAM_PATH_INVALID, Supplied Path ID is invalid
993 ** CAM_DEV_NOT_THERE, SCSI Device Not Installed/there
994 ** CAM_UA_TERMIO, Unable to terminate I/O CCB request
995 ** CAM_SEL_TIMEOUT, Target Selection Timeout
996 ** CAM_CMD_TIMEOUT, Command timeout
997 ** CAM_SCSI_STATUS_ERROR, SCSI error, look at error code in CCB
998 ** CAM_MSG_REJECT_REC, Message Reject Received
999 ** CAM_SCSI_BUS_RESET, SCSI Bus Reset Sent/Received
1000 ** CAM_UNCOR_PARITY, Uncorrectable parity error occurred
1001 ** CAM_AUTOSENSE_FAIL=0x10, Autosense: request sense cmd fail
1002 ** CAM_NO_HBA, No HBA Detected error
1003 ** CAM_DATA_RUN_ERR, Data Overrun error
1004 ** CAM_UNEXP_BUSFREE, Unexpected Bus Free
1005 ** CAM_SEQUENCE_FAIL, Target Bus Phase Sequence Failure
1006 ** CAM_CCB_LEN_ERR, CCB length supplied is inadequate
1007 ** CAM_PROVIDE_FAIL, Unable to provide requested capability
1008 ** CAM_BDR_SENT, A SCSI BDR msg was sent to target
1009 ** CAM_REQ_TERMIO, CCB request terminated by the host
1010 ** CAM_UNREC_HBA_ERROR, Unrecoverable Host Bus Adapter Error
1011 ** CAM_REQ_TOO_BIG, The request was too large for this host
1012 ** CAM_REQUEUE_REQ,
1013 ** * This request should be requeued to preserve
1014 ** * transaction ordering. This typically occurs
1015 ** * when the SIM recognizes an error that should
1016 ** * freeze the queue and must place additional
1017 ** * requests for the target at the sim level
1018 ** * back into the XPT queue.
1019 **
1020 ** CAM_IDE=0x33, Initiator Detected Error
1021 ** CAM_RESRC_UNAVAIL, Resource Unavailable
1022 ** CAM_UNACKED_EVENT, Unacknowledged Event by Host
1023 ** CAM_MESSAGE_RECV, Message Received in Host Target Mode
1024 ** CAM_INVALID_CDB, Invalid CDB received in Host Target Mode
1025 ** CAM_LUN_INVALID, Lun supplied is invalid
1026 ** CAM_TID_INVALID, Target ID supplied is invalid
1027 ** CAM_FUNC_NOTAVAIL, The requested function is not available
1028 ** CAM_NO_NEXUS, Nexus is not established
1029 ** CAM_IID_INVALID, The initiator ID is invalid
1030 ** CAM_CDB_RECVD, The SCSI CDB has been received
1031 ** CAM_LUN_ALRDY_ENA, The LUN is already eanbeld for target mode
1032 ** CAM_SCSI_BUSY, SCSI Bus Busy
1033 **
1034 ** CAM_DEV_QFRZN=0x40, The DEV queue is frozen w/this err
1035 **
1036 ** Autosense data valid for target
1037 ** CAM_AUTOSNS_VALID=0x80,
1038 ** CAM_RELEASE_SIMQ=0x100, SIM ready to take more commands
1039 ** CAM_SIM_QUEUED =0x200, SIM has this command in it's queue
1040 **
1041 ** CAM_STATUS_MASK=0x3F, Mask bits for just the status #
1042 **
1043 ** Target Specific Adjunct Status
1044 ** CAM_SENT_SENSE=0x40000000 sent sense with status
1045 **} cam_status;
1046 **********************************************************************
1047 */
1048 static VOID arcmsr_interrupt(VOID *arg)
1049 {
1050 PACB pACB=(PACB)arg;
1051 PSRB pSRB;
1052 ULONG flagpsrb,outbound_intstatus,outbound_doorbell;
1053
1054 #if ARCMSR_DEBUG0
1055 printf("arcmsr_interrupt..............\n");
1056 #endif
1057 /*
1058 *********************************************
1059 ** check outbound intstatus À˹µL¶l®t«öªù¹a
1060 *********************************************
1061 */
1062 outbound_intstatus=CHIP_REG_READ32(&pACB->pmu->outbound_intstatus) & pACB->outbound_int_enable;
1063 CHIP_REG_WRITE32(&pACB->pmu->outbound_intstatus, outbound_intstatus);/*clear interrupt*/
1064 if(outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT)
1065 {
1066 #if ARCMSR_DEBUG0
1067 printf("arcmsr_interrupt:..........ARCMSR_MU_OUTBOUND_DOORBELL_INT\n");
1068 #endif
1069 /*
1070 *********************************************
1071 ** DOORBELL ¥m¾´! ¬O§_¦³¶l¥ónñ¦¬
1072 *********************************************
1073 */
1074 outbound_doorbell=CHIP_REG_READ32(&pACB->pmu->outbound_doorbell);
1075 CHIP_REG_WRITE32(&pACB->pmu->outbound_doorbell,outbound_doorbell);/*clear interrupt */
1076 if(outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK)
1077 {
1078 PQBUFFER prbuffer=(PQBUFFER)&pACB->pmu->ioctl_rbuffer;
1079 PUCHAR iop_data=(PUCHAR)prbuffer->data;
1080 PUCHAR pQbuffer;
1081 LONG my_empty_len,iop_len,rqbuf_firstindex,rqbuf_lastindex;
1082 ULONG s;
1083 /*check this iop data if overflow my rqbuffer*/
1084 s=splcam();
1085 rqbuf_lastindex=pACB->rqbuf_lastindex;
1086 rqbuf_firstindex=pACB->rqbuf_firstindex;
1087 iop_len=prbuffer->data_len;
1088 my_empty_len=(rqbuf_firstindex-rqbuf_lastindex-1)&(ARCMSR_MAX_QBUFFER-1);
1089 if(my_empty_len>=iop_len)
1090 {
1091 while(iop_len > 0)
1092 {
1093 pQbuffer=&pACB->rqbuffer[pACB->rqbuf_lastindex];
1094 memcpy(pQbuffer,iop_data,1);
1095 pACB->rqbuf_lastindex++;
1096 pACB->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER;/*if last index number set it to 0 */
1097 iop_data++;
1098 iop_len--;
1099 }
1100 CHIP_REG_WRITE32(&pACB->pmu->inbound_doorbell, ARCMSR_INBOUND_DRIVER_DATA_READ_OK);/*signature, let IOP331 know data has been readed */
1101 }
1102 else
1103 {
1104 pACB->acb_flags|=ACB_F_IOPDATA_OVERFLOW;
1105 }
1106 splx(s);
1107 }
1108 if(outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK)
1109 {
1110 ULONG s;
1111 /*
1112 *********************************************
1113 ** ¬Ý¬Ý¬O§_ÁÙ¦³¶l¥ón¶¶¹D±H¥X
1114 *********************************************
1115 */
1116 s=splcam();
1117 if(pACB->wqbuf_firstindex!=pACB->wqbuf_lastindex)
1118 {
1119 PUCHAR pQbuffer;
1120 PQBUFFER pwbuffer=(PQBUFFER)&pACB->pmu->ioctl_wbuffer;
1121 PUCHAR iop_data=(PUCHAR)pwbuffer->data;
1122 LONG allxfer_len=0;
1123
1124 while((pACB->wqbuf_firstindex!=pACB->wqbuf_lastindex) && (allxfer_len<124))
1125 {
1126 pQbuffer=&pACB->wqbuffer[pACB->wqbuf_firstindex];
1127 memcpy(iop_data,pQbuffer,1);
1128 pACB->wqbuf_firstindex++;
1129 pACB->wqbuf_firstindex %= ARCMSR_MAX_QBUFFER; /*if last index number set it to 0 */
1130 iop_data++;
1131 allxfer_len++;
1132 }
1133 pwbuffer->data_len=allxfer_len;
1134 /*
1135 ** push inbound doorbell tell iop driver data write ok and wait reply on next hwinterrupt for next Qbuffer post
1136 */
1137 CHIP_REG_WRITE32(&pACB->pmu->inbound_doorbell,ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK);
1138 }
1139 else
1140 {
1141 pACB->acb_flags |= ACB_F_IOCTL_WQBUFFER_CLEARED;
1142 }
1143 splx(s);
1144 }
1145 }
1146 if(outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT)
1147 {
1148 /*
1149 *****************************************************************************
1150 ** areca cdb command done
1151 *****************************************************************************
1152 */
1153 while(1)
1154 {
1155 if((flagpsrb=CHIP_REG_READ32(&pACB->pmu->outbound_queueport)) == 0xFFFFFFFF)
1156 {
1157 break;/*chip FIFO no srb for completion already*/
1158 }
1159 /* check if command done with no error*/
1160 pSRB=(PSRB)(CINT2P)(pACB->vir2phy_offset+(flagpsrb << 5));/*frame must be 32 bytes aligned*/
1161 if((pSRB->pACB!=pACB) || (pSRB->startdone!=ARCMSR_SRB_START))
1162 {
1163 if(pSRB->startdone==ARCMSR_SRB_ABORTED)
1164 {
1165 pSRB->pccb->ccb_h.status=CAM_REQ_ABORTED;
1166 arcmsr_srb_complete(pSRB);
1167 break;
1168 }
1169 printf("arcmsr_interrupt:got an illegal srb command done ...pACB=%p pSRB=%p srboutstandingcount=%d .....\n",pACB,pSRB,pACB->srboutstandingcount);
1170 break;
1171 }
1172 if((flagpsrb & ARCMSR_SRBREPLY_FLAG_ERROR)==0)
1173 {
1174 pSRB->pccb->ccb_h.status=CAM_REQ_CMP;
1175 arcmsr_srb_complete(pSRB);
1176 }
1177 else
1178 {
1179 switch(pSRB->arcmsr_cdb.DeviceStatus)
1180 {
1181 case ARCMSR_DEV_SELECT_TIMEOUT:
1182 {
1183 #if ARCMSR_DEBUG0
1184 printf("pSRB=%p ......ARCMSR_DEV_SELECT_TIMEOUT\n",pSRB);
1185 #endif
1186 pSRB->pccb->ccb_h.status=CAM_SEL_TIMEOUT;
1187 arcmsr_srb_complete(pSRB);
1188 }
1189 break;
1190 case ARCMSR_DEV_ABORTED:
1191 {
1192 #if ARCMSR_DEBUG0
1193 printf("pSRB=%p ......ARCMSR_DEV_ABORTED\n",pSRB);
1194 #endif
1195 pSRB->pccb->ccb_h.status=CAM_DEV_NOT_THERE;
1196 arcmsr_srb_complete(pSRB);
1197 }
1198 break;
1199 case ARCMSR_DEV_INIT_FAIL:
1200 {
1201 #if ARCMSR_DEBUG0
1202 printf("pSRB=%p .....ARCMSR_DEV_INIT_FAIL\n",pSRB);
1203 #endif
1204 pSRB->pccb->ccb_h.status=CAM_DEV_NOT_THERE;
1205 arcmsr_srb_complete(pSRB);
1206 }
1207 break;
1208 case SCSISTAT_CHECK_CONDITION:
1209 {
1210 #if ARCMSR_DEBUG0
1211 printf("pSRB=%p .....SCSISTAT_CHECK_CONDITION\n",pSRB);
1212 #endif
1213 arcmsr_report_SenseInfoBuffer(pSRB);
1214 arcmsr_srb_complete(pSRB);
1215 }
1216 break;
1217 default:
1218 /* error occur Q all error srb to errorsrbpending Q*/
1219 printf("arcmsr_interrupt:command error done ......but got unknow DeviceStatus=%x....\n",pSRB->arcmsr_cdb.DeviceStatus);
1220 pSRB->pccb->ccb_h.status=CAM_UNCOR_PARITY;/*unknow error or crc error just for retry*/
1221 arcmsr_srb_complete(pSRB);
1222 break;
1223 }
1224 }
1225 } /*drain reply FIFO*/
1226 }
1227 if(pACB->srbwait2gocount != 0)
1228 {
1229 arcmsr_post_wait2go_srb(pACB);/*try to post all pending srb*/
1230 }
1231 return;
1232 }
1233 /*
1234 ***********************************************************************
1235 **
1236 **int copyin __P((const void *udaddr, void *kaddr, size_t len));
1237 **int copyout __P((const void *kaddr, void *udaddr, size_t len));
1238 **
1239 **ENOENT "" No such file or directory ""
1240 **ENOIOCTL "" ioctl not handled by this layer ""
1241 **ENOMEM "" Cannot allocate memory ""
1242 **EINVAL "" Invalid argument ""
1243 ************************************************************************
1244 */
1245 LONG arcmsr_iop_ioctlcmd(PACB pACB,ULONG ioctl_cmd,caddr_t arg)
1246 {
1247 PCMD_IO_CONTROL pccbioctl=(PCMD_IO_CONTROL) arg;
1248
1249 #if ARCMSR_DEBUG0
1250 printf("arcmsr_iop_ioctlcmd................. \n");
1251 #endif
1252
1253 if(memcmp(pccbioctl->Signature,"ARCMSR",6)!=0)
1254 {
1255 return EINVAL;
1256 }
1257 switch(ioctl_cmd)
1258 {
1259 case ARCMSR_IOCTL_READ_RQBUFFER:
1260 {
1261 ULONG s;
1262 PCMD_IOCTL_FIELD pccbioctlfld=(PCMD_IOCTL_FIELD)arg;
1263 PUCHAR pQbuffer,ptmpQbuffer=pccbioctlfld->ioctldatabuffer;
1264 LONG allxfer_len=0;
1265
1266 s=splcam();
1267 while((pACB->rqbuf_firstindex!=pACB->rqbuf_lastindex) && (allxfer_len<1031))
1268 {
1269 /*copy READ QBUFFER to srb*/
1270 pQbuffer=&pACB->rqbuffer[pACB->rqbuf_firstindex];
1271 memcpy(ptmpQbuffer,pQbuffer,1);
1272 pACB->rqbuf_firstindex++;
1273 pACB->rqbuf_firstindex %= ARCMSR_MAX_QBUFFER; /*if last index number set it to 0 */
1274 ptmpQbuffer++;
1275 allxfer_len++;
1276 }
1277 if(pACB->acb_flags & ACB_F_IOPDATA_OVERFLOW)
1278 {
1279 PQBUFFER prbuffer=(PQBUFFER)&pACB->pmu->ioctl_rbuffer;
1280 PUCHAR pQbuffer;
1281 PUCHAR iop_data=(PUCHAR)prbuffer->data;
1282 LONG iop_len;
1283
1284 pACB->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1285 iop_len=(LONG)prbuffer->data_len;
1286 /*this iop data does no chance to make me overflow again here, so just do it*/
1287 while(iop_len>0)
1288 {
1289 pQbuffer=&pACB->rqbuffer[pACB->rqbuf_lastindex];
1290 memcpy(pQbuffer,iop_data,1);
1291 pACB->rqbuf_lastindex++;
1292 pACB->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER;/*if last index number set it to 0 */
1293 iop_data++;
1294 iop_len--;
1295 }
1296 CHIP_REG_WRITE32(&pACB->pmu->inbound_doorbell, ARCMSR_INBOUND_DRIVER_DATA_READ_OK);/*signature, let IOP331 know data has been readed */
1297 }
1298 pccbioctl->Length=allxfer_len;
1299 pccbioctl->ReturnCode=ARCMSR_IOCTL_RETURNCODE_OK;
1300 splx(s);
1301 return ARC_IOCTL_SUCCESS;
1302 }
1303 break;
1304 case ARCMSR_IOCTL_WRITE_WQBUFFER:
1305 {
1306 ULONG s;
1307 PCMD_IOCTL_FIELD pccbioctlfld=(PCMD_IOCTL_FIELD)arg;
1308 LONG my_empty_len,user_len,wqbuf_firstindex,wqbuf_lastindex;
1309 PUCHAR pQbuffer,ptmpuserbuffer=pccbioctlfld->ioctldatabuffer;
1310
1311 s=splcam();
1312 user_len=pccbioctl->Length;
1313
1314 /*check if data xfer length of this request will overflow my array qbuffer */
1315 wqbuf_lastindex=pACB->wqbuf_lastindex;
1316 wqbuf_firstindex=pACB->wqbuf_firstindex;
1317 my_empty_len=(wqbuf_firstindex-wqbuf_lastindex-1)&(ARCMSR_MAX_QBUFFER-1);
1318 if(my_empty_len>=user_len)
1319 {
1320 while(user_len>0)
1321 {
1322 /*copy srb data to wqbuffer*/
1323 pQbuffer=&pACB->wqbuffer[pACB->wqbuf_lastindex];
1324 memcpy(pQbuffer,ptmpuserbuffer,1);
1325 pACB->wqbuf_lastindex++;
1326 pACB->wqbuf_lastindex %= ARCMSR_MAX_QBUFFER;/*if last index number set it to 0 */
1327 ptmpuserbuffer++;
1328 user_len--;
1329 }
1330 /*post fist Qbuffer*/
1331 if(pACB->acb_flags & ACB_F_IOCTL_WQBUFFER_CLEARED)
1332 {
1333 pACB->acb_flags &=~ACB_F_IOCTL_WQBUFFER_CLEARED;
1334 arcmsr_post_Qbuffer(pACB);
1335 }
1336 pccbioctl->ReturnCode=ARCMSR_IOCTL_RETURNCODE_OK;
1337 }
1338 else
1339 {
1340 pccbioctl->ReturnCode=ARCMSR_IOCTL_RETURNCODE_ERROR;
1341 }
1342 splx(s);
1343 return ARC_IOCTL_SUCCESS;
1344 }
1345 break;
1346 case ARCMSR_IOCTL_CLEAR_RQBUFFER:
1347 {
1348 ULONG s;
1349 PUCHAR pQbuffer=pACB->rqbuffer;
1350 s=splcam();
1351 if(pACB->acb_flags & ACB_F_IOPDATA_OVERFLOW)
1352 {
1353 pACB->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1354 CHIP_REG_WRITE32(&pACB->pmu->inbound_doorbell, ARCMSR_INBOUND_DRIVER_DATA_READ_OK);/*signature, let IOP331 know data has been readed */
1355 }
1356 pACB->acb_flags |= ACB_F_IOCTL_RQBUFFER_CLEARED;
1357 pACB->rqbuf_firstindex=0;
1358 pACB->rqbuf_lastindex=0;
1359 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
1360 pccbioctl->ReturnCode=ARCMSR_IOCTL_RETURNCODE_OK;
1361 splx(s);
1362 return ARC_IOCTL_SUCCESS;
1363 }
1364 break;
1365 case ARCMSR_IOCTL_CLEAR_WQBUFFER:
1366 {
1367 ULONG s;
1368 PUCHAR pQbuffer=pACB->wqbuffer;
1369
1370 s=splcam();
1371 if(pACB->acb_flags & ACB_F_IOPDATA_OVERFLOW)
1372 {
1373 pACB->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1374 CHIP_REG_WRITE32(&pACB->pmu->inbound_doorbell, ARCMSR_INBOUND_DRIVER_DATA_READ_OK);/*signature, let IOP331 know data has been readed */
1375 }
1376 pACB->acb_flags |= ACB_F_IOCTL_WQBUFFER_CLEARED;
1377 pACB->wqbuf_firstindex=0;
1378 pACB->wqbuf_lastindex=0;
1379 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
1380 pccbioctl->ReturnCode=ARCMSR_IOCTL_RETURNCODE_OK;
1381 splx(s);
1382 return ARC_IOCTL_SUCCESS;
1383 }
1384 break;
1385 case ARCMSR_IOCTL_CLEAR_ALLQBUFFER:
1386 {
1387 ULONG s;
1388 PUCHAR pQbuffer;
1389
1390 s=splcam();
1391 if(pACB->acb_flags & ACB_F_IOPDATA_OVERFLOW)
1392 {
1393 pACB->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1394 CHIP_REG_WRITE32(&pACB->pmu->inbound_doorbell, ARCMSR_INBOUND_DRIVER_DATA_READ_OK);/*signature, let IOP331 know data has been readed */
1395 }
1396 pACB->acb_flags |= (ACB_F_IOCTL_WQBUFFER_CLEARED|ACB_F_IOCTL_RQBUFFER_CLEARED);
1397 pACB->rqbuf_firstindex=0;
1398 pACB->rqbuf_lastindex=0;
1399 pACB->wqbuf_firstindex=0;
1400 pACB->wqbuf_lastindex=0;
1401 pQbuffer=pACB->rqbuffer;
1402 memset(pQbuffer, 0, sizeof(struct _QBUFFER));
1403 pQbuffer=pACB->wqbuffer;
1404 memset(pQbuffer, 0, sizeof(struct _QBUFFER));
1405 pccbioctl->ReturnCode=ARCMSR_IOCTL_RETURNCODE_OK;
1406 splx(s);
1407 return ARC_IOCTL_SUCCESS;
1408 }
1409 break;
1410 case ARCMSR_IOCTL_RETURN_CODE_3F:
1411 {
1412 pccbioctl->ReturnCode=ARCMSR_IOCTL_RETURNCODE_3F;
1413 return ARC_IOCTL_SUCCESS;
1414 }
1415 break;
1416 case ARCMSR_IOCTL_SAY_HELLO:
1417 {
1418 PCMD_IOCTL_FIELD pccbioctlfld=(PCMD_IOCTL_FIELD)arg;
1419 PCHAR hello_string="Hello! I am ARCMSR";
1420 PCHAR puserbuffer=(PUCHAR)pccbioctlfld->ioctldatabuffer;
1421
1422 if(memcpy(puserbuffer,hello_string,(SHORT)strlen(hello_string)))
1423 {
1424 pccbioctl->ReturnCode=ARCMSR_IOCTL_RETURNCODE_ERROR;
1425 return ENOIOCTL;
1426 }
1427 pccbioctl->ReturnCode=ARCMSR_IOCTL_RETURNCODE_OK;
1428 return ARC_IOCTL_SUCCESS;
1429 }
1430 break;
1431 }
1432 return EINVAL;
1433 }
1434 /*
1435 **************************************************************************
1436 **
1437 **************************************************************************
1438 */
1439 PSRB arcmsr_get_freesrb(PACB pACB)
1440 {
1441 PSRB pSRB=NULL;
1442 ULONG s;
1443 LONG srb_startindex,srb_doneindex;
1444
1445 #if ARCMSR_DEBUG0
1446 printf("arcmsr_get_freesrb: srb_startindex=%d srb_doneindex=%d\n",pACB->srb_startindex,pACB->srb_doneindex);
1447 #endif
1448
1449 s=splcam();
1450 srb_doneindex=pACB->srb_doneindex;
1451 srb_startindex=pACB->srb_startindex;
1452 pSRB=pACB->psrbringQ[srb_startindex];
1453 srb_startindex++;
1454 srb_startindex %= ARCMSR_MAX_FREESRB_NUM;
1455 if(srb_doneindex!=srb_startindex)
1456 {
1457 pACB->srb_startindex=srb_startindex;
1458 }
1459 else
1460 {
1461 pSRB=NULL;
1462 }
1463 splx(s);
1464 return(pSRB);
1465 }
1466 /*
1467 *********************************************************************
1468 **
1469 **
1470 **
1471 *********************************************************************
1472 */
1473 static VOID arcmsr_executesrb(VOID *arg,bus_dma_segment_t *dm_segs,LONG nseg,LONG error)
1474 {
1475 PSRB pSRB=(PSRB)arg;
1476 PACB pACB;
1477 union ccb *pccb;
1478
1479 #if ARCMSR_DEBUG0
1480 printf("arcmsr_executesrb........................................ \n" );
1481 #endif
1482
1483 pccb=pSRB->pccb;
1484 pACB=(PACB)pSRB->pACB;
1485 if(error != 0)
1486 {
1487 if(error != EFBIG)
1488 {
1489 printf("arcmsr_executesrb:%d Unexepected error %x returned from " "bus_dmamap_load\n",pACB->pci_unit,error);
1490 }
1491 if(pccb->ccb_h.status == CAM_REQ_INPROG)
1492 {
1493 xpt_freeze_devq(pccb->ccb_h.path,/*count*/1);
1494 pccb->ccb_h.status=CAM_REQ_TOO_BIG|CAM_DEV_QFRZN;
1495 }
1496 xpt_done(pccb);
1497 return;
1498 }
1499 arcmsr_build_srb(pSRB,dm_segs,nseg);
1500 if(pccb->ccb_h.status != CAM_REQ_INPROG)
1501 {
1502 if(nseg != 0)
1503 {
1504 bus_dmamap_unload(pACB->buffer_dmat,pSRB->dmamap);
1505 }
1506 xpt_done(pccb);
1507 return;
1508 }
1509 pccb->ccb_h.status |= CAM_SIM_QUEUED;
1510 if(pACB->srboutstandingcount < ARCMSR_MAX_OUTSTANDING_CMD)
1511 {
1512 /*
1513 ******************************************************************
1514 ** and we can make sure there were no pending srb in this duration
1515 ******************************************************************
1516 */
1517 arcmsr_post_srb(pACB,pSRB);
1518 }
1519 else
1520 {
1521 /*
1522 ******************************************************************
1523 ** Q of srbwaitexec will be post out when any outstanding command complete
1524 ******************************************************************
1525 */
1526 arcmsr_queue_wait2go_srb(pACB,pSRB);
1527 }
1528 return;
1529 }
1530 /*
1531 *****************************************************************************************
1532 **
1533 *****************************************************************************************
1534 */
1535 BOOLEAN arcmsr_seek_cmd2abort(union ccb * pabortccb)
1536 {
1537 PSRB pSRB,pfreesrb;
1538 PACB pACB=(PACB) pabortccb->ccb_h.arcmsr_ccbacb_ptr;
1539 ULONG s,intmask_org,mask;
1540 LONG i=0;
1541
1542 #if ARCMSR_DEBUG0
1543 printf("arcmsr_seek_cmd2abort.................. \n");
1544 #endif
1545
1546 s=splcam();
1547 /*
1548 ** It is the upper layer do abort command this lock just prior to calling us.
1549 ** First determine if we currently own this command.
1550 ** Start by searching the device queue. If not found
1551 ** at all,and the system wanted us to just abort the
1552 ** command return success.
1553 */
1554 if(pACB->srboutstandingcount!=0)
1555 {
1556 /* Q back all outstanding srb into wait exec psrb Q*/
1557 pfreesrb=pACB->pfreesrb;
1558 for(i=0;i<ARCMSR_MAX_FREESRB_NUM;i++)
1559 {
1560 pSRB=&pfreesrb[i];
1561 if(pSRB->startdone==ARCMSR_SRB_START)
1562 {
1563 if(pSRB->pccb==pabortccb)
1564 {
1565 /* disable all outbound interrupt */
1566 intmask_org=CHIP_REG_READ32(&pACB->pmu->outbound_intmask);
1567 CHIP_REG_WRITE32(&pACB->pmu->outbound_intmask,intmask_org|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE);
1568 /* talk to iop 331 outstanding command aborted*/
1569 arcmsr_abort_allcmd(pACB);
1570 if(arcmsr_wait_msgint_ready(pACB)!=TRUE)
1571 {
1572 printf("arcmsr_seek_cmd2abort: wait 'abort all outstanding command' timeout.................in \n");
1573 }
1574 /*clear all outbound posted Q*/
1575 for(i=0;i<ARCMSR_MAX_OUTSTANDING_CMD;i++)
1576 {
1577 CHIP_REG_READ32(&pACB->pmu->outbound_queueport);
1578 }
1579 pfreesrb=pACB->pfreesrb;
1580 for(i=0;i<ARCMSR_MAX_FREESRB_NUM;i++)
1581 {
1582 pSRB=&pfreesrb[i];
1583 if(pSRB->startdone==ARCMSR_SRB_START)
1584 {
1585 pSRB->startdone=ARCMSR_SRB_ABORTED;
1586 pSRB->pccb->ccb_h.status=CAM_REQ_ABORTED;
1587 arcmsr_srb_complete(pSRB);
1588 }
1589 }
1590 /* enable all outbound interrupt */
1591 mask=~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE|ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE|ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE);
1592 CHIP_REG_WRITE32(&pACB->pmu->outbound_intmask,intmask_org & mask);
1593 splx(s);
1594 return(TRUE);
1595 }
1596 }
1597 }
1598 }
1599 /*
1600 ** seek this command at our command list
1601 ** if command found then remove,abort it and free this SRB
1602 */
1603 if(pACB->srbwait2gocount!=0)
1604 {
1605 for(i=0;i<ARCMSR_MAX_OUTSTANDING_CMD;i++)
1606 {
1607 pSRB=pACB->psrbwait2go[i];
1608 if(pSRB!=NULL)
1609 {
1610 if(pSRB->pccb==pabortccb)
1611 {
1612 pACB->psrbwait2go[i]=NULL;
1613 pSRB->startdone=ARCMSR_SRB_ABORTED;
1614 pSRB->pccb->ccb_h.status=CAM_REQ_ABORTED;
1615 arcmsr_srb_complete(pSRB);
1616 atomic_subtract_int(&pACB->srbwait2gocount,1);
1617 splx(s);
1618 return(TRUE);
1619 }
1620 }
1621 }
1622 }
1623 splx(s);
1624 return (FALSE);
1625 }
1626 /*
1627 ****************************************************************************
1628 **
1629 ****************************************************************************
1630 */
1631 VOID arcmsr_bus_reset(PACB pACB)
1632 {
1633 #if ARCMSR_DEBUG0
1634 printf("arcmsr_bus_reset.......................... \n");
1635 #endif
1636
1637 arcmsr_iop_reset(pACB);
1638 return;
1639 }
1640 /*
1641 *********************************************************************
1642 **
1643 ** CAM Status field values
1644 **typedef enum {
1645 ** CAM_REQ_INPROG, CCB request is in progress
1646 ** CAM_REQ_CMP, CCB request completed without error
1647 ** CAM_REQ_ABORTED, CCB request aborted by the host
1648 ** CAM_UA_ABORT, Unable to abort CCB request
1649 ** CAM_REQ_CMP_ERR, CCB request completed with an error
1650 ** CAM_BUSY, CAM subsytem is busy
1651 ** CAM_REQ_INVALID, CCB request was invalid
1652 ** CAM_PATH_INVALID, Supplied Path ID is invalid
1653 ** CAM_DEV_NOT_THERE, SCSI Device Not Installed/there
1654 ** CAM_UA_TERMIO, Unable to terminate I/O CCB request
1655 ** CAM_SEL_TIMEOUT, Target Selection Timeout
1656 ** CAM_CMD_TIMEOUT, Command timeout
1657 ** CAM_SCSI_STATUS_ERROR, SCSI error, look at error code in CCB
1658 ** CAM_MSG_REJECT_REC, Message Reject Received
1659 ** CAM_SCSI_BUS_RESET, SCSI Bus Reset Sent/Received
1660 ** CAM_UNCOR_PARITY, Uncorrectable parity error occurred
1661 ** CAM_AUTOSENSE_FAIL=0x10, Autosense: request sense cmd fail
1662 ** CAM_NO_HBA, No HBA Detected error
1663 ** CAM_DATA_RUN_ERR, Data Overrun error
1664 ** CAM_UNEXP_BUSFREE, Unexpected Bus Free
1665 ** CAM_SEQUENCE_FAIL, Target Bus Phase Sequence Failure
1666 ** CAM_CCB_LEN_ERR, CCB length supplied is inadequate
1667 ** CAM_PROVIDE_FAIL, Unable to provide requested capability
1668 ** CAM_BDR_SENT, A SCSI BDR msg was sent to target
1669 ** CAM_REQ_TERMIO, CCB request terminated by the host
1670 ** CAM_UNREC_HBA_ERROR, Unrecoverable Host Bus Adapter Error
1671 ** CAM_REQ_TOO_BIG, The request was too large for this host
1672 ** CAM_REQUEUE_REQ,
1673 ** * This request should be requeued to preserve
1674 ** * transaction ordering. This typically occurs
1675 ** * when the SIM recognizes an error that should
1676 ** * freeze the queue and must place additional
1677 ** * requests for the target at the sim level
1678 ** * back into the XPT queue.
1679 **
1680 ** CAM_IDE=0x33, Initiator Detected Error
1681 ** CAM_RESRC_UNAVAIL, Resource Unavailable
1682 ** CAM_UNACKED_EVENT, Unacknowledged Event by Host
1683 ** CAM_MESSAGE_RECV, Message Received in Host Target Mode
1684 ** CAM_INVALID_CDB, Invalid CDB received in Host Target Mode
1685 ** CAM_LUN_INVALID, Lun supplied is invalid
1686 ** CAM_TID_INVALID, Target ID supplied is invalid
1687 ** CAM_FUNC_NOTAVAIL, The requested function is not available
1688 ** CAM_NO_NEXUS, Nexus is not established
1689 ** CAM_IID_INVALID, The initiator ID is invalid
1690 ** CAM_CDB_RECVD, The SCSI CDB has been received
1691 ** CAM_LUN_ALRDY_ENA, The LUN is already eanbeld for target mode
1692 ** CAM_SCSI_BUSY, SCSI Bus Busy
1693 **
1694 ** CAM_DEV_QFRZN=0x40, The DEV queue is frozen w/this err
1695 **
1696 ** Autosense data valid for target
1697 ** CAM_AUTOSNS_VALID=0x80,
1698 ** CAM_RELEASE_SIMQ=0x100, SIM ready to take more commands
1699 ** CAM_SIM_QUEUED =0x200, SIM has this command in it's queue
1700 **
1701 ** CAM_STATUS_MASK=0x3F, Mask bits for just the status #
1702 **
1703 ** Target Specific Adjunct Status
1704 ** CAM_SENT_SENSE=0x40000000 sent sense with status
1705 **} cam_status;
1706 **
1707 **union ccb {
1708 ** struct ccb_hdr ccb_h; For convenience
1709 ** struct ccb_scsiio csio;
1710 ** struct ccb_getdev cgd;
1711 ** struct ccb_getdevlist cgdl;
1712 ** struct ccb_pathinq cpi;
1713 ** struct ccb_relsim crs;
1714 ** struct ccb_setasync csa;
1715 ** struct ccb_setdev csd;
1716 ** struct ccb_pathstats cpis;
1717 ** struct ccb_getdevstats cgds;
1718 ** struct ccb_dev_match cdm;
1719 ** struct ccb_trans_settings cts;
1720 ** struct ccb_calc_geometry ccg;
1721 ** struct ccb_abort cab;
1722 ** struct ccb_resetbus crb;
1723 ** struct ccb_resetdev crd;
1724 ** struct ccb_termio tio;
1725 ** struct ccb_accept_tio atio;
1726 ** struct ccb_scsiio ctio;
1727 ** struct ccb_en_lun cel;
1728 ** struct ccb_immed_notify cin;
1729 ** struct ccb_notify_ack cna;
1730 ** struct ccb_eng_inq cei;
1731 ** struct ccb_eng_exec cee;
1732 ** struct ccb_rescan crcn;
1733 ** struct ccb_debug cdbg;
1734 ** }
1735 **
1736 **struct ccb_hdr {
1737 ** cam_pinfo pinfo; "" Info for priority scheduling
1738 ** camq_entry xpt_links; "" For chaining in the XPT layer
1739 ** camq_entry sim_links; "" For chaining in the SIM layer
1740 ** camq_entry periph_links; "" For chaining in the type driver
1741 ** u_int32_t retry_count;
1742 ** void (*cbfcnp)(struct cam_periph *, union ccb *);"" Callback on completion function
1743 ** xpt_opcode func_code; "" XPT function code
1744 ** u_int32_t status; "" Status returned by CAM subsystem
1745 ** struct cam_path *path; "" Compiled path for this ccb
1746 ** path_id_t path_id; "" Path ID for the request
1747 ** target_id_t target_id; "" Target device ID
1748 ** lun_id_t target_lun; "" Target LUN number
1749 ** u_int32_t flags;
1750 ** ccb_ppriv_area periph_priv;
1751 ** ccb_spriv_area sim_priv;
1752 ** u_int32_t timeout; "" Timeout value
1753 ** struct callout_handle timeout_ch; "" Callout handle used for timeouts
1754 **};
1755 **
1756 **typedef union {
1757 ** u_int8_t *cdb_ptr; "" Pointer to the CDB bytes to send
1758 ** u_int8_t cdb_bytes[IOCDBLEN]; "" Area for the CDB send
1759 **} cdb_t;
1760 **
1761 ** SCSI I/O Request CCB used for the XPT_SCSI_IO and XPT_CONT_TARGET_IO
1762 ** function codes.
1763 **
1764 **struct ccb_scsiio {
1765 ** struct ccb_hdr ccb_h;
1766 ** union ccb *next_ccb; "" Ptr for next CCB for action
1767 ** u_int8_t *req_map; "" Ptr to mapping info
1768 ** u_int8_t *data_ptr; "" Ptr to the data buf/SG list
1769 ** u_int32_t dxfer_len; "" Data transfer length
1770 ** struct scsi_sense_data sense_data; "" Autosense storage
1771 ** u_int8_t sense_len; "" Number of bytes to autosense
1772 ** u_int8_t cdb_len; "" Number of bytes for the CDB
1773 ** u_int16_t sglist_cnt; "" Number of SG list entries
1774 ** u_int8_t scsi_status; "" Returned SCSI status
1775 ** u_int8_t sense_resid; "" Autosense resid length: 2's comp
1776 ** u_int32_t resid; "" Transfer residual length: 2's comp
1777 ** cdb_t cdb_io; "" Union for CDB bytes/pointer
1778 ** u_int8_t *msg_ptr; "" Pointer to the message buffer
1779 ** u_int16_t msg_len; "" Number of bytes for the Message
1780 ** u_int8_t tag_action; "" What to do for tag queueing
1781 **#define CAM_TAG_ACTION_NONE 0x00 "" The tag action should be either the define below (to send a non-tagged transaction) or one of the defined scsi tag messages from scsi_message.h.
1782 ** u_int tag_id; "" tag id from initator (target mode)
1783 ** u_int init_id; "" initiator id of who selected
1784 **}
1785 *********************************************************************
1786 */
1787 static VOID arcmsr_action(struct cam_sim * psim,union ccb * pccb)
1788 {
1789 PACB pACB;
1790
1791 #if ARCMSR_DEBUG0
1792 printf("arcmsr_action ..................................\n" );
1793 #endif
1794
1795 pACB=(PACB) cam_sim_softc(psim);
1796 if(pACB==NULL)
1797 {
1798 pccb->ccb_h.status=CAM_REQ_INVALID;
1799 xpt_done(pccb);
1800 return;
1801 }
1802 switch (pccb->ccb_h.func_code)
1803 {
1804 case XPT_SCSI_IO:
1805 {
1806 PSRB pSRB;
1807 #if ARCMSR_DEBUG0
1808 printf("arcmsr_action: XPT_SCSI_IO......................\n" );
1809 #endif
1810
1811 if((pSRB=arcmsr_get_freesrb(pACB)) == NULL)
1812 {
1813 pccb->ccb_h.status=CAM_RESRC_UNAVAIL;
1814 xpt_done(pccb);
1815 return;
1816 }
1817 pccb->ccb_h.arcmsr_ccbsrb_ptr=pSRB;
1818 pccb->ccb_h.arcmsr_ccbacb_ptr=pACB;
1819 pSRB->pccb=pccb;
1820 if((pccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE)
1821 {
1822 if((pccb->ccb_h.flags & CAM_SCATTER_VALID) == 0)
1823 {
1824 if((pccb->ccb_h.flags & CAM_DATA_PHYS) == 0)
1825 {
1826 LONG error,s;
1827
1828 s=splsoftvm();
1829 error = bus_dmamap_load(pACB->buffer_dmat,pSRB->dmamap,pccb->csio.data_ptr,pccb->csio.dxfer_len,arcmsr_executesrb,pSRB,/*flags*/0);
1830 if(error == EINPROGRESS)
1831 {
1832 xpt_freeze_simq(pACB->psim,1);
1833 pccb->ccb_h.status |= CAM_RELEASE_SIMQ;
1834 }
1835 splx(s);
1836 }
1837 else
1838 {
1839 panic("arcmsr: CAM_DATA_PHYS not supported");
1840 }
1841 }
1842 else
1843 {
1844 struct bus_dma_segment *segs;
1845
1846 if((pccb->ccb_h.flags & CAM_SG_LIST_PHYS) == 0 || (pccb->ccb_h.flags & CAM_DATA_PHYS) != 0)
1847 {
1848 pccb->ccb_h.status=CAM_PROVIDE_FAIL;
1849 xpt_done(pccb);
1850 free(pSRB,M_DEVBUF);
1851 return;
1852 }
1853 segs=(struct bus_dma_segment *)pccb->csio.data_ptr;
1854 arcmsr_executesrb(pSRB,segs,pccb->csio.sglist_cnt,0);
1855 }
1856 }
1857 else
1858 {
1859 arcmsr_executesrb(pSRB,NULL,0,0);
1860 }
1861 break;
1862 }
1863 case XPT_TARGET_IO:
1864 {
1865 #if ARCMSR_DEBUG0
1866 printf("arcmsr_action: XPT_TARGET_IO\n" );
1867 #endif
1868 /*
1869 ** target mode not yet support vendor specific commands.
1870 */
1871 pccb->ccb_h.status=CAM_REQ_CMP;
1872 xpt_done(pccb);
1873 break;
1874 }
1875 case XPT_PATH_INQ:
1876 {
1877 struct ccb_pathinq *cpi=&pccb->cpi;
1878
1879 #if ARCMSR_DEBUG0
1880 printf("arcmsr_action: XPT_PATH_INQ\n" );
1881 #endif
1882 cpi->version_num=1;
1883 cpi->hba_inquiry=PI_SDTR_ABLE | PI_TAG_ABLE;
1884 cpi->target_sprt=0;
1885 cpi->hba_misc=0;
1886 cpi->hba_eng_cnt=0;
1887 cpi->max_target=ARCMSR_MAX_TARGETID;
1888 cpi->max_lun=ARCMSR_MAX_TARGETLUN; /* 7 or 0 */
1889 cpi->initiator_id=ARCMSR_SCSI_INITIATOR_ID;
1890 cpi->bus_id=cam_sim_bus(psim);
1891 strncpy(cpi->sim_vid,"FreeBSD",SIM_IDLEN);
1892 strncpy(cpi->hba_vid,"ARCMSR",HBA_IDLEN);
1893 strncpy(cpi->dev_name,cam_sim_name(psim),DEV_IDLEN);
1894 cpi->unit_number=cam_sim_unit(psim);
1895 cpi->ccb_h.status=CAM_REQ_CMP;
1896 xpt_done(pccb);
1897 break;
1898 }
1899 case XPT_ABORT:
1900 {
1901 union ccb *pabort_ccb;
1902
1903 #if ARCMSR_DEBUG0
1904 printf("arcmsr_action: XPT_ABORT\n" );
1905 #endif
1906 pabort_ccb=pccb->cab.abort_ccb;
1907 switch (pabort_ccb->ccb_h.func_code)
1908 {
1909 case XPT_ACCEPT_TARGET_IO:
1910 case XPT_IMMED_NOTIFY:
1911 case XPT_CONT_TARGET_IO:
1912 if(arcmsr_seek_cmd2abort(pabort_ccb)==TRUE)
1913 {
1914 pabort_ccb->ccb_h.status=CAM_REQ_ABORTED;
1915 xpt_done(pabort_ccb);
1916 pccb->ccb_h.status=CAM_REQ_CMP;
1917 }
1918 else
1919 {
1920 xpt_print_path(pabort_ccb->ccb_h.path);
1921 printf("Not found\n");
1922 pccb->ccb_h.status=CAM_PATH_INVALID;
1923 }
1924 break;
1925 case XPT_SCSI_IO:
1926 pccb->ccb_h.status=CAM_UA_ABORT;
1927 break;
1928 default:
1929 pccb->ccb_h.status=CAM_REQ_INVALID;
1930 break;
1931 }
1932 xpt_done(pccb);
1933 break;
1934 }
1935 case XPT_RESET_BUS:
1936 case XPT_RESET_DEV:
1937 {
1938 LONG i;
1939
1940 #if ARCMSR_DEBUG0
1941 printf("arcmsr_action: XPT_RESET_BUS\n" );
1942 #endif
1943 arcmsr_bus_reset(pACB);
1944 for (i=0; i < 500; i++)
1945 {
1946 DELAY(1000);
1947 }
1948 pccb->ccb_h.status=CAM_REQ_CMP;
1949 xpt_done(pccb);
1950 break;
1951 }
1952 case XPT_TERM_IO:
1953 {
1954 #if ARCMSR_DEBUG0
1955 printf("arcmsr_action: XPT_TERM_IO\n" );
1956 #endif
1957 pccb->ccb_h.status=CAM_REQ_INVALID;
1958 xpt_done(pccb);
1959 break;
1960 }
1961 case XPT_GET_TRAN_SETTINGS:
1962 {
1963 struct ccb_trans_settings *cts;
1964 ULONG s;
1965
1966 #if ARCMSR_DEBUG0
1967 printf("arcmsr_action: XPT_GET_TRAN_SETTINGS\n" );
1968 #endif
1969
1970 cts=&pccb->cts;
1971 s=splcam();
1972 cts->flags=(CCB_TRANS_DISC_ENB | CCB_TRANS_TAG_ENB);
1973 cts->sync_period=3;
1974 cts->sync_offset=32;
1975 cts->bus_width=MSG_EXT_WDTR_BUS_16_BIT;
1976 cts->valid=CCB_TRANS_SYNC_RATE_VALID | CCB_TRANS_SYNC_OFFSET_VALID | CCB_TRANS_BUS_WIDTH_VALID | CCB_TRANS_DISC_VALID | CCB_TRANS_TQ_VALID;
1977 splx(s);
1978 pccb->ccb_h.status=CAM_REQ_CMP;
1979 xpt_done(pccb);
1980 break;
1981 }
1982 case XPT_SET_TRAN_SETTINGS:
1983 {
1984 #if ARCMSR_DEBUG0
1985 printf("arcmsr_action: XPT_SET_TRAN_SETTINGS\n" );
1986 #endif
1987 pccb->ccb_h.status = CAM_FUNC_NOTAVAIL;
1988 xpt_done(pccb);
1989 break;
1990 }
1991 case XPT_CALC_GEOMETRY:
1992 {
1993 struct ccb_calc_geometry *ccg;
1994 ULONG size_mb;
1995 ULONG secs_per_cylinder;
1996
1997 #if ARCMSR_DEBUG0
1998 printf("arcmsr_action: XPT_CALC_GEOMETRY\n" );
1999 #endif
2000 ccg=&pccb->ccg;
2001 size_mb=ccg->volume_size/((1024L * 1024L)/ccg->block_size);
2002 if(size_mb > 1024 )
2003 {
2004 ccg->heads=255;
2005 ccg->secs_per_track=63;
2006 }
2007 else
2008 {
2009 ccg->heads=64;
2010 ccg->secs_per_track=32;
2011 }
2012 secs_per_cylinder=ccg->heads * ccg->secs_per_track;
2013 ccg->cylinders=ccg->volume_size / secs_per_cylinder;
2014 pccb->ccb_h.status=CAM_REQ_CMP;
2015 xpt_done(pccb);
2016 break;
2017 }
2018 default:
2019 #if ARCMSR_DEBUG0
2020 printf("arcmsr_action: invalid XPT function CAM_REQ_INVALID\n" );
2021 #endif
2022 pccb->ccb_h.status=CAM_REQ_INVALID;
2023 xpt_done(pccb);
2024 break;
2025 }
2026 return;
2027 }
2028 /*
2029 **********************************************************************
2030 **
2031 ** start background rebulid
2032 **
2033 **********************************************************************
2034 */
2035 VOID arcmsr_start_adapter_bgrb(PACB pACB)
2036 {
2037 #if ARCMSR_DEBUG0
2038 printf("arcmsr_start_adapter_bgrb.................................. \n");
2039 #endif
2040 pACB->acb_flags |= ACB_F_MSG_START_BGRB;
2041 pACB->acb_flags &= ~ACB_F_MSG_STOP_BGRB;
2042 CHIP_REG_WRITE32(&pACB->pmu->inbound_msgaddr0,ARCMSR_INBOUND_MESG0_START_BGRB);
2043 return;
2044 }
2045 /*
2046 **********************************************************************
2047 **
2048 ** start background rebulid
2049 **
2050 **********************************************************************
2051 */
2052 VOID arcmsr_iop_init(PACB pACB)
2053 {
2054 ULONG intmask_org,mask,outbound_doorbell,firmware_state=0;
2055
2056 #if ARCMSR_DEBUG0
2057 printf("arcmsr_iop_init.................................. \n");
2058 #endif
2059 do
2060 {
2061 firmware_state=CHIP_REG_READ32(&pACB->pmu->outbound_msgaddr1);
2062 }while((firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK)==0);
2063 /* disable all outbound interrupt */
2064 intmask_org=CHIP_REG_READ32(&pACB->pmu->outbound_intmask);
2065 CHIP_REG_WRITE32(&pACB->pmu->outbound_intmask,intmask_org|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE);
2066 /*start background rebuild*/
2067 arcmsr_start_adapter_bgrb(pACB);
2068 if(arcmsr_wait_msgint_ready(pACB)!=TRUE)
2069 {
2070 printf("arcmsr_HwInitialize: wait 'start adapter background rebulid' timeout................. \n");
2071 }
2072 /* clear Qbuffer if door bell ringed */
2073 outbound_doorbell=CHIP_REG_READ32(&pACB->pmu->outbound_doorbell);
2074 if(outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK)
2075 {
2076 CHIP_REG_WRITE32(&pACB->pmu->outbound_doorbell,outbound_doorbell);/*clear interrupt */
2077 CHIP_REG_WRITE32(&pACB->pmu->inbound_doorbell,ARCMSR_INBOUND_DRIVER_DATA_READ_OK);
2078 }
2079 /* enable outbound Post Queue,outbound message0,outbell doorbell Interrupt */
2080 mask=~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE|ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE|ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE);
2081 CHIP_REG_WRITE32(&pACB->pmu->outbound_intmask,intmask_org & mask);
2082 pACB->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff;
2083 pACB->acb_flags |=ACB_F_IOP_INITED;
2084 return;
2085 }
2086 /*
2087 **********************************************************************
2088 **
2089 ** map freesrb
2090 **
2091 **********************************************************************
2092 */
2093 static void arcmsr_map_freesrb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
2094 {
2095 PACB pACB=arg;
2096 PSRB psrb_tmp,pfreesrb;
2097 ULONG cdb_phyaddr;
2098 LONG i;
2099
2100 pfreesrb=(PSRB)pACB->uncacheptr;
2101 cdb_phyaddr=segs->ds_addr; /* We suppose bus_addr_t high part always 0 here*/
2102 if(((CPT2INT)pACB->uncacheptr & 0x1F)!=0)
2103 {
2104 pfreesrb=pfreesrb+(0x20-((CPT2INT)pfreesrb & 0x1F));
2105 cdb_phyaddr=cdb_phyaddr+(0x20-((CPT2INT)cdb_phyaddr & 0x1F));
2106 }
2107 /*
2108 ********************************************************************
2109 ** here we need to tell iop 331 our freesrb.HighPart
2110 ** if freesrb.HighPart is not zero
2111 ********************************************************************
2112 */
2113 for(i=0;i<ARCMSR_MAX_FREESRB_NUM;i++)
2114 {
2115 psrb_tmp=&pfreesrb[i];
2116 if(((CPT2INT)psrb_tmp & 0x1F)==0) /*srb address must 32 (0x20) boundary*/
2117 {
2118 if(bus_dmamap_create(pACB->buffer_dmat, /*flags*/0, &psrb_tmp->dmamap)!=0)
2119 {
2120 pACB->acb_flags |= ACB_F_MAPFREESRB_FAILD;
2121 printf(" arcmsr_map_freesrb: (pSRB->dmamap) bus_dmamap_create ..............error\n");
2122 return;
2123 }
2124 psrb_tmp->cdb_shifted_phyaddr=cdb_phyaddr >> 5;
2125 psrb_tmp->pACB=pACB;
2126 pACB->psrbringQ[i]=psrb_tmp;
2127 cdb_phyaddr=cdb_phyaddr+sizeof(struct _SRB);
2128 }
2129 else
2130 {
2131 pACB->acb_flags |= ACB_F_MAPFREESRB_FAILD;
2132 printf(" arcmsr_map_freesrb:pfreesrb=%p i=%d this srb cross 32 bytes boundary ignored ......psrb_tmp=%p \n",pfreesrb,i,psrb_tmp);
2133 return;
2134 }
2135 }
2136 pACB->pfreesrb=pfreesrb;
2137 pACB->vir2phy_offset=(CPT2INT)psrb_tmp-(cdb_phyaddr-sizeof(struct _SRB));
2138 return;
2139 }
2140 /*
2141 ************************************************************************
2142 **
2143 **
2144 ************************************************************************
2145 */
2146 VOID arcmsr_free_resource(PACB pACB)
2147 {
2148 /* remove the control device */
2149 if (pACB->ioctl_dev != NULL)
2150 {
2151 destroy_dev(pACB->ioctl_dev);
2152 }
2153 bus_dmamap_unload(pACB->srb_dmat, pACB->srb_dmamap);
2154 bus_dmamap_destroy(pACB->srb_dmat, pACB->srb_dmamap);
2155 bus_dma_tag_destroy(pACB->srb_dmat);
2156 bus_dma_tag_destroy(pACB->buffer_dmat);
2157 bus_dma_tag_destroy(pACB->parent_dmat);
2158 return;
2159 }
2160 /*
2161 ************************************************************************
2162 ** PCI config header registers for all devices
2163 **
2164 ** #define PCIR_COMMAND 0x04
2165 ** #define PCIM_CMD_PORTEN 0x0001
2166 ** #define PCIM_CMD_MEMEN 0x0002
2167 ** #define PCIM_CMD_BUSMASTEREN 0x0004
2168 ** #define PCIM_CMD_MWRICEN 0x0010
2169 ** #define PCIM_CMD_PERRESPEN 0x0040
2170 **
2171 ** Function : arcmsr_initialize
2172 ** Purpose : initialize the internal structures for a given SCSI host
2173 ** Inputs : host - pointer to this host adapter's structure
2174 ** Preconditions : when this function is called,the chip_type
2175 ** field of the pACB structure MUST have been set.
2176 **
2177 ** 10h Base Address register #0
2178 ** 14h Base Address register #1
2179 ** 18h Base Address register #2
2180 ** 1Ch Base Address register #3
2181 ** 20h Base Address register #4
2182 ** 24h Base Address register #5
2183 ************************************************************************
2184 */
2185 static LONG arcmsr_initialize(device_t dev)
2186 {
2187 PACB pACB=device_get_softc(dev);
2188 LONG rid=PCI_BASE_ADDR0;
2189 vm_offset_t mem_base;
2190 USHORT pci_command;
2191
2192 #if ARCMSR_DEBUG0
2193 printf("arcmsr_initialize..............................\n");
2194 #endif
2195 #if __FreeBSD_version >= 502010
2196 if (bus_dma_tag_create( /*parent*/NULL,
2197 /*alignemnt*/1,
2198 /*boundary*/0,
2199 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
2200 /*highaddr*/BUS_SPACE_MAXADDR,
2201 /*filter*/NULL,
2202 /*filterarg*/NULL,
2203 /*maxsize*/BUS_SPACE_MAXSIZE_32BIT,
2204 /*nsegments*/BUS_SPACE_UNRESTRICTED,
2205 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT,
2206 /*flags*/0,
2207 /*lockfunc*/NULL,
2208 /*lockarg*/NULL,
2209 &pACB->parent_dmat) != 0)
2210 #else
2211 if (bus_dma_tag_create( /*parent*/NULL,
2212 /*alignemnt*/1,
2213 /*boundary*/0,
2214 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
2215 /*highaddr*/BUS_SPACE_MAXADDR,
2216 /*filter*/NULL,
2217 /*filterarg*/NULL,
2218 /*maxsize*/BUS_SPACE_MAXSIZE_32BIT,
2219 /*nsegments*/BUS_SPACE_UNRESTRICTED,
2220 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT,
2221 /*flags*/0,
2222 &pACB->parent_dmat) != 0)
2223 #endif
2224 {
2225 printf("arcmsr_initialize: bus_dma_tag_create .......................failure!\n");
2226 return ENOMEM;
2227 }
2228 /* Create a single tag describing a region large enough to hold all of the s/g lists we will need. */
2229 #if __FreeBSD_version >= 502010
2230 if(bus_dma_tag_create( /*parent_dmat*/pACB->parent_dmat,
2231 /*alignment*/1,
2232 /*boundary*/0,
2233 /*lowaddr*/BUS_SPACE_MAXADDR,
2234 /*highaddr*/BUS_SPACE_MAXADDR,
2235 /*filter*/NULL,
2236 /*filterarg*/NULL,
2237 /*maxsize*/MAXBSIZE,
2238 /*nsegments*/ARCMSR_MAX_SG_ENTRIES,
2239 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT,
2240 /*flags*/BUS_DMA_ALLOCNOW,
2241 /*lockfunc*/busdma_lock_mutex,
2242 /*lockarg*/&Giant,
2243 &pACB->buffer_dmat) != 0)
2244 #else
2245 if(bus_dma_tag_create( /*parent_dmat*/pACB->parent_dmat,
2246 /*alignment*/1,
2247 /*boundary*/0,
2248 /*lowaddr*/BUS_SPACE_MAXADDR,
2249 /*highaddr*/BUS_SPACE_MAXADDR,
2250 /*filter*/NULL,
2251 /*filterarg*/NULL,
2252 /*maxsize*/MAXBSIZE,
2253 /*nsegments*/ARCMSR_MAX_SG_ENTRIES,
2254 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT,
2255 /*flags*/BUS_DMA_ALLOCNOW,
2256 &pACB->buffer_dmat) != 0)
2257 #endif
2258 {
2259 bus_dma_tag_destroy(pACB->parent_dmat);
2260 printf("arcmsr_initialize: bus_dma_tag_create ............................failure!\n");
2261 return ENOMEM;
2262 }
2263 /* DMA tag for our srb structures.... Allocate the pfreesrb memory */
2264 #if __FreeBSD_version >= 502010
2265 if (bus_dma_tag_create( /*parent_dmat*/pACB->parent_dmat,
2266 /*alignment*/1,
2267 /*boundary*/0,
2268 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
2269 /*highaddr*/BUS_SPACE_MAXADDR,
2270 /*filter*/NULL,
2271 /*filterarg*/NULL,
2272 /*maxsize*/((sizeof(struct _SRB) * ARCMSR_MAX_FREESRB_NUM)+0x20),
2273 /*nsegments*/1,
2274 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT,
2275 /*flags*/BUS_DMA_ALLOCNOW,
2276 /*lockfunc*/NULL,
2277 /*lockarg*/NULL,
2278 &pACB->srb_dmat) != 0)
2279 #else
2280 if (bus_dma_tag_create( /*parent_dmat*/pACB->parent_dmat,
2281 /*alignment*/1,
2282 /*boundary*/0,
2283 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
2284 /*highaddr*/BUS_SPACE_MAXADDR,
2285 /*filter*/NULL,
2286 /*filterarg*/NULL,
2287 /*maxsize*/((sizeof(struct _SRB) * ARCMSR_MAX_FREESRB_NUM)+0x20),
2288 /*nsegments*/1,
2289 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT,
2290 /*flags*/BUS_DMA_ALLOCNOW,
2291 &pACB->srb_dmat) != 0)
2292 #endif
2293 {
2294 bus_dma_tag_destroy(pACB->buffer_dmat);
2295 bus_dma_tag_destroy(pACB->parent_dmat);
2296 printf("arcmsr_initialize: pACB->srb_dmat bus_dma_tag_create .....................failure!\n");
2297 return ENXIO;
2298 }
2299 /* Allocation for our srbs */
2300 if (bus_dmamem_alloc(pACB->srb_dmat, (void **)&pACB->uncacheptr, BUS_DMA_WAITOK | BUS_DMA_COHERENT, &pACB->srb_dmamap) != 0)
2301 {
2302 bus_dma_tag_destroy(pACB->srb_dmat);
2303 bus_dma_tag_destroy(pACB->buffer_dmat);
2304 bus_dma_tag_destroy(pACB->parent_dmat);
2305 printf("arcmsr_initialize: pACB->srb_dmat bus_dma_tag_create ...............failure!\n");
2306 return ENXIO;
2307 }
2308 /* And permanently map them */
2309 if(bus_dmamap_load(pACB->srb_dmat, pACB->srb_dmamap,pACB->uncacheptr,(sizeof(struct _SRB) * ARCMSR_MAX_FREESRB_NUM)+0x20,arcmsr_map_freesrb, pACB, /*flags*/0))
2310 {
2311 bus_dma_tag_destroy(pACB->srb_dmat);
2312 bus_dma_tag_destroy(pACB->buffer_dmat);
2313 bus_dma_tag_destroy(pACB->parent_dmat);
2314 printf("arcmsr_initialize: bus_dmamap_load................... failure!\n");
2315 return ENXIO;
2316 }
2317 pci_command=pci_read_config(dev,PCIR_COMMAND,2);
2318 pci_command |= PCIM_CMD_BUSMASTEREN;
2319 pci_command |= PCIM_CMD_PERRESPEN;
2320 pci_command |= PCIM_CMD_MWRICEN;
2321 /* Enable Busmaster/Mem */
2322 pci_command |= PCIM_CMD_MEMEN;
2323 pci_write_config(dev,PCIR_COMMAND,pci_command,2);
2324 pACB->sys_res_arcmsr=bus_alloc_resource(dev,SYS_RES_MEMORY,&rid,0,~0,0x1000,RF_ACTIVE);
2325 if(pACB->sys_res_arcmsr == NULL)
2326 {
2327 arcmsr_free_resource(pACB);
2328 printf("arcmsr_initialize: bus_alloc_resource .....................failure!\n");
2329 return ENOMEM;
2330 }
2331 if(rman_get_start(pACB->sys_res_arcmsr) <= 0)
2332 {
2333 arcmsr_free_resource(pACB);
2334 printf("arcmsr_initialize: rman_get_start ...........................failure!\n");
2335 return ENXIO;
2336 }
2337 mem_base=(vm_offset_t) rman_get_virtual(pACB->sys_res_arcmsr);
2338 if(mem_base==0)
2339 {
2340 arcmsr_free_resource(pACB);
2341 printf("arcmsr_initialize: rman_get_virtual ..........................failure!\n");
2342 return ENXIO;
2343 }
2344 if(pACB->acb_flags & ACB_F_MAPFREESRB_FAILD)
2345 {
2346 arcmsr_free_resource(pACB);
2347 printf("arcmsr_initialize: arman_get_virtual ..........................failure!\n");
2348 return ENXIO;
2349 }
2350 pACB->btag=rman_get_bustag(pACB->sys_res_arcmsr);
2351 pACB->bhandle=rman_get_bushandle(pACB->sys_res_arcmsr);
2352 pACB->pmu=(PMU)mem_base;
2353 pACB->acb_flags |= (ACB_F_IOCTL_WQBUFFER_CLEARED|ACB_F_IOCTL_RQBUFFER_CLEARED);
2354 pACB->acb_flags &= ~ACB_F_SCSISTOPADAPTER;
2355 arcmsr_iop_init(pACB);
2356 return(0);
2357 }
2358 /*
2359 ************************************************************************
2360 **
2361 ** attach and init a host adapter
2362 **
2363 ************************************************************************
2364 */
2365 static LONG arcmsr_attach(device_t dev)
2366 {
2367 PACB pACB=device_get_softc(dev);
2368 LONG unit=device_get_unit(dev);
2369 struct ccb_setasync csa;
2370 struct cam_devq *devq; /* Device Queue to use for this SIM */
2371 struct resource *irqres;
2372 int rid;
2373
2374 #if ARCMSR_DEBUG0
2375 printf("arcmsr_attach .............................\n" );
2376 #endif
2377
2378 if(arcmsr_initialize(dev))
2379 {
2380 printf("arcmsr_attach: arcmsr_initialize failure!\n");
2381 return ENXIO;
2382 }
2383 /* After setting up the adapter,map our interrupt */
2384 rid=0;
2385 irqres=bus_alloc_resource(dev,SYS_RES_IRQ,&rid,0,~0,1,RF_SHAREABLE | RF_ACTIVE);
2386 if(irqres == NULL || bus_setup_intr(dev,irqres,INTR_TYPE_CAM,arcmsr_interrupt,pACB,&pACB->ih))
2387 {
2388 arcmsr_free_resource(pACB);
2389 printf("arcmsr%d: unable to register interrupt handler!\n",unit);
2390 return ENXIO;
2391 }
2392 pACB->irqres=irqres;
2393 pACB->pci_dev=dev;
2394 pACB->pci_unit=unit;
2395 /*
2396 * Now let the CAM generic SCSI layer find the SCSI devices on
2397 * the bus * start queue to reset to the idle loop. *
2398 * Create device queue of SIM(s) * (MAX_START_JOB - 1) :
2399 * max_sim_transactions
2400 */
2401 devq=cam_simq_alloc(ARCMSR_MAX_START_JOB);
2402 if(devq == NULL)
2403 {
2404 arcmsr_free_resource(pACB);
2405 bus_release_resource(dev, SYS_RES_IRQ, 0, pACB->irqres);
2406 printf("arcmsr_attach: cam_simq_alloc failure!\n");
2407 return ENXIO;
2408 }
2409 pACB->psim=cam_sim_alloc(arcmsr_action,arcmsr_poll,"arcmsr",pACB,pACB->pci_unit,1,ARCMSR_MAX_OUTSTANDING_CMD,devq);
2410 if(pACB->psim == NULL)
2411 {
2412 arcmsr_free_resource(pACB);
2413 bus_release_resource(dev, SYS_RES_IRQ, 0, pACB->irqres);
2414 cam_simq_free(devq);
2415 printf("arcmsr_attach: cam_sim_alloc ..................failure!\n");
2416 return ENXIO;
2417 }
2418 if(xpt_bus_register(pACB->psim,0) != CAM_SUCCESS)
2419 {
2420 arcmsr_free_resource(pACB);
2421 bus_release_resource(dev, SYS_RES_IRQ, 0, pACB->irqres);
2422 cam_sim_free(pACB->psim,/*free_devq*/TRUE);
2423 printf("arcmsr_attach: xpt_bus_register .......................failure!\n");
2424 return ENXIO;
2425 }
2426 if(xpt_create_path(&pACB->ppath,/* periph */ NULL,cam_sim_path(pACB->psim),CAM_TARGET_WILDCARD,CAM_LUN_WILDCARD) != CAM_REQ_CMP)
2427 {
2428 arcmsr_free_resource(pACB);
2429 bus_release_resource(dev, SYS_RES_IRQ, 0, pACB->irqres);
2430 xpt_bus_deregister(cam_sim_path(pACB->psim));
2431 cam_sim_free(pACB->psim,/* free_simq */ TRUE);
2432 printf("arcmsr_attach: xpt_create_path .....................failure!\n");
2433 return ENXIO;
2434 }
2435 /*
2436 ****************************************************
2437 */
2438 xpt_setup_ccb(&csa.ccb_h,pACB->ppath,/*priority*/5);
2439 csa.ccb_h.func_code=XPT_SASYNC_CB;
2440 csa.event_enable=AC_FOUND_DEVICE|AC_LOST_DEVICE;
2441 csa.callback=arcmsr_async;
2442 csa.callback_arg=pACB->psim;
2443 xpt_action((union ccb *)&csa);
2444 /* Create the control device. */
2445 pACB->ioctl_dev=make_dev(&arcmsr_cdevsw, unit, UID_ROOT, GID_WHEEL /* GID_OPERATOR */, S_IRUSR | S_IWUSR, "arcmsr%d", unit);
2446 #if __FreeBSD_version < 503000
2447 pACB->ioctl_dev->si_drv1=pACB;
2448 #endif
2449 #if __FreeBSD_version > 500005
2450 (void)make_dev_alias(pACB->ioctl_dev, "arc%d", unit);
2451 #endif
2452
2453 #if 0
2454 #if __FreeBSD_version > 500005
2455 if(kthread_create(arcmsr_do_thread_works, pACB, &pACB->kthread_proc,0,"arcmsr%d: kthread",pACB->pci_unit))
2456 {
2457 device_printf(pACB->pci_dev,"cannot create kernel thread for this host adapetr\n");
2458 xpt_bus_deregister(cam_sim_path(pACB->psim));
2459 cam_sim_free(pACB->psim,/* free_simq */ TRUE);
2460 panic("arcmsr plunge kernel thread fail");
2461 }
2462 #else
2463 if(kthread_create(arcmsr_do_thread_works, pACB, &pACB->kthread_proc,"arcmsr%d: kthread", pACB->pci_unit))
2464 {
2465 device_printf(pACB->pci_dev,"cannot create kernel thread for this host adapetr\n");
2466 xpt_bus_deregister(cam_sim_path(pACB->psim));
2467 cam_sim_free(pACB->psim,/* free_simq */ TRUE);
2468 panic("arcmsr plunge kernel thread fail");
2469 }
2470 #endif
2471 #endif
2472 return 0;
2473 }
2474 /*
2475 ************************************************************************
2476 **
2477 **
2478 **
2479 ************************************************************************
2480 */
2481 static LONG arcmsr_probe(device_t dev)
2482 {
2483 ULONG id;
2484 #if ARCMSR_DEBUG0
2485 printf("arcmsr_probe................. \n");
2486 #endif
2487 switch(id=pci_get_devid(dev))
2488 {
2489 case PCIDevVenIDARC1110:
2490 device_set_desc(dev,"ARECA ARC1110 PCI-X 4 PORTS SATA RAID CONTROLLER \n" ARCMSR_DRIVER_VERSION );
2491 return 0;
2492 case PCIDevVenIDARC1120:
2493 device_set_desc(dev,"ARECA ARC1120 PCI-X 8 PORTS SATA RAID CONTROLLER (RAID6-ENGINE Inside) \n" ARCMSR_DRIVER_VERSION);
2494 return 0;
2495 case PCIDevVenIDARC1130:
2496 device_set_desc(dev,"ARECA ARC1130 PCI-X 12 PORTS SATA RAID CONTROLLER (RAID6-ENGINE Inside) \n" ARCMSR_DRIVER_VERSION);
2497 return 0;
2498 case PCIDevVenIDARC1160:
2499 device_set_desc(dev,"ARECA ARC1160 PCI-X 16 PORTS SATA RAID CONTROLLER (RAID6-ENGINE Inside) \n" ARCMSR_DRIVER_VERSION);
2500 return 0;
2501 case PCIDevVenIDARC1210:
2502 device_set_desc(dev,"ARECA ARC1210 PCI-EXPRESS 4 PORTS SATA RAID CONTROLLER \n" ARCMSR_DRIVER_VERSION);
2503 return 0;
2504 case PCIDevVenIDARC1220:
2505 device_set_desc(dev,"ARECA ARC1220 PCI-EXPRESS 8 PORTS SATA RAID CONTROLLER (RAID6-ENGINE Inside) \n" ARCMSR_DRIVER_VERSION);
2506 return 0;
2507 case PCIDevVenIDARC1230:
2508 device_set_desc(dev,"ARECA ARC1230 PCI-EXPRESS 12 PORTS SATA RAID CONTROLLER (RAID6-ENGINE Inside) \n" ARCMSR_DRIVER_VERSION);
2509 return 0;
2510 case PCIDevVenIDARC1260:
2511 device_set_desc(dev,"ARECA ARC1260 PCI-EXPRESS 16 PORTS SATA RAID CONTROLLER (RAID6-ENGINE Inside) \n" ARCMSR_DRIVER_VERSION);
2512 return 0;
2513 }
2514 return ENXIO;
2515 }
2516 /*
2517 ************************************************************************
2518 **
2519 **
2520 **
2521 ************************************************************************
2522 */
2523 static VOID arcmsr_shutdown(device_t dev)
2524 {
2525 LONG i,abort_cmd_cnt=0;
2526 ULONG s,intmask_org;
2527 PSRB pSRB;
2528 PACB pACB=device_get_softc(dev);
2529
2530 #if ARCMSR_DEBUG0
2531 printf("arcmsr_shutdown................. \n");
2532 #endif
2533 s=splcam();
2534 /* disable all outbound interrupt */
2535 intmask_org=CHIP_REG_READ32(&pACB->pmu->outbound_intmask);
2536 CHIP_REG_WRITE32(&pACB->pmu->outbound_intmask,(intmask_org|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE));
2537 /* stop adapter background rebuild */
2538 arcmsr_stop_adapter_bgrb(pACB);
2539 if(arcmsr_wait_msgint_ready(pACB)!=TRUE)
2540 {
2541 printf("arcmsr_pcidev_disattach: wait 'stop adapter rebulid' timeout.... \n");
2542 }
2543 arcmsr_flush_adapter_cache(pACB);
2544 if(arcmsr_wait_msgint_ready(pACB)!=TRUE)
2545 {
2546 printf("arcmsr_pcidev_disattach: wait 'flush adapter cache' timeout.... \n");
2547 }
2548 /* abort all outstanding command */
2549 pACB->acb_flags |= ACB_F_SCSISTOPADAPTER;
2550 pACB->acb_flags &= ~ACB_F_IOP_INITED;
2551 if(pACB->srboutstandingcount!=0)
2552 {
2553 PSRB pfreesrb;
2554 #if ARCMSR_DEBUG0
2555 printf("arcmsr_pcidev_disattach: .....pACB->srboutstandingcount!=0 \n");
2556 #endif
2557 /* Q back all outstanding srb into wait exec psrb Q*/
2558 pfreesrb=pACB->pfreesrb;
2559 for(i=0;i<ARCMSR_MAX_FREESRB_NUM;i++)
2560 {
2561 pSRB=&pfreesrb[i];
2562 if(pSRB->startdone==ARCMSR_SRB_START)
2563 {
2564 pSRB->srb_flags|=SRB_FLAG_MASTER_ABORTED;
2565 pSRB->pccb->ccb_h.status=CAM_REQ_ABORTED;
2566 abort_cmd_cnt++;
2567 }
2568 }
2569 if(abort_cmd_cnt!=0)
2570 {
2571 #if ARCMSR_DEBUG0
2572 printf("arcmsr_pcidev_disattach: .....abort_cmd_cnt!=0 \n");
2573 #endif
2574 arcmsr_abort_allcmd(pACB);
2575 if(arcmsr_wait_msgint_ready(pACB)!=TRUE)
2576 {
2577 printf("arcmsr_pcidev_disattach: wait 'abort all outstanding command' timeout.................in \n");
2578 }
2579 }
2580 atomic_set_int(&pACB->srboutstandingcount,0);
2581 }
2582 if(pACB->srbwait2gocount!=0)
2583 { /*remove first wait2go srb and abort it*/
2584 for(i=0;i<ARCMSR_MAX_OUTSTANDING_CMD;i++)
2585 {
2586 pSRB=pACB->psrbwait2go[i];
2587 if(pSRB!=NULL)
2588 {
2589 pACB->psrbwait2go[i]=NULL;
2590 atomic_subtract_int(&pACB->srbwait2gocount,1);
2591 pSRB->pccb->ccb_h.status=CAM_REQ_ABORTED;
2592 arcmsr_srb_complete(pSRB);
2593 }
2594 }
2595 }
2596 splx(s);
2597 pACB->acb_flags |= ACB_F_STOP_THREAD;
2598 wakeup(pACB->kthread_proc);/* signal to kernel thread do_dpcQ: "stop thread" */
2599 return;
2600 }
2601 /*
2602 ************************************************************************
2603 **
2604 **
2605 **
2606 ************************************************************************
2607 */
2608 static LONG arcmsr_detach(device_t dev)
2609 {
2610 PACB pACB=device_get_softc(dev);
2611
2612 arcmsr_shutdown(dev);
2613 arcmsr_free_resource(pACB);
2614 bus_release_resource(dev, SYS_RES_MEMORY, PCIR_MAPS, pACB->sys_res_arcmsr);
2615 bus_teardown_intr(dev, pACB->irqres, pACB->ih);
2616 bus_release_resource(dev, SYS_RES_IRQ, 0, pACB->irqres);
2617 xpt_async(AC_LOST_DEVICE, pACB->ppath, NULL);
2618 xpt_free_path(pACB->ppath);
2619 xpt_bus_deregister(cam_sim_path(pACB->psim));
2620 cam_sim_free(pACB->psim, TRUE);
2621 return (0);
2622 }
2623
2624
2625
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