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sys/dev/arcmsr/arcmsr.c
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1 /* 2 ****************************************************************************************** 3 ** O.S : FreeBSD 4 ** FILE NAME : arcmsr.c 5 ** BY : Erich Chen 6 ** Description: SCSI RAID Device Driver for 7 ** ARECA (ARC1110/1120/1160/1210/1220/1260) SATA RAID HOST Adapter 8 ** ARCMSR RAID Host adapter[RAID controller:INTEL 331(PCI-X) 341(PCI-EXPRESS) chip set] 9 ****************************************************************************************** 10 ************************************************************************ 11 ** 12 ** Copyright (c) 2004-2006 ARECA Co. Ltd. 13 ** Erich Chen, Taipei Taiwan All rights reserved. 14 ** 15 ** Redistribution and use in source and binary forms,with or without 16 ** modification,are permitted provided that the following conditions 17 ** are met: 18 ** 1. Redistributions of source code must retain the above copyright 19 ** notice,this list of conditions and the following disclaimer. 20 ** 2. Redistributions in binary form must reproduce the above copyright 21 ** notice,this list of conditions and the following disclaimer in the 22 ** documentation and/or other materials provided with the distribution. 23 ** 3. The name of the author may not be used to endorse or promote products 24 ** derived from this software without specific prior written permission. 25 ** 26 ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 27 ** IMPLIED WARRANTIES,INCLUDING,BUT NOT LIMITED TO,THE IMPLIED WARRANTIES 28 ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 29 ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,INDIRECT, 30 ** INCIDENTAL,SPECIAL,EXEMPLARY,OR CONSEQUENTIAL DAMAGES(INCLUDING,BUT 31 ** NOT LIMITED TO,PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 32 ** DATA,OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY 33 ** THEORY OF LIABILITY,WHETHER IN CONTRACT,STRICT LIABILITY,OR TORT 34 **(INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF 35 ** THIS SOFTWARE,EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 36 ************************************************************************** 37 ** History 38 ** 39 ** REV# DATE NAME DESCRIPTION 40 ** 1.00.00.00 3/31/2004 Erich Chen First release 41 ** 1.20.00.02 11/29/2004 Erich Chen bug fix with arcmsr_bus_reset when PHY error 42 ****************************************************************************************** 43 ** $FreeBSD: releng/6.0/sys/dev/arcmsr/arcmsr.c 147032 2005-06-05 23:05:26Z imp $ 44 */ 45 #define ARCMSR_DEBUG 1 46 /* 47 ********************************** 48 */ 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/malloc.h> 52 #include <sys/kernel.h> 53 #include <sys/bus.h> 54 #include <sys/queue.h> 55 #include <sys/stat.h> 56 #include <sys/devicestat.h> 57 #include <sys/kthread.h> 58 #include <sys/module.h> 59 #include <sys/proc.h> 60 #include <sys/lock.h> 61 #include <sys/sysctl.h> 62 #include <sys/poll.h> 63 #include <sys/ioccom.h> 64 #include <vm/vm.h> 65 #include <vm/vm_param.h> 66 #include <vm/pmap.h> 67 68 #include <isa/rtc.h> 69 70 #include <machine/bus.h> 71 #include <machine/clock.h> 72 #include <machine/resource.h> 73 #include <machine/atomic.h> 74 #include <sys/conf.h> 75 #include <sys/rman.h> 76 77 #include <cam/cam.h> 78 #include <cam/cam_ccb.h> 79 #include <cam/cam_sim.h> 80 #include <cam/cam_xpt_sim.h> 81 #include <cam/cam_debug.h> 82 #include <cam/scsi/scsi_all.h> 83 #include <cam/scsi/scsi_message.h> 84 /* 85 ************************************************************************** 86 ** Define the OS version specific locks 87 ************************************************************************** 88 */ 89 #if __FreeBSD_version >= 500005 90 #include <sys/selinfo.h> 91 #include <sys/mutex.h> 92 #include <dev/pci/pcivar.h> 93 #include <dev/pci/pcireg.h> 94 #define ARCMSR_LOCK_INIT(l, s) mtx_init(l, s,NULL, MTX_DEF|MTX_RECURSE) 95 #define ARCMSR_LOCK_ACQUIRE(l) mtx_lock(l) 96 #define ARCMSR_LOCK_RELEASE(l) mtx_unlock(l) 97 typedef struct mtx arcmsr_lock_t; 98 #else 99 #include <sys/select.h> 100 #include <pci/pcivar.h> 101 #include <pci/pcireg.h> 102 #define ARCMSR_LOCK_INIT(l, s) simple_lock_init(l) 103 #define ARCMSR_LOCK_ACQUIRE(l) simple_lock(l) 104 #define ARCMSR_LOCK_RELEASE(l) simple_unlock(l) 105 typedef struct simplelock arcmsr_lock_t; 106 #endif 107 #include <dev/arcmsr/arcmsr.h> 108 /* 109 ************************************************************************** 110 ** __FreeBSD_version 502010 111 ************************************************************************** 112 */ 113 static VOID arcmsr_interrupt(VOID *arg); 114 static LONG arcmsr_probe(device_t dev); 115 static LONG arcmsr_attach(device_t dev); 116 static LONG arcmsr_detach(device_t dev); 117 static VOID arcmsr_shutdown(device_t dev); 118 #if 0 119 ULONG arcmsr_make_timespec(ULONG year,ULONG mon,ULONG day,ULONG hour,ULONG min,ULONG sec); 120 ULONG arcmsr_getcmos_time(VOID); 121 #endif 122 LONG arcmsr_queue_dpc(PACB pACB,DPCFUN dpcfun,VOID *arg); 123 LONG arcmsr_iop_ioctlcmd(PACB pACB,ULONG ioctl_cmd,caddr_t arg); 124 BOOLEAN arcmsr_seek_cmd2abort(union ccb * pabortccb); 125 BOOLEAN arcmsr_wait_msgint_ready(PACB pACB); 126 PSRB arcmsr_get_freesrb(PACB pACB); 127 VOID arcmsr_free_resource(PACB pACB); 128 VOID arcmsr_bus_reset(PACB pACB); 129 VOID arcmsr_stop_adapter_bgrb(PACB pACB); 130 VOID arcmsr_start_adapter_bgrb(PACB pACB); 131 VOID arcmsr_iop_init(PACB pACB); 132 VOID arcmsr_do_dpcQ(PACB pACB); 133 VOID arcmsr_flush_adapter_cache(PACB pACB); 134 VOID arcmsr_do_thread_works(VOID *arg); 135 VOID arcmsr_queue_wait2go_srb(PACB pACB,PSRB pSRB); 136 VOID arcmsr_post_wait2go_srb(PACB pACB); 137 VOID arcmsr_post_Qbuffer(PACB pACB); 138 VOID arcmsr_abort_allcmd(PACB pACB); 139 VOID arcmsr_srb_complete(PSRB pSRB); 140 VOID arcmsr_iop_reset(PACB pACB); 141 VOID arcmsr_report_SenseInfoBuffer(PSRB pSRB); 142 VOID arcmsr_build_srb(PSRB pSRB, bus_dma_segment_t *dm_segs, LONG nseg); 143 /* 144 ***************************************************************************************** 145 ** Character device switch table 146 **struct cdevsw { 147 ** d_open_t *d_open; 148 ** d_close_t *d_close; 149 ** d_read_t *d_read; 150 ** d_write_t *d_write; 151 ** d_ioctl_t *d_ioctl; 152 ** d_poll_t *d_poll; 153 ** d_mmap_t *d_mmap; 154 ** d_strategy_t *d_strategy; 155 ** const char *d_name; "" base device name, e.g. 'vn' 156 ** int d_maj; 157 ** d_dump_t *d_dump; 158 ** d_psize_t *d_psize; 159 ** u_int d_flags; 160 ** int d_bmaj; 161 ** d_kqfilter_t *d_kqfilter; "" additions below are not binary compatible with 4.2 and below 162 **}; 163 ****************************************************************************************** 164 */ 165 /* 166 ************************************************************************** 167 ** Insert a delay in micro-seconds and milli-seconds. 168 ** static void MDELAY(LONG ms) { while (ms--) UDELAY(1000); } 169 ************************************************************************** 170 */ 171 static VOID UDELAY(LONG us) { DELAY(us); } 172 /* 173 ************************************************************************** 174 ** 175 ************************************************************************** 176 */ 177 static bus_dmamap_callback_t arcmsr_map_freesrb; 178 static bus_dmamap_callback_t arcmsr_executesrb; 179 /* 180 ************************************************************************** 181 ** 182 ************************************************************************** 183 */ 184 static d_open_t arcmsr_open; 185 static d_close_t arcmsr_close; 186 static d_ioctl_t arcmsr_ioctl; 187 188 static device_method_t arcmsr_methods[]={ 189 DEVMETHOD(device_probe, arcmsr_probe), 190 DEVMETHOD(device_attach, arcmsr_attach), 191 DEVMETHOD(device_detach, arcmsr_detach), 192 DEVMETHOD(device_shutdown, arcmsr_shutdown), 193 { 0,0 } 194 }; 195 196 static driver_t arcmsr_driver={ 197 "arcmsr",arcmsr_methods,sizeof(struct _ACB) 198 }; 199 200 static devclass_t arcmsr_devclass; 201 DRIVER_MODULE(arcmsr,pci,arcmsr_driver,arcmsr_devclass,0,0); 202 203 #if __FreeBSD_version >= 502010 204 static struct cdevsw arcmsr_cdevsw={ 205 .d_version = D_VERSION, 206 .d_flags = D_NEEDGIANT, 207 .d_open = arcmsr_open, /* open */ 208 .d_close = arcmsr_close, /* close */ 209 .d_ioctl = arcmsr_ioctl, /* ioctl */ 210 .d_name = "arcmsr", /* name */ 211 }; 212 #else 213 #define ARCMSR_CDEV_MAJOR 180 214 215 static struct cdevsw arcmsr_cdevsw = { 216 arcmsr_open, /* open */ 217 arcmsr_close, /* close */ 218 noread, /* read */ 219 nowrite, /* write */ 220 arcmsr_ioctl, /* ioctl */ 221 nopoll, /* poll */ 222 nommap, /* mmap */ 223 nostrategy, /* strategy */ 224 "arcmsr", /* name */ 225 ARCMSR_CDEV_MAJOR, /* major */ 226 nodump, /* dump */ 227 nopsize, /* psize */ 228 0 /* flags */ 229 }; 230 #endif 231 232 #if __FreeBSD_version < 500005 233 static int arcmsr_open(dev_t dev, int flags, int fmt, struct proc *proc) 234 #else 235 #if __FreeBSD_version < 503000 236 static int arcmsr_open(dev_t dev, int flags, int fmt, struct thread *proc) 237 #else 238 static int arcmsr_open(struct cdev *dev, int flags, int fmt, d_thread_t *proc) 239 #endif 240 #endif 241 { 242 #if __FreeBSD_version < 503000 243 PACB pACB=dev->si_drv1; 244 #else 245 int unit = minor(dev); 246 PACB pACB = devclass_get_softc(arcmsr_devclass, unit); 247 #endif 248 249 if(pACB==NULL) 250 { 251 return ENXIO; 252 } 253 /* Check to make sure the device isn't already open */ 254 if (pACB->acb_flags & ACB_F_IOCTL_OPEN) 255 { 256 return EBUSY; 257 } 258 pACB->acb_flags |= ACB_F_IOCTL_OPEN; 259 return 0; 260 } 261 /* 262 ************************************************************************** 263 ************************************************************************** 264 */ 265 #if __FreeBSD_version < 500005 266 static int arcmsr_close(dev_t dev, int flags, int fmt, struct proc *proc) 267 #else 268 #if __FreeBSD_version < 503000 269 static int arcmsr_close(dev_t dev, int flags, int fmt, struct thread *proc) 270 #else 271 static int arcmsr_close(struct cdev *dev, int flags, int fmt, d_thread_t *proc) 272 #endif 273 #endif 274 { 275 #if __FreeBSD_version < 503000 276 PACB pACB=dev->si_drv1; 277 #else 278 int unit = minor(dev); 279 PACB pACB = devclass_get_softc(arcmsr_devclass, unit); 280 #endif 281 282 if(pACB==NULL) 283 { 284 return ENXIO; 285 } 286 pACB->acb_flags &= ~ACB_F_IOCTL_OPEN; 287 return 0; 288 } 289 /* 290 ************************************************************************** 291 **ENOENT 292 **ENOIOCTL 293 **ENOMEM 294 **EINVAL 295 ************************************************************************** 296 */ 297 #if __FreeBSD_version < 500005 298 static int arcmsr_ioctl(dev_t dev, u_long ioctl_cmd, caddr_t arg, int flags, struct proc *proc) 299 #else 300 #if __FreeBSD_version < 503000 301 static int arcmsr_ioctl(dev_t dev, u_long ioctl_cmd, caddr_t arg, int flags, struct thread *proc) 302 #else 303 static int arcmsr_ioctl(struct cdev *dev, u_long ioctl_cmd, caddr_t arg,int flags, d_thread_t *proc) 304 #endif 305 #endif 306 { 307 #if __FreeBSD_version < 503000 308 PACB pACB=dev->si_drv1; 309 #else 310 int unit = minor(dev); 311 PACB pACB = devclass_get_softc(arcmsr_devclass, unit); 312 #endif 313 314 if(pACB==NULL) 315 { 316 return ENXIO; 317 } 318 return(arcmsr_iop_ioctlcmd(pACB,ioctl_cmd,arg)); 319 } 320 /* 321 ************************************************************************** 322 ************************************************************************** 323 */ 324 LONG arcmsr_queue_dpc(PACB pACB,DPCFUN dpcfun,VOID *arg) 325 { 326 ULONG s; 327 UCHAR index_pointer; 328 329 #if ARCMSR_DEBUG0 330 printf("arcmsr_queue_dpc................. \n"); 331 #endif 332 333 s=splcam(); 334 index_pointer=(pACB->dpcQ_tail + 1) % ARCMSR_MAX_DPC; 335 if(index_pointer==pACB->dpcQ_head) 336 { 337 splx(s); 338 printf("DPC Queue full!\n"); 339 return -1; 340 } 341 pACB->dpcQ[pACB->dpcQ_tail].dpcfun=dpcfun; 342 pACB->dpcQ[pACB->dpcQ_tail].arg=arg; 343 pACB->dpcQ_tail=index_pointer; 344 /* 345 ********************************************************* 346 ********************************************************* 347 */ 348 wakeup(pACB->kthread_proc); 349 350 splx(s); 351 return 0; 352 } 353 /* 354 ************************************************************************** 355 ** arcmsr_do_dpcQ 356 ** execute dpc routine by kernel thread 357 *************************************************************************** 358 */ 359 VOID arcmsr_do_dpcQ(PACB pACB) 360 { 361 #if ARCMSR_DEBUG0 362 printf("arcmsr_do_dpcQ................. \n"); 363 #endif 364 /* 365 ****************************************** 366 ****************************************** 367 */ 368 while (pACB->dpcQ_head!=pACB->dpcQ_tail) 369 { 370 ULONG s; 371 DPC dpc; 372 373 /* got a "dpc routine" */ 374 s=splcam(); 375 dpc=pACB->dpcQ[pACB->dpcQ_head]; 376 pACB->dpcQ_head++; 377 pACB->dpcQ_head %=ARCMSR_MAX_DPC; 378 splx(s); 379 /* execute this "dpc routine" */ 380 dpc.dpcfun(dpc.arg); 381 } 382 return; 383 } 384 #if 0 385 /* 386 ********************************************************************** 387 ** <second> bit 05,04,03,02,01,00: 0 - 59 388 ** <minute> bit 11,10,09,08,07,06: 0 - 59 389 ** <month> bit 15,14,13,12: 1 - 12 390 ** <hour> bit 21,20,19,18,17,16: 0 - 59 391 ** <day> bit 26,25,24,23,22: 1 - 31 392 ** <year> bit 31,30,29,28,27: 0=2000,31=2031 393 ********************************************************************** 394 */ 395 ULONG arcmsr_make_timespec(ULONG year,ULONG mon,ULONG day,ULONG hour,ULONG min,ULONG sec) 396 { 397 return((year<<27)|(day<<22)|(hour<<16)|(mon<<12)|(min<<6)|(sec)); 398 } 399 /* 400 ******************************************************************** 401 ******************************************************************** 402 */ 403 ULONG arcmsr_getcmos_time(VOID) 404 { 405 ULONG year,mon,day,hour,min,sec; 406 407 #if ARCMSR_DEBUG0 408 printf("arcmsr_getcmos_time \n"); 409 #endif 410 sec=bcd2bin(rtcin(RTC_SEC)); 411 min=bcd2bin(rtcin(RTC_MIN)); 412 hour=bcd2bin(rtcin(RTC_HRS)); 413 day=bcd2bin(rtcin(RTC_DAY)); 414 mon=bcd2bin(rtcin(RTC_MONTH)); 415 year=bcd2bin(rtcin(RTC_YEAR)); 416 if((year +=1900) < 1970) 417 year +=100; 418 return arcmsr_make_timespec(year,mon,day,hour,min,sec); 419 } 420 #endif 421 /* 422 ********************************************************************************* 423 ** Asynchronous notification handler. 424 ********************************************************************************* 425 */ 426 static VOID arcmsr_async(VOID *cb_arg, ULONG code, struct cam_path *path, VOID *arg) 427 { 428 PACB pACB; 429 UCHAR target_id,target_lun; 430 struct cam_sim *sim; 431 ULONG s; 432 #if ARCMSR_DEBUG0 433 printf("arcmsr_async.......................................... \n"); 434 #endif 435 s=splcam(); 436 437 sim=(struct cam_sim *) cb_arg; 438 pACB =(PACB) cam_sim_softc(sim); 439 switch (code) 440 { 441 case AC_LOST_DEVICE: 442 target_id=xpt_path_target_id(path); 443 target_lun=xpt_path_lun_id(path); 444 if((target_id > ARCMSR_MAX_TARGETID) || (target_lun > ARCMSR_MAX_TARGETLUN)) 445 { 446 break; 447 } 448 printf("%s:scsi id%d lun%d device lost \n",device_get_name(pACB->pci_dev),target_id,target_lun); 449 break; 450 default: 451 break; 452 } 453 splx(s); 454 } 455 /* 456 ************************************************************************** 457 * arcmsr_do_thread_works 458 * execute programs schedule by kernel thread 459 * execute programs schedule by kernel thread 460 * :do background rebuilding 461 * 462 * tsleep(void *ident,int priority,const char *wmesg,int timo) 463 * tsleep() 464 * General sleep call. Suspends the current process until a wakeup is 465 * performed on the specified identifier. The process will then be made 466 * runnable with the specified priority. Sleeps at most timo/hz seconds 467 * (0 means no timeout). If pri includes PCATCH flag, signals are checked 468 * before and after sleeping, else signals are not checked. Returns 0 if 469 * awakened, EWOULDBLOCK if the timeout expires. If PCATCH is set and a 470 * signal needs to be delivered, ERESTART is returned if the current system 471 * call should be restarted if possible, and EINTR is returned if the system 472 * call should be interrupted by the signal (return EINTR). 473 * 474 * await(int priority, int timo) 475 * await() - wait for async condition to occur. The process blocks until 476 * wakeup() is called on the most recent asleep() address. If wakeup is called 477 * priority to await(), await() winds up being a NOP. 478 * 479 * If await() is called more then once (without an intervening asleep() call), 480 * await() is still effectively a NOP but it calls mi_switch() to give other 481 * processes some cpu before returning. The process is left runnable. 482 * 483 * <<<<<<<< EXPERIMENTAL, UNTESTED >>>>>>>>>> 484 * asleep(void *ident, int priority, const char *wmesg, int timo) 485 * asleep() - async sleep call. Place process on wait queue and return 486 * immediately without blocking. The process stays runnable until await() 487 * is called. If ident is NULL, remove process from wait queue if it is still 488 * on one. 489 * 490 * Only the most recent sleep condition is effective when making successive 491 * calls to asleep() or when calling tsleep(). 492 * 493 * The timeout, if any, is not initiated until await() is called. The sleep 494 * priority, signal, and timeout is specified in the asleep() call but may be 495 * overriden in the await() call. 496 * 497 * <<<<<<<< EXPERIMENTAL, UNTESTED >>>>>>>>>> 498 * :do background rebuilding 499 *************************************************************************** 500 */ 501 VOID arcmsr_do_thread_works(VOID *arg) 502 { 503 PACB pACB=(PACB) arg; 504 ARCMSR_LOCK_INIT(&pACB->arcmsr_kthread_lock, "arcmsr kthread lock"); 505 506 #if ARCMSR_DEBUG0 507 printf("arcmsr_do_thread_works................. \n"); 508 #endif 509 510 ARCMSR_LOCK_ACQUIRE(&pACB->arcmsr_kthread_lock); 511 while(1) 512 { 513 tsleep((caddr_t)pACB->kthread_proc, PRIBIO | PWAIT, "arcmsr", hz/4);/*.25 sec*/ 514 /* 515 ** if do_dpcQ_semaphore is signal 516 ** do following works 517 */ 518 arcmsr_do_dpcQ(pACB); /*see if there were some dpc routine need to execute*/ 519 if(pACB->acb_flags & ACB_F_STOP_THREAD) 520 { 521 ARCMSR_LOCK_RELEASE(&pACB->arcmsr_kthread_lock); 522 break; 523 } 524 } 525 kthread_exit(0); 526 return; 527 } 528 /* 529 ************************************************************************ 530 ** 531 ** 532 ************************************************************************ 533 */ 534 VOID arcmsr_flush_adapter_cache(PACB pACB) 535 { 536 #if ARCMSR_DEBUG0 537 printf("arcmsr_flush_adapter_cache..............\n"); 538 #endif 539 CHIP_REG_WRITE32(&pACB->pmu->inbound_msgaddr0,ARCMSR_INBOUND_MESG0_FLUSH_CACHE); 540 return; 541 } 542 /* 543 ********************************************************************** 544 ** 545 ** 546 ** 547 ********************************************************************** 548 */ 549 BOOLEAN arcmsr_wait_msgint_ready(PACB pACB) 550 { 551 ULONG Index; 552 UCHAR Retries=0x00; 553 do 554 { 555 for(Index=0; Index < 500000; Index++) 556 { 557 if(CHIP_REG_READ32(&pACB->pmu->outbound_intstatus) & ARCMSR_MU_OUTBOUND_MESSAGE0_INT) 558 { 559 CHIP_REG_WRITE32(&pACB->pmu->outbound_intstatus, ARCMSR_MU_OUTBOUND_MESSAGE0_INT);/*clear interrupt*/ 560 return TRUE; 561 } 562 /* one us delay */ 563 UDELAY(10); 564 }/*max 5 seconds*/ 565 }while(Retries++ < 24);/*max 2 minutes*/ 566 return FALSE; 567 } 568 /* 569 ********************************************************************** 570 ** 571 ** Q back this SRB into ACB ArraySRB 572 ** 573 ********************************************************************** 574 */ 575 VOID arcmsr_srb_complete(PSRB pSRB) 576 { 577 ULONG s; 578 PACB pACB=pSRB->pACB; 579 union ccb *pccb=pSRB->pccb; 580 581 #if ARCMSR_DEBUG0 582 printf("arcmsr_srb_complete: pSRB=%p srb_doneindex=%x srb_startindex=%x\n",pSRB,pACB->srb_doneindex,pACB->srb_startindex); 583 #endif 584 585 if ((pccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) 586 { 587 bus_dmasync_op_t op; 588 589 if ((pccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) 590 { 591 op = BUS_DMASYNC_POSTREAD; 592 } 593 else 594 { 595 op = BUS_DMASYNC_POSTWRITE; 596 } 597 bus_dmamap_sync(pACB->buffer_dmat, pSRB->dmamap, op); 598 bus_dmamap_unload(pACB->buffer_dmat, pSRB->dmamap); 599 } 600 s=splcam(); 601 atomic_subtract_int(&pACB->srboutstandingcount,1); 602 pSRB->startdone=ARCMSR_SRB_DONE; 603 pSRB->srb_flags=0; 604 pACB->psrbringQ[pACB->srb_doneindex]=pSRB; 605 pACB->srb_doneindex++; 606 pACB->srb_doneindex %= ARCMSR_MAX_FREESRB_NUM; 607 splx(s); 608 xpt_done(pccb); 609 return; 610 } 611 /* 612 ********************************************************************** 613 ** if scsi error do auto request sense 614 ********************************************************************** 615 */ 616 VOID arcmsr_report_SenseInfoBuffer(PSRB pSRB) 617 { 618 union ccb *pccb=pSRB->pccb; 619 PSENSE_DATA psenseBuffer=(PSENSE_DATA)&pccb->csio.sense_data; 620 #if ARCMSR_DEBUG0 621 printf("arcmsr_report_SenseInfoBuffer...........\n"); 622 #endif 623 624 pccb->ccb_h.status|=CAM_REQ_CMP; 625 if(psenseBuffer) 626 { 627 memset(psenseBuffer, 0, sizeof(pccb->csio.sense_data)); 628 memcpy(psenseBuffer,pSRB->arcmsr_cdb.SenseData,get_min(sizeof(struct _SENSE_DATA),sizeof(pccb->csio.sense_data))); 629 psenseBuffer->ErrorCode=0x70; 630 psenseBuffer->Valid=1; 631 pccb->ccb_h.status|=CAM_AUTOSNS_VALID; 632 } 633 return; 634 } 635 /* 636 ********************************************************************* 637 ** to insert pSRB into tail of pACB wait exec srbQ 638 ********************************************************************* 639 */ 640 VOID arcmsr_queue_wait2go_srb(PACB pACB,PSRB pSRB) 641 { 642 ULONG s; 643 LONG i=0; 644 #if ARCMSR_DEBUG0 645 printf("arcmsr_qtail_wait2go_srb:......................................... \n"); 646 #endif 647 648 s=splcam(); 649 while(1) 650 { 651 if(pACB->psrbwait2go[i]==NULL) 652 { 653 pACB->psrbwait2go[i]=pSRB; 654 atomic_add_int(&pACB->srbwait2gocount,1); 655 splx(s); 656 return; 657 } 658 i++; 659 i%=ARCMSR_MAX_OUTSTANDING_CMD; 660 } 661 return; 662 } 663 /* 664 ********************************************************************* 665 ** 666 ********************************************************************* 667 */ 668 VOID arcmsr_abort_allcmd(PACB pACB) 669 { 670 CHIP_REG_WRITE32(&pACB->pmu->inbound_msgaddr0,ARCMSR_INBOUND_MESG0_ABORT_CMD); 671 return; 672 } 673 674 /* 675 **************************************************************************** 676 ** Routine Description: Reset 80331 iop. 677 ** Arguments: 678 ** Return Value: Nothing. 679 **************************************************************************** 680 */ 681 VOID arcmsr_iop_reset(PACB pACB) 682 { 683 PSRB pSRB,pfreesrb; 684 ULONG intmask_org,mask; 685 LONG i=0; 686 687 #if ARCMSR_DEBUG0 688 printf("arcmsr_iop_reset: reset iop controller......................................\n"); 689 #endif 690 if(pACB->srboutstandingcount!=0) 691 { 692 /* Q back all outstanding srb into wait exec psrb Q*/ 693 #if ARCMSR_DEBUG0 694 printf("arcmsr_iop_reset: srboutstandingcount=%d ...\n",pACB->srboutstandingcount); 695 #endif 696 /* disable all outbound interrupt */ 697 intmask_org=CHIP_REG_READ32(&pACB->pmu->outbound_intmask); 698 CHIP_REG_WRITE32(&pACB->pmu->outbound_intmask,intmask_org|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE); 699 /* talk to iop 331 outstanding command aborted*/ 700 arcmsr_abort_allcmd(pACB); 701 if(arcmsr_wait_msgint_ready(pACB)!=TRUE) 702 { 703 printf("arcmsr_iop_reset: wait 'abort all outstanding command' timeout.................in \n"); 704 } 705 /*clear all outbound posted Q*/ 706 for(i=0;i<ARCMSR_MAX_OUTSTANDING_CMD;i++) 707 { 708 CHIP_REG_READ32(&pACB->pmu->outbound_queueport); 709 } 710 pfreesrb=pACB->pfreesrb; 711 for(i=0;i<ARCMSR_MAX_FREESRB_NUM;i++) 712 { 713 pSRB=&pfreesrb[i]; 714 if(pSRB->startdone==ARCMSR_SRB_START) 715 { 716 pSRB->startdone=ARCMSR_SRB_ABORTED; 717 pSRB->pccb->ccb_h.status=CAM_REQ_ABORTED; 718 arcmsr_srb_complete(pSRB); 719 } 720 } 721 /* enable all outbound interrupt */ 722 mask=~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE|ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE|ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE); 723 CHIP_REG_WRITE32(&pACB->pmu->outbound_intmask,intmask_org & mask); 724 atomic_set_int(&pACB->srboutstandingcount,0); 725 /* post abort all outstanding command message to RAID controller */ 726 } 727 i=0; 728 while(pACB->srbwait2gocount > 0) 729 { 730 pSRB=pACB->psrbwait2go[i]; 731 if(pSRB!=NULL) 732 { 733 #if ARCMSR_DEBUG0 734 printf("arcmsr_iop_reset:abort command... srbwait2gocount=%d ...\n",pACB->srbwait2gocount); 735 #endif 736 pACB->psrbwait2go[i]=NULL; 737 pSRB->startdone=ARCMSR_SRB_ABORTED; 738 pSRB->pccb->ccb_h.status=CAM_REQ_ABORTED; 739 arcmsr_srb_complete(pSRB); 740 atomic_subtract_int(&pACB->srbwait2gocount,1); 741 } 742 i++; 743 i%=ARCMSR_MAX_OUTSTANDING_CMD; 744 } 745 return; 746 } 747 /* 748 ********************************************************************** 749 ** 750 ** PAGE_SIZE=4096 or 8192,PAGE_SHIFT=12 751 ********************************************************************** 752 */ 753 VOID arcmsr_build_srb(PSRB pSRB, bus_dma_segment_t *dm_segs, LONG nseg) 754 { 755 PARCMSR_CDB pARCMSR_CDB=&pSRB->arcmsr_cdb; 756 PCHAR psge=(PCHAR)&pARCMSR_CDB->u; 757 ULONG address_lo,address_hi; 758 union ccb *pccb=pSRB->pccb; 759 struct ccb_scsiio *pcsio=&pccb->csio; 760 LONG arccdbsize=0x30; 761 762 #if ARCMSR_DEBUG0 763 printf("arcmsr_build_srb........................... \n"); 764 #endif 765 memset(pARCMSR_CDB,0,sizeof(struct _ARCMSR_CDB)); 766 pARCMSR_CDB->Bus=0; 767 pARCMSR_CDB->TargetID=pccb->ccb_h.target_id; 768 pARCMSR_CDB->LUN=pccb->ccb_h.target_lun; 769 pARCMSR_CDB->Function=1; 770 pARCMSR_CDB->CdbLength=(UCHAR)pcsio->cdb_len; 771 pARCMSR_CDB->Context=(CPT2INT)pARCMSR_CDB; 772 bcopy(pcsio->cdb_io.cdb_bytes, pARCMSR_CDB->Cdb, pcsio->cdb_len); 773 if(nseg != 0) 774 { 775 PACB pACB=pSRB->pACB; 776 bus_dmasync_op_t op; 777 LONG length,i,cdb_sgcount=0; 778 779 /* map stor port SG list to our iop SG List.*/ 780 for(i=0;i<nseg;i++) 781 { 782 /* Get the physical address of the current data pointer */ 783 length=(ULONG) dm_segs[i].ds_len; 784 address_lo=dma_addr_lo32(dm_segs[i].ds_addr); 785 address_hi=dma_addr_hi32(dm_segs[i].ds_addr); 786 if(address_hi==0) 787 { 788 PSG32ENTRY pdma_sg=(PSG32ENTRY)psge; 789 pdma_sg->address=address_lo; 790 pdma_sg->length=length; 791 psge += sizeof(SG32ENTRY); 792 arccdbsize += sizeof(SG32ENTRY); 793 } 794 else 795 { 796 LONG sg64s_size=0,tmplength=length; 797 798 #if ARCMSR_DEBUG0 799 printf("arcmsr_build_srb: !!!!!!!!!!!......address_hi=%x.... \n",address_hi); 800 #endif 801 while(1) 802 { 803 LONG64 span4G,length0; 804 PSG64ENTRY pdma_sg=(PSG64ENTRY)psge; 805 806 span4G=(LONG64)address_lo + tmplength; 807 pdma_sg->addresshigh=address_hi; 808 pdma_sg->address=address_lo; 809 if(span4G > 0x100000000) 810 { 811 /*see if cross 4G boundary*/ 812 length0=0x100000000-address_lo; 813 pdma_sg->length=(ULONG)length0|IS_SG64_ADDR; 814 address_hi=address_hi+1; 815 address_lo=0; 816 tmplength=tmplength-(LONG)length0; 817 sg64s_size += sizeof(SG64ENTRY); 818 psge += sizeof(SG64ENTRY); 819 cdb_sgcount++; 820 } 821 else 822 { 823 pdma_sg->length=tmplength|IS_SG64_ADDR; 824 sg64s_size += sizeof(SG64ENTRY); 825 psge += sizeof(SG64ENTRY); 826 break; 827 } 828 } 829 arccdbsize += sg64s_size; 830 } 831 cdb_sgcount++; 832 } 833 pARCMSR_CDB->sgcount=(UCHAR)cdb_sgcount; 834 pARCMSR_CDB->DataLength=pcsio->dxfer_len; 835 if( arccdbsize > 256) 836 { 837 pARCMSR_CDB->Flags|=ARCMSR_CDB_FLAG_SGL_BSIZE; 838 } 839 if((pccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) 840 { 841 op=BUS_DMASYNC_PREREAD; 842 } 843 else 844 { 845 op=BUS_DMASYNC_PREWRITE; 846 pARCMSR_CDB->Flags|=ARCMSR_CDB_FLAG_WRITE; 847 pSRB->srb_flags|=SRB_FLAG_WRITE; 848 } 849 bus_dmamap_sync(pACB->buffer_dmat, pSRB->dmamap, op); 850 } 851 #if ARCMSR_DEBUG0 852 printf("arcmsr_build_srb: pSRB=%p cmd=%x xferlength=%d arccdbsize=%d sgcount=%d\n",pSRB,pcsio->cdb_io.cdb_bytes[0],pARCMSR_CDB->DataLength,arccdbsize,pARCMSR_CDB->sgcount); 853 #endif 854 return; 855 } 856 /* 857 ************************************************************************** 858 ** 859 ** arcmsr_post_srb - Send a protocol specific ARC send postcard to a AIOC . 860 ** handle: Handle of registered ARC protocol driver 861 ** adapter_id: AIOC unique identifier(integer) 862 ** pPOSTCARD_SEND: Pointer to ARC send postcard 863 ** 864 ** This routine posts a ARC send postcard to the request post FIFO of a 865 ** specific ARC adapter. 866 ** 867 ************************************************************************** 868 */ 869 static VOID arcmsr_post_srb(PACB pACB,PSRB pSRB) 870 { 871 ULONG cdb_shifted_phyaddr=(ULONG) pSRB->cdb_shifted_phyaddr; 872 PARCMSR_CDB pARCMSR_CDB=(PARCMSR_CDB)&pSRB->arcmsr_cdb; 873 874 #if ARCMSR_DEBUG0 875 printf("arcmsr_post_srb: pSRB=%p cdb_shifted_phyaddr=%x\n",pSRB,cdb_shifted_phyaddr); 876 #endif 877 atomic_add_int(&pACB->srboutstandingcount,1); 878 pSRB->startdone=ARCMSR_SRB_START; 879 if(pARCMSR_CDB->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) 880 { 881 CHIP_REG_WRITE32(&pACB->pmu->inbound_queueport,cdb_shifted_phyaddr|ARCMSR_SRBPOST_FLAG_SGL_BSIZE); 882 } 883 else 884 { 885 CHIP_REG_WRITE32(&pACB->pmu->inbound_queueport,cdb_shifted_phyaddr); 886 } 887 return; 888 } 889 /* 890 ************************************************************************** 891 ** 892 ** 893 ************************************************************************** 894 */ 895 VOID arcmsr_post_wait2go_srb(PACB pACB) 896 { 897 ULONG s; 898 PSRB pSRB; 899 LONG i=0; 900 #if ARCMSR_DEBUG0 901 printf("arcmsr_post_wait2go_srb:srbwait2gocount=%d srboutstandingcount=%d\n",pACB->srbwait2gocount,pACB->srboutstandingcount); 902 #endif 903 s=splcam(); 904 while((pACB->srbwait2gocount > 0) && (pACB->srboutstandingcount < ARCMSR_MAX_OUTSTANDING_CMD)) 905 { 906 pSRB=pACB->psrbwait2go[i]; 907 if(pSRB!=NULL) 908 { 909 pACB->psrbwait2go[i]=NULL; 910 arcmsr_post_srb(pACB,pSRB); 911 atomic_subtract_int(&pACB->srbwait2gocount,1); 912 } 913 i++; 914 i%=ARCMSR_MAX_OUTSTANDING_CMD; 915 } 916 splx(s); 917 return; 918 } 919 /* 920 ********************************************************************** 921 ** Function: arcmsr_post_Qbuffer 922 ** Output: 923 ********************************************************************** 924 */ 925 VOID arcmsr_post_Qbuffer(PACB pACB) 926 { 927 ULONG s; 928 PUCHAR pQbuffer; 929 PQBUFFER pwbuffer=(PQBUFFER)&pACB->pmu->ioctl_wbuffer; 930 PUCHAR iop_data=(PUCHAR)pwbuffer->data; 931 LONG allxfer_len=0; 932 933 s=splcam(); 934 while((pACB->wqbuf_firstindex!=pACB->wqbuf_lastindex) && (allxfer_len<124)) 935 { 936 pQbuffer=&pACB->wqbuffer[pACB->wqbuf_firstindex]; 937 memcpy(iop_data,pQbuffer,1); 938 pACB->wqbuf_firstindex++; 939 pACB->wqbuf_firstindex %= ARCMSR_MAX_QBUFFER; /*if last index number set it to 0 */ 940 iop_data++; 941 allxfer_len++; 942 } 943 pwbuffer->data_len=allxfer_len; 944 /* 945 ** push inbound doorbell and wait reply at hwinterrupt routine for next Qbuffer post 946 */ 947 CHIP_REG_WRITE32(&pACB->pmu->inbound_doorbell,ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK); 948 splx(s); 949 return; 950 } 951 /* 952 ************************************************************************ 953 ** 954 ** 955 ************************************************************************ 956 */ 957 VOID arcmsr_stop_adapter_bgrb(PACB pACB) 958 { 959 #if ARCMSR_DEBUG0 960 printf("arcmsr_stop_adapter_bgrb..............\n"); 961 #endif 962 pACB->acb_flags |= ACB_F_MSG_STOP_BGRB; 963 pACB->acb_flags &= ~ACB_F_MSG_START_BGRB; 964 CHIP_REG_WRITE32(&pACB->pmu->inbound_msgaddr0,ARCMSR_INBOUND_MESG0_STOP_BGRB); 965 return; 966 } 967 /* 968 ************************************************************************ 969 ** 970 ** 971 ************************************************************************ 972 */ 973 static VOID arcmsr_poll(struct cam_sim * psim) 974 { 975 arcmsr_interrupt(cam_sim_softc(psim)); 976 return; 977 } 978 /* 979 ********************************************************************** 980 ** Function: arcmsr_interrupt 981 ** Output: VOID 982 ** CAM Status field values 983 **typedef enum { 984 ** CAM_REQ_INPROG, CCB request is in progress 985 ** CAM_REQ_CMP, CCB request completed without error 986 ** CAM_REQ_ABORTED, CCB request aborted by the host 987 ** CAM_UA_ABORT, Unable to abort CCB request 988 ** CAM_REQ_CMP_ERR, CCB request completed with an error 989 ** CAM_BUSY, CAM subsytem is busy 990 ** CAM_REQ_INVALID, CCB request was invalid 991 ** CAM_PATH_INVALID, Supplied Path ID is invalid 992 ** CAM_DEV_NOT_THERE, SCSI Device Not Installed/there 993 ** CAM_UA_TERMIO, Unable to terminate I/O CCB request 994 ** CAM_SEL_TIMEOUT, Target Selection Timeout 995 ** CAM_CMD_TIMEOUT, Command timeout 996 ** CAM_SCSI_STATUS_ERROR, SCSI error, look at error code in CCB 997 ** CAM_MSG_REJECT_REC, Message Reject Received 998 ** CAM_SCSI_BUS_RESET, SCSI Bus Reset Sent/Received 999 ** CAM_UNCOR_PARITY, Uncorrectable parity error occurred 1000 ** CAM_AUTOSENSE_FAIL=0x10, Autosense: request sense cmd fail 1001 ** CAM_NO_HBA, No HBA Detected error 1002 ** CAM_DATA_RUN_ERR, Data Overrun error 1003 ** CAM_UNEXP_BUSFREE, Unexpected Bus Free 1004 ** CAM_SEQUENCE_FAIL, Target Bus Phase Sequence Failure 1005 ** CAM_CCB_LEN_ERR, CCB length supplied is inadequate 1006 ** CAM_PROVIDE_FAIL, Unable to provide requested capability 1007 ** CAM_BDR_SENT, A SCSI BDR msg was sent to target 1008 ** CAM_REQ_TERMIO, CCB request terminated by the host 1009 ** CAM_UNREC_HBA_ERROR, Unrecoverable Host Bus Adapter Error 1010 ** CAM_REQ_TOO_BIG, The request was too large for this host 1011 ** CAM_REQUEUE_REQ, 1012 ** * This request should be requeued to preserve 1013 ** * transaction ordering. This typically occurs 1014 ** * when the SIM recognizes an error that should 1015 ** * freeze the queue and must place additional 1016 ** * requests for the target at the sim level 1017 ** * back into the XPT queue. 1018 ** 1019 ** CAM_IDE=0x33, Initiator Detected Error 1020 ** CAM_RESRC_UNAVAIL, Resource Unavailable 1021 ** CAM_UNACKED_EVENT, Unacknowledged Event by Host 1022 ** CAM_MESSAGE_RECV, Message Received in Host Target Mode 1023 ** CAM_INVALID_CDB, Invalid CDB received in Host Target Mode 1024 ** CAM_LUN_INVALID, Lun supplied is invalid 1025 ** CAM_TID_INVALID, Target ID supplied is invalid 1026 ** CAM_FUNC_NOTAVAIL, The requested function is not available 1027 ** CAM_NO_NEXUS, Nexus is not established 1028 ** CAM_IID_INVALID, The initiator ID is invalid 1029 ** CAM_CDB_RECVD, The SCSI CDB has been received 1030 ** CAM_LUN_ALRDY_ENA, The LUN is already eanbeld for target mode 1031 ** CAM_SCSI_BUSY, SCSI Bus Busy 1032 ** 1033 ** CAM_DEV_QFRZN=0x40, The DEV queue is frozen w/this err 1034 ** 1035 ** Autosense data valid for target 1036 ** CAM_AUTOSNS_VALID=0x80, 1037 ** CAM_RELEASE_SIMQ=0x100, SIM ready to take more commands 1038 ** CAM_SIM_QUEUED =0x200, SIM has this command in it's queue 1039 ** 1040 ** CAM_STATUS_MASK=0x3F, Mask bits for just the status # 1041 ** 1042 ** Target Specific Adjunct Status 1043 ** CAM_SENT_SENSE=0x40000000 sent sense with status 1044 **} cam_status; 1045 ********************************************************************** 1046 */ 1047 static VOID arcmsr_interrupt(VOID *arg) 1048 { 1049 PACB pACB=(PACB)arg; 1050 PSRB pSRB; 1051 ULONG flagpsrb,outbound_intstatus,outbound_doorbell; 1052 1053 #if ARCMSR_DEBUG0 1054 printf("arcmsr_interrupt..............\n"); 1055 #endif 1056 /* 1057 ********************************************* 1058 ** check outbound intstatus À˹µL¶l®t«öªù¹a 1059 ********************************************* 1060 */ 1061 outbound_intstatus=CHIP_REG_READ32(&pACB->pmu->outbound_intstatus) & pACB->outbound_int_enable; 1062 CHIP_REG_WRITE32(&pACB->pmu->outbound_intstatus, outbound_intstatus);/*clear interrupt*/ 1063 if(outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT) 1064 { 1065 #if ARCMSR_DEBUG0 1066 printf("arcmsr_interrupt:..........ARCMSR_MU_OUTBOUND_DOORBELL_INT\n"); 1067 #endif 1068 /* 1069 ********************************************* 1070 ** DOORBELL ¥m¾´! ¬O§_¦³¶l¥ónñ¦¬ 1071 ********************************************* 1072 */ 1073 outbound_doorbell=CHIP_REG_READ32(&pACB->pmu->outbound_doorbell); 1074 CHIP_REG_WRITE32(&pACB->pmu->outbound_doorbell,outbound_doorbell);/*clear interrupt */ 1075 if(outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK) 1076 { 1077 PQBUFFER prbuffer=(PQBUFFER)&pACB->pmu->ioctl_rbuffer; 1078 PUCHAR iop_data=(PUCHAR)prbuffer->data; 1079 PUCHAR pQbuffer; 1080 LONG my_empty_len,iop_len,rqbuf_firstindex,rqbuf_lastindex; 1081 ULONG s; 1082 /*check this iop data if overflow my rqbuffer*/ 1083 s=splcam(); 1084 rqbuf_lastindex=pACB->rqbuf_lastindex; 1085 rqbuf_firstindex=pACB->rqbuf_firstindex; 1086 iop_len=prbuffer->data_len; 1087 my_empty_len=(rqbuf_firstindex-rqbuf_lastindex-1)&(ARCMSR_MAX_QBUFFER-1); 1088 if(my_empty_len>=iop_len) 1089 { 1090 while(iop_len > 0) 1091 { 1092 pQbuffer=&pACB->rqbuffer[pACB->rqbuf_lastindex]; 1093 memcpy(pQbuffer,iop_data,1); 1094 pACB->rqbuf_lastindex++; 1095 pACB->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER;/*if last index number set it to 0 */ 1096 iop_data++; 1097 iop_len--; 1098 } 1099 CHIP_REG_WRITE32(&pACB->pmu->inbound_doorbell, ARCMSR_INBOUND_DRIVER_DATA_READ_OK);/*signature, let IOP331 know data has been readed */ 1100 } 1101 else 1102 { 1103 pACB->acb_flags|=ACB_F_IOPDATA_OVERFLOW; 1104 } 1105 splx(s); 1106 } 1107 if(outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK) 1108 { 1109 ULONG s; 1110 /* 1111 ********************************************* 1112 ** ¬Ý¬Ý¬O§_ÁÙ¦³¶l¥ón¶¶¹D±H¥X 1113 ********************************************* 1114 */ 1115 s=splcam(); 1116 if(pACB->wqbuf_firstindex!=pACB->wqbuf_lastindex) 1117 { 1118 PUCHAR pQbuffer; 1119 PQBUFFER pwbuffer=(PQBUFFER)&pACB->pmu->ioctl_wbuffer; 1120 PUCHAR iop_data=(PUCHAR)pwbuffer->data; 1121 LONG allxfer_len=0; 1122 1123 while((pACB->wqbuf_firstindex!=pACB->wqbuf_lastindex) && (allxfer_len<124)) 1124 { 1125 pQbuffer=&pACB->wqbuffer[pACB->wqbuf_firstindex]; 1126 memcpy(iop_data,pQbuffer,1); 1127 pACB->wqbuf_firstindex++; 1128 pACB->wqbuf_firstindex %= ARCMSR_MAX_QBUFFER; /*if last index number set it to 0 */ 1129 iop_data++; 1130 allxfer_len++; 1131 } 1132 pwbuffer->data_len=allxfer_len; 1133 /* 1134 ** push inbound doorbell tell iop driver data write ok and wait reply on next hwinterrupt for next Qbuffer post 1135 */ 1136 CHIP_REG_WRITE32(&pACB->pmu->inbound_doorbell,ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK); 1137 } 1138 else 1139 { 1140 pACB->acb_flags |= ACB_F_IOCTL_WQBUFFER_CLEARED; 1141 } 1142 splx(s); 1143 } 1144 } 1145 if(outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT) 1146 { 1147 /* 1148 ***************************************************************************** 1149 ** areca cdb command done 1150 ***************************************************************************** 1151 */ 1152 while(1) 1153 { 1154 if((flagpsrb=CHIP_REG_READ32(&pACB->pmu->outbound_queueport)) == 0xFFFFFFFF) 1155 { 1156 break;/*chip FIFO no srb for completion already*/ 1157 } 1158 /* check if command done with no error*/ 1159 pSRB=(PSRB)(CINT2P)(pACB->vir2phy_offset+(flagpsrb << 5));/*frame must be 32 bytes aligned*/ 1160 if((pSRB->pACB!=pACB) || (pSRB->startdone!=ARCMSR_SRB_START)) 1161 { 1162 if(pSRB->startdone==ARCMSR_SRB_ABORTED) 1163 { 1164 pSRB->pccb->ccb_h.status=CAM_REQ_ABORTED; 1165 arcmsr_srb_complete(pSRB); 1166 break; 1167 } 1168 printf("arcmsr_interrupt:got an illegal srb command done ...pACB=%p pSRB=%p srboutstandingcount=%d .....\n",pACB,pSRB,pACB->srboutstandingcount); 1169 break; 1170 } 1171 if((flagpsrb & ARCMSR_SRBREPLY_FLAG_ERROR)==0) 1172 { 1173 pSRB->pccb->ccb_h.status=CAM_REQ_CMP; 1174 arcmsr_srb_complete(pSRB); 1175 } 1176 else 1177 { 1178 switch(pSRB->arcmsr_cdb.DeviceStatus) 1179 { 1180 case ARCMSR_DEV_SELECT_TIMEOUT: 1181 { 1182 #if ARCMSR_DEBUG0 1183 printf("pSRB=%p ......ARCMSR_DEV_SELECT_TIMEOUT\n",pSRB); 1184 #endif 1185 pSRB->pccb->ccb_h.status=CAM_SEL_TIMEOUT; 1186 arcmsr_srb_complete(pSRB); 1187 } 1188 break; 1189 case ARCMSR_DEV_ABORTED: 1190 { 1191 #if ARCMSR_DEBUG0 1192 printf("pSRB=%p ......ARCMSR_DEV_ABORTED\n",pSRB); 1193 #endif 1194 pSRB->pccb->ccb_h.status=CAM_DEV_NOT_THERE; 1195 arcmsr_srb_complete(pSRB); 1196 } 1197 break; 1198 case ARCMSR_DEV_INIT_FAIL: 1199 { 1200 #if ARCMSR_DEBUG0 1201 printf("pSRB=%p .....ARCMSR_DEV_INIT_FAIL\n",pSRB); 1202 #endif 1203 pSRB->pccb->ccb_h.status=CAM_DEV_NOT_THERE; 1204 arcmsr_srb_complete(pSRB); 1205 } 1206 break; 1207 case SCSISTAT_CHECK_CONDITION: 1208 { 1209 #if ARCMSR_DEBUG0 1210 printf("pSRB=%p .....SCSISTAT_CHECK_CONDITION\n",pSRB); 1211 #endif 1212 arcmsr_report_SenseInfoBuffer(pSRB); 1213 arcmsr_srb_complete(pSRB); 1214 } 1215 break; 1216 default: 1217 /* error occur Q all error srb to errorsrbpending Q*/ 1218 printf("arcmsr_interrupt:command error done ......but got unknow DeviceStatus=%x....\n",pSRB->arcmsr_cdb.DeviceStatus); 1219 pSRB->pccb->ccb_h.status=CAM_UNCOR_PARITY;/*unknow error or crc error just for retry*/ 1220 arcmsr_srb_complete(pSRB); 1221 break; 1222 } 1223 } 1224 } /*drain reply FIFO*/ 1225 } 1226 if(pACB->srbwait2gocount != 0) 1227 { 1228 arcmsr_post_wait2go_srb(pACB);/*try to post all pending srb*/ 1229 } 1230 return; 1231 } 1232 /* 1233 *********************************************************************** 1234 ** 1235 **int copyin __P((const void *udaddr, void *kaddr, size_t len)); 1236 **int copyout __P((const void *kaddr, void *udaddr, size_t len)); 1237 ** 1238 **ENOENT "" No such file or directory "" 1239 **ENOIOCTL "" ioctl not handled by this layer "" 1240 **ENOMEM "" Cannot allocate memory "" 1241 **EINVAL "" Invalid argument "" 1242 ************************************************************************ 1243 */ 1244 LONG arcmsr_iop_ioctlcmd(PACB pACB,ULONG ioctl_cmd,caddr_t arg) 1245 { 1246 PCMD_IO_CONTROL pccbioctl=(PCMD_IO_CONTROL) arg; 1247 1248 #if ARCMSR_DEBUG0 1249 printf("arcmsr_iop_ioctlcmd................. \n"); 1250 #endif 1251 1252 if(memcmp(pccbioctl->Signature,"ARCMSR",6)!=0) 1253 { 1254 return EINVAL; 1255 } 1256 switch(ioctl_cmd) 1257 { 1258 case ARCMSR_IOCTL_READ_RQBUFFER: 1259 { 1260 ULONG s; 1261 PCMD_IOCTL_FIELD pccbioctlfld=(PCMD_IOCTL_FIELD)arg; 1262 PUCHAR pQbuffer,ptmpQbuffer=pccbioctlfld->ioctldatabuffer; 1263 LONG allxfer_len=0; 1264 1265 s=splcam(); 1266 while((pACB->rqbuf_firstindex!=pACB->rqbuf_lastindex) && (allxfer_len<1031)) 1267 { 1268 /*copy READ QBUFFER to srb*/ 1269 pQbuffer=&pACB->rqbuffer[pACB->rqbuf_firstindex]; 1270 memcpy(ptmpQbuffer,pQbuffer,1); 1271 pACB->rqbuf_firstindex++; 1272 pACB->rqbuf_firstindex %= ARCMSR_MAX_QBUFFER; /*if last index number set it to 0 */ 1273 ptmpQbuffer++; 1274 allxfer_len++; 1275 } 1276 if(pACB->acb_flags & ACB_F_IOPDATA_OVERFLOW) 1277 { 1278 PQBUFFER prbuffer=(PQBUFFER)&pACB->pmu->ioctl_rbuffer; 1279 PUCHAR pQbuffer; 1280 PUCHAR iop_data=(PUCHAR)prbuffer->data; 1281 LONG iop_len; 1282 1283 pACB->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 1284 iop_len=(LONG)prbuffer->data_len; 1285 /*this iop data does no chance to make me overflow again here, so just do it*/ 1286 while(iop_len>0) 1287 { 1288 pQbuffer=&pACB->rqbuffer[pACB->rqbuf_lastindex]; 1289 memcpy(pQbuffer,iop_data,1); 1290 pACB->rqbuf_lastindex++; 1291 pACB->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER;/*if last index number set it to 0 */ 1292 iop_data++; 1293 iop_len--; 1294 } 1295 CHIP_REG_WRITE32(&pACB->pmu->inbound_doorbell, ARCMSR_INBOUND_DRIVER_DATA_READ_OK);/*signature, let IOP331 know data has been readed */ 1296 } 1297 pccbioctl->Length=allxfer_len; 1298 pccbioctl->ReturnCode=ARCMSR_IOCTL_RETURNCODE_OK; 1299 splx(s); 1300 return ARC_IOCTL_SUCCESS; 1301 } 1302 break; 1303 case ARCMSR_IOCTL_WRITE_WQBUFFER: 1304 { 1305 ULONG s; 1306 PCMD_IOCTL_FIELD pccbioctlfld=(PCMD_IOCTL_FIELD)arg; 1307 LONG my_empty_len,user_len,wqbuf_firstindex,wqbuf_lastindex; 1308 PUCHAR pQbuffer,ptmpuserbuffer=pccbioctlfld->ioctldatabuffer; 1309 1310 s=splcam(); 1311 user_len=pccbioctl->Length; 1312 1313 /*check if data xfer length of this request will overflow my array qbuffer */ 1314 wqbuf_lastindex=pACB->wqbuf_lastindex; 1315 wqbuf_firstindex=pACB->wqbuf_firstindex; 1316 my_empty_len=(wqbuf_firstindex-wqbuf_lastindex-1)&(ARCMSR_MAX_QBUFFER-1); 1317 if(my_empty_len>=user_len) 1318 { 1319 while(user_len>0) 1320 { 1321 /*copy srb data to wqbuffer*/ 1322 pQbuffer=&pACB->wqbuffer[pACB->wqbuf_lastindex]; 1323 memcpy(pQbuffer,ptmpuserbuffer,1); 1324 pACB->wqbuf_lastindex++; 1325 pACB->wqbuf_lastindex %= ARCMSR_MAX_QBUFFER;/*if last index number set it to 0 */ 1326 ptmpuserbuffer++; 1327 user_len--; 1328 } 1329 /*post fist Qbuffer*/ 1330 if(pACB->acb_flags & ACB_F_IOCTL_WQBUFFER_CLEARED) 1331 { 1332 pACB->acb_flags &=~ACB_F_IOCTL_WQBUFFER_CLEARED; 1333 arcmsr_post_Qbuffer(pACB); 1334 } 1335 pccbioctl->ReturnCode=ARCMSR_IOCTL_RETURNCODE_OK; 1336 } 1337 else 1338 { 1339 pccbioctl->ReturnCode=ARCMSR_IOCTL_RETURNCODE_ERROR; 1340 } 1341 splx(s); 1342 return ARC_IOCTL_SUCCESS; 1343 } 1344 break; 1345 case ARCMSR_IOCTL_CLEAR_RQBUFFER: 1346 { 1347 ULONG s; 1348 PUCHAR pQbuffer=pACB->rqbuffer; 1349 s=splcam(); 1350 if(pACB->acb_flags & ACB_F_IOPDATA_OVERFLOW) 1351 { 1352 pACB->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 1353 CHIP_REG_WRITE32(&pACB->pmu->inbound_doorbell, ARCMSR_INBOUND_DRIVER_DATA_READ_OK);/*signature, let IOP331 know data has been readed */ 1354 } 1355 pACB->acb_flags |= ACB_F_IOCTL_RQBUFFER_CLEARED; 1356 pACB->rqbuf_firstindex=0; 1357 pACB->rqbuf_lastindex=0; 1358 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER); 1359 pccbioctl->ReturnCode=ARCMSR_IOCTL_RETURNCODE_OK; 1360 splx(s); 1361 return ARC_IOCTL_SUCCESS; 1362 } 1363 break; 1364 case ARCMSR_IOCTL_CLEAR_WQBUFFER: 1365 { 1366 ULONG s; 1367 PUCHAR pQbuffer=pACB->wqbuffer; 1368 1369 s=splcam(); 1370 if(pACB->acb_flags & ACB_F_IOPDATA_OVERFLOW) 1371 { 1372 pACB->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 1373 CHIP_REG_WRITE32(&pACB->pmu->inbound_doorbell, ARCMSR_INBOUND_DRIVER_DATA_READ_OK);/*signature, let IOP331 know data has been readed */ 1374 } 1375 pACB->acb_flags |= ACB_F_IOCTL_WQBUFFER_CLEARED; 1376 pACB->wqbuf_firstindex=0; 1377 pACB->wqbuf_lastindex=0; 1378 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER); 1379 pccbioctl->ReturnCode=ARCMSR_IOCTL_RETURNCODE_OK; 1380 splx(s); 1381 return ARC_IOCTL_SUCCESS; 1382 } 1383 break; 1384 case ARCMSR_IOCTL_CLEAR_ALLQBUFFER: 1385 { 1386 ULONG s; 1387 PUCHAR pQbuffer; 1388 1389 s=splcam(); 1390 if(pACB->acb_flags & ACB_F_IOPDATA_OVERFLOW) 1391 { 1392 pACB->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 1393 CHIP_REG_WRITE32(&pACB->pmu->inbound_doorbell, ARCMSR_INBOUND_DRIVER_DATA_READ_OK);/*signature, let IOP331 know data has been readed */ 1394 } 1395 pACB->acb_flags |= (ACB_F_IOCTL_WQBUFFER_CLEARED|ACB_F_IOCTL_RQBUFFER_CLEARED); 1396 pACB->rqbuf_firstindex=0; 1397 pACB->rqbuf_lastindex=0; 1398 pACB->wqbuf_firstindex=0; 1399 pACB->wqbuf_lastindex=0; 1400 pQbuffer=pACB->rqbuffer; 1401 memset(pQbuffer, 0, sizeof(struct _QBUFFER)); 1402 pQbuffer=pACB->wqbuffer; 1403 memset(pQbuffer, 0, sizeof(struct _QBUFFER)); 1404 pccbioctl->ReturnCode=ARCMSR_IOCTL_RETURNCODE_OK; 1405 splx(s); 1406 return ARC_IOCTL_SUCCESS; 1407 } 1408 break; 1409 case ARCMSR_IOCTL_RETURN_CODE_3F: 1410 { 1411 pccbioctl->ReturnCode=ARCMSR_IOCTL_RETURNCODE_3F; 1412 return ARC_IOCTL_SUCCESS; 1413 } 1414 break; 1415 case ARCMSR_IOCTL_SAY_HELLO: 1416 { 1417 PCMD_IOCTL_FIELD pccbioctlfld=(PCMD_IOCTL_FIELD)arg; 1418 PCHAR hello_string="Hello! I am ARCMSR"; 1419 PCHAR puserbuffer=(PUCHAR)pccbioctlfld->ioctldatabuffer; 1420 1421 if(memcpy(puserbuffer,hello_string,(SHORT)strlen(hello_string))) 1422 { 1423 pccbioctl->ReturnCode=ARCMSR_IOCTL_RETURNCODE_ERROR; 1424 return ENOIOCTL; 1425 } 1426 pccbioctl->ReturnCode=ARCMSR_IOCTL_RETURNCODE_OK; 1427 return ARC_IOCTL_SUCCESS; 1428 } 1429 break; 1430 } 1431 return EINVAL; 1432 } 1433 /* 1434 ************************************************************************** 1435 ** 1436 ************************************************************************** 1437 */ 1438 PSRB arcmsr_get_freesrb(PACB pACB) 1439 { 1440 PSRB pSRB=NULL; 1441 ULONG s; 1442 LONG srb_startindex,srb_doneindex; 1443 1444 #if ARCMSR_DEBUG0 1445 printf("arcmsr_get_freesrb: srb_startindex=%d srb_doneindex=%d\n",pACB->srb_startindex,pACB->srb_doneindex); 1446 #endif 1447 1448 s=splcam(); 1449 srb_doneindex=pACB->srb_doneindex; 1450 srb_startindex=pACB->srb_startindex; 1451 pSRB=pACB->psrbringQ[srb_startindex]; 1452 srb_startindex++; 1453 srb_startindex %= ARCMSR_MAX_FREESRB_NUM; 1454 if(srb_doneindex!=srb_startindex) 1455 { 1456 pACB->srb_startindex=srb_startindex; 1457 } 1458 else 1459 { 1460 pSRB=NULL; 1461 } 1462 splx(s); 1463 return(pSRB); 1464 } 1465 /* 1466 ********************************************************************* 1467 ** 1468 ** 1469 ** 1470 ********************************************************************* 1471 */ 1472 static VOID arcmsr_executesrb(VOID *arg,bus_dma_segment_t *dm_segs,LONG nseg,LONG error) 1473 { 1474 PSRB pSRB=(PSRB)arg; 1475 PACB pACB; 1476 union ccb *pccb; 1477 1478 #if ARCMSR_DEBUG0 1479 printf("arcmsr_executesrb........................................ \n" ); 1480 #endif 1481 1482 pccb=pSRB->pccb; 1483 pACB=(PACB)pSRB->pACB; 1484 if(error != 0) 1485 { 1486 if(error != EFBIG) 1487 { 1488 printf("arcmsr_executesrb:%d Unexepected error %x returned from " "bus_dmamap_load\n",pACB->pci_unit,error); 1489 } 1490 if(pccb->ccb_h.status == CAM_REQ_INPROG) 1491 { 1492 xpt_freeze_devq(pccb->ccb_h.path,/*count*/1); 1493 pccb->ccb_h.status=CAM_REQ_TOO_BIG|CAM_DEV_QFRZN; 1494 } 1495 xpt_done(pccb); 1496 return; 1497 } 1498 arcmsr_build_srb(pSRB,dm_segs,nseg); 1499 if((pccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_INPROG) 1500 { 1501 if(nseg != 0) 1502 { 1503 bus_dmamap_unload(pACB->buffer_dmat,pSRB->dmamap); 1504 } 1505 xpt_done(pccb); 1506 return; 1507 } 1508 pccb->ccb_h.status |= CAM_SIM_QUEUED; 1509 if(pACB->srboutstandingcount < ARCMSR_MAX_OUTSTANDING_CMD) 1510 { 1511 /* 1512 ****************************************************************** 1513 ** and we can make sure there were no pending srb in this duration 1514 ****************************************************************** 1515 */ 1516 arcmsr_post_srb(pACB,pSRB); 1517 } 1518 else 1519 { 1520 /* 1521 ****************************************************************** 1522 ** Q of srbwaitexec will be post out when any outstanding command complete 1523 ****************************************************************** 1524 */ 1525 arcmsr_queue_wait2go_srb(pACB,pSRB); 1526 } 1527 return; 1528 } 1529 /* 1530 ***************************************************************************************** 1531 ** 1532 ***************************************************************************************** 1533 */ 1534 BOOLEAN arcmsr_seek_cmd2abort(union ccb * pabortccb) 1535 { 1536 PSRB pSRB,pfreesrb; 1537 PACB pACB=(PACB) pabortccb->ccb_h.arcmsr_ccbacb_ptr; 1538 ULONG s,intmask_org,mask; 1539 LONG i=0; 1540 1541 #if ARCMSR_DEBUG0 1542 printf("arcmsr_seek_cmd2abort.................. \n"); 1543 #endif 1544 1545 s=splcam(); 1546 /* 1547 ** It is the upper layer do abort command this lock just prior to calling us. 1548 ** First determine if we currently own this command. 1549 ** Start by searching the device queue. If not found 1550 ** at all,and the system wanted us to just abort the 1551 ** command return success. 1552 */ 1553 if(pACB->srboutstandingcount!=0) 1554 { 1555 /* Q back all outstanding srb into wait exec psrb Q*/ 1556 pfreesrb=pACB->pfreesrb; 1557 for(i=0;i<ARCMSR_MAX_FREESRB_NUM;i++) 1558 { 1559 pSRB=&pfreesrb[i]; 1560 if(pSRB->startdone==ARCMSR_SRB_START) 1561 { 1562 if(pSRB->pccb==pabortccb) 1563 { 1564 /* disable all outbound interrupt */ 1565 intmask_org=CHIP_REG_READ32(&pACB->pmu->outbound_intmask); 1566 CHIP_REG_WRITE32(&pACB->pmu->outbound_intmask,intmask_org|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE); 1567 /* talk to iop 331 outstanding command aborted*/ 1568 arcmsr_abort_allcmd(pACB); 1569 if(arcmsr_wait_msgint_ready(pACB)!=TRUE) 1570 { 1571 printf("arcmsr_seek_cmd2abort: wait 'abort all outstanding command' timeout.................in \n"); 1572 } 1573 /*clear all outbound posted Q*/ 1574 for(i=0;i<ARCMSR_MAX_OUTSTANDING_CMD;i++) 1575 { 1576 CHIP_REG_READ32(&pACB->pmu->outbound_queueport); 1577 } 1578 pfreesrb=pACB->pfreesrb; 1579 for(i=0;i<ARCMSR_MAX_FREESRB_NUM;i++) 1580 { 1581 pSRB=&pfreesrb[i]; 1582 if(pSRB->startdone==ARCMSR_SRB_START) 1583 { 1584 pSRB->startdone=ARCMSR_SRB_ABORTED; 1585 pSRB->pccb->ccb_h.status=CAM_REQ_ABORTED; 1586 arcmsr_srb_complete(pSRB); 1587 } 1588 } 1589 /* enable all outbound interrupt */ 1590 mask=~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE|ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE|ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE); 1591 CHIP_REG_WRITE32(&pACB->pmu->outbound_intmask,intmask_org & mask); 1592 splx(s); 1593 return(TRUE); 1594 } 1595 } 1596 } 1597 } 1598 /* 1599 ** seek this command at our command list 1600 ** if command found then remove,abort it and free this SRB 1601 */ 1602 if(pACB->srbwait2gocount!=0) 1603 { 1604 for(i=0;i<ARCMSR_MAX_OUTSTANDING_CMD;i++) 1605 { 1606 pSRB=pACB->psrbwait2go[i]; 1607 if(pSRB!=NULL) 1608 { 1609 if(pSRB->pccb==pabortccb) 1610 { 1611 pACB->psrbwait2go[i]=NULL; 1612 pSRB->startdone=ARCMSR_SRB_ABORTED; 1613 pSRB->pccb->ccb_h.status=CAM_REQ_ABORTED; 1614 arcmsr_srb_complete(pSRB); 1615 atomic_subtract_int(&pACB->srbwait2gocount,1); 1616 splx(s); 1617 return(TRUE); 1618 } 1619 } 1620 } 1621 } 1622 splx(s); 1623 return (FALSE); 1624 } 1625 /* 1626 **************************************************************************** 1627 ** 1628 **************************************************************************** 1629 */ 1630 VOID arcmsr_bus_reset(PACB pACB) 1631 { 1632 #if ARCMSR_DEBUG0 1633 printf("arcmsr_bus_reset.......................... \n"); 1634 #endif 1635 1636 arcmsr_iop_reset(pACB); 1637 return; 1638 } 1639 /* 1640 ********************************************************************* 1641 ** 1642 ** CAM Status field values 1643 **typedef enum { 1644 ** CAM_REQ_INPROG, CCB request is in progress 1645 ** CAM_REQ_CMP, CCB request completed without error 1646 ** CAM_REQ_ABORTED, CCB request aborted by the host 1647 ** CAM_UA_ABORT, Unable to abort CCB request 1648 ** CAM_REQ_CMP_ERR, CCB request completed with an error 1649 ** CAM_BUSY, CAM subsytem is busy 1650 ** CAM_REQ_INVALID, CCB request was invalid 1651 ** CAM_PATH_INVALID, Supplied Path ID is invalid 1652 ** CAM_DEV_NOT_THERE, SCSI Device Not Installed/there 1653 ** CAM_UA_TERMIO, Unable to terminate I/O CCB request 1654 ** CAM_SEL_TIMEOUT, Target Selection Timeout 1655 ** CAM_CMD_TIMEOUT, Command timeout 1656 ** CAM_SCSI_STATUS_ERROR, SCSI error, look at error code in CCB 1657 ** CAM_MSG_REJECT_REC, Message Reject Received 1658 ** CAM_SCSI_BUS_RESET, SCSI Bus Reset Sent/Received 1659 ** CAM_UNCOR_PARITY, Uncorrectable parity error occurred 1660 ** CAM_AUTOSENSE_FAIL=0x10, Autosense: request sense cmd fail 1661 ** CAM_NO_HBA, No HBA Detected error 1662 ** CAM_DATA_RUN_ERR, Data Overrun error 1663 ** CAM_UNEXP_BUSFREE, Unexpected Bus Free 1664 ** CAM_SEQUENCE_FAIL, Target Bus Phase Sequence Failure 1665 ** CAM_CCB_LEN_ERR, CCB length supplied is inadequate 1666 ** CAM_PROVIDE_FAIL, Unable to provide requested capability 1667 ** CAM_BDR_SENT, A SCSI BDR msg was sent to target 1668 ** CAM_REQ_TERMIO, CCB request terminated by the host 1669 ** CAM_UNREC_HBA_ERROR, Unrecoverable Host Bus Adapter Error 1670 ** CAM_REQ_TOO_BIG, The request was too large for this host 1671 ** CAM_REQUEUE_REQ, 1672 ** * This request should be requeued to preserve 1673 ** * transaction ordering. This typically occurs 1674 ** * when the SIM recognizes an error that should 1675 ** * freeze the queue and must place additional 1676 ** * requests for the target at the sim level 1677 ** * back into the XPT queue. 1678 ** 1679 ** CAM_IDE=0x33, Initiator Detected Error 1680 ** CAM_RESRC_UNAVAIL, Resource Unavailable 1681 ** CAM_UNACKED_EVENT, Unacknowledged Event by Host 1682 ** CAM_MESSAGE_RECV, Message Received in Host Target Mode 1683 ** CAM_INVALID_CDB, Invalid CDB received in Host Target Mode 1684 ** CAM_LUN_INVALID, Lun supplied is invalid 1685 ** CAM_TID_INVALID, Target ID supplied is invalid 1686 ** CAM_FUNC_NOTAVAIL, The requested function is not available 1687 ** CAM_NO_NEXUS, Nexus is not established 1688 ** CAM_IID_INVALID, The initiator ID is invalid 1689 ** CAM_CDB_RECVD, The SCSI CDB has been received 1690 ** CAM_LUN_ALRDY_ENA, The LUN is already eanbeld for target mode 1691 ** CAM_SCSI_BUSY, SCSI Bus Busy 1692 ** 1693 ** CAM_DEV_QFRZN=0x40, The DEV queue is frozen w/this err 1694 ** 1695 ** Autosense data valid for target 1696 ** CAM_AUTOSNS_VALID=0x80, 1697 ** CAM_RELEASE_SIMQ=0x100, SIM ready to take more commands 1698 ** CAM_SIM_QUEUED =0x200, SIM has this command in it's queue 1699 ** 1700 ** CAM_STATUS_MASK=0x3F, Mask bits for just the status # 1701 ** 1702 ** Target Specific Adjunct Status 1703 ** CAM_SENT_SENSE=0x40000000 sent sense with status 1704 **} cam_status; 1705 ** 1706 **union ccb { 1707 ** struct ccb_hdr ccb_h; For convenience 1708 ** struct ccb_scsiio csio; 1709 ** struct ccb_getdev cgd; 1710 ** struct ccb_getdevlist cgdl; 1711 ** struct ccb_pathinq cpi; 1712 ** struct ccb_relsim crs; 1713 ** struct ccb_setasync csa; 1714 ** struct ccb_setdev csd; 1715 ** struct ccb_pathstats cpis; 1716 ** struct ccb_getdevstats cgds; 1717 ** struct ccb_dev_match cdm; 1718 ** struct ccb_trans_settings cts; 1719 ** struct ccb_calc_geometry ccg; 1720 ** struct ccb_abort cab; 1721 ** struct ccb_resetbus crb; 1722 ** struct ccb_resetdev crd; 1723 ** struct ccb_termio tio; 1724 ** struct ccb_accept_tio atio; 1725 ** struct ccb_scsiio ctio; 1726 ** struct ccb_en_lun cel; 1727 ** struct ccb_immed_notify cin; 1728 ** struct ccb_notify_ack cna; 1729 ** struct ccb_eng_inq cei; 1730 ** struct ccb_eng_exec cee; 1731 ** struct ccb_rescan crcn; 1732 ** struct ccb_debug cdbg; 1733 ** } 1734 ** 1735 **struct ccb_hdr { 1736 ** cam_pinfo pinfo; "" Info for priority scheduling 1737 ** camq_entry xpt_links; "" For chaining in the XPT layer 1738 ** camq_entry sim_links; "" For chaining in the SIM layer 1739 ** camq_entry periph_links; "" For chaining in the type driver 1740 ** u_int32_t retry_count; 1741 ** void (*cbfcnp)(struct cam_periph *, union ccb *);"" Callback on completion function 1742 ** xpt_opcode func_code; "" XPT function code 1743 ** u_int32_t status; "" Status returned by CAM subsystem 1744 ** struct cam_path *path; "" Compiled path for this ccb 1745 ** path_id_t path_id; "" Path ID for the request 1746 ** target_id_t target_id; "" Target device ID 1747 ** lun_id_t target_lun; "" Target LUN number 1748 ** u_int32_t flags; 1749 ** ccb_ppriv_area periph_priv; 1750 ** ccb_spriv_area sim_priv; 1751 ** u_int32_t timeout; "" Timeout value 1752 ** struct callout_handle timeout_ch; "" Callout handle used for timeouts 1753 **}; 1754 ** 1755 **typedef union { 1756 ** u_int8_t *cdb_ptr; "" Pointer to the CDB bytes to send 1757 ** u_int8_t cdb_bytes[IOCDBLEN]; "" Area for the CDB send 1758 **} cdb_t; 1759 ** 1760 ** SCSI I/O Request CCB used for the XPT_SCSI_IO and XPT_CONT_TARGET_IO 1761 ** function codes. 1762 ** 1763 **struct ccb_scsiio { 1764 ** struct ccb_hdr ccb_h; 1765 ** union ccb *next_ccb; "" Ptr for next CCB for action 1766 ** u_int8_t *req_map; "" Ptr to mapping info 1767 ** u_int8_t *data_ptr; "" Ptr to the data buf/SG list 1768 ** u_int32_t dxfer_len; "" Data transfer length 1769 ** struct scsi_sense_data sense_data; "" Autosense storage 1770 ** u_int8_t sense_len; "" Number of bytes to autosense 1771 ** u_int8_t cdb_len; "" Number of bytes for the CDB 1772 ** u_int16_t sglist_cnt; "" Number of SG list entries 1773 ** u_int8_t scsi_status; "" Returned SCSI status 1774 ** u_int8_t sense_resid; "" Autosense resid length: 2's comp 1775 ** u_int32_t resid; "" Transfer residual length: 2's comp 1776 ** cdb_t cdb_io; "" Union for CDB bytes/pointer 1777 ** u_int8_t *msg_ptr; "" Pointer to the message buffer 1778 ** u_int16_t msg_len; "" Number of bytes for the Message 1779 ** u_int8_t tag_action; "" What to do for tag queueing 1780 **#define CAM_TAG_ACTION_NONE 0x00 "" The tag action should be either the define below (to send a non-tagged transaction) or one of the defined scsi tag messages from scsi_message.h. 1781 ** u_int tag_id; "" tag id from initator (target mode) 1782 ** u_int init_id; "" initiator id of who selected 1783 **} 1784 ********************************************************************* 1785 */ 1786 static VOID arcmsr_action(struct cam_sim * psim,union ccb * pccb) 1787 { 1788 PACB pACB; 1789 1790 #if ARCMSR_DEBUG0 1791 printf("arcmsr_action ..................................\n" ); 1792 #endif 1793 1794 pACB=(PACB) cam_sim_softc(psim); 1795 if(pACB==NULL) 1796 { 1797 pccb->ccb_h.status=CAM_REQ_INVALID; 1798 xpt_done(pccb); 1799 return; 1800 } 1801 switch (pccb->ccb_h.func_code) 1802 { 1803 case XPT_SCSI_IO: 1804 { 1805 PSRB pSRB; 1806 #if ARCMSR_DEBUG0 1807 printf("arcmsr_action: XPT_SCSI_IO......................\n" ); 1808 #endif 1809 1810 if((pSRB=arcmsr_get_freesrb(pACB)) == NULL) 1811 { 1812 pccb->ccb_h.status=CAM_RESRC_UNAVAIL; 1813 xpt_done(pccb); 1814 return; 1815 } 1816 pccb->ccb_h.arcmsr_ccbsrb_ptr=pSRB; 1817 pccb->ccb_h.arcmsr_ccbacb_ptr=pACB; 1818 pSRB->pccb=pccb; 1819 if((pccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) 1820 { 1821 if((pccb->ccb_h.flags & CAM_SCATTER_VALID) == 0) 1822 { 1823 if((pccb->ccb_h.flags & CAM_DATA_PHYS) == 0) 1824 { 1825 LONG error,s; 1826 1827 s=splsoftvm(); 1828 error = bus_dmamap_load(pACB->buffer_dmat,pSRB->dmamap,pccb->csio.data_ptr,pccb->csio.dxfer_len,arcmsr_executesrb,pSRB,/*flags*/0); 1829 if(error == EINPROGRESS) 1830 { 1831 xpt_freeze_simq(pACB->psim,1); 1832 pccb->ccb_h.status |= CAM_RELEASE_SIMQ; 1833 } 1834 splx(s); 1835 } 1836 else 1837 { 1838 panic("arcmsr: CAM_DATA_PHYS not supported"); 1839 } 1840 } 1841 else 1842 { 1843 struct bus_dma_segment *segs; 1844 1845 if((pccb->ccb_h.flags & CAM_SG_LIST_PHYS) == 0 || (pccb->ccb_h.flags & CAM_DATA_PHYS) != 0) 1846 { 1847 pccb->ccb_h.status=CAM_PROVIDE_FAIL; 1848 xpt_done(pccb); 1849 free(pSRB,M_DEVBUF); 1850 return; 1851 } 1852 segs=(struct bus_dma_segment *)pccb->csio.data_ptr; 1853 arcmsr_executesrb(pSRB,segs,pccb->csio.sglist_cnt,0); 1854 } 1855 } 1856 else 1857 { 1858 arcmsr_executesrb(pSRB,NULL,0,0); 1859 } 1860 break; 1861 } 1862 case XPT_TARGET_IO: 1863 { 1864 #if ARCMSR_DEBUG0 1865 printf("arcmsr_action: XPT_TARGET_IO\n" ); 1866 #endif 1867 /* 1868 ** target mode not yet support vendor specific commands. 1869 */ 1870 pccb->ccb_h.status=CAM_REQ_CMP; 1871 xpt_done(pccb); 1872 break; 1873 } 1874 case XPT_PATH_INQ: 1875 { 1876 struct ccb_pathinq *cpi=&pccb->cpi; 1877 1878 #if ARCMSR_DEBUG0 1879 printf("arcmsr_action: XPT_PATH_INQ\n" ); 1880 #endif 1881 cpi->version_num=1; 1882 cpi->hba_inquiry=PI_SDTR_ABLE | PI_TAG_ABLE; 1883 cpi->target_sprt=0; 1884 cpi->hba_misc=0; 1885 cpi->hba_eng_cnt=0; 1886 cpi->max_target=ARCMSR_MAX_TARGETID; 1887 cpi->max_lun=ARCMSR_MAX_TARGETLUN; /* 7 or 0 */ 1888 cpi->initiator_id=ARCMSR_SCSI_INITIATOR_ID; 1889 cpi->bus_id=cam_sim_bus(psim); 1890 strncpy(cpi->sim_vid,"FreeBSD",SIM_IDLEN); 1891 strncpy(cpi->hba_vid,"ARCMSR",HBA_IDLEN); 1892 strncpy(cpi->dev_name,cam_sim_name(psim),DEV_IDLEN); 1893 cpi->unit_number=cam_sim_unit(psim); 1894 cpi->ccb_h.status=CAM_REQ_CMP; 1895 xpt_done(pccb); 1896 break; 1897 } 1898 case XPT_ABORT: 1899 { 1900 union ccb *pabort_ccb; 1901 1902 #if ARCMSR_DEBUG0 1903 printf("arcmsr_action: XPT_ABORT\n" ); 1904 #endif 1905 pabort_ccb=pccb->cab.abort_ccb; 1906 switch (pabort_ccb->ccb_h.func_code) 1907 { 1908 case XPT_ACCEPT_TARGET_IO: 1909 case XPT_IMMED_NOTIFY: 1910 case XPT_CONT_TARGET_IO: 1911 if(arcmsr_seek_cmd2abort(pabort_ccb)==TRUE) 1912 { 1913 pabort_ccb->ccb_h.status=CAM_REQ_ABORTED; 1914 xpt_done(pabort_ccb); 1915 pccb->ccb_h.status=CAM_REQ_CMP; 1916 } 1917 else 1918 { 1919 xpt_print_path(pabort_ccb->ccb_h.path); 1920 printf("Not found\n"); 1921 pccb->ccb_h.status=CAM_PATH_INVALID; 1922 } 1923 break; 1924 case XPT_SCSI_IO: 1925 pccb->ccb_h.status=CAM_UA_ABORT; 1926 break; 1927 default: 1928 pccb->ccb_h.status=CAM_REQ_INVALID; 1929 break; 1930 } 1931 xpt_done(pccb); 1932 break; 1933 } 1934 case XPT_RESET_BUS: 1935 case XPT_RESET_DEV: 1936 { 1937 LONG i; 1938 1939 #if ARCMSR_DEBUG0 1940 printf("arcmsr_action: XPT_RESET_BUS\n" ); 1941 #endif 1942 arcmsr_bus_reset(pACB); 1943 for (i=0; i < 500; i++) 1944 { 1945 DELAY(1000); 1946 } 1947 pccb->ccb_h.status=CAM_REQ_CMP; 1948 xpt_done(pccb); 1949 break; 1950 } 1951 case XPT_TERM_IO: 1952 { 1953 #if ARCMSR_DEBUG0 1954 printf("arcmsr_action: XPT_TERM_IO\n" ); 1955 #endif 1956 pccb->ccb_h.status=CAM_REQ_INVALID; 1957 xpt_done(pccb); 1958 break; 1959 } 1960 case XPT_GET_TRAN_SETTINGS: 1961 { 1962 struct ccb_trans_settings *cts; 1963 ULONG s; 1964 1965 #if ARCMSR_DEBUG0 1966 printf("arcmsr_action: XPT_GET_TRAN_SETTINGS\n" ); 1967 #endif 1968 1969 cts=&pccb->cts; 1970 s=splcam(); 1971 cts->flags=(CCB_TRANS_DISC_ENB | CCB_TRANS_TAG_ENB); 1972 cts->sync_period=3; 1973 cts->sync_offset=32; 1974 cts->bus_width=MSG_EXT_WDTR_BUS_16_BIT; 1975 cts->valid=CCB_TRANS_SYNC_RATE_VALID | CCB_TRANS_SYNC_OFFSET_VALID | CCB_TRANS_BUS_WIDTH_VALID | CCB_TRANS_DISC_VALID | CCB_TRANS_TQ_VALID; 1976 splx(s); 1977 pccb->ccb_h.status=CAM_REQ_CMP; 1978 xpt_done(pccb); 1979 break; 1980 } 1981 case XPT_SET_TRAN_SETTINGS: 1982 { 1983 #if ARCMSR_DEBUG0 1984 printf("arcmsr_action: XPT_SET_TRAN_SETTINGS\n" ); 1985 #endif 1986 pccb->ccb_h.status = CAM_FUNC_NOTAVAIL; 1987 xpt_done(pccb); 1988 break; 1989 } 1990 case XPT_CALC_GEOMETRY: 1991 { 1992 struct ccb_calc_geometry *ccg; 1993 ULONG size_mb; 1994 ULONG secs_per_cylinder; 1995 1996 #if ARCMSR_DEBUG0 1997 printf("arcmsr_action: XPT_CALC_GEOMETRY\n" ); 1998 #endif 1999 ccg=&pccb->ccg; 2000 size_mb=ccg->volume_size/((1024L * 1024L)/ccg->block_size); 2001 if(size_mb > 1024 ) 2002 { 2003 ccg->heads=255; 2004 ccg->secs_per_track=63; 2005 } 2006 else 2007 { 2008 ccg->heads=64; 2009 ccg->secs_per_track=32; 2010 } 2011 secs_per_cylinder=ccg->heads * ccg->secs_per_track; 2012 ccg->cylinders=ccg->volume_size / secs_per_cylinder; 2013 pccb->ccb_h.status=CAM_REQ_CMP; 2014 xpt_done(pccb); 2015 break; 2016 } 2017 default: 2018 #if ARCMSR_DEBUG0 2019 printf("arcmsr_action: invalid XPT function CAM_REQ_INVALID\n" ); 2020 #endif 2021 pccb->ccb_h.status=CAM_REQ_INVALID; 2022 xpt_done(pccb); 2023 break; 2024 } 2025 return; 2026 } 2027 /* 2028 ********************************************************************** 2029 ** 2030 ** start background rebulid 2031 ** 2032 ********************************************************************** 2033 */ 2034 VOID arcmsr_start_adapter_bgrb(PACB pACB) 2035 { 2036 #if ARCMSR_DEBUG0 2037 printf("arcmsr_start_adapter_bgrb.................................. \n"); 2038 #endif 2039 pACB->acb_flags |= ACB_F_MSG_START_BGRB; 2040 pACB->acb_flags &= ~ACB_F_MSG_STOP_BGRB; 2041 CHIP_REG_WRITE32(&pACB->pmu->inbound_msgaddr0,ARCMSR_INBOUND_MESG0_START_BGRB); 2042 return; 2043 } 2044 /* 2045 ********************************************************************** 2046 ** 2047 ** start background rebulid 2048 ** 2049 ********************************************************************** 2050 */ 2051 VOID arcmsr_iop_init(PACB pACB) 2052 { 2053 ULONG intmask_org,mask,outbound_doorbell,firmware_state=0; 2054 2055 #if ARCMSR_DEBUG0 2056 printf("arcmsr_iop_init.................................. \n"); 2057 #endif 2058 do 2059 { 2060 firmware_state=CHIP_REG_READ32(&pACB->pmu->outbound_msgaddr1); 2061 }while((firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK)==0); 2062 /* disable all outbound interrupt */ 2063 intmask_org=CHIP_REG_READ32(&pACB->pmu->outbound_intmask); 2064 CHIP_REG_WRITE32(&pACB->pmu->outbound_intmask,intmask_org|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE); 2065 /*start background rebuild*/ 2066 arcmsr_start_adapter_bgrb(pACB); 2067 if(arcmsr_wait_msgint_ready(pACB)!=TRUE) 2068 { 2069 printf("arcmsr_HwInitialize: wait 'start adapter background rebulid' timeout................. \n"); 2070 } 2071 /* clear Qbuffer if door bell ringed */ 2072 outbound_doorbell=CHIP_REG_READ32(&pACB->pmu->outbound_doorbell); 2073 if(outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK) 2074 { 2075 CHIP_REG_WRITE32(&pACB->pmu->outbound_doorbell,outbound_doorbell);/*clear interrupt */ 2076 CHIP_REG_WRITE32(&pACB->pmu->inbound_doorbell,ARCMSR_INBOUND_DRIVER_DATA_READ_OK); 2077 } 2078 /* enable outbound Post Queue,outbound message0,outbell doorbell Interrupt */ 2079 mask=~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE|ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE|ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE); 2080 CHIP_REG_WRITE32(&pACB->pmu->outbound_intmask,intmask_org & mask); 2081 pACB->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff; 2082 pACB->acb_flags |=ACB_F_IOP_INITED; 2083 return; 2084 } 2085 /* 2086 ********************************************************************** 2087 ** 2088 ** map freesrb 2089 ** 2090 ********************************************************************** 2091 */ 2092 static void arcmsr_map_freesrb(void *arg, bus_dma_segment_t *segs, int nseg, int error) 2093 { 2094 PACB pACB=arg; 2095 PSRB psrb_tmp,pfreesrb; 2096 ULONG cdb_phyaddr; 2097 LONG i; 2098 2099 pfreesrb=(PSRB)pACB->uncacheptr; 2100 cdb_phyaddr=segs->ds_addr; /* We suppose bus_addr_t high part always 0 here*/ 2101 if(((CPT2INT)pACB->uncacheptr & 0x1F)!=0) 2102 { 2103 pfreesrb=pfreesrb+(0x20-((CPT2INT)pfreesrb & 0x1F)); 2104 cdb_phyaddr=cdb_phyaddr+(0x20-((CPT2INT)cdb_phyaddr & 0x1F)); 2105 } 2106 /* 2107 ******************************************************************** 2108 ** here we need to tell iop 331 our freesrb.HighPart 2109 ** if freesrb.HighPart is not zero 2110 ******************************************************************** 2111 */ 2112 for(i=0;i<ARCMSR_MAX_FREESRB_NUM;i++) 2113 { 2114 psrb_tmp=&pfreesrb[i]; 2115 if(((CPT2INT)psrb_tmp & 0x1F)==0) /*srb address must 32 (0x20) boundary*/ 2116 { 2117 if(bus_dmamap_create(pACB->buffer_dmat, /*flags*/0, &psrb_tmp->dmamap)!=0) 2118 { 2119 pACB->acb_flags |= ACB_F_MAPFREESRB_FAILD; 2120 printf(" arcmsr_map_freesrb: (pSRB->dmamap) bus_dmamap_create ..............error\n"); 2121 return; 2122 } 2123 psrb_tmp->cdb_shifted_phyaddr=cdb_phyaddr >> 5; 2124 psrb_tmp->pACB=pACB; 2125 pACB->psrbringQ[i]=psrb_tmp; 2126 cdb_phyaddr=cdb_phyaddr+sizeof(struct _SRB); 2127 } 2128 else 2129 { 2130 pACB->acb_flags |= ACB_F_MAPFREESRB_FAILD; 2131 printf(" arcmsr_map_freesrb:pfreesrb=%p i=%d this srb cross 32 bytes boundary ignored ......psrb_tmp=%p \n",pfreesrb,i,psrb_tmp); 2132 return; 2133 } 2134 } 2135 pACB->pfreesrb=pfreesrb; 2136 pACB->vir2phy_offset=(CPT2INT)psrb_tmp-(cdb_phyaddr-sizeof(struct _SRB)); 2137 return; 2138 } 2139 /* 2140 ************************************************************************ 2141 ** 2142 ** 2143 ************************************************************************ 2144 */ 2145 VOID arcmsr_free_resource(PACB pACB) 2146 { 2147 /* remove the control device */ 2148 if (pACB->ioctl_dev != NULL) 2149 { 2150 destroy_dev(pACB->ioctl_dev); 2151 } 2152 bus_dmamap_unload(pACB->srb_dmat, pACB->srb_dmamap); 2153 bus_dmamap_destroy(pACB->srb_dmat, pACB->srb_dmamap); 2154 bus_dma_tag_destroy(pACB->srb_dmat); 2155 bus_dma_tag_destroy(pACB->buffer_dmat); 2156 bus_dma_tag_destroy(pACB->parent_dmat); 2157 return; 2158 } 2159 /* 2160 ************************************************************************ 2161 ** PCI config header registers for all devices 2162 ** 2163 ** #define PCIR_COMMAND 0x04 2164 ** #define PCIM_CMD_PORTEN 0x0001 2165 ** #define PCIM_CMD_MEMEN 0x0002 2166 ** #define PCIM_CMD_BUSMASTEREN 0x0004 2167 ** #define PCIM_CMD_MWRICEN 0x0010 2168 ** #define PCIM_CMD_PERRESPEN 0x0040 2169 ** 2170 ** Function : arcmsr_initialize 2171 ** Purpose : initialize the internal structures for a given SCSI host 2172 ** Inputs : host - pointer to this host adapter's structure 2173 ** Preconditions : when this function is called,the chip_type 2174 ** field of the pACB structure MUST have been set. 2175 ** 2176 ** 10h Base Address register #0 2177 ** 14h Base Address register #1 2178 ** 18h Base Address register #2 2179 ** 1Ch Base Address register #3 2180 ** 20h Base Address register #4 2181 ** 24h Base Address register #5 2182 ************************************************************************ 2183 */ 2184 static LONG arcmsr_initialize(device_t dev) 2185 { 2186 PACB pACB=device_get_softc(dev); 2187 LONG rid=PCI_BASE_ADDR0; 2188 vm_offset_t mem_base; 2189 USHORT pci_command; 2190 2191 #if ARCMSR_DEBUG0 2192 printf("arcmsr_initialize..............................\n"); 2193 #endif 2194 #if __FreeBSD_version >= 502010 2195 if (bus_dma_tag_create( /*parent*/NULL, 2196 /*alignemnt*/1, 2197 /*boundary*/0, 2198 /*lowaddr*/BUS_SPACE_MAXADDR, 2199 /*highaddr*/BUS_SPACE_MAXADDR, 2200 /*filter*/NULL, 2201 /*filterarg*/NULL, 2202 /*maxsize*/BUS_SPACE_MAXSIZE_32BIT, 2203 /*nsegments*/BUS_SPACE_UNRESTRICTED, 2204 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, 2205 /*flags*/0, 2206 /*lockfunc*/NULL, 2207 /*lockarg*/NULL, 2208 &pACB->parent_dmat) != 0) 2209 #else 2210 if (bus_dma_tag_create( /*parent*/NULL, 2211 /*alignemnt*/1, 2212 /*boundary*/0, 2213 /*lowaddr*/BUS_SPACE_MAXADDR, 2214 /*highaddr*/BUS_SPACE_MAXADDR, 2215 /*filter*/NULL, 2216 /*filterarg*/NULL, 2217 /*maxsize*/BUS_SPACE_MAXSIZE_32BIT, 2218 /*nsegments*/BUS_SPACE_UNRESTRICTED, 2219 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, 2220 /*flags*/0, 2221 &pACB->parent_dmat) != 0) 2222 #endif 2223 { 2224 printf("arcmsr_initialize: bus_dma_tag_create .......................failure!\n"); 2225 return ENOMEM; 2226 } 2227 /* Create a single tag describing a region large enough to hold all of the s/g lists we will need. */ 2228 #if __FreeBSD_version >= 502010 2229 if(bus_dma_tag_create( /*parent_dmat*/pACB->parent_dmat, 2230 /*alignment*/1, 2231 /*boundary*/0, 2232 /*lowaddr*/BUS_SPACE_MAXADDR, 2233 /*highaddr*/BUS_SPACE_MAXADDR, 2234 /*filter*/NULL, 2235 /*filterarg*/NULL, 2236 /*maxsize*/MAXBSIZE, 2237 /*nsegments*/ARCMSR_MAX_SG_ENTRIES, 2238 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, 2239 /*flags*/BUS_DMA_ALLOCNOW, 2240 /*lockfunc*/busdma_lock_mutex, 2241 /*lockarg*/&Giant, 2242 &pACB->buffer_dmat) != 0) 2243 #else 2244 if(bus_dma_tag_create( /*parent_dmat*/pACB->parent_dmat, 2245 /*alignment*/1, 2246 /*boundary*/0, 2247 /*lowaddr*/BUS_SPACE_MAXADDR, 2248 /*highaddr*/BUS_SPACE_MAXADDR, 2249 /*filter*/NULL, 2250 /*filterarg*/NULL, 2251 /*maxsize*/MAXBSIZE, 2252 /*nsegments*/ARCMSR_MAX_SG_ENTRIES, 2253 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, 2254 /*flags*/BUS_DMA_ALLOCNOW, 2255 &pACB->buffer_dmat) != 0) 2256 #endif 2257 { 2258 bus_dma_tag_destroy(pACB->parent_dmat); 2259 printf("arcmsr_initialize: bus_dma_tag_create ............................failure!\n"); 2260 return ENOMEM; 2261 } 2262 /* DMA tag for our srb structures.... Allocate the pfreesrb memory */ 2263 #if __FreeBSD_version >= 502010 2264 if (bus_dma_tag_create( /*parent_dmat*/pACB->parent_dmat, 2265 /*alignment*/1, 2266 /*boundary*/0, 2267 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 2268 /*highaddr*/BUS_SPACE_MAXADDR, 2269 /*filter*/NULL, 2270 /*filterarg*/NULL, 2271 /*maxsize*/((sizeof(struct _SRB) * ARCMSR_MAX_FREESRB_NUM)+0x20), 2272 /*nsegments*/1, 2273 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, 2274 /*flags*/0, 2275 /*lockfunc*/NULL, 2276 /*lockarg*/NULL, 2277 &pACB->srb_dmat) != 0) 2278 #else 2279 if (bus_dma_tag_create( /*parent_dmat*/pACB->parent_dmat, 2280 /*alignment*/1, 2281 /*boundary*/0, 2282 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 2283 /*highaddr*/BUS_SPACE_MAXADDR, 2284 /*filter*/NULL, 2285 /*filterarg*/NULL, 2286 /*maxsize*/((sizeof(struct _SRB) * ARCMSR_MAX_FREESRB_NUM)+0x20), 2287 /*nsegments*/1, 2288 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, 2289 /*flags*/0, 2290 &pACB->srb_dmat) != 0) 2291 #endif 2292 { 2293 bus_dma_tag_destroy(pACB->buffer_dmat); 2294 bus_dma_tag_destroy(pACB->parent_dmat); 2295 printf("arcmsr_initialize: pACB->srb_dmat bus_dma_tag_create .....................failure!\n"); 2296 return ENXIO; 2297 } 2298 /* Allocation for our srbs */ 2299 if (bus_dmamem_alloc(pACB->srb_dmat, (void **)&pACB->uncacheptr, BUS_DMA_WAITOK | BUS_DMA_COHERENT, &pACB->srb_dmamap) != 0) 2300 { 2301 bus_dma_tag_destroy(pACB->srb_dmat); 2302 bus_dma_tag_destroy(pACB->buffer_dmat); 2303 bus_dma_tag_destroy(pACB->parent_dmat); 2304 printf("arcmsr_initialize: pACB->srb_dmat bus_dma_tag_create ...............failure!\n"); 2305 return ENXIO; 2306 } 2307 /* And permanently map them */ 2308 if(bus_dmamap_load(pACB->srb_dmat, pACB->srb_dmamap,pACB->uncacheptr,(sizeof(struct _SRB) * ARCMSR_MAX_FREESRB_NUM)+0x20,arcmsr_map_freesrb, pACB, /*flags*/0)) 2309 { 2310 bus_dma_tag_destroy(pACB->srb_dmat); 2311 bus_dma_tag_destroy(pACB->buffer_dmat); 2312 bus_dma_tag_destroy(pACB->parent_dmat); 2313 printf("arcmsr_initialize: bus_dmamap_load................... failure!\n"); 2314 return ENXIO; 2315 } 2316 pci_command=pci_read_config(dev,PCIR_COMMAND,2); 2317 pci_command |= PCIM_CMD_BUSMASTEREN; 2318 pci_command |= PCIM_CMD_PERRESPEN; 2319 pci_command |= PCIM_CMD_MWRICEN; 2320 /* Enable Busmaster/Mem */ 2321 pci_command |= PCIM_CMD_MEMEN; 2322 pci_write_config(dev,PCIR_COMMAND,pci_command,2); 2323 pACB->sys_res_arcmsr=bus_alloc_resource(dev,SYS_RES_MEMORY,&rid,0,~0,0x1000,RF_ACTIVE); 2324 if(pACB->sys_res_arcmsr == NULL) 2325 { 2326 arcmsr_free_resource(pACB); 2327 printf("arcmsr_initialize: bus_alloc_resource .....................failure!\n"); 2328 return ENOMEM; 2329 } 2330 if(rman_get_start(pACB->sys_res_arcmsr) <= 0) 2331 { 2332 arcmsr_free_resource(pACB); 2333 printf("arcmsr_initialize: rman_get_start ...........................failure!\n"); 2334 return ENXIO; 2335 } 2336 mem_base=(vm_offset_t) rman_get_virtual(pACB->sys_res_arcmsr); 2337 if(mem_base==0) 2338 { 2339 arcmsr_free_resource(pACB); 2340 printf("arcmsr_initialize: rman_get_virtual ..........................failure!\n"); 2341 return ENXIO; 2342 } 2343 if(pACB->acb_flags & ACB_F_MAPFREESRB_FAILD) 2344 { 2345 arcmsr_free_resource(pACB); 2346 printf("arcmsr_initialize: arman_get_virtual ..........................failure!\n"); 2347 return ENXIO; 2348 } 2349 pACB->btag=rman_get_bustag(pACB->sys_res_arcmsr); 2350 pACB->bhandle=rman_get_bushandle(pACB->sys_res_arcmsr); 2351 pACB->pmu=(PMU)mem_base; 2352 pACB->acb_flags |= (ACB_F_IOCTL_WQBUFFER_CLEARED|ACB_F_IOCTL_RQBUFFER_CLEARED); 2353 pACB->acb_flags &= ~ACB_F_SCSISTOPADAPTER; 2354 arcmsr_iop_init(pACB); 2355 return(0); 2356 } 2357 /* 2358 ************************************************************************ 2359 ** 2360 ** attach and init a host adapter 2361 ** 2362 ************************************************************************ 2363 */ 2364 static LONG arcmsr_attach(device_t dev) 2365 { 2366 PACB pACB=device_get_softc(dev); 2367 LONG unit=device_get_unit(dev); 2368 struct ccb_setasync csa; 2369 struct cam_devq *devq; /* Device Queue to use for this SIM */ 2370 struct resource *irqres; 2371 int rid; 2372 2373 #if ARCMSR_DEBUG0 2374 printf("arcmsr_attach .............................\n" ); 2375 #endif 2376 2377 if(arcmsr_initialize(dev)) 2378 { 2379 printf("arcmsr_attach: arcmsr_initialize failure!\n"); 2380 return ENXIO; 2381 } 2382 /* After setting up the adapter,map our interrupt */ 2383 rid=0; 2384 irqres=bus_alloc_resource(dev,SYS_RES_IRQ,&rid,0,~0,1,RF_SHAREABLE | RF_ACTIVE); 2385 if(irqres == NULL || bus_setup_intr(dev,irqres,INTR_TYPE_CAM,arcmsr_interrupt,pACB,&pACB->ih)) 2386 { 2387 arcmsr_free_resource(pACB); 2388 printf("arcmsr%d: unable to register interrupt handler!\n",unit); 2389 return ENXIO; 2390 } 2391 pACB->irqres=irqres; 2392 pACB->pci_dev=dev; 2393 pACB->pci_unit=unit; 2394 /* 2395 * Now let the CAM generic SCSI layer find the SCSI devices on 2396 * the bus * start queue to reset to the idle loop. * 2397 * Create device queue of SIM(s) * (MAX_START_JOB - 1) : 2398 * max_sim_transactions 2399 */ 2400 devq=cam_simq_alloc(ARCMSR_MAX_START_JOB); 2401 if(devq == NULL) 2402 { 2403 arcmsr_free_resource(pACB); 2404 bus_release_resource(dev, SYS_RES_IRQ, 0, pACB->irqres); 2405 printf("arcmsr_attach: cam_simq_alloc failure!\n"); 2406 return ENXIO; 2407 } 2408 pACB->psim=cam_sim_alloc(arcmsr_action,arcmsr_poll,"arcmsr",pACB,pACB->pci_unit,1,ARCMSR_MAX_OUTSTANDING_CMD,devq); 2409 if(pACB->psim == NULL) 2410 { 2411 arcmsr_free_resource(pACB); 2412 bus_release_resource(dev, SYS_RES_IRQ, 0, pACB->irqres); 2413 cam_simq_free(devq); 2414 printf("arcmsr_attach: cam_sim_alloc ..................failure!\n"); 2415 return ENXIO; 2416 } 2417 if(xpt_bus_register(pACB->psim,0) != CAM_SUCCESS) 2418 { 2419 arcmsr_free_resource(pACB); 2420 bus_release_resource(dev, SYS_RES_IRQ, 0, pACB->irqres); 2421 cam_sim_free(pACB->psim,/*free_devq*/TRUE); 2422 printf("arcmsr_attach: xpt_bus_register .......................failure!\n"); 2423 return ENXIO; 2424 } 2425 if(xpt_create_path(&pACB->ppath,/* periph */ NULL,cam_sim_path(pACB->psim),CAM_TARGET_WILDCARD,CAM_LUN_WILDCARD) != CAM_REQ_CMP) 2426 { 2427 arcmsr_free_resource(pACB); 2428 bus_release_resource(dev, SYS_RES_IRQ, 0, pACB->irqres); 2429 xpt_bus_deregister(cam_sim_path(pACB->psim)); 2430 cam_sim_free(pACB->psim,/* free_simq */ TRUE); 2431 printf("arcmsr_attach: xpt_create_path .....................failure!\n"); 2432 return ENXIO; 2433 } 2434 /* 2435 **************************************************** 2436 */ 2437 xpt_setup_ccb(&csa.ccb_h,pACB->ppath,/*priority*/5); 2438 csa.ccb_h.func_code=XPT_SASYNC_CB; 2439 csa.event_enable=AC_FOUND_DEVICE|AC_LOST_DEVICE; 2440 csa.callback=arcmsr_async; 2441 csa.callback_arg=pACB->psim; 2442 xpt_action((union ccb *)&csa); 2443 /* Create the control device. */ 2444 pACB->ioctl_dev=make_dev(&arcmsr_cdevsw, unit, UID_ROOT, GID_WHEEL /* GID_OPERATOR */, S_IRUSR | S_IWUSR, "arcmsr%d", unit); 2445 #if __FreeBSD_version < 503000 2446 pACB->ioctl_dev->si_drv1=pACB; 2447 #endif 2448 #if __FreeBSD_version > 500005 2449 (void)make_dev_alias(pACB->ioctl_dev, "arc%d", unit); 2450 #endif 2451 2452 #if 0 2453 #if __FreeBSD_version > 500005 2454 if(kthread_create(arcmsr_do_thread_works, pACB, &pACB->kthread_proc,0,"arcmsr%d: kthread",pACB->pci_unit)) 2455 { 2456 device_printf(pACB->pci_dev,"cannot create kernel thread for this host adapetr\n"); 2457 xpt_bus_deregister(cam_sim_path(pACB->psim)); 2458 cam_sim_free(pACB->psim,/* free_simq */ TRUE); 2459 panic("arcmsr plunge kernel thread fail"); 2460 } 2461 #else 2462 if(kthread_create(arcmsr_do_thread_works, pACB, &pACB->kthread_proc,"arcmsr%d: kthread", pACB->pci_unit)) 2463 { 2464 device_printf(pACB->pci_dev,"cannot create kernel thread for this host adapetr\n"); 2465 xpt_bus_deregister(cam_sim_path(pACB->psim)); 2466 cam_sim_free(pACB->psim,/* free_simq */ TRUE); 2467 panic("arcmsr plunge kernel thread fail"); 2468 } 2469 #endif 2470 #endif 2471 return 0; 2472 } 2473 /* 2474 ************************************************************************ 2475 ** 2476 ** 2477 ** 2478 ************************************************************************ 2479 */ 2480 static LONG arcmsr_probe(device_t dev) 2481 { 2482 ULONG id; 2483 #if ARCMSR_DEBUG0 2484 printf("arcmsr_probe................. \n"); 2485 #endif 2486 switch(id=pci_get_devid(dev)) 2487 { 2488 case PCIDevVenIDARC1110: 2489 device_set_desc(dev,"ARECA ARC1110 PCI-X 4 PORTS SATA RAID CONTROLLER \n" ARCMSR_DRIVER_VERSION ); 2490 return 0; 2491 case PCIDevVenIDARC1120: 2492 device_set_desc(dev,"ARECA ARC1120 PCI-X 8 PORTS SATA RAID CONTROLLER (RAID6-ENGINE Inside) \n" ARCMSR_DRIVER_VERSION); 2493 return 0; 2494 case PCIDevVenIDARC1130: 2495 device_set_desc(dev,"ARECA ARC1130 PCI-X 12 PORTS SATA RAID CONTROLLER (RAID6-ENGINE Inside) \n" ARCMSR_DRIVER_VERSION); 2496 return 0; 2497 case PCIDevVenIDARC1160: 2498 device_set_desc(dev,"ARECA ARC1160 PCI-X 16 PORTS SATA RAID CONTROLLER (RAID6-ENGINE Inside) \n" ARCMSR_DRIVER_VERSION); 2499 return 0; 2500 case PCIDevVenIDARC1210: 2501 device_set_desc(dev,"ARECA ARC1210 PCI-EXPRESS 4 PORTS SATA RAID CONTROLLER \n" ARCMSR_DRIVER_VERSION); 2502 return 0; 2503 case PCIDevVenIDARC1220: 2504 device_set_desc(dev,"ARECA ARC1220 PCI-EXPRESS 8 PORTS SATA RAID CONTROLLER (RAID6-ENGINE Inside) \n" ARCMSR_DRIVER_VERSION); 2505 return 0; 2506 case PCIDevVenIDARC1230: 2507 device_set_desc(dev,"ARECA ARC1230 PCI-EXPRESS 12 PORTS SATA RAID CONTROLLER (RAID6-ENGINE Inside) \n" ARCMSR_DRIVER_VERSION); 2508 return 0; 2509 case PCIDevVenIDARC1260: 2510 device_set_desc(dev,"ARECA ARC1260 PCI-EXPRESS 16 PORTS SATA RAID CONTROLLER (RAID6-ENGINE Inside) \n" ARCMSR_DRIVER_VERSION); 2511 return 0; 2512 } 2513 return ENXIO; 2514 } 2515 /* 2516 ************************************************************************ 2517 ** 2518 ** 2519 ** 2520 ************************************************************************ 2521 */ 2522 static VOID arcmsr_shutdown(device_t dev) 2523 { 2524 LONG i,abort_cmd_cnt=0; 2525 ULONG s,intmask_org; 2526 PSRB pSRB; 2527 PACB pACB=device_get_softc(dev); 2528 2529 #if ARCMSR_DEBUG0 2530 printf("arcmsr_shutdown................. \n"); 2531 #endif 2532 s=splcam(); 2533 /* disable all outbound interrupt */ 2534 intmask_org=CHIP_REG_READ32(&pACB->pmu->outbound_intmask); 2535 CHIP_REG_WRITE32(&pACB->pmu->outbound_intmask,(intmask_org|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE)); 2536 /* stop adapter background rebuild */ 2537 arcmsr_stop_adapter_bgrb(pACB); 2538 if(arcmsr_wait_msgint_ready(pACB)!=TRUE) 2539 { 2540 printf("arcmsr_pcidev_disattach: wait 'stop adapter rebulid' timeout.... \n"); 2541 } 2542 arcmsr_flush_adapter_cache(pACB); 2543 if(arcmsr_wait_msgint_ready(pACB)!=TRUE) 2544 { 2545 printf("arcmsr_pcidev_disattach: wait 'flush adapter cache' timeout.... \n"); 2546 } 2547 /* abort all outstanding command */ 2548 pACB->acb_flags |= ACB_F_SCSISTOPADAPTER; 2549 pACB->acb_flags &= ~ACB_F_IOP_INITED; 2550 if(pACB->srboutstandingcount!=0) 2551 { 2552 PSRB pfreesrb; 2553 #if ARCMSR_DEBUG0 2554 printf("arcmsr_pcidev_disattach: .....pACB->srboutstandingcount!=0 \n"); 2555 #endif 2556 /* Q back all outstanding srb into wait exec psrb Q*/ 2557 pfreesrb=pACB->pfreesrb; 2558 for(i=0;i<ARCMSR_MAX_FREESRB_NUM;i++) 2559 { 2560 pSRB=&pfreesrb[i]; 2561 if(pSRB->startdone==ARCMSR_SRB_START) 2562 { 2563 pSRB->srb_flags|=SRB_FLAG_MASTER_ABORTED; 2564 pSRB->pccb->ccb_h.status=CAM_REQ_ABORTED; 2565 abort_cmd_cnt++; 2566 } 2567 } 2568 if(abort_cmd_cnt!=0) 2569 { 2570 #if ARCMSR_DEBUG0 2571 printf("arcmsr_pcidev_disattach: .....abort_cmd_cnt!=0 \n"); 2572 #endif 2573 arcmsr_abort_allcmd(pACB); 2574 if(arcmsr_wait_msgint_ready(pACB)!=TRUE) 2575 { 2576 printf("arcmsr_pcidev_disattach: wait 'abort all outstanding command' timeout.................in \n"); 2577 } 2578 } 2579 atomic_set_int(&pACB->srboutstandingcount,0); 2580 } 2581 if(pACB->srbwait2gocount!=0) 2582 { /*remove first wait2go srb and abort it*/ 2583 for(i=0;i<ARCMSR_MAX_OUTSTANDING_CMD;i++) 2584 { 2585 pSRB=pACB->psrbwait2go[i]; 2586 if(pSRB!=NULL) 2587 { 2588 pACB->psrbwait2go[i]=NULL; 2589 atomic_subtract_int(&pACB->srbwait2gocount,1); 2590 pSRB->pccb->ccb_h.status=CAM_REQ_ABORTED; 2591 arcmsr_srb_complete(pSRB); 2592 } 2593 } 2594 } 2595 splx(s); 2596 #if 0 2597 pACB->acb_flags |= ACB_F_STOP_THREAD; 2598 wakeup(pACB->kthread_proc);/* signal to kernel thread do_dpcQ: "stop thread" */ 2599 #endif 2600 return; 2601 } 2602 /* 2603 ************************************************************************ 2604 ** 2605 ** 2606 ** 2607 ************************************************************************ 2608 */ 2609 static LONG arcmsr_detach(device_t dev) 2610 { 2611 PACB pACB=device_get_softc(dev); 2612 2613 arcmsr_shutdown(dev); 2614 arcmsr_free_resource(pACB); 2615 bus_release_resource(dev, SYS_RES_MEMORY, PCI_BASE_ADDR0, pACB->sys_res_arcmsr); 2616 bus_teardown_intr(dev, pACB->irqres, pACB->ih); 2617 bus_release_resource(dev, SYS_RES_IRQ, 0, pACB->irqres); 2618 xpt_async(AC_LOST_DEVICE, pACB->ppath, NULL); 2619 xpt_free_path(pACB->ppath); 2620 xpt_bus_deregister(cam_sim_path(pACB->psim)); 2621 cam_sim_free(pACB->psim, TRUE); 2622 return (0); 2623 } 2624 2625 2626
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