The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/asmc/asmcvar.h

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    1 /*-
    2  * Copyright (c) 2007, 2008 Rui Paulo <rpaulo@FreeBSD.org>
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  *
   14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   15  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
   16  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
   17  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
   18  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
   19  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
   20  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
   22  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
   23  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   24  * POSSIBILITY OF SUCH DAMAGE.
   25  *
   26  * $FreeBSD: releng/8.1/sys/dev/asmc/asmcvar.h 197417 2009-09-22 20:31:32Z rpaulo $
   27  *
   28  */
   29 
   30 #define ASMC_MAXFANS    2
   31 
   32 struct asmc_softc {
   33         device_t                sc_dev;
   34         struct mtx              sc_mtx;
   35         int                     sc_nfan;
   36         int16_t                 sms_rest_x;
   37         int16_t                 sms_rest_y;
   38         int16_t                 sms_rest_z;
   39         struct sysctl_oid       *sc_fan_tree[ASMC_MAXFANS+1];
   40         struct sysctl_oid       *sc_temp_tree;
   41         struct sysctl_oid       *sc_sms_tree;
   42         struct sysctl_oid       *sc_light_tree;
   43         struct asmc_model       *sc_model;
   44         int                     sc_rid_port;
   45         int                     sc_rid_irq;
   46         struct resource         *sc_ioport;
   47         struct resource         *sc_irq;
   48         void                    *sc_cookie;
   49         int                     sc_sms_intrtype;
   50         struct taskqueue        *sc_sms_tq;
   51         struct task             sc_sms_task;
   52         uint8_t                 sc_sms_intr_works;
   53 };
   54 
   55 /*
   56  * Data port.
   57  */
   58 #define ASMC_DATAPORT_READ(sc)  bus_read_1(sc->sc_ioport, 0x00)
   59 #define ASMC_DATAPORT_WRITE(sc, val) \
   60         bus_write_1(sc->sc_ioport, 0x00, val)
   61 #define ASMC_STATUS_MASK        0x0f
   62 
   63 /*
   64  * Command port.
   65  */
   66 #define ASMC_CMDPORT_READ(sc)   bus_read_1(sc->sc_ioport, 0x04)
   67 #define ASMC_CMDPORT_WRITE(sc, val) \
   68         bus_write_1(sc->sc_ioport, 0x04, val)
   69 #define ASMC_CMDREAD            0x10
   70 #define ASMC_CMDWRITE           0x11
   71 
   72 /*
   73  * Interrupt port.
   74  */
   75 #define ASMC_INTPORT_READ(sc)   bus_read_1(sc->sc_ioport, 0x1f)
   76 
   77 
   78 /* Number of keys */
   79 #define ASMC_NKEYS              "#KEY"  /* RO; 4 bytes */ 
   80 
   81 /*
   82  * Fan control via SMC.
   83  */
   84 #define ASMC_KEY_FANCOUNT       "FNum"  /* RO; 1 byte */
   85 #define ASMC_KEY_FANMANUAL      "FS! "  /* RW; 2 bytes */
   86 #define ASMC_KEY_FANSPEED       "F%dAc" /* RO; 2 bytes */
   87 #define ASMC_KEY_FANMINSPEED    "F%dMn" /* RO; 2 bytes */
   88 #define ASMC_KEY_FANMAXSPEED    "F%dMx" /* RO; 2 bytes */
   89 #define ASMC_KEY_FANSAFESPEED   "F%dSf" /* RO; 2 bytes */
   90 #define ASMC_KEY_FANTARGETSPEED "F%dTg" /* RW; 2 bytes */
   91 
   92 /*
   93  * Sudden Motion Sensor (SMS).
   94  */
   95 #define ASMC_SMS_INIT1          0xe0
   96 #define ASMC_SMS_INIT2          0xf8
   97 #define ASMC_KEY_SMS            "MOCN"  /* RW; 2 bytes */
   98 #define ASMC_KEY_SMS_X          "MO_X"  /* RO; 2 bytes */
   99 #define ASMC_KEY_SMS_Y          "MO_Y"  /* RO; 2 bytes */
  100 #define ASMC_KEY_SMS_Z          "MO_Z"  /* RO; 2 bytes */
  101 #define ASMC_KEY_SMS_LOW        "MOLT"  /* RW; 2 bytes */
  102 #define ASMC_KEY_SMS_HIGH       "MOHT"  /* RW; 2 bytes */
  103 #define ASMC_KEY_SMS_LOW_INT    "MOLD"  /* RW; 1 byte */
  104 #define ASMC_KEY_SMS_HIGH_INT   "MOHD"  /* RW; 1 byte */
  105 #define ASMC_KEY_SMS_FLAG       "MSDW"  /* RW; 1 byte */
  106 #define ASMC_SMS_INTFF          0x60    /* Free fall Interrupt */
  107 #define ASMC_SMS_INTHA          0x6f    /* High Acceleration Interrupt */
  108 #define ASMC_SMS_INTSH          0x80    /* Shock Interrupt */
  109 
  110 /*
  111  * Keyboard backlight.
  112  */
  113 #define ASMC_KEY_LIGHTLEFT      "ALV0"  /* RO; 6 bytes */
  114 #define ASMC_KEY_LIGHTRIGHT     "ALV1"  /* RO; 6 bytes */
  115 #define ASMC_KEY_LIGHTVALUE     "LKSB"  /* WO; 2 bytes */
  116 
  117 /*
  118  * Clamshell.
  119  */
  120 #define ASMC_KEY_CLAMSHELL      "MSLD"  /* RO; 1 byte */
  121 
  122 /*
  123  * Interrupt keys.
  124  */
  125 #define ASMC_KEY_INTOK          "NTOK"  /* WO; 1 byte */
  126 
  127 /*
  128  * Temperatures.
  129  *
  130  * First for MacBook, second for MacBook Pro, third for Intel Mac Mini,
  131  * fourth the Mac Pro 8-core and finally the MacBook Air.
  132  *
  133  */
  134 /* maximum array size for temperatures including the last NULL */
  135 #define ASMC_TEMP_MAX           36
  136 #define ASMC_MB_TEMPS           { "TB0T", "TN0P", "TN1P", "Th0H", "Th1H", \
  137                                   "TM0P", NULL }
  138 #define ASMC_MB_TEMPNAMES       { "enclosure", "northbridge1", \
  139                                   "northbridge2", "heatsink1", \
  140                                   "heatsink2", "memory", }
  141 #define ASMC_MB_TEMPDESCS       { "Enclosure Bottomside", \
  142                                   "Northbridge Point 1", \
  143                                   "Northbridge Point 2", "Heatsink 1", \
  144                                   "Heatsink 2", "Memory Bank A", }
  145 
  146 #define ASMC_MBP_TEMPS          { "TB0T", "Th0H", "Th1H", "Tm0P", \
  147                                   "TG0H", "TG0P", "TG0T", NULL }
  148 
  149 #define ASMC_MBP_TEMPNAMES      { "enclosure", "heatsink1", \
  150                                   "heatsink2", "memory", "graphics", \
  151                                   "graphicssink", "unknown", }
  152 
  153 #define ASMC_MBP_TEMPDESCS      { "Enclosure Bottomside", \
  154                                   "Heatsink 1", "Heatsink 2", \
  155                                   "Memory Controller", \
  156                                   "Graphics Chip", "Graphics Heatsink", \
  157                                   "Unknown", } 
  158 
  159 #define ASMC_MBP4_TEMPS         { "TB0T", "Th0H", "Th1H", "Th2H", "Tm0P", \
  160                                   "TG0H", "TG0D", "TC0D", "TC0P", "Ts0P", \
  161                                   "TTF0", "TW0P", NULL }
  162 
  163 #define ASMC_MBP4_TEMPNAMES     { "enclosure", "heatsink1", "heatsink2", \
  164                                   "heatsink3", "memory", "graphicssink", \
  165                                   "graphics", "cpu", "cpu2", "unknown1", \
  166                                   "unknown2", "wireless", }
  167 
  168 #define ASMC_MBP4_TEMPDESCS     { "Enclosure Bottomside", \
  169                                   "Main Heatsink 1", "Main Heatsink 2", \
  170                                   "Main Heatsink 3", \
  171                                   "Memory Controller", \
  172                                   "Graphics Chip Heatsink", \
  173                                   "Graphics Chip Diode", \
  174                                   "CPU Temperature Diode", "CPU Point 2", \
  175                                   "Unknown", "Unknown", \
  176                                   "Wireless Module", } 
  177 
  178 #define ASMC_MM_TEMPS           { "TN0P", "TN1P", NULL }
  179 #define ASMC_MM_TEMPNAMES       { "northbridge1", "northbridge2" }
  180 #define ASMC_MM_TEMPDESCS       { "Northbridge Point 1", \
  181                                   "Northbridge Point 2" }
  182 
  183 #define ASMC_MP_TEMPS           { "TA0P", "TCAG", "TCAH", "TCBG", "TCBH", \
  184                                   "TC0C", "TC0D", "TC0P", "TC1C", "TC1D", \
  185                                   "TC2C", "TC2D", "TC3C", "TC3D", "THTG", \
  186                                   "TH0P", "TH1P", "TH2P", "TH3P", "TMAP", \
  187                                   "TMAS", "TMBS", "TM0P", "TM0S", "TM1P", \
  188                                   "TM1S", "TM2P", "TM2S", "TM3S", "TM8P", \
  189                                   "TM8S", "TM9P", "TM9S", "TN0H", "TS0C", \
  190                                   NULL }
  191 
  192 #define ASMC_MP_TEMPNAMES       { "TA0P", "TCAG", "TCAH", "TCBG", "TCBH", \
  193                                   "TC0C", "TC0D", "TC0P", "TC1C", "TC1D", \
  194                                   "TC2C", "TC2D", "TC3C", "TC3D", "THTG", \
  195                                   "TH0P", "TH1P", "TH2P", "TH3P", "TMAP", \
  196                                   "TMAS", "TMBS", "TM0P", "TM0S", "TM1P", \
  197                                   "TM1S", "TM2P", "TM2S", "TM3S", "TM8P", \
  198                                   "TM8S", "TM9P", "TM9S", "TN0H", "TS0C", \
  199                                   NULL }
  200 
  201 #define ASMC_MP_TEMPDESCS       { "TA0P", "TCAG", "TCAH", "TCBG", "TCBH", \
  202                                   "TC0C", "TC0D", "TC0P", "TC1C", "TC1D", \
  203                                   "TC2C", "TC2D", "TC3C", "TC3D", "THTG", \
  204                                   "TH0P", "TH1P", "TH2P", "TH3P", "TMAP", \
  205                                   "TMAS", "TMBS", "TM0P", "TM0S", "TM1P", \
  206                                   "TM1S", "TM2P", "TM2S", "TM3S", "TM8P", \
  207                                   "TM8S", "TM9P", "TM9S", "TN0H", "TS0C", \
  208                                   NULL }
  209 
  210 #define ASMC_MBA_TEMPS          { "TB0T", NULL }
  211 #define ASMC_MBA_TEMPNAMES      { "enclosure" }
  212 #define ASMC_MBA_TEMPDESCS      { "Enclosure Bottom" }

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