Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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sys/dev/ata/ata-all.c
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1 /*- 2 * Copyright (c) 1998 - 2008 Søren Schmidt <sos@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include "opt_ata.h" 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/ata.h> 34 #include <sys/kernel.h> 35 #include <sys/module.h> 36 #include <sys/endian.h> 37 #include <sys/ctype.h> 38 #include <sys/conf.h> 39 #include <sys/bus.h> 40 #include <sys/bio.h> 41 #include <sys/malloc.h> 42 #include <sys/sysctl.h> 43 #include <sys/sema.h> 44 #include <sys/taskqueue.h> 45 #include <vm/uma.h> 46 #include <machine/stdarg.h> 47 #include <machine/resource.h> 48 #include <machine/bus.h> 49 #include <sys/rman.h> 50 #include <dev/ata/ata-all.h> 51 #include <dev/pci/pcivar.h> 52 #include <ata_if.h> 53 54 #ifdef ATA_CAM 55 #include <cam/cam.h> 56 #include <cam/cam_ccb.h> 57 #include <cam/cam_sim.h> 58 #include <cam/cam_xpt_sim.h> 59 #include <cam/cam_debug.h> 60 #endif 61 62 #ifndef ATA_CAM 63 /* device structure */ 64 static d_ioctl_t ata_ioctl; 65 static struct cdevsw ata_cdevsw = { 66 .d_version = D_VERSION, 67 .d_flags = D_NEEDGIANT, /* we need this as newbus isn't mpsafe */ 68 .d_ioctl = ata_ioctl, 69 .d_name = "ata", 70 }; 71 #endif 72 73 /* prototypes */ 74 #ifndef ATA_CAM 75 static void bswap(int8_t *, int); 76 static void btrim(int8_t *, int); 77 static void bpack(int8_t *, int8_t *, int); 78 static void ata_boot_attach(void); 79 static device_t ata_add_child(device_t, struct ata_device *, int); 80 #else 81 static void ataaction(struct cam_sim *sim, union ccb *ccb); 82 static void atapoll(struct cam_sim *sim); 83 static void ata_cam_begin_transaction(device_t dev, union ccb *ccb); 84 static void ata_cam_end_transaction(device_t dev, struct ata_request *request); 85 static void ata_cam_request_sense(device_t dev, struct ata_request *request); 86 static int ata_check_ids(device_t dev, union ccb *ccb); 87 static void ata_periodic_poll(void *data); 88 #endif 89 static void ata_conn_event(void *, int); 90 static void ata_init(void); 91 static void ata_interrupt_locked(void *data); 92 static int ata_module_event_handler(module_t mod, int what, void *arg); 93 static int ata_str2mode(const char *str); 94 static void ata_uninit(void); 95 96 /* global vars */ 97 MALLOC_DEFINE(M_ATA, "ata_generic", "ATA driver generic layer"); 98 int (*ata_raid_ioctl_func)(u_long cmd, caddr_t data) = NULL; 99 #ifndef ATA_CAM 100 struct intr_config_hook *ata_delayed_attach = NULL; 101 #endif 102 devclass_t ata_devclass; 103 uma_zone_t ata_request_zone; 104 uma_zone_t ata_composite_zone; 105 #ifndef ATA_CAM 106 int ata_wc = 1; 107 int ata_setmax = 0; 108 #endif 109 int ata_dma_check_80pin = 1; 110 111 /* local vars */ 112 #ifndef ATA_CAM 113 static int ata_dma = 1; 114 static int atapi_dma = 1; 115 #endif 116 117 /* sysctl vars */ 118 static SYSCTL_NODE(_hw, OID_AUTO, ata, CTLFLAG_RD, 0, "ATA driver parameters"); 119 #ifndef ATA_CAM 120 TUNABLE_INT("hw.ata.ata_dma", &ata_dma); 121 SYSCTL_INT(_hw_ata, OID_AUTO, ata_dma, CTLFLAG_RDTUN, &ata_dma, 0, 122 "ATA disk DMA mode control"); 123 #endif 124 TUNABLE_INT("hw.ata.ata_dma_check_80pin", &ata_dma_check_80pin); 125 SYSCTL_INT(_hw_ata, OID_AUTO, ata_dma_check_80pin, 126 CTLFLAG_RW, &ata_dma_check_80pin, 1, 127 "Check for 80pin cable before setting ATA DMA mode"); 128 #ifndef ATA_CAM 129 TUNABLE_INT("hw.ata.atapi_dma", &atapi_dma); 130 SYSCTL_INT(_hw_ata, OID_AUTO, atapi_dma, CTLFLAG_RDTUN, &atapi_dma, 0, 131 "ATAPI device DMA mode control"); 132 TUNABLE_INT("hw.ata.wc", &ata_wc); 133 SYSCTL_INT(_hw_ata, OID_AUTO, wc, CTLFLAG_RDTUN, &ata_wc, 0, 134 "ATA disk write caching"); 135 TUNABLE_INT("hw.ata.setmax", &ata_setmax); 136 SYSCTL_INT(_hw_ata, OID_AUTO, setmax, CTLFLAG_RDTUN, &ata_setmax, 0, 137 "ATA disk set max native address"); 138 #endif 139 #ifdef ATA_CAM 140 FEATURE(ata_cam, "ATA devices are accessed through the cam(4) driver"); 141 #endif 142 143 /* 144 * newbus device interface related functions 145 */ 146 int 147 ata_probe(device_t dev) 148 { 149 return 0; 150 } 151 152 int 153 ata_attach(device_t dev) 154 { 155 struct ata_channel *ch = device_get_softc(dev); 156 int error, rid; 157 #ifdef ATA_CAM 158 struct cam_devq *devq; 159 const char *res; 160 char buf[64]; 161 int i, mode; 162 #endif 163 164 /* check that we have a virgin channel to attach */ 165 if (ch->r_irq) 166 return EEXIST; 167 168 /* initialize the softc basics */ 169 ch->dev = dev; 170 ch->state = ATA_IDLE; 171 bzero(&ch->state_mtx, sizeof(struct mtx)); 172 mtx_init(&ch->state_mtx, "ATA state lock", NULL, MTX_DEF); 173 #ifndef ATA_CAM 174 bzero(&ch->queue_mtx, sizeof(struct mtx)); 175 mtx_init(&ch->queue_mtx, "ATA queue lock", NULL, MTX_DEF); 176 TAILQ_INIT(&ch->ata_queue); 177 #endif 178 TASK_INIT(&ch->conntask, 0, ata_conn_event, dev); 179 #ifdef ATA_CAM 180 for (i = 0; i < 16; i++) { 181 ch->user[i].revision = 0; 182 snprintf(buf, sizeof(buf), "dev%d.sata_rev", i); 183 if (resource_int_value(device_get_name(dev), 184 device_get_unit(dev), buf, &mode) != 0 && 185 resource_int_value(device_get_name(dev), 186 device_get_unit(dev), "sata_rev", &mode) != 0) 187 mode = -1; 188 if (mode >= 0) 189 ch->user[i].revision = mode; 190 ch->user[i].mode = 0; 191 snprintf(buf, sizeof(buf), "dev%d.mode", i); 192 if (resource_string_value(device_get_name(dev), 193 device_get_unit(dev), buf, &res) == 0) 194 mode = ata_str2mode(res); 195 else if (resource_string_value(device_get_name(dev), 196 device_get_unit(dev), "mode", &res) == 0) 197 mode = ata_str2mode(res); 198 else 199 mode = -1; 200 if (mode >= 0) 201 ch->user[i].mode = mode; 202 if (ch->flags & ATA_SATA) 203 ch->user[i].bytecount = 8192; 204 else 205 ch->user[i].bytecount = MAXPHYS; 206 ch->user[i].caps = 0; 207 ch->curr[i] = ch->user[i]; 208 if (ch->flags & ATA_SATA) { 209 if (ch->pm_level > 0) 210 ch->user[i].caps |= CTS_SATA_CAPS_H_PMREQ; 211 if (ch->pm_level > 1) 212 ch->user[i].caps |= CTS_SATA_CAPS_D_PMREQ; 213 } else { 214 if (!(ch->flags & ATA_NO_48BIT_DMA)) 215 ch->user[i].caps |= CTS_ATA_CAPS_H_DMA48; 216 } 217 } 218 callout_init(&ch->poll_callout, 1); 219 #endif 220 221 #ifndef ATA_CAM 222 /* reset the controller HW, the channel and device(s) */ 223 while (ATA_LOCKING(dev, ATA_LF_LOCK) != ch->unit) 224 pause("ataatch", 1); 225 ATA_RESET(dev); 226 ATA_LOCKING(dev, ATA_LF_UNLOCK); 227 #endif 228 229 /* allocate DMA resources if DMA HW present*/ 230 if (ch->dma.alloc) 231 ch->dma.alloc(dev); 232 233 /* setup interrupt delivery */ 234 rid = ATA_IRQ_RID; 235 ch->r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 236 RF_SHAREABLE | RF_ACTIVE); 237 if (!ch->r_irq) { 238 device_printf(dev, "unable to allocate interrupt\n"); 239 return ENXIO; 240 } 241 if ((error = bus_setup_intr(dev, ch->r_irq, ATA_INTR_FLAGS, NULL, 242 ata_interrupt, ch, &ch->ih))) { 243 bus_release_resource(dev, SYS_RES_IRQ, rid, ch->r_irq); 244 device_printf(dev, "unable to setup interrupt\n"); 245 return error; 246 } 247 248 #ifndef ATA_CAM 249 /* probe and attach devices on this channel unless we are in early boot */ 250 if (!ata_delayed_attach) 251 ata_identify(dev); 252 return (0); 253 #else 254 if (ch->flags & ATA_PERIODIC_POLL) 255 callout_reset(&ch->poll_callout, hz, ata_periodic_poll, ch); 256 mtx_lock(&ch->state_mtx); 257 /* Create the device queue for our SIM. */ 258 devq = cam_simq_alloc(1); 259 if (devq == NULL) { 260 device_printf(dev, "Unable to allocate simq\n"); 261 error = ENOMEM; 262 goto err1; 263 } 264 /* Construct SIM entry */ 265 ch->sim = cam_sim_alloc(ataaction, atapoll, "ata", ch, 266 device_get_unit(dev), &ch->state_mtx, 1, 0, devq); 267 if (ch->sim == NULL) { 268 device_printf(dev, "unable to allocate sim\n"); 269 cam_simq_free(devq); 270 error = ENOMEM; 271 goto err1; 272 } 273 if (xpt_bus_register(ch->sim, dev, 0) != CAM_SUCCESS) { 274 device_printf(dev, "unable to register xpt bus\n"); 275 error = ENXIO; 276 goto err2; 277 } 278 if (xpt_create_path(&ch->path, /*periph*/NULL, cam_sim_path(ch->sim), 279 CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 280 device_printf(dev, "unable to create path\n"); 281 error = ENXIO; 282 goto err3; 283 } 284 mtx_unlock(&ch->state_mtx); 285 return (0); 286 287 err3: 288 xpt_bus_deregister(cam_sim_path(ch->sim)); 289 err2: 290 cam_sim_free(ch->sim, /*free_devq*/TRUE); 291 ch->sim = NULL; 292 err1: 293 bus_release_resource(dev, SYS_RES_IRQ, rid, ch->r_irq); 294 mtx_unlock(&ch->state_mtx); 295 if (ch->flags & ATA_PERIODIC_POLL) 296 callout_drain(&ch->poll_callout); 297 return (error); 298 #endif 299 } 300 301 int 302 ata_detach(device_t dev) 303 { 304 struct ata_channel *ch = device_get_softc(dev); 305 #ifndef ATA_CAM 306 device_t *children; 307 int nchildren, i; 308 #endif 309 310 /* check that we have a valid channel to detach */ 311 if (!ch->r_irq) 312 return ENXIO; 313 314 /* grap the channel lock so no new requests gets launched */ 315 mtx_lock(&ch->state_mtx); 316 ch->state |= ATA_STALL_QUEUE; 317 mtx_unlock(&ch->state_mtx); 318 #ifdef ATA_CAM 319 if (ch->flags & ATA_PERIODIC_POLL) 320 callout_drain(&ch->poll_callout); 321 #endif 322 323 #ifndef ATA_CAM 324 /* detach & delete all children */ 325 if (!device_get_children(dev, &children, &nchildren)) { 326 for (i = 0; i < nchildren; i++) 327 if (children[i]) 328 device_delete_child(dev, children[i]); 329 free(children, M_TEMP); 330 } 331 #endif 332 taskqueue_drain(taskqueue_thread, &ch->conntask); 333 334 #ifdef ATA_CAM 335 mtx_lock(&ch->state_mtx); 336 xpt_async(AC_LOST_DEVICE, ch->path, NULL); 337 xpt_free_path(ch->path); 338 xpt_bus_deregister(cam_sim_path(ch->sim)); 339 cam_sim_free(ch->sim, /*free_devq*/TRUE); 340 ch->sim = NULL; 341 mtx_unlock(&ch->state_mtx); 342 #endif 343 344 /* release resources */ 345 bus_teardown_intr(dev, ch->r_irq, ch->ih); 346 bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 347 ch->r_irq = NULL; 348 349 /* free DMA resources if DMA HW present*/ 350 if (ch->dma.free) 351 ch->dma.free(dev); 352 353 mtx_destroy(&ch->state_mtx); 354 #ifndef ATA_CAM 355 mtx_destroy(&ch->queue_mtx); 356 #endif 357 return 0; 358 } 359 360 static void 361 ata_conn_event(void *context, int dummy) 362 { 363 device_t dev = (device_t)context; 364 #ifdef ATA_CAM 365 struct ata_channel *ch = device_get_softc(dev); 366 union ccb *ccb; 367 368 mtx_lock(&ch->state_mtx); 369 if (ch->sim == NULL) { 370 mtx_unlock(&ch->state_mtx); 371 return; 372 } 373 ata_reinit(dev); 374 if ((ccb = xpt_alloc_ccb_nowait()) == NULL) 375 return; 376 if (xpt_create_path(&ccb->ccb_h.path, NULL, 377 cam_sim_path(ch->sim), 378 CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 379 xpt_free_ccb(ccb); 380 return; 381 } 382 xpt_rescan(ccb); 383 mtx_unlock(&ch->state_mtx); 384 #else 385 ata_reinit(dev); 386 #endif 387 } 388 389 int 390 ata_reinit(device_t dev) 391 { 392 struct ata_channel *ch = device_get_softc(dev); 393 struct ata_request *request; 394 #ifndef ATA_CAM 395 device_t *children; 396 int nchildren, i; 397 398 /* check that we have a valid channel to reinit */ 399 if (!ch || !ch->r_irq) 400 return ENXIO; 401 402 if (bootverbose) 403 device_printf(dev, "reiniting channel ..\n"); 404 405 /* poll for locking the channel */ 406 while (ATA_LOCKING(dev, ATA_LF_LOCK) != ch->unit) 407 pause("atarini", 1); 408 409 /* catch eventual request in ch->running */ 410 mtx_lock(&ch->state_mtx); 411 if (ch->state & ATA_STALL_QUEUE) { 412 /* Recursive reinits and reinits during detach prohobited. */ 413 mtx_unlock(&ch->state_mtx); 414 return (ENXIO); 415 } 416 if ((request = ch->running)) 417 callout_stop(&request->callout); 418 ch->running = NULL; 419 420 /* unconditionally grap the channel lock */ 421 ch->state |= ATA_STALL_QUEUE; 422 mtx_unlock(&ch->state_mtx); 423 424 /* reset the controller HW, the channel and device(s) */ 425 ATA_RESET(dev); 426 427 /* reinit the children and delete any that fails */ 428 if (!device_get_children(dev, &children, &nchildren)) { 429 mtx_lock(&Giant); /* newbus suckage it needs Giant */ 430 for (i = 0; i < nchildren; i++) { 431 /* did any children go missing ? */ 432 if (children[i] && device_is_attached(children[i]) && 433 ATA_REINIT(children[i])) { 434 /* 435 * if we had a running request and its device matches 436 * this child we need to inform the request that the 437 * device is gone. 438 */ 439 if (request && request->dev == children[i]) { 440 request->result = ENXIO; 441 device_printf(request->dev, "FAILURE - device detached\n"); 442 443 /* if not timeout finish request here */ 444 if (!(request->flags & ATA_R_TIMEOUT)) 445 ata_finish(request); 446 request = NULL; 447 } 448 device_delete_child(dev, children[i]); 449 } 450 } 451 free(children, M_TEMP); 452 mtx_unlock(&Giant); /* newbus suckage dealt with, release Giant */ 453 } 454 455 /* if we still have a good request put it on the queue again */ 456 if (request && !(request->flags & ATA_R_TIMEOUT)) { 457 device_printf(request->dev, 458 "WARNING - %s requeued due to channel reset", 459 ata_cmd2str(request)); 460 if (!(request->flags & (ATA_R_ATAPI | ATA_R_CONTROL))) 461 printf(" LBA=%ju", request->u.ata.lba); 462 printf("\n"); 463 request->flags |= ATA_R_REQUEUE; 464 ata_queue_request(request); 465 } 466 467 /* we're done release the channel for new work */ 468 mtx_lock(&ch->state_mtx); 469 ch->state = ATA_IDLE; 470 mtx_unlock(&ch->state_mtx); 471 ATA_LOCKING(dev, ATA_LF_UNLOCK); 472 473 /* Add new children. */ 474 /* ata_identify(dev); */ 475 476 if (bootverbose) 477 device_printf(dev, "reinit done ..\n"); 478 479 /* kick off requests on the queue */ 480 ata_start(dev); 481 #else 482 xpt_freeze_simq(ch->sim, 1); 483 if ((request = ch->running)) { 484 ch->running = NULL; 485 if (ch->state == ATA_ACTIVE) 486 ch->state = ATA_IDLE; 487 callout_stop(&request->callout); 488 if (ch->dma.unload) 489 ch->dma.unload(request); 490 request->result = ERESTART; 491 ata_cam_end_transaction(dev, request); 492 } 493 /* reset the controller HW, the channel and device(s) */ 494 ATA_RESET(dev); 495 /* Tell the XPT about the event */ 496 xpt_async(AC_BUS_RESET, ch->path, NULL); 497 xpt_release_simq(ch->sim, TRUE); 498 #endif 499 return(0); 500 } 501 502 int 503 ata_suspend(device_t dev) 504 { 505 struct ata_channel *ch; 506 507 /* check for valid device */ 508 if (!dev || !(ch = device_get_softc(dev))) 509 return ENXIO; 510 511 #ifdef ATA_CAM 512 if (ch->flags & ATA_PERIODIC_POLL) 513 callout_drain(&ch->poll_callout); 514 mtx_lock(&ch->state_mtx); 515 xpt_freeze_simq(ch->sim, 1); 516 while (ch->state != ATA_IDLE) 517 msleep(ch, &ch->state_mtx, PRIBIO, "atasusp", hz/100); 518 mtx_unlock(&ch->state_mtx); 519 #else 520 /* wait for the channel to be IDLE or detached before suspending */ 521 while (ch->r_irq) { 522 mtx_lock(&ch->state_mtx); 523 if (ch->state == ATA_IDLE) { 524 ch->state = ATA_ACTIVE; 525 mtx_unlock(&ch->state_mtx); 526 break; 527 } 528 mtx_unlock(&ch->state_mtx); 529 tsleep(ch, PRIBIO, "atasusp", hz/10); 530 } 531 ATA_LOCKING(dev, ATA_LF_UNLOCK); 532 #endif 533 return(0); 534 } 535 536 int 537 ata_resume(device_t dev) 538 { 539 struct ata_channel *ch; 540 int error; 541 542 /* check for valid device */ 543 if (!dev || !(ch = device_get_softc(dev))) 544 return ENXIO; 545 546 #ifdef ATA_CAM 547 mtx_lock(&ch->state_mtx); 548 error = ata_reinit(dev); 549 xpt_release_simq(ch->sim, TRUE); 550 mtx_unlock(&ch->state_mtx); 551 if (ch->flags & ATA_PERIODIC_POLL) 552 callout_reset(&ch->poll_callout, hz, ata_periodic_poll, ch); 553 #else 554 /* reinit the devices, we dont know what mode/state they are in */ 555 error = ata_reinit(dev); 556 /* kick off requests on the queue */ 557 ata_start(dev); 558 #endif 559 return error; 560 } 561 562 void 563 ata_interrupt(void *data) 564 { 565 #ifdef ATA_CAM 566 struct ata_channel *ch = (struct ata_channel *)data; 567 568 mtx_lock(&ch->state_mtx); 569 xpt_batch_start(ch->sim); 570 #endif 571 ata_interrupt_locked(data); 572 #ifdef ATA_CAM 573 xpt_batch_done(ch->sim); 574 mtx_unlock(&ch->state_mtx); 575 #endif 576 } 577 578 static void 579 ata_interrupt_locked(void *data) 580 { 581 struct ata_channel *ch = (struct ata_channel *)data; 582 struct ata_request *request; 583 584 #ifndef ATA_CAM 585 mtx_lock(&ch->state_mtx); 586 #endif 587 do { 588 /* ignore interrupt if its not for us */ 589 if (ch->hw.status && !ch->hw.status(ch->dev)) 590 break; 591 592 /* do we have a running request */ 593 if (!(request = ch->running)) 594 break; 595 596 ATA_DEBUG_RQ(request, "interrupt"); 597 598 /* safetycheck for the right state */ 599 if (ch->state == ATA_IDLE) { 600 device_printf(request->dev, "interrupt on idle channel ignored\n"); 601 break; 602 } 603 604 /* 605 * we have the HW locks, so end the transaction for this request 606 * if it finishes immediately otherwise wait for next interrupt 607 */ 608 if (ch->hw.end_transaction(request) == ATA_OP_FINISHED) { 609 ch->running = NULL; 610 if (ch->state == ATA_ACTIVE) 611 ch->state = ATA_IDLE; 612 #ifdef ATA_CAM 613 ata_cam_end_transaction(ch->dev, request); 614 #else 615 mtx_unlock(&ch->state_mtx); 616 ATA_LOCKING(ch->dev, ATA_LF_UNLOCK); 617 ata_finish(request); 618 #endif 619 return; 620 } 621 } while (0); 622 #ifndef ATA_CAM 623 mtx_unlock(&ch->state_mtx); 624 #endif 625 } 626 627 #ifdef ATA_CAM 628 static void 629 ata_periodic_poll(void *data) 630 { 631 struct ata_channel *ch = (struct ata_channel *)data; 632 633 callout_reset(&ch->poll_callout, hz, ata_periodic_poll, ch); 634 ata_interrupt(ch); 635 } 636 #endif 637 638 void 639 ata_print_cable(device_t dev, u_int8_t *who) 640 { 641 device_printf(dev, 642 "DMA limited to UDMA33, %s found non-ATA66 cable\n", who); 643 } 644 645 #ifndef ATA_CAM 646 int 647 ata_check_80pin(device_t dev, int mode) 648 { 649 struct ata_device *atadev = device_get_softc(dev); 650 651 if (!ata_dma_check_80pin) { 652 if (bootverbose) 653 device_printf(dev, "Skipping 80pin cable check\n"); 654 return mode; 655 } 656 657 if (mode > ATA_UDMA2 && !(atadev->param.hwres & ATA_CABLE_ID)) { 658 ata_print_cable(dev, "device"); 659 mode = ATA_UDMA2; 660 } 661 return mode; 662 } 663 #endif 664 665 #ifndef ATA_CAM 666 void 667 ata_setmode(device_t dev) 668 { 669 struct ata_channel *ch = device_get_softc(device_get_parent(dev)); 670 struct ata_device *atadev = device_get_softc(dev); 671 int error, mode, pmode; 672 673 mode = atadev->mode; 674 do { 675 pmode = mode = ata_limit_mode(dev, mode, ATA_DMA_MAX); 676 mode = ATA_SETMODE(device_get_parent(dev), atadev->unit, mode); 677 if ((ch->flags & (ATA_CHECKS_CABLE | ATA_SATA)) == 0) 678 mode = ata_check_80pin(dev, mode); 679 } while (pmode != mode); /* Interate till successfull negotiation. */ 680 error = ata_controlcmd(dev, ATA_SETFEATURES, ATA_SF_SETXFER, 0, mode); 681 if (bootverbose) 682 device_printf(dev, "%ssetting %s\n", 683 (error) ? "FAILURE " : "", ata_mode2str(mode)); 684 atadev->mode = mode; 685 } 686 #endif 687 688 /* 689 * device related interfaces 690 */ 691 #ifndef ATA_CAM 692 static int 693 ata_ioctl(struct cdev *dev, u_long cmd, caddr_t data, 694 int32_t flag, struct thread *td) 695 { 696 device_t device, *children; 697 struct ata_ioc_devices *devices = (struct ata_ioc_devices *)data; 698 int *value = (int *)data; 699 int i, nchildren, error = ENOTTY; 700 701 switch (cmd) { 702 case IOCATAGMAXCHANNEL: 703 /* In case we have channel 0..n this will return n+1. */ 704 *value = devclass_get_maxunit(ata_devclass); 705 error = 0; 706 break; 707 708 case IOCATAREINIT: 709 if (*value >= devclass_get_maxunit(ata_devclass) || 710 !(device = devclass_get_device(ata_devclass, *value)) || 711 !device_is_attached(device)) 712 return ENXIO; 713 error = ata_reinit(device); 714 break; 715 716 case IOCATAATTACH: 717 if (*value >= devclass_get_maxunit(ata_devclass) || 718 !(device = devclass_get_device(ata_devclass, *value)) || 719 !device_is_attached(device)) 720 return ENXIO; 721 error = DEVICE_ATTACH(device); 722 break; 723 724 case IOCATADETACH: 725 if (*value >= devclass_get_maxunit(ata_devclass) || 726 !(device = devclass_get_device(ata_devclass, *value)) || 727 !device_is_attached(device)) 728 return ENXIO; 729 error = DEVICE_DETACH(device); 730 break; 731 732 case IOCATADEVICES: 733 if (devices->channel >= devclass_get_maxunit(ata_devclass) || 734 !(device = devclass_get_device(ata_devclass, devices->channel)) || 735 !device_is_attached(device)) 736 return ENXIO; 737 bzero(devices->name[0], 32); 738 bzero(&devices->params[0], sizeof(struct ata_params)); 739 bzero(devices->name[1], 32); 740 bzero(&devices->params[1], sizeof(struct ata_params)); 741 if (!device_get_children(device, &children, &nchildren)) { 742 for (i = 0; i < nchildren; i++) { 743 if (children[i] && device_is_attached(children[i])) { 744 struct ata_device *atadev = device_get_softc(children[i]); 745 746 if (atadev->unit == ATA_MASTER) { /* XXX SOS PM */ 747 strncpy(devices->name[0], 748 device_get_nameunit(children[i]), 32); 749 bcopy(&atadev->param, &devices->params[0], 750 sizeof(struct ata_params)); 751 } 752 if (atadev->unit == ATA_SLAVE) { /* XXX SOS PM */ 753 strncpy(devices->name[1], 754 device_get_nameunit(children[i]), 32); 755 bcopy(&atadev->param, &devices->params[1], 756 sizeof(struct ata_params)); 757 } 758 } 759 } 760 free(children, M_TEMP); 761 error = 0; 762 } 763 else 764 error = ENODEV; 765 break; 766 767 default: 768 if (ata_raid_ioctl_func) 769 error = ata_raid_ioctl_func(cmd, data); 770 } 771 return error; 772 } 773 #endif 774 775 #ifndef ATA_CAM 776 int 777 ata_device_ioctl(device_t dev, u_long cmd, caddr_t data) 778 { 779 struct ata_device *atadev = device_get_softc(dev); 780 struct ata_channel *ch = device_get_softc(device_get_parent(dev)); 781 struct ata_ioc_request *ioc_request = (struct ata_ioc_request *)data; 782 struct ata_params *params = (struct ata_params *)data; 783 int *mode = (int *)data; 784 struct ata_request *request; 785 caddr_t buf; 786 int error; 787 788 switch (cmd) { 789 case IOCATAREQUEST: 790 if (ioc_request->count > 791 (ch->dma.max_iosize ? ch->dma.max_iosize : DFLTPHYS)) { 792 return (EFBIG); 793 } 794 if (!(buf = malloc(ioc_request->count, M_ATA, M_NOWAIT))) { 795 return ENOMEM; 796 } 797 if (!(request = ata_alloc_request())) { 798 free(buf, M_ATA); 799 return ENOMEM; 800 } 801 request->dev = atadev->dev; 802 if (ioc_request->flags & ATA_CMD_WRITE) { 803 error = copyin(ioc_request->data, buf, ioc_request->count); 804 if (error) { 805 free(buf, M_ATA); 806 ata_free_request(request); 807 return error; 808 } 809 } 810 if (ioc_request->flags & ATA_CMD_ATAPI) { 811 request->flags = ATA_R_ATAPI; 812 bcopy(ioc_request->u.atapi.ccb, request->u.atapi.ccb, 16); 813 } 814 else { 815 request->u.ata.command = ioc_request->u.ata.command; 816 request->u.ata.feature = ioc_request->u.ata.feature; 817 request->u.ata.lba = ioc_request->u.ata.lba; 818 request->u.ata.count = ioc_request->u.ata.count; 819 } 820 request->timeout = ioc_request->timeout; 821 request->data = buf; 822 request->bytecount = ioc_request->count; 823 request->transfersize = request->bytecount; 824 if (ioc_request->flags & ATA_CMD_CONTROL) 825 request->flags |= ATA_R_CONTROL; 826 if (ioc_request->flags & ATA_CMD_READ) 827 request->flags |= ATA_R_READ; 828 if (ioc_request->flags & ATA_CMD_WRITE) 829 request->flags |= ATA_R_WRITE; 830 ata_queue_request(request); 831 if (request->flags & ATA_R_ATAPI) { 832 bcopy(&request->u.atapi.sense, &ioc_request->u.atapi.sense, 833 sizeof(struct atapi_sense)); 834 } 835 else { 836 ioc_request->u.ata.command = request->u.ata.command; 837 ioc_request->u.ata.feature = request->u.ata.feature; 838 ioc_request->u.ata.lba = request->u.ata.lba; 839 ioc_request->u.ata.count = request->u.ata.count; 840 } 841 ioc_request->error = request->result; 842 if (ioc_request->flags & ATA_CMD_READ) 843 error = copyout(buf, ioc_request->data, ioc_request->count); 844 else 845 error = 0; 846 free(buf, M_ATA); 847 ata_free_request(request); 848 return error; 849 850 case IOCATAGPARM: 851 ata_getparam(atadev, 0); 852 bcopy(&atadev->param, params, sizeof(struct ata_params)); 853 return 0; 854 855 case IOCATASMODE: 856 atadev->mode = *mode; 857 ata_setmode(dev); 858 return 0; 859 860 case IOCATAGMODE: 861 *mode = atadev->mode | 862 (ATA_GETREV(device_get_parent(dev), atadev->unit) << 8); 863 return 0; 864 case IOCATASSPINDOWN: 865 atadev->spindown = *mode; 866 return 0; 867 case IOCATAGSPINDOWN: 868 *mode = atadev->spindown; 869 return 0; 870 default: 871 return ENOTTY; 872 } 873 } 874 #endif 875 876 #ifndef ATA_CAM 877 static void 878 ata_boot_attach(void) 879 { 880 struct ata_channel *ch; 881 int ctlr; 882 883 mtx_lock(&Giant); /* newbus suckage it needs Giant */ 884 885 /* kick off probe and attach on all channels */ 886 for (ctlr = 0; ctlr < devclass_get_maxunit(ata_devclass); ctlr++) { 887 if ((ch = devclass_get_softc(ata_devclass, ctlr))) { 888 ata_identify(ch->dev); 889 } 890 } 891 892 /* release the hook that got us here, we are only needed once during boot */ 893 if (ata_delayed_attach) { 894 config_intrhook_disestablish(ata_delayed_attach); 895 free(ata_delayed_attach, M_TEMP); 896 ata_delayed_attach = NULL; 897 } 898 899 mtx_unlock(&Giant); /* newbus suckage dealt with, release Giant */ 900 } 901 #endif 902 903 /* 904 * misc support functions 905 */ 906 #ifndef ATA_CAM 907 static device_t 908 ata_add_child(device_t parent, struct ata_device *atadev, int unit) 909 { 910 device_t child; 911 912 if ((child = device_add_child(parent, (unit < 0) ? NULL : "ad", unit))) { 913 device_set_softc(child, atadev); 914 device_quiet(child); 915 atadev->dev = child; 916 atadev->max_iosize = DEV_BSIZE; 917 atadev->mode = ATA_PIO_MAX; 918 } 919 return child; 920 } 921 #endif 922 923 #ifndef ATA_CAM 924 int 925 ata_getparam(struct ata_device *atadev, int init) 926 { 927 struct ata_channel *ch = device_get_softc(device_get_parent(atadev->dev)); 928 struct ata_request *request; 929 const char *res; 930 char buf[64]; 931 u_int8_t command = 0; 932 int error = ENOMEM, retries = 2, mode = -1; 933 934 if (ch->devices & (ATA_ATA_MASTER << atadev->unit)) 935 command = ATA_ATA_IDENTIFY; 936 if (ch->devices & (ATA_ATAPI_MASTER << atadev->unit)) 937 command = ATA_ATAPI_IDENTIFY; 938 if (!command) 939 return ENXIO; 940 941 while (retries-- > 0 && error) { 942 if (!(request = ata_alloc_request())) 943 break; 944 request->dev = atadev->dev; 945 request->timeout = 1; 946 request->retries = 0; 947 request->u.ata.command = command; 948 request->flags = (ATA_R_READ|ATA_R_AT_HEAD|ATA_R_DIRECT); 949 if (!bootverbose) 950 request->flags |= ATA_R_QUIET; 951 request->data = (void *)&atadev->param; 952 request->bytecount = sizeof(struct ata_params); 953 request->donecount = 0; 954 request->transfersize = DEV_BSIZE; 955 ata_queue_request(request); 956 error = request->result; 957 ata_free_request(request); 958 } 959 960 if (!error && (isprint(atadev->param.model[0]) || 961 isprint(atadev->param.model[1]))) { 962 struct ata_params *atacap = &atadev->param; 963 int16_t *ptr; 964 965 for (ptr = (int16_t *)atacap; 966 ptr < (int16_t *)atacap + sizeof(struct ata_params)/2; ptr++) { 967 *ptr = le16toh(*ptr); 968 } 969 if (!(!strncmp(atacap->model, "FX", 2) || 970 !strncmp(atacap->model, "NEC", 3) || 971 !strncmp(atacap->model, "Pioneer", 7) || 972 !strncmp(atacap->model, "SHARP", 5))) { 973 bswap(atacap->model, sizeof(atacap->model)); 974 bswap(atacap->revision, sizeof(atacap->revision)); 975 bswap(atacap->serial, sizeof(atacap->serial)); 976 } 977 btrim(atacap->model, sizeof(atacap->model)); 978 bpack(atacap->model, atacap->model, sizeof(atacap->model)); 979 btrim(atacap->revision, sizeof(atacap->revision)); 980 bpack(atacap->revision, atacap->revision, sizeof(atacap->revision)); 981 btrim(atacap->serial, sizeof(atacap->serial)); 982 bpack(atacap->serial, atacap->serial, sizeof(atacap->serial)); 983 984 if (bootverbose) 985 printf("ata%d-%s: pio=%s wdma=%s udma=%s cable=%s wire\n", 986 device_get_unit(ch->dev), 987 ata_unit2str(atadev), 988 ata_mode2str(ata_pmode(atacap)), 989 ata_mode2str(ata_wmode(atacap)), 990 ata_mode2str(ata_umode(atacap)), 991 (atacap->hwres & ATA_CABLE_ID) ? "80":"40"); 992 993 if (init) { 994 char buffer[64]; 995 996 sprintf(buffer, "%.40s/%.8s", atacap->model, atacap->revision); 997 device_set_desc_copy(atadev->dev, buffer); 998 if ((atadev->param.config & ATA_PROTO_ATAPI) && 999 (atadev->param.config != ATA_CFA_MAGIC1) && 1000 (atadev->param.config != ATA_CFA_MAGIC2)) { 1001 if (atapi_dma && 1002 (atadev->param.config & ATA_DRQ_MASK) != ATA_DRQ_INTR && 1003 ata_umode(&atadev->param) >= ATA_UDMA2) 1004 atadev->mode = ATA_DMA_MAX; 1005 } 1006 else { 1007 if (ata_dma && 1008 (ata_umode(&atadev->param) > 0 || 1009 ata_wmode(&atadev->param) > 0)) 1010 atadev->mode = ATA_DMA_MAX; 1011 } 1012 snprintf(buf, sizeof(buf), "dev%d.mode", atadev->unit); 1013 if (resource_string_value(device_get_name(ch->dev), 1014 device_get_unit(ch->dev), buf, &res) == 0) 1015 mode = ata_str2mode(res); 1016 else if (resource_string_value(device_get_name(ch->dev), 1017 device_get_unit(ch->dev), "mode", &res) == 0) 1018 mode = ata_str2mode(res); 1019 if (mode >= 0) 1020 atadev->mode = mode; 1021 } 1022 } 1023 else { 1024 if (!error) 1025 error = ENXIO; 1026 } 1027 return error; 1028 } 1029 #endif 1030 1031 #ifndef ATA_CAM 1032 int 1033 ata_identify(device_t dev) 1034 { 1035 struct ata_channel *ch = device_get_softc(dev); 1036 struct ata_device *atadev; 1037 device_t *children; 1038 device_t child, master = NULL; 1039 int nchildren, i, n = ch->devices; 1040 1041 if (bootverbose) 1042 device_printf(dev, "Identifying devices: %08x\n", ch->devices); 1043 1044 mtx_lock(&Giant); 1045 /* Skip existing devices. */ 1046 if (!device_get_children(dev, &children, &nchildren)) { 1047 for (i = 0; i < nchildren; i++) { 1048 if (children[i] && (atadev = device_get_softc(children[i]))) 1049 n &= ~((ATA_ATA_MASTER | ATA_ATAPI_MASTER) << atadev->unit); 1050 } 1051 free(children, M_TEMP); 1052 } 1053 /* Create new devices. */ 1054 if (bootverbose) 1055 device_printf(dev, "New devices: %08x\n", n); 1056 if (n == 0) { 1057 mtx_unlock(&Giant); 1058 return (0); 1059 } 1060 for (i = 0; i < ATA_PM; ++i) { 1061 if (n & (((ATA_ATA_MASTER | ATA_ATAPI_MASTER) << i))) { 1062 int unit = -1; 1063 1064 if (!(atadev = malloc(sizeof(struct ata_device), 1065 M_ATA, M_NOWAIT | M_ZERO))) { 1066 device_printf(dev, "out of memory\n"); 1067 return ENOMEM; 1068 } 1069 atadev->unit = i; 1070 #ifdef ATA_STATIC_ID 1071 if (n & (ATA_ATA_MASTER << i)) 1072 unit = (device_get_unit(dev) << 1) + i; 1073 #endif 1074 if ((child = ata_add_child(dev, atadev, unit))) { 1075 /* 1076 * PATA slave should be identified first, to allow 1077 * device cable detection on master to work properly. 1078 */ 1079 if (i == 0 && (n & ATA_PORTMULTIPLIER) == 0 && 1080 (n & ((ATA_ATA_MASTER | ATA_ATAPI_MASTER) << 1)) != 0) { 1081 master = child; 1082 continue; 1083 } 1084 if (ata_getparam(atadev, 1)) { 1085 device_delete_child(dev, child); 1086 free(atadev, M_ATA); 1087 } 1088 } 1089 else 1090 free(atadev, M_ATA); 1091 } 1092 } 1093 if (master) { 1094 atadev = device_get_softc(master); 1095 if (ata_getparam(atadev, 1)) { 1096 device_delete_child(dev, master); 1097 free(atadev, M_ATA); 1098 } 1099 } 1100 bus_generic_probe(dev); 1101 bus_generic_attach(dev); 1102 mtx_unlock(&Giant); 1103 return 0; 1104 } 1105 #endif 1106 1107 void 1108 ata_default_registers(device_t dev) 1109 { 1110 struct ata_channel *ch = device_get_softc(dev); 1111 1112 /* fill in the defaults from whats setup already */ 1113 ch->r_io[ATA_ERROR].res = ch->r_io[ATA_FEATURE].res; 1114 ch->r_io[ATA_ERROR].offset = ch->r_io[ATA_FEATURE].offset; 1115 ch->r_io[ATA_IREASON].res = ch->r_io[ATA_COUNT].res; 1116 ch->r_io[ATA_IREASON].offset = ch->r_io[ATA_COUNT].offset; 1117 ch->r_io[ATA_STATUS].res = ch->r_io[ATA_COMMAND].res; 1118 ch->r_io[ATA_STATUS].offset = ch->r_io[ATA_COMMAND].offset; 1119 ch->r_io[ATA_ALTSTAT].res = ch->r_io[ATA_CONTROL].res; 1120 ch->r_io[ATA_ALTSTAT].offset = ch->r_io[ATA_CONTROL].offset; 1121 } 1122 1123 #ifndef ATA_CAM 1124 void 1125 ata_modify_if_48bit(struct ata_request *request) 1126 { 1127 struct ata_channel *ch = device_get_softc(request->parent); 1128 struct ata_device *atadev = device_get_softc(request->dev); 1129 1130 request->flags &= ~ATA_R_48BIT; 1131 1132 if (((request->u.ata.lba + request->u.ata.count) >= ATA_MAX_28BIT_LBA || 1133 request->u.ata.count > 256) && 1134 atadev->param.support.command2 & ATA_SUPPORT_ADDRESS48) { 1135 1136 /* translate command into 48bit version */ 1137 switch (request->u.ata.command) { 1138 case ATA_READ: 1139 request->u.ata.command = ATA_READ48; 1140 break; 1141 case ATA_READ_MUL: 1142 request->u.ata.command = ATA_READ_MUL48; 1143 break; 1144 case ATA_READ_DMA: 1145 if (ch->flags & ATA_NO_48BIT_DMA) { 1146 if (request->transfersize > DEV_BSIZE) 1147 request->u.ata.command = ATA_READ_MUL48; 1148 else 1149 request->u.ata.command = ATA_READ48; 1150 request->flags &= ~ATA_R_DMA; 1151 } 1152 else 1153 request->u.ata.command = ATA_READ_DMA48; 1154 break; 1155 case ATA_READ_DMA_QUEUED: 1156 if (ch->flags & ATA_NO_48BIT_DMA) { 1157 if (request->transfersize > DEV_BSIZE) 1158 request->u.ata.command = ATA_READ_MUL48; 1159 else 1160 request->u.ata.command = ATA_READ48; 1161 request->flags &= ~ATA_R_DMA; 1162 } 1163 else 1164 request->u.ata.command = ATA_READ_DMA_QUEUED48; 1165 break; 1166 case ATA_WRITE: 1167 request->u.ata.command = ATA_WRITE48; 1168 break; 1169 case ATA_WRITE_MUL: 1170 request->u.ata.command = ATA_WRITE_MUL48; 1171 break; 1172 case ATA_WRITE_DMA: 1173 if (ch->flags & ATA_NO_48BIT_DMA) { 1174 if (request->transfersize > DEV_BSIZE) 1175 request->u.ata.command = ATA_WRITE_MUL48; 1176 else 1177 request->u.ata.command = ATA_WRITE48; 1178 request->flags &= ~ATA_R_DMA; 1179 } 1180 else 1181 request->u.ata.command = ATA_WRITE_DMA48; 1182 break; 1183 case ATA_WRITE_DMA_QUEUED: 1184 if (ch->flags & ATA_NO_48BIT_DMA) { 1185 if (request->transfersize > DEV_BSIZE) 1186 request->u.ata.command = ATA_WRITE_MUL48; 1187 else 1188 request->u.ata.command = ATA_WRITE48; 1189 request->u.ata.command = ATA_WRITE48; 1190 request->flags &= ~ATA_R_DMA; 1191 } 1192 else 1193 request->u.ata.command = ATA_WRITE_DMA_QUEUED48; 1194 break; 1195 case ATA_FLUSHCACHE: 1196 request->u.ata.command = ATA_FLUSHCACHE48; 1197 break; 1198 case ATA_SET_MAX_ADDRESS: 1199 request->u.ata.command = ATA_SET_MAX_ADDRESS48; 1200 break; 1201 default: 1202 return; 1203 } 1204 request->flags |= ATA_R_48BIT; 1205 } 1206 else if (atadev->param.support.command2 & ATA_SUPPORT_ADDRESS48) { 1207 1208 /* translate command into 48bit version */ 1209 switch (request->u.ata.command) { 1210 case ATA_FLUSHCACHE: 1211 request->u.ata.command = ATA_FLUSHCACHE48; 1212 break; 1213 case ATA_READ_NATIVE_MAX_ADDRESS: 1214 request->u.ata.command = ATA_READ_NATIVE_MAX_ADDRESS48; 1215 break; 1216 case ATA_SET_MAX_ADDRESS: 1217 request->u.ata.command = ATA_SET_MAX_ADDRESS48; 1218 break; 1219 default: 1220 return; 1221 } 1222 request->flags |= ATA_R_48BIT; 1223 } 1224 } 1225 #endif 1226 1227 void 1228 ata_udelay(int interval) 1229 { 1230 /* for now just use DELAY, the timer/sleep subsytems are not there yet */ 1231 if (1 || interval < (1000000/hz) || ata_delayed_attach) 1232 DELAY(interval); 1233 else 1234 pause("ataslp", interval/(1000000/hz)); 1235 } 1236 1237 #ifndef ATA_CAM 1238 const char * 1239 ata_unit2str(struct ata_device *atadev) 1240 { 1241 struct ata_channel *ch = device_get_softc(device_get_parent(atadev->dev)); 1242 static char str[8]; 1243 1244 if (ch->devices & ATA_PORTMULTIPLIER) 1245 sprintf(str, "port%d", atadev->unit); 1246 else 1247 sprintf(str, "%s", atadev->unit == ATA_MASTER ? "master" : "slave"); 1248 return str; 1249 } 1250 #endif 1251 1252 const char * 1253 ata_cmd2str(struct ata_request *request) 1254 { 1255 static char buffer[20]; 1256 1257 if (request->flags & ATA_R_ATAPI) { 1258 switch (request->u.atapi.sense.key ? 1259 request->u.atapi.saved_cmd : request->u.atapi.ccb[0]) { 1260 case 0x00: return ("TEST_UNIT_READY"); 1261 case 0x01: return ("REZERO"); 1262 case 0x03: return ("REQUEST_SENSE"); 1263 case 0x04: return ("FORMAT"); 1264 case 0x08: return ("READ"); 1265 case 0x0a: return ("WRITE"); 1266 case 0x10: return ("WEOF"); 1267 case 0x11: return ("SPACE"); 1268 case 0x12: return ("INQUIRY"); 1269 case 0x15: return ("MODE_SELECT"); 1270 case 0x19: return ("ERASE"); 1271 case 0x1a: return ("MODE_SENSE"); 1272 case 0x1b: return ("START_STOP"); 1273 case 0x1e: return ("PREVENT_ALLOW"); 1274 case 0x23: return ("ATAPI_READ_FORMAT_CAPACITIES"); 1275 case 0x25: return ("READ_CAPACITY"); 1276 case 0x28: return ("READ_BIG"); 1277 case 0x2a: return ("WRITE_BIG"); 1278 case 0x2b: return ("LOCATE"); 1279 case 0x34: return ("READ_POSITION"); 1280 case 0x35: return ("SYNCHRONIZE_CACHE"); 1281 case 0x3b: return ("WRITE_BUFFER"); 1282 case 0x3c: return ("READ_BUFFER"); 1283 case 0x42: return ("READ_SUBCHANNEL"); 1284 case 0x43: return ("READ_TOC"); 1285 case 0x45: return ("PLAY_10"); 1286 case 0x47: return ("PLAY_MSF"); 1287 case 0x48: return ("PLAY_TRACK"); 1288 case 0x4b: return ("PAUSE"); 1289 case 0x51: return ("READ_DISK_INFO"); 1290 case 0x52: return ("READ_TRACK_INFO"); 1291 case 0x53: return ("RESERVE_TRACK"); 1292 case 0x54: return ("SEND_OPC_INFO"); 1293 case 0x55: return ("MODE_SELECT_BIG"); 1294 case 0x58: return ("REPAIR_TRACK"); 1295 case 0x59: return ("READ_MASTER_CUE"); 1296 case 0x5a: return ("MODE_SENSE_BIG"); 1297 case 0x5b: return ("CLOSE_TRACK/SESSION"); 1298 case 0x5c: return ("READ_BUFFER_CAPACITY"); 1299 case 0x5d: return ("SEND_CUE_SHEET"); 1300 case 0x96: return ("SERVICE_ACTION_IN"); 1301 case 0xa1: return ("BLANK_CMD"); 1302 case 0xa3: return ("SEND_KEY"); 1303 case 0xa4: return ("REPORT_KEY"); 1304 case 0xa5: return ("PLAY_12"); 1305 case 0xa6: return ("LOAD_UNLOAD"); 1306 case 0xad: return ("READ_DVD_STRUCTURE"); 1307 case 0xb4: return ("PLAY_CD"); 1308 case 0xbb: return ("SET_SPEED"); 1309 case 0xbd: return ("MECH_STATUS"); 1310 case 0xbe: return ("READ_CD"); 1311 case 0xff: return ("POLL_DSC"); 1312 } 1313 } else { 1314 switch (request->u.ata.command) { 1315 case 0x00: return ("NOP"); 1316 case 0x08: return ("DEVICE_RESET"); 1317 case 0x20: return ("READ"); 1318 case 0x24: return ("READ48"); 1319 case 0x25: return ("READ_DMA48"); 1320 case 0x26: return ("READ_DMA_QUEUED48"); 1321 case 0x27: return ("READ_NATIVE_MAX_ADDRESS48"); 1322 case 0x29: return ("READ_MUL48"); 1323 case 0x30: return ("WRITE"); 1324 case 0x34: return ("WRITE48"); 1325 case 0x35: return ("WRITE_DMA48"); 1326 case 0x36: return ("WRITE_DMA_QUEUED48"); 1327 case 0x37: return ("SET_MAX_ADDRESS48"); 1328 case 0x39: return ("WRITE_MUL48"); 1329 case 0x70: return ("SEEK"); 1330 case 0xa0: return ("PACKET_CMD"); 1331 case 0xa1: return ("ATAPI_IDENTIFY"); 1332 case 0xa2: return ("SERVICE"); 1333 case 0xb0: return ("SMART"); 1334 case 0xc0: return ("CFA ERASE"); 1335 case 0xc4: return ("READ_MUL"); 1336 case 0xc5: return ("WRITE_MUL"); 1337 case 0xc6: return ("SET_MULTI"); 1338 case 0xc7: return ("READ_DMA_QUEUED"); 1339 case 0xc8: return ("READ_DMA"); 1340 case 0xca: return ("WRITE_DMA"); 1341 case 0xcc: return ("WRITE_DMA_QUEUED"); 1342 case 0xe6: return ("SLEEP"); 1343 case 0xe7: return ("FLUSHCACHE"); 1344 case 0xea: return ("FLUSHCACHE48"); 1345 case 0xec: return ("ATA_IDENTIFY"); 1346 case 0xef: 1347 switch (request->u.ata.feature) { 1348 case 0x03: return ("SETFEATURES SET TRANSFER MODE"); 1349 case 0x02: return ("SETFEATURES ENABLE WCACHE"); 1350 case 0x82: return ("SETFEATURES DISABLE WCACHE"); 1351 case 0xaa: return ("SETFEATURES ENABLE RCACHE"); 1352 case 0x55: return ("SETFEATURES DISABLE RCACHE"); 1353 } 1354 sprintf(buffer, "SETFEATURES 0x%02x", 1355 request->u.ata.feature); 1356 return (buffer); 1357 case 0xf5: return ("SECURITY_FREE_LOCK"); 1358 case 0xf8: return ("READ_NATIVE_MAX_ADDRESS"); 1359 case 0xf9: return ("SET_MAX_ADDRESS"); 1360 } 1361 } 1362 sprintf(buffer, "unknown CMD (0x%02x)", request->u.ata.command); 1363 return (buffer); 1364 } 1365 1366 const char * 1367 ata_mode2str(int mode) 1368 { 1369 switch (mode) { 1370 case -1: return "UNSUPPORTED"; 1371 case ATA_PIO0: return "PIO0"; 1372 case ATA_PIO1: return "PIO1"; 1373 case ATA_PIO2: return "PIO2"; 1374 case ATA_PIO3: return "PIO3"; 1375 case ATA_PIO4: return "PIO4"; 1376 case ATA_WDMA0: return "WDMA0"; 1377 case ATA_WDMA1: return "WDMA1"; 1378 case ATA_WDMA2: return "WDMA2"; 1379 case ATA_UDMA0: return "UDMA16"; 1380 case ATA_UDMA1: return "UDMA25"; 1381 case ATA_UDMA2: return "UDMA33"; 1382 case ATA_UDMA3: return "UDMA40"; 1383 case ATA_UDMA4: return "UDMA66"; 1384 case ATA_UDMA5: return "UDMA100"; 1385 case ATA_UDMA6: return "UDMA133"; 1386 case ATA_SA150: return "SATA150"; 1387 case ATA_SA300: return "SATA300"; 1388 default: 1389 if (mode & ATA_DMA_MASK) 1390 return "BIOSDMA"; 1391 else 1392 return "BIOSPIO"; 1393 } 1394 } 1395 1396 static int 1397 ata_str2mode(const char *str) 1398 { 1399 1400 if (!strcasecmp(str, "PIO0")) return (ATA_PIO0); 1401 if (!strcasecmp(str, "PIO1")) return (ATA_PIO1); 1402 if (!strcasecmp(str, "PIO2")) return (ATA_PIO2); 1403 if (!strcasecmp(str, "PIO3")) return (ATA_PIO3); 1404 if (!strcasecmp(str, "PIO4")) return (ATA_PIO4); 1405 if (!strcasecmp(str, "WDMA0")) return (ATA_WDMA0); 1406 if (!strcasecmp(str, "WDMA1")) return (ATA_WDMA1); 1407 if (!strcasecmp(str, "WDMA2")) return (ATA_WDMA2); 1408 if (!strcasecmp(str, "UDMA0")) return (ATA_UDMA0); 1409 if (!strcasecmp(str, "UDMA16")) return (ATA_UDMA0); 1410 if (!strcasecmp(str, "UDMA1")) return (ATA_UDMA1); 1411 if (!strcasecmp(str, "UDMA25")) return (ATA_UDMA1); 1412 if (!strcasecmp(str, "UDMA2")) return (ATA_UDMA2); 1413 if (!strcasecmp(str, "UDMA33")) return (ATA_UDMA2); 1414 if (!strcasecmp(str, "UDMA3")) return (ATA_UDMA3); 1415 if (!strcasecmp(str, "UDMA44")) return (ATA_UDMA3); 1416 if (!strcasecmp(str, "UDMA4")) return (ATA_UDMA4); 1417 if (!strcasecmp(str, "UDMA66")) return (ATA_UDMA4); 1418 if (!strcasecmp(str, "UDMA5")) return (ATA_UDMA5); 1419 if (!strcasecmp(str, "UDMA100")) return (ATA_UDMA5); 1420 if (!strcasecmp(str, "UDMA6")) return (ATA_UDMA6); 1421 if (!strcasecmp(str, "UDMA133")) return (ATA_UDMA6); 1422 return (-1); 1423 } 1424 1425 #ifndef ATA_CAM 1426 const char * 1427 ata_satarev2str(int rev) 1428 { 1429 switch (rev) { 1430 case 0: return ""; 1431 case 1: return "SATA 1.5Gb/s"; 1432 case 2: return "SATA 3Gb/s"; 1433 case 3: return "SATA 6Gb/s"; 1434 case 0xff: return "SATA"; 1435 default: return "???"; 1436 } 1437 } 1438 #endif 1439 1440 int 1441 ata_atapi(device_t dev, int target) 1442 { 1443 struct ata_channel *ch = device_get_softc(dev); 1444 1445 return (ch->devices & (ATA_ATAPI_MASTER << target)); 1446 } 1447 1448 #ifndef ATA_CAM 1449 int 1450 ata_pmode(struct ata_params *ap) 1451 { 1452 if (ap->atavalid & ATA_FLAG_64_70) { 1453 if (ap->apiomodes & 0x02) 1454 return ATA_PIO4; 1455 if (ap->apiomodes & 0x01) 1456 return ATA_PIO3; 1457 } 1458 if (ap->mwdmamodes & 0x04) 1459 return ATA_PIO4; 1460 if (ap->mwdmamodes & 0x02) 1461 return ATA_PIO3; 1462 if (ap->mwdmamodes & 0x01) 1463 return ATA_PIO2; 1464 if ((ap->retired_piomode & ATA_RETIRED_PIO_MASK) == 0x200) 1465 return ATA_PIO2; 1466 if ((ap->retired_piomode & ATA_RETIRED_PIO_MASK) == 0x100) 1467 return ATA_PIO1; 1468 if ((ap->retired_piomode & ATA_RETIRED_PIO_MASK) == 0x000) 1469 return ATA_PIO0; 1470 return ATA_PIO0; 1471 } 1472 #endif 1473 1474 #ifndef ATA_CAM 1475 int 1476 ata_wmode(struct ata_params *ap) 1477 { 1478 if (ap->mwdmamodes & 0x04) 1479 return ATA_WDMA2; 1480 if (ap->mwdmamodes & 0x02) 1481 return ATA_WDMA1; 1482 if (ap->mwdmamodes & 0x01) 1483 return ATA_WDMA0; 1484 return -1; 1485 } 1486 #endif 1487 1488 #ifndef ATA_CAM 1489 int 1490 ata_umode(struct ata_params *ap) 1491 { 1492 if (ap->atavalid & ATA_FLAG_88) { 1493 if (ap->udmamodes & 0x40) 1494 return ATA_UDMA6; 1495 if (ap->udmamodes & 0x20) 1496 return ATA_UDMA5; 1497 if (ap->udmamodes & 0x10) 1498 return ATA_UDMA4; 1499 if (ap->udmamodes & 0x08) 1500 return ATA_UDMA3; 1501 if (ap->udmamodes & 0x04) 1502 return ATA_UDMA2; 1503 if (ap->udmamodes & 0x02) 1504 return ATA_UDMA1; 1505 if (ap->udmamodes & 0x01) 1506 return ATA_UDMA0; 1507 } 1508 return -1; 1509 } 1510 #endif 1511 1512 #ifndef ATA_CAM 1513 int 1514 ata_limit_mode(device_t dev, int mode, int maxmode) 1515 { 1516 struct ata_device *atadev = device_get_softc(dev); 1517 1518 if (maxmode && mode > maxmode) 1519 mode = maxmode; 1520 1521 if (mode >= ATA_UDMA0 && ata_umode(&atadev->param) > 0) 1522 return min(mode, ata_umode(&atadev->param)); 1523 1524 if (mode >= ATA_WDMA0 && ata_wmode(&atadev->param) > 0) 1525 return min(mode, ata_wmode(&atadev->param)); 1526 1527 if (mode > ata_pmode(&atadev->param)) 1528 return min(mode, ata_pmode(&atadev->param)); 1529 1530 return mode; 1531 } 1532 #endif 1533 1534 #ifndef ATA_CAM 1535 static void 1536 bswap(int8_t *buf, int len) 1537 { 1538 u_int16_t *ptr = (u_int16_t*)(buf + len); 1539 1540 while (--ptr >= (u_int16_t*)buf) 1541 *ptr = ntohs(*ptr); 1542 } 1543 #endif 1544 1545 #ifndef ATA_CAM 1546 static void 1547 btrim(int8_t *buf, int len) 1548 { 1549 int8_t *ptr; 1550 1551 for (ptr = buf; ptr < buf+len; ++ptr) 1552 if (!*ptr || *ptr == '_') 1553 *ptr = ' '; 1554 for (ptr = buf + len - 1; ptr >= buf && *ptr == ' '; --ptr) 1555 *ptr = 0; 1556 } 1557 #endif 1558 1559 #ifndef ATA_CAM 1560 static void 1561 bpack(int8_t *src, int8_t *dst, int len) 1562 { 1563 int i, j, blank; 1564 1565 for (i = j = blank = 0 ; i < len; i++) { 1566 if (blank && src[i] == ' ') continue; 1567 if (blank && src[i] != ' ') { 1568 dst[j++] = src[i]; 1569 blank = 0; 1570 continue; 1571 } 1572 if (src[i] == ' ') { 1573 blank = 1; 1574 if (i == 0) 1575 continue; 1576 } 1577 dst[j++] = src[i]; 1578 } 1579 if (j < len) 1580 dst[j] = 0x00; 1581 } 1582 #endif 1583 1584 void 1585 ata_timeout(struct ata_request *request) 1586 { 1587 struct ata_channel *ch; 1588 1589 ch = device_get_softc(request->parent); 1590 //request->flags |= ATA_R_DEBUG; 1591 ATA_DEBUG_RQ(request, "timeout"); 1592 1593 /* 1594 * If we have an ATA_ACTIVE request running, we flag the request 1595 * ATA_R_TIMEOUT so ata_cam_end_transaction()/ata_finish() will handle 1596 * it correctly. 1597 * Also, NULL out the running request so we wont loose the race with 1598 * an eventual interrupt arriving late. 1599 */ 1600 if (ch->state == ATA_ACTIVE) { 1601 request->flags |= ATA_R_TIMEOUT; 1602 if (ch->dma.unload) 1603 ch->dma.unload(request); 1604 ch->running = NULL; 1605 ch->state = ATA_IDLE; 1606 #ifdef ATA_CAM 1607 ata_cam_end_transaction(ch->dev, request); 1608 #endif 1609 mtx_unlock(&ch->state_mtx); 1610 #ifndef ATA_CAM 1611 ATA_LOCKING(ch->dev, ATA_LF_UNLOCK); 1612 ata_finish(request); 1613 #endif 1614 } else 1615 mtx_unlock(&ch->state_mtx); 1616 } 1617 1618 #ifdef ATA_CAM 1619 static void 1620 ata_cam_begin_transaction(device_t dev, union ccb *ccb) 1621 { 1622 struct ata_channel *ch = device_get_softc(dev); 1623 struct ata_request *request; 1624 1625 if (!(request = ata_alloc_request())) { 1626 device_printf(dev, "FAILURE - out of memory in start\n"); 1627 ccb->ccb_h.status = CAM_REQ_INVALID; 1628 xpt_done(ccb); 1629 return; 1630 } 1631 bzero(request, sizeof(*request)); 1632 1633 /* setup request */ 1634 request->dev = NULL; 1635 request->parent = dev; 1636 request->unit = ccb->ccb_h.target_id; 1637 if (ccb->ccb_h.func_code == XPT_ATA_IO) { 1638 request->data = ccb->ataio.data_ptr; 1639 request->bytecount = ccb->ataio.dxfer_len; 1640 request->u.ata.command = ccb->ataio.cmd.command; 1641 request->u.ata.feature = ((uint16_t)ccb->ataio.cmd.features_exp << 8) | 1642 (uint16_t)ccb->ataio.cmd.features; 1643 request->u.ata.count = ((uint16_t)ccb->ataio.cmd.sector_count_exp << 8) | 1644 (uint16_t)ccb->ataio.cmd.sector_count; 1645 if (ccb->ataio.cmd.flags & CAM_ATAIO_48BIT) { 1646 request->flags |= ATA_R_48BIT; 1647 request->u.ata.lba = 1648 ((uint64_t)ccb->ataio.cmd.lba_high_exp << 40) | 1649 ((uint64_t)ccb->ataio.cmd.lba_mid_exp << 32) | 1650 ((uint64_t)ccb->ataio.cmd.lba_low_exp << 24); 1651 } else { 1652 request->u.ata.lba = 1653 ((uint64_t)(ccb->ataio.cmd.device & 0x0f) << 24); 1654 } 1655 request->u.ata.lba |= ((uint64_t)ccb->ataio.cmd.lba_high << 16) | 1656 ((uint64_t)ccb->ataio.cmd.lba_mid << 8) | 1657 (uint64_t)ccb->ataio.cmd.lba_low; 1658 if (ccb->ataio.cmd.flags & CAM_ATAIO_NEEDRESULT) 1659 request->flags |= ATA_R_NEEDRESULT; 1660 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE && 1661 ccb->ataio.cmd.flags & CAM_ATAIO_DMA) 1662 request->flags |= ATA_R_DMA; 1663 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) 1664 request->flags |= ATA_R_READ; 1665 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT) 1666 request->flags |= ATA_R_WRITE; 1667 if (ccb->ataio.cmd.command == ATA_READ_MUL || 1668 ccb->ataio.cmd.command == ATA_READ_MUL48 || 1669 ccb->ataio.cmd.command == ATA_WRITE_MUL || 1670 ccb->ataio.cmd.command == ATA_WRITE_MUL48) { 1671 request->transfersize = min(request->bytecount, 1672 ch->curr[ccb->ccb_h.target_id].bytecount); 1673 } else 1674 request->transfersize = min(request->bytecount, 512); 1675 } else { 1676 request->data = ccb->csio.data_ptr; 1677 request->bytecount = ccb->csio.dxfer_len; 1678 bcopy((ccb->ccb_h.flags & CAM_CDB_POINTER) ? 1679 ccb->csio.cdb_io.cdb_ptr : ccb->csio.cdb_io.cdb_bytes, 1680 request->u.atapi.ccb, ccb->csio.cdb_len); 1681 request->flags |= ATA_R_ATAPI; 1682 if (ch->curr[ccb->ccb_h.target_id].atapi == 16) 1683 request->flags |= ATA_R_ATAPI16; 1684 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE && 1685 ch->curr[ccb->ccb_h.target_id].mode >= ATA_DMA) 1686 request->flags |= ATA_R_DMA; 1687 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) 1688 request->flags |= ATA_R_READ; 1689 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT) 1690 request->flags |= ATA_R_WRITE; 1691 request->transfersize = min(request->bytecount, 1692 ch->curr[ccb->ccb_h.target_id].bytecount); 1693 } 1694 request->retries = 0; 1695 request->timeout = (ccb->ccb_h.timeout + 999) / 1000; 1696 callout_init_mtx(&request->callout, &ch->state_mtx, CALLOUT_RETURNUNLOCKED); 1697 request->ccb = ccb; 1698 request->flags |= ATA_R_DATA_IN_CCB; 1699 1700 ch->running = request; 1701 ch->state = ATA_ACTIVE; 1702 if (ch->hw.begin_transaction(request) == ATA_OP_FINISHED) { 1703 ch->running = NULL; 1704 ch->state = ATA_IDLE; 1705 ata_cam_end_transaction(dev, request); 1706 return; 1707 } 1708 } 1709 1710 static void 1711 ata_cam_request_sense(device_t dev, struct ata_request *request) 1712 { 1713 struct ata_channel *ch = device_get_softc(dev); 1714 union ccb *ccb = request->ccb; 1715 1716 ch->requestsense = 1; 1717 1718 bzero(request, sizeof(*request)); 1719 request->dev = NULL; 1720 request->parent = dev; 1721 request->unit = ccb->ccb_h.target_id; 1722 request->data = (void *)&ccb->csio.sense_data; 1723 request->bytecount = ccb->csio.sense_len; 1724 request->u.atapi.ccb[0] = ATAPI_REQUEST_SENSE; 1725 request->u.atapi.ccb[4] = ccb->csio.sense_len; 1726 request->flags |= ATA_R_ATAPI; 1727 if (ch->curr[ccb->ccb_h.target_id].atapi == 16) 1728 request->flags |= ATA_R_ATAPI16; 1729 if (ch->curr[ccb->ccb_h.target_id].mode >= ATA_DMA) 1730 request->flags |= ATA_R_DMA; 1731 request->flags |= ATA_R_READ; 1732 request->transfersize = min(request->bytecount, 1733 ch->curr[ccb->ccb_h.target_id].bytecount); 1734 request->retries = 0; 1735 request->timeout = (ccb->ccb_h.timeout + 999) / 1000; 1736 callout_init_mtx(&request->callout, &ch->state_mtx, CALLOUT_RETURNUNLOCKED); 1737 request->ccb = ccb; 1738 1739 ch->running = request; 1740 ch->state = ATA_ACTIVE; 1741 if (ch->hw.begin_transaction(request) == ATA_OP_FINISHED) { 1742 ch->running = NULL; 1743 ch->state = ATA_IDLE; 1744 ata_cam_end_transaction(dev, request); 1745 return; 1746 } 1747 } 1748 1749 static void 1750 ata_cam_process_sense(device_t dev, struct ata_request *request) 1751 { 1752 struct ata_channel *ch = device_get_softc(dev); 1753 union ccb *ccb = request->ccb; 1754 int fatalerr = 0; 1755 1756 ch->requestsense = 0; 1757 1758 if (request->flags & ATA_R_TIMEOUT) 1759 fatalerr = 1; 1760 if ((request->flags & ATA_R_TIMEOUT) == 0 && 1761 (request->status & ATA_S_ERROR) == 0 && 1762 request->result == 0) { 1763 ccb->ccb_h.status |= CAM_AUTOSNS_VALID; 1764 } else { 1765 ccb->ccb_h.status &= ~CAM_STATUS_MASK; 1766 ccb->ccb_h.status |= CAM_AUTOSENSE_FAIL; 1767 } 1768 1769 ata_free_request(request); 1770 xpt_done(ccb); 1771 /* Do error recovery if needed. */ 1772 if (fatalerr) 1773 ata_reinit(dev); 1774 } 1775 1776 static void 1777 ata_cam_end_transaction(device_t dev, struct ata_request *request) 1778 { 1779 struct ata_channel *ch = device_get_softc(dev); 1780 union ccb *ccb = request->ccb; 1781 int fatalerr = 0; 1782 1783 if (ch->requestsense) { 1784 ata_cam_process_sense(dev, request); 1785 return; 1786 } 1787 1788 ccb->ccb_h.status &= ~CAM_STATUS_MASK; 1789 if (request->flags & ATA_R_TIMEOUT) { 1790 xpt_freeze_simq(ch->sim, 1); 1791 ccb->ccb_h.status &= ~CAM_STATUS_MASK; 1792 ccb->ccb_h.status |= CAM_CMD_TIMEOUT | CAM_RELEASE_SIMQ; 1793 fatalerr = 1; 1794 } else if (request->status & ATA_S_ERROR) { 1795 if (ccb->ccb_h.func_code == XPT_ATA_IO) { 1796 ccb->ccb_h.status |= CAM_ATA_STATUS_ERROR; 1797 } else { 1798 ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR; 1799 ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND; 1800 } 1801 } else if (request->result == ERESTART) 1802 ccb->ccb_h.status |= CAM_REQUEUE_REQ; 1803 else if (request->result != 0) 1804 ccb->ccb_h.status |= CAM_REQ_CMP_ERR; 1805 else 1806 ccb->ccb_h.status |= CAM_REQ_CMP; 1807 if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP && 1808 !(ccb->ccb_h.status & CAM_DEV_QFRZN)) { 1809 xpt_freeze_devq(ccb->ccb_h.path, 1); 1810 ccb->ccb_h.status |= CAM_DEV_QFRZN; 1811 } 1812 if (ccb->ccb_h.func_code == XPT_ATA_IO && 1813 ((request->status & ATA_S_ERROR) || 1814 (ccb->ataio.cmd.flags & CAM_ATAIO_NEEDRESULT))) { 1815 struct ata_res *res = &ccb->ataio.res; 1816 res->status = request->status; 1817 res->error = request->error; 1818 res->lba_low = request->u.ata.lba; 1819 res->lba_mid = request->u.ata.lba >> 8; 1820 res->lba_high = request->u.ata.lba >> 16; 1821 res->device = request->u.ata.lba >> 24; 1822 res->lba_low_exp = request->u.ata.lba >> 24; 1823 res->lba_mid_exp = request->u.ata.lba >> 32; 1824 res->lba_high_exp = request->u.ata.lba >> 40; 1825 res->sector_count = request->u.ata.count; 1826 res->sector_count_exp = request->u.ata.count >> 8; 1827 } 1828 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 1829 if (ccb->ccb_h.func_code == XPT_ATA_IO) { 1830 ccb->ataio.resid = 1831 ccb->ataio.dxfer_len - request->donecount; 1832 } else { 1833 ccb->csio.resid = 1834 ccb->csio.dxfer_len - request->donecount; 1835 } 1836 } 1837 if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_SCSI_STATUS_ERROR && 1838 (ccb->ccb_h.flags & CAM_DIS_AUTOSENSE) == 0) 1839 ata_cam_request_sense(dev, request); 1840 else { 1841 ata_free_request(request); 1842 xpt_done(ccb); 1843 } 1844 /* Do error recovery if needed. */ 1845 if (fatalerr) 1846 ata_reinit(dev); 1847 } 1848 1849 static int 1850 ata_check_ids(device_t dev, union ccb *ccb) 1851 { 1852 struct ata_channel *ch = device_get_softc(dev); 1853 1854 if (ccb->ccb_h.target_id > ((ch->flags & ATA_NO_SLAVE) ? 0 : 1)) { 1855 ccb->ccb_h.status = CAM_TID_INVALID; 1856 xpt_done(ccb); 1857 return (-1); 1858 } 1859 if (ccb->ccb_h.target_lun != 0) { 1860 ccb->ccb_h.status = CAM_LUN_INVALID; 1861 xpt_done(ccb); 1862 return (-1); 1863 } 1864 return (0); 1865 } 1866 1867 static void 1868 ataaction(struct cam_sim *sim, union ccb *ccb) 1869 { 1870 device_t dev, parent; 1871 struct ata_channel *ch; 1872 1873 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("ataaction func_code=%x\n", 1874 ccb->ccb_h.func_code)); 1875 1876 ch = (struct ata_channel *)cam_sim_softc(sim); 1877 dev = ch->dev; 1878 switch (ccb->ccb_h.func_code) { 1879 /* Common cases first */ 1880 case XPT_ATA_IO: /* Execute the requested I/O operation */ 1881 case XPT_SCSI_IO: 1882 if (ata_check_ids(dev, ccb)) 1883 return; 1884 if ((ch->devices & ((ATA_ATA_MASTER | ATA_ATAPI_MASTER) 1885 << ccb->ccb_h.target_id)) == 0) { 1886 ccb->ccb_h.status = CAM_SEL_TIMEOUT; 1887 break; 1888 } 1889 if (ch->running) 1890 device_printf(dev, "already running!\n"); 1891 if (ccb->ccb_h.func_code == XPT_ATA_IO && 1892 (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) && 1893 (ccb->ataio.cmd.control & ATA_A_RESET)) { 1894 struct ata_res *res = &ccb->ataio.res; 1895 1896 bzero(res, sizeof(*res)); 1897 if (ch->devices & (ATA_ATA_MASTER << ccb->ccb_h.target_id)) { 1898 res->lba_high = 0; 1899 res->lba_mid = 0; 1900 } else { 1901 res->lba_high = 0xeb; 1902 res->lba_mid = 0x14; 1903 } 1904 ccb->ccb_h.status = CAM_REQ_CMP; 1905 break; 1906 } 1907 ata_cam_begin_transaction(dev, ccb); 1908 return; 1909 case XPT_EN_LUN: /* Enable LUN as a target */ 1910 case XPT_TARGET_IO: /* Execute target I/O request */ 1911 case XPT_ACCEPT_TARGET_IO: /* Accept Host Target Mode CDB */ 1912 case XPT_CONT_TARGET_IO: /* Continue Host Target I/O Connection*/ 1913 case XPT_ABORT: /* Abort the specified CCB */ 1914 /* XXX Implement */ 1915 ccb->ccb_h.status = CAM_REQ_INVALID; 1916 break; 1917 case XPT_SET_TRAN_SETTINGS: 1918 { 1919 struct ccb_trans_settings *cts = &ccb->cts; 1920 struct ata_cam_device *d; 1921 1922 if (ata_check_ids(dev, ccb)) 1923 return; 1924 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 1925 d = &ch->curr[ccb->ccb_h.target_id]; 1926 else 1927 d = &ch->user[ccb->ccb_h.target_id]; 1928 if (ch->flags & ATA_SATA) { 1929 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_REVISION) 1930 d->revision = cts->xport_specific.sata.revision; 1931 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_MODE) { 1932 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) { 1933 d->mode = ATA_SETMODE(ch->dev, 1934 ccb->ccb_h.target_id, 1935 cts->xport_specific.sata.mode); 1936 } else 1937 d->mode = cts->xport_specific.sata.mode; 1938 } 1939 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_BYTECOUNT) 1940 d->bytecount = min(8192, cts->xport_specific.sata.bytecount); 1941 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_ATAPI) 1942 d->atapi = cts->xport_specific.sata.atapi; 1943 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_CAPS) 1944 d->caps = cts->xport_specific.sata.caps; 1945 } else { 1946 if (cts->xport_specific.ata.valid & CTS_ATA_VALID_MODE) { 1947 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) { 1948 d->mode = ATA_SETMODE(ch->dev, 1949 ccb->ccb_h.target_id, 1950 cts->xport_specific.ata.mode); 1951 } else 1952 d->mode = cts->xport_specific.ata.mode; 1953 } 1954 if (cts->xport_specific.ata.valid & CTS_ATA_VALID_BYTECOUNT) 1955 d->bytecount = cts->xport_specific.ata.bytecount; 1956 if (cts->xport_specific.ata.valid & CTS_ATA_VALID_ATAPI) 1957 d->atapi = cts->xport_specific.ata.atapi; 1958 if (cts->xport_specific.ata.valid & CTS_ATA_VALID_CAPS) 1959 d->caps = cts->xport_specific.ata.caps; 1960 } 1961 ccb->ccb_h.status = CAM_REQ_CMP; 1962 break; 1963 } 1964 case XPT_GET_TRAN_SETTINGS: 1965 { 1966 struct ccb_trans_settings *cts = &ccb->cts; 1967 struct ata_cam_device *d; 1968 1969 if (ata_check_ids(dev, ccb)) 1970 return; 1971 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 1972 d = &ch->curr[ccb->ccb_h.target_id]; 1973 else 1974 d = &ch->user[ccb->ccb_h.target_id]; 1975 cts->protocol = PROTO_UNSPECIFIED; 1976 cts->protocol_version = PROTO_VERSION_UNSPECIFIED; 1977 if (ch->flags & ATA_SATA) { 1978 cts->transport = XPORT_SATA; 1979 cts->transport_version = XPORT_VERSION_UNSPECIFIED; 1980 cts->xport_specific.sata.valid = 0; 1981 cts->xport_specific.sata.mode = d->mode; 1982 cts->xport_specific.sata.valid |= CTS_SATA_VALID_MODE; 1983 cts->xport_specific.sata.bytecount = d->bytecount; 1984 cts->xport_specific.sata.valid |= CTS_SATA_VALID_BYTECOUNT; 1985 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) { 1986 cts->xport_specific.sata.revision = 1987 ATA_GETREV(dev, ccb->ccb_h.target_id); 1988 if (cts->xport_specific.sata.revision != 0xff) { 1989 cts->xport_specific.sata.valid |= 1990 CTS_SATA_VALID_REVISION; 1991 } 1992 cts->xport_specific.sata.caps = 1993 d->caps & CTS_SATA_CAPS_D; 1994 if (ch->pm_level) { 1995 cts->xport_specific.sata.caps |= 1996 CTS_SATA_CAPS_H_PMREQ; 1997 } 1998 cts->xport_specific.sata.caps &= 1999 ch->user[ccb->ccb_h.target_id].caps; 2000 } else { 2001 cts->xport_specific.sata.revision = d->revision; 2002 cts->xport_specific.sata.valid |= CTS_SATA_VALID_REVISION; 2003 cts->xport_specific.sata.caps = d->caps; 2004 } 2005 cts->xport_specific.sata.valid |= CTS_SATA_VALID_CAPS; 2006 cts->xport_specific.sata.atapi = d->atapi; 2007 cts->xport_specific.sata.valid |= CTS_SATA_VALID_ATAPI; 2008 } else { 2009 cts->transport = XPORT_ATA; 2010 cts->transport_version = XPORT_VERSION_UNSPECIFIED; 2011 cts->xport_specific.ata.valid = 0; 2012 cts->xport_specific.ata.mode = d->mode; 2013 cts->xport_specific.ata.valid |= CTS_ATA_VALID_MODE; 2014 cts->xport_specific.ata.bytecount = d->bytecount; 2015 cts->xport_specific.ata.valid |= CTS_ATA_VALID_BYTECOUNT; 2016 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) { 2017 cts->xport_specific.ata.caps = 2018 d->caps & CTS_ATA_CAPS_D; 2019 if (!(ch->flags & ATA_NO_48BIT_DMA)) 2020 cts->xport_specific.ata.caps |= 2021 CTS_ATA_CAPS_H_DMA48; 2022 cts->xport_specific.ata.caps &= 2023 ch->user[ccb->ccb_h.target_id].caps; 2024 } else 2025 cts->xport_specific.ata.caps = d->caps; 2026 cts->xport_specific.ata.valid |= CTS_ATA_VALID_CAPS; 2027 cts->xport_specific.ata.atapi = d->atapi; 2028 cts->xport_specific.ata.valid |= CTS_ATA_VALID_ATAPI; 2029 } 2030 ccb->ccb_h.status = CAM_REQ_CMP; 2031 break; 2032 } 2033 case XPT_RESET_BUS: /* Reset the specified SCSI bus */ 2034 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */ 2035 ata_reinit(dev); 2036 ccb->ccb_h.status = CAM_REQ_CMP; 2037 break; 2038 case XPT_TERM_IO: /* Terminate the I/O process */ 2039 /* XXX Implement */ 2040 ccb->ccb_h.status = CAM_REQ_INVALID; 2041 break; 2042 case XPT_PATH_INQ: /* Path routing inquiry */ 2043 { 2044 struct ccb_pathinq *cpi = &ccb->cpi; 2045 2046 parent = device_get_parent(dev); 2047 cpi->version_num = 1; /* XXX??? */ 2048 cpi->hba_inquiry = PI_SDTR_ABLE; 2049 cpi->target_sprt = 0; 2050 cpi->hba_misc = PIM_SEQSCAN; 2051 cpi->hba_eng_cnt = 0; 2052 if (ch->flags & ATA_NO_SLAVE) 2053 cpi->max_target = 0; 2054 else 2055 cpi->max_target = 1; 2056 cpi->max_lun = 0; 2057 cpi->initiator_id = 0; 2058 cpi->bus_id = cam_sim_bus(sim); 2059 if (ch->flags & ATA_SATA) 2060 cpi->base_transfer_speed = 150000; 2061 else 2062 cpi->base_transfer_speed = 3300; 2063 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); 2064 strncpy(cpi->hba_vid, "ATA", HBA_IDLEN); 2065 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); 2066 cpi->unit_number = cam_sim_unit(sim); 2067 if (ch->flags & ATA_SATA) 2068 cpi->transport = XPORT_SATA; 2069 else 2070 cpi->transport = XPORT_ATA; 2071 cpi->transport_version = XPORT_VERSION_UNSPECIFIED; 2072 cpi->protocol = PROTO_ATA; 2073 cpi->protocol_version = PROTO_VERSION_UNSPECIFIED; 2074 cpi->maxio = ch->dma.max_iosize ? ch->dma.max_iosize : DFLTPHYS; 2075 if (device_get_devclass(device_get_parent(parent)) == 2076 devclass_find("pci")) { 2077 cpi->hba_vendor = pci_get_vendor(parent); 2078 cpi->hba_device = pci_get_device(parent); 2079 cpi->hba_subvendor = pci_get_subvendor(parent); 2080 cpi->hba_subdevice = pci_get_subdevice(parent); 2081 } 2082 cpi->ccb_h.status = CAM_REQ_CMP; 2083 break; 2084 } 2085 default: 2086 ccb->ccb_h.status = CAM_REQ_INVALID; 2087 break; 2088 } 2089 xpt_done(ccb); 2090 } 2091 2092 static void 2093 atapoll(struct cam_sim *sim) 2094 { 2095 struct ata_channel *ch = (struct ata_channel *)cam_sim_softc(sim); 2096 2097 ata_interrupt_locked(ch); 2098 } 2099 #endif 2100 2101 /* 2102 * module handeling 2103 */ 2104 static int 2105 ata_module_event_handler(module_t mod, int what, void *arg) 2106 { 2107 #ifndef ATA_CAM 2108 static struct cdev *atacdev; 2109 #endif 2110 2111 switch (what) { 2112 case MOD_LOAD: 2113 #ifndef ATA_CAM 2114 /* register controlling device */ 2115 atacdev = make_dev(&ata_cdevsw, 0, UID_ROOT, GID_OPERATOR, 0600, "ata"); 2116 2117 if (cold) { 2118 /* register boot attach to be run when interrupts are enabled */ 2119 if (!(ata_delayed_attach = (struct intr_config_hook *) 2120 malloc(sizeof(struct intr_config_hook), 2121 M_TEMP, M_NOWAIT | M_ZERO))) { 2122 printf("ata: malloc of delayed attach hook failed\n"); 2123 return EIO; 2124 } 2125 ata_delayed_attach->ich_func = (void*)ata_boot_attach; 2126 if (config_intrhook_establish(ata_delayed_attach) != 0) { 2127 printf("ata: config_intrhook_establish failed\n"); 2128 free(ata_delayed_attach, M_TEMP); 2129 } 2130 } 2131 #endif 2132 return 0; 2133 2134 case MOD_UNLOAD: 2135 #ifndef ATA_CAM 2136 /* deregister controlling device */ 2137 destroy_dev(atacdev); 2138 #endif 2139 return 0; 2140 2141 default: 2142 return EOPNOTSUPP; 2143 } 2144 } 2145 2146 static moduledata_t ata_moduledata = { "ata", ata_module_event_handler, NULL }; 2147 DECLARE_MODULE(ata, ata_moduledata, SI_SUB_CONFIGURE, SI_ORDER_SECOND); 2148 MODULE_VERSION(ata, 1); 2149 #ifdef ATA_CAM 2150 MODULE_DEPEND(ata, cam, 1, 1, 1); 2151 #endif 2152 2153 static void 2154 ata_init(void) 2155 { 2156 ata_request_zone = uma_zcreate("ata_request", sizeof(struct ata_request), 2157 NULL, NULL, NULL, NULL, 0, 0); 2158 ata_composite_zone = uma_zcreate("ata_composite", 2159 sizeof(struct ata_composite), 2160 NULL, NULL, NULL, NULL, 0, 0); 2161 } 2162 SYSINIT(ata_register, SI_SUB_DRIVERS, SI_ORDER_SECOND, ata_init, NULL); 2163 2164 static void 2165 ata_uninit(void) 2166 { 2167 uma_zdestroy(ata_composite_zone); 2168 uma_zdestroy(ata_request_zone); 2169 } 2170 SYSUNINIT(ata_unregister, SI_SUB_DRIVERS, SI_ORDER_SECOND, ata_uninit, NULL);
Cache object: 7b6b5ac1d05ee88539ff2b1537515ef0
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